devices.c 15 KB

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  1. /*
  2. * Copyright (C) 2010,2011 Google, Inc.
  3. *
  4. * Author:
  5. * Colin Cross <ccross@android.com>
  6. * Erik Gilling <ccross@android.com>
  7. *
  8. * This software is licensed under the terms of the GNU General Public
  9. * License version 2, as published by the Free Software Foundation, and
  10. * may be copied, distributed, and modified under those terms.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. */
  18. #include <linux/resource.h>
  19. #include <linux/platform_device.h>
  20. #include <linux/dma-mapping.h>
  21. #include <linux/fsl_devices.h>
  22. #include <linux/serial_8250.h>
  23. #include <linux/i2c-tegra.h>
  24. #include <asm/pmu.h>
  25. #include <mach/irqs.h>
  26. #include <mach/iomap.h>
  27. #include <mach/dma.h>
  28. #include <mach/usb_phy.h>
  29. #include "gpio-names.h"
  30. #include "devices.h"
  31. static struct resource gpio_resource[] = {
  32. [0] = {
  33. .start = TEGRA_GPIO_BASE,
  34. .end = TEGRA_GPIO_BASE + TEGRA_GPIO_SIZE-1,
  35. .flags = IORESOURCE_MEM,
  36. },
  37. [1] = {
  38. .start = INT_GPIO1,
  39. .end = INT_GPIO1,
  40. .flags = IORESOURCE_IRQ,
  41. },
  42. [2] = {
  43. .start = INT_GPIO2,
  44. .end = INT_GPIO2,
  45. .flags = IORESOURCE_IRQ,
  46. },
  47. [3] = {
  48. .start = INT_GPIO3,
  49. .end = INT_GPIO3,
  50. .flags = IORESOURCE_IRQ,
  51. },
  52. [4] = {
  53. .start = INT_GPIO4,
  54. .end = INT_GPIO4,
  55. .flags = IORESOURCE_IRQ,
  56. },
  57. [5] = {
  58. .start = INT_GPIO5,
  59. .end = INT_GPIO5,
  60. .flags = IORESOURCE_IRQ,
  61. },
  62. [6] = {
  63. .start = INT_GPIO6,
  64. .end = INT_GPIO6,
  65. .flags = IORESOURCE_IRQ,
  66. },
  67. [7] = {
  68. .start = INT_GPIO7,
  69. .end = INT_GPIO7,
  70. .flags = IORESOURCE_IRQ,
  71. },
  72. };
  73. struct platform_device tegra_gpio_device = {
  74. .name = "tegra-gpio",
  75. .id = -1,
  76. .resource = gpio_resource,
  77. .num_resources = ARRAY_SIZE(gpio_resource),
  78. };
  79. static struct resource pinmux_resource[] = {
  80. [0] = {
  81. /* Tri-state registers */
  82. .start = TEGRA_APB_MISC_BASE + 0x14,
  83. .end = TEGRA_APB_MISC_BASE + 0x20 + 3,
  84. .flags = IORESOURCE_MEM,
  85. },
  86. [1] = {
  87. /* Mux registers */
  88. .start = TEGRA_APB_MISC_BASE + 0x80,
  89. .end = TEGRA_APB_MISC_BASE + 0x9c + 3,
  90. .flags = IORESOURCE_MEM,
  91. },
  92. [2] = {
  93. /* Pull-up/down registers */
  94. .start = TEGRA_APB_MISC_BASE + 0xa0,
  95. .end = TEGRA_APB_MISC_BASE + 0xb0 + 3,
  96. .flags = IORESOURCE_MEM,
  97. },
  98. [3] = {
  99. /* Pad control registers */
  100. .start = TEGRA_APB_MISC_BASE + 0x868,
  101. .end = TEGRA_APB_MISC_BASE + 0x90c + 3,
  102. .flags = IORESOURCE_MEM,
  103. },
  104. };
  105. struct platform_device tegra_pinmux_device = {
  106. .name = "tegra-pinmux",
  107. .id = -1,
  108. .resource = pinmux_resource,
  109. .num_resources = ARRAY_SIZE(pinmux_resource),
  110. };
  111. static struct resource i2c_resource1[] = {
  112. [0] = {
  113. .start = INT_I2C,
  114. .end = INT_I2C,
  115. .flags = IORESOURCE_IRQ,
  116. },
  117. [1] = {
  118. .start = TEGRA_I2C_BASE,
  119. .end = TEGRA_I2C_BASE + TEGRA_I2C_SIZE-1,
  120. .flags = IORESOURCE_MEM,
  121. },
  122. };
  123. static struct resource i2c_resource2[] = {
  124. [0] = {
  125. .start = INT_I2C2,
  126. .end = INT_I2C2,
  127. .flags = IORESOURCE_IRQ,
  128. },
  129. [1] = {
  130. .start = TEGRA_I2C2_BASE,
  131. .end = TEGRA_I2C2_BASE + TEGRA_I2C2_SIZE-1,
  132. .flags = IORESOURCE_MEM,
  133. },
  134. };
  135. static struct resource i2c_resource3[] = {
  136. [0] = {
  137. .start = INT_I2C3,
  138. .end = INT_I2C3,
  139. .flags = IORESOURCE_IRQ,
  140. },
  141. [1] = {
  142. .start = TEGRA_I2C3_BASE,
  143. .end = TEGRA_I2C3_BASE + TEGRA_I2C3_SIZE-1,
  144. .flags = IORESOURCE_MEM,
  145. },
  146. };
  147. static struct resource i2c_resource4[] = {
  148. [0] = {
  149. .start = INT_DVC,
  150. .end = INT_DVC,
  151. .flags = IORESOURCE_IRQ,
  152. },
  153. [1] = {
  154. .start = TEGRA_DVC_BASE,
  155. .end = TEGRA_DVC_BASE + TEGRA_DVC_SIZE-1,
  156. .flags = IORESOURCE_MEM,
  157. },
  158. };
  159. static struct tegra_i2c_platform_data tegra_i2c1_platform_data = {
  160. .bus_clk_rate = 400000,
  161. };
  162. static struct tegra_i2c_platform_data tegra_i2c2_platform_data = {
  163. .bus_clk_rate = 400000,
  164. };
  165. static struct tegra_i2c_platform_data tegra_i2c3_platform_data = {
  166. .bus_clk_rate = 400000,
  167. };
  168. static struct tegra_i2c_platform_data tegra_dvc_platform_data = {
  169. .bus_clk_rate = 400000,
  170. };
  171. struct platform_device tegra_i2c_device1 = {
  172. .name = "tegra-i2c",
  173. .id = 0,
  174. .resource = i2c_resource1,
  175. .num_resources = ARRAY_SIZE(i2c_resource1),
  176. .dev = {
  177. .platform_data = &tegra_i2c1_platform_data,
  178. },
  179. };
  180. struct platform_device tegra_i2c_device2 = {
  181. .name = "tegra-i2c",
  182. .id = 1,
  183. .resource = i2c_resource2,
  184. .num_resources = ARRAY_SIZE(i2c_resource2),
  185. .dev = {
  186. .platform_data = &tegra_i2c2_platform_data,
  187. },
  188. };
  189. struct platform_device tegra_i2c_device3 = {
  190. .name = "tegra-i2c",
  191. .id = 2,
  192. .resource = i2c_resource3,
  193. .num_resources = ARRAY_SIZE(i2c_resource3),
  194. .dev = {
  195. .platform_data = &tegra_i2c3_platform_data,
  196. },
  197. };
  198. struct platform_device tegra_i2c_device4 = {
  199. .name = "tegra-i2c",
  200. .id = 3,
  201. .resource = i2c_resource4,
  202. .num_resources = ARRAY_SIZE(i2c_resource4),
  203. .dev = {
  204. .platform_data = &tegra_dvc_platform_data,
  205. },
  206. };
  207. static struct resource spi_resource1[] = {
  208. [0] = {
  209. .start = INT_S_LINK1,
  210. .end = INT_S_LINK1,
  211. .flags = IORESOURCE_IRQ,
  212. },
  213. [1] = {
  214. .start = TEGRA_SPI1_BASE,
  215. .end = TEGRA_SPI1_BASE + TEGRA_SPI1_SIZE-1,
  216. .flags = IORESOURCE_MEM,
  217. },
  218. };
  219. static struct resource spi_resource2[] = {
  220. [0] = {
  221. .start = INT_SPI_2,
  222. .end = INT_SPI_2,
  223. .flags = IORESOURCE_IRQ,
  224. },
  225. [1] = {
  226. .start = TEGRA_SPI2_BASE,
  227. .end = TEGRA_SPI2_BASE + TEGRA_SPI2_SIZE-1,
  228. .flags = IORESOURCE_MEM,
  229. },
  230. };
  231. static struct resource spi_resource3[] = {
  232. [0] = {
  233. .start = INT_SPI_3,
  234. .end = INT_SPI_3,
  235. .flags = IORESOURCE_IRQ,
  236. },
  237. [1] = {
  238. .start = TEGRA_SPI3_BASE,
  239. .end = TEGRA_SPI3_BASE + TEGRA_SPI3_SIZE-1,
  240. .flags = IORESOURCE_MEM,
  241. },
  242. };
  243. static struct resource spi_resource4[] = {
  244. [0] = {
  245. .start = INT_SPI_4,
  246. .end = INT_SPI_4,
  247. .flags = IORESOURCE_IRQ,
  248. },
  249. [1] = {
  250. .start = TEGRA_SPI4_BASE,
  251. .end = TEGRA_SPI4_BASE + TEGRA_SPI4_SIZE-1,
  252. .flags = IORESOURCE_MEM,
  253. },
  254. };
  255. struct platform_device tegra_spi_device1 = {
  256. .name = "spi_tegra",
  257. .id = 0,
  258. .resource = spi_resource1,
  259. .num_resources = ARRAY_SIZE(spi_resource1),
  260. .dev = {
  261. .coherent_dma_mask = 0xffffffff,
  262. },
  263. };
  264. struct platform_device tegra_spi_device2 = {
  265. .name = "spi_tegra",
  266. .id = 1,
  267. .resource = spi_resource2,
  268. .num_resources = ARRAY_SIZE(spi_resource2),
  269. .dev = {
  270. .coherent_dma_mask = 0xffffffff,
  271. },
  272. };
  273. struct platform_device tegra_spi_device3 = {
  274. .name = "spi_tegra",
  275. .id = 2,
  276. .resource = spi_resource3,
  277. .num_resources = ARRAY_SIZE(spi_resource3),
  278. .dev = {
  279. .coherent_dma_mask = 0xffffffff,
  280. },
  281. };
  282. struct platform_device tegra_spi_device4 = {
  283. .name = "spi_tegra",
  284. .id = 3,
  285. .resource = spi_resource4,
  286. .num_resources = ARRAY_SIZE(spi_resource4),
  287. .dev = {
  288. .coherent_dma_mask = 0xffffffff,
  289. },
  290. };
  291. static struct resource sdhci_resource1[] = {
  292. [0] = {
  293. .start = INT_SDMMC1,
  294. .end = INT_SDMMC1,
  295. .flags = IORESOURCE_IRQ,
  296. },
  297. [1] = {
  298. .start = TEGRA_SDMMC1_BASE,
  299. .end = TEGRA_SDMMC1_BASE + TEGRA_SDMMC1_SIZE-1,
  300. .flags = IORESOURCE_MEM,
  301. },
  302. };
  303. static struct resource sdhci_resource2[] = {
  304. [0] = {
  305. .start = INT_SDMMC2,
  306. .end = INT_SDMMC2,
  307. .flags = IORESOURCE_IRQ,
  308. },
  309. [1] = {
  310. .start = TEGRA_SDMMC2_BASE,
  311. .end = TEGRA_SDMMC2_BASE + TEGRA_SDMMC2_SIZE-1,
  312. .flags = IORESOURCE_MEM,
  313. },
  314. };
  315. static struct resource sdhci_resource3[] = {
  316. [0] = {
  317. .start = INT_SDMMC3,
  318. .end = INT_SDMMC3,
  319. .flags = IORESOURCE_IRQ,
  320. },
  321. [1] = {
  322. .start = TEGRA_SDMMC3_BASE,
  323. .end = TEGRA_SDMMC3_BASE + TEGRA_SDMMC3_SIZE-1,
  324. .flags = IORESOURCE_MEM,
  325. },
  326. };
  327. static struct resource sdhci_resource4[] = {
  328. [0] = {
  329. .start = INT_SDMMC4,
  330. .end = INT_SDMMC4,
  331. .flags = IORESOURCE_IRQ,
  332. },
  333. [1] = {
  334. .start = TEGRA_SDMMC4_BASE,
  335. .end = TEGRA_SDMMC4_BASE + TEGRA_SDMMC4_SIZE-1,
  336. .flags = IORESOURCE_MEM,
  337. },
  338. };
  339. /* board files should fill in platform_data register the devices themselvs.
  340. * See board-harmony.c for an example
  341. */
  342. struct platform_device tegra_sdhci_device1 = {
  343. .name = "sdhci-tegra",
  344. .id = 0,
  345. .resource = sdhci_resource1,
  346. .num_resources = ARRAY_SIZE(sdhci_resource1),
  347. };
  348. struct platform_device tegra_sdhci_device2 = {
  349. .name = "sdhci-tegra",
  350. .id = 1,
  351. .resource = sdhci_resource2,
  352. .num_resources = ARRAY_SIZE(sdhci_resource2),
  353. };
  354. struct platform_device tegra_sdhci_device3 = {
  355. .name = "sdhci-tegra",
  356. .id = 2,
  357. .resource = sdhci_resource3,
  358. .num_resources = ARRAY_SIZE(sdhci_resource3),
  359. };
  360. struct platform_device tegra_sdhci_device4 = {
  361. .name = "sdhci-tegra",
  362. .id = 3,
  363. .resource = sdhci_resource4,
  364. .num_resources = ARRAY_SIZE(sdhci_resource4),
  365. };
  366. static struct resource tegra_usb1_resources[] = {
  367. [0] = {
  368. .start = TEGRA_USB_BASE,
  369. .end = TEGRA_USB_BASE + TEGRA_USB_SIZE - 1,
  370. .flags = IORESOURCE_MEM,
  371. },
  372. [1] = {
  373. .start = INT_USB,
  374. .end = INT_USB,
  375. .flags = IORESOURCE_IRQ,
  376. },
  377. };
  378. static struct resource tegra_usb2_resources[] = {
  379. [0] = {
  380. .start = TEGRA_USB2_BASE,
  381. .end = TEGRA_USB2_BASE + TEGRA_USB2_SIZE - 1,
  382. .flags = IORESOURCE_MEM,
  383. },
  384. [1] = {
  385. .start = INT_USB2,
  386. .end = INT_USB2,
  387. .flags = IORESOURCE_IRQ,
  388. },
  389. };
  390. static struct resource tegra_usb3_resources[] = {
  391. [0] = {
  392. .start = TEGRA_USB3_BASE,
  393. .end = TEGRA_USB3_BASE + TEGRA_USB3_SIZE - 1,
  394. .flags = IORESOURCE_MEM,
  395. },
  396. [1] = {
  397. .start = INT_USB3,
  398. .end = INT_USB3,
  399. .flags = IORESOURCE_IRQ,
  400. },
  401. };
  402. static struct tegra_ulpi_config tegra_ehci2_ulpi_phy_config = {
  403. /* All existing boards use GPIO PV0 for phy reset */
  404. .reset_gpio = TEGRA_GPIO_PV0,
  405. .clk = "cdev2",
  406. };
  407. struct tegra_ehci_platform_data tegra_ehci1_pdata = {
  408. .operating_mode = TEGRA_USB_OTG,
  409. .power_down_on_bus_suspend = 1,
  410. };
  411. struct tegra_ehci_platform_data tegra_ehci2_pdata = {
  412. .phy_config = &tegra_ehci2_ulpi_phy_config,
  413. .operating_mode = TEGRA_USB_HOST,
  414. .power_down_on_bus_suspend = 1,
  415. };
  416. struct tegra_ehci_platform_data tegra_ehci3_pdata = {
  417. .operating_mode = TEGRA_USB_HOST,
  418. .power_down_on_bus_suspend = 1,
  419. };
  420. static u64 tegra_ehci_dmamask = DMA_BIT_MASK(32);
  421. struct platform_device tegra_ehci1_device = {
  422. .name = "tegra-ehci",
  423. .id = 0,
  424. .dev = {
  425. .dma_mask = &tegra_ehci_dmamask,
  426. .coherent_dma_mask = DMA_BIT_MASK(32),
  427. .platform_data = &tegra_ehci1_pdata,
  428. },
  429. .resource = tegra_usb1_resources,
  430. .num_resources = ARRAY_SIZE(tegra_usb1_resources),
  431. };
  432. struct platform_device tegra_ehci2_device = {
  433. .name = "tegra-ehci",
  434. .id = 1,
  435. .dev = {
  436. .dma_mask = &tegra_ehci_dmamask,
  437. .coherent_dma_mask = DMA_BIT_MASK(32),
  438. .platform_data = &tegra_ehci2_pdata,
  439. },
  440. .resource = tegra_usb2_resources,
  441. .num_resources = ARRAY_SIZE(tegra_usb2_resources),
  442. };
  443. struct platform_device tegra_ehci3_device = {
  444. .name = "tegra-ehci",
  445. .id = 2,
  446. .dev = {
  447. .dma_mask = &tegra_ehci_dmamask,
  448. .coherent_dma_mask = DMA_BIT_MASK(32),
  449. .platform_data = &tegra_ehci3_pdata,
  450. },
  451. .resource = tegra_usb3_resources,
  452. .num_resources = ARRAY_SIZE(tegra_usb3_resources),
  453. };
  454. static struct resource tegra_pmu_resources[] = {
  455. [0] = {
  456. .start = INT_CPU0_PMU_INTR,
  457. .end = INT_CPU0_PMU_INTR,
  458. .flags = IORESOURCE_IRQ,
  459. },
  460. [1] = {
  461. .start = INT_CPU1_PMU_INTR,
  462. .end = INT_CPU1_PMU_INTR,
  463. .flags = IORESOURCE_IRQ,
  464. },
  465. };
  466. struct platform_device tegra_pmu_device = {
  467. .name = "arm-pmu",
  468. .id = ARM_PMU_DEVICE_CPU,
  469. .num_resources = ARRAY_SIZE(tegra_pmu_resources),
  470. .resource = tegra_pmu_resources,
  471. };
  472. static struct resource tegra_uarta_resources[] = {
  473. [0] = {
  474. .start = TEGRA_UARTA_BASE,
  475. .end = TEGRA_UARTA_BASE + TEGRA_UARTA_SIZE - 1,
  476. .flags = IORESOURCE_MEM,
  477. },
  478. [1] = {
  479. .start = INT_UARTA,
  480. .end = INT_UARTA,
  481. .flags = IORESOURCE_IRQ,
  482. },
  483. };
  484. static struct resource tegra_uartb_resources[] = {
  485. [0] = {
  486. .start = TEGRA_UARTB_BASE,
  487. .end = TEGRA_UARTB_BASE + TEGRA_UARTB_SIZE - 1,
  488. .flags = IORESOURCE_MEM,
  489. },
  490. [1] = {
  491. .start = INT_UARTB,
  492. .end = INT_UARTB,
  493. .flags = IORESOURCE_IRQ,
  494. },
  495. };
  496. static struct resource tegra_uartc_resources[] = {
  497. [0] = {
  498. .start = TEGRA_UARTC_BASE,
  499. .end = TEGRA_UARTC_BASE + TEGRA_UARTC_SIZE - 1,
  500. .flags = IORESOURCE_MEM,
  501. },
  502. [1] = {
  503. .start = INT_UARTC,
  504. .end = INT_UARTC,
  505. .flags = IORESOURCE_IRQ,
  506. },
  507. };
  508. static struct resource tegra_uartd_resources[] = {
  509. [0] = {
  510. .start = TEGRA_UARTD_BASE,
  511. .end = TEGRA_UARTD_BASE + TEGRA_UARTD_SIZE - 1,
  512. .flags = IORESOURCE_MEM,
  513. },
  514. [1] = {
  515. .start = INT_UARTD,
  516. .end = INT_UARTD,
  517. .flags = IORESOURCE_IRQ,
  518. },
  519. };
  520. static struct resource tegra_uarte_resources[] = {
  521. [0] = {
  522. .start = TEGRA_UARTE_BASE,
  523. .end = TEGRA_UARTE_BASE + TEGRA_UARTE_SIZE - 1,
  524. .flags = IORESOURCE_MEM,
  525. },
  526. [1] = {
  527. .start = INT_UARTE,
  528. .end = INT_UARTE,
  529. .flags = IORESOURCE_IRQ,
  530. },
  531. };
  532. struct platform_device tegra_uarta_device = {
  533. .name = "tegra_uart",
  534. .id = 0,
  535. .num_resources = ARRAY_SIZE(tegra_uarta_resources),
  536. .resource = tegra_uarta_resources,
  537. .dev = {
  538. .coherent_dma_mask = DMA_BIT_MASK(32),
  539. },
  540. };
  541. struct platform_device tegra_uartb_device = {
  542. .name = "tegra_uart",
  543. .id = 1,
  544. .num_resources = ARRAY_SIZE(tegra_uartb_resources),
  545. .resource = tegra_uartb_resources,
  546. .dev = {
  547. .coherent_dma_mask = DMA_BIT_MASK(32),
  548. },
  549. };
  550. struct platform_device tegra_uartc_device = {
  551. .name = "tegra_uart",
  552. .id = 2,
  553. .num_resources = ARRAY_SIZE(tegra_uartc_resources),
  554. .resource = tegra_uartc_resources,
  555. .dev = {
  556. .coherent_dma_mask = DMA_BIT_MASK(32),
  557. },
  558. };
  559. struct platform_device tegra_uartd_device = {
  560. .name = "tegra_uart",
  561. .id = 3,
  562. .num_resources = ARRAY_SIZE(tegra_uartd_resources),
  563. .resource = tegra_uartd_resources,
  564. .dev = {
  565. .coherent_dma_mask = DMA_BIT_MASK(32),
  566. },
  567. };
  568. struct platform_device tegra_uarte_device = {
  569. .name = "tegra_uart",
  570. .id = 4,
  571. .num_resources = ARRAY_SIZE(tegra_uarte_resources),
  572. .resource = tegra_uarte_resources,
  573. .dev = {
  574. .coherent_dma_mask = DMA_BIT_MASK(32),
  575. },
  576. };
  577. static struct resource i2s_resource1[] = {
  578. [0] = {
  579. .start = INT_I2S1,
  580. .end = INT_I2S1,
  581. .flags = IORESOURCE_IRQ
  582. },
  583. [1] = {
  584. .start = TEGRA_DMA_REQ_SEL_I2S_1,
  585. .end = TEGRA_DMA_REQ_SEL_I2S_1,
  586. .flags = IORESOURCE_DMA
  587. },
  588. [2] = {
  589. .start = TEGRA_I2S1_BASE,
  590. .end = TEGRA_I2S1_BASE + TEGRA_I2S1_SIZE - 1,
  591. .flags = IORESOURCE_MEM
  592. }
  593. };
  594. static struct resource i2s_resource2[] = {
  595. [0] = {
  596. .start = INT_I2S2,
  597. .end = INT_I2S2,
  598. .flags = IORESOURCE_IRQ
  599. },
  600. [1] = {
  601. .start = TEGRA_DMA_REQ_SEL_I2S2_1,
  602. .end = TEGRA_DMA_REQ_SEL_I2S2_1,
  603. .flags = IORESOURCE_DMA
  604. },
  605. [2] = {
  606. .start = TEGRA_I2S2_BASE,
  607. .end = TEGRA_I2S2_BASE + TEGRA_I2S2_SIZE - 1,
  608. .flags = IORESOURCE_MEM
  609. }
  610. };
  611. struct platform_device tegra_i2s_device1 = {
  612. .name = "tegra-i2s",
  613. .id = 0,
  614. .resource = i2s_resource1,
  615. .num_resources = ARRAY_SIZE(i2s_resource1),
  616. };
  617. struct platform_device tegra_i2s_device2 = {
  618. .name = "tegra-i2s",
  619. .id = 1,
  620. .resource = i2s_resource2,
  621. .num_resources = ARRAY_SIZE(i2s_resource2),
  622. };
  623. static struct resource tegra_das_resources[] = {
  624. [0] = {
  625. .start = TEGRA_APB_MISC_DAS_BASE,
  626. .end = TEGRA_APB_MISC_DAS_BASE + TEGRA_APB_MISC_DAS_SIZE - 1,
  627. .flags = IORESOURCE_MEM,
  628. },
  629. };
  630. struct platform_device tegra_das_device = {
  631. .name = "tegra-das",
  632. .id = -1,
  633. .num_resources = ARRAY_SIZE(tegra_das_resources),
  634. .resource = tegra_das_resources,
  635. };
  636. struct platform_device tegra_pcm_device = {
  637. .name = "tegra-pcm-audio",
  638. .id = -1,
  639. };