common.c 3.4 KB

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  1. /*
  2. * arch/arm/mach-tegra/common.c
  3. *
  4. * Copyright (C) 2010 Google, Inc.
  5. *
  6. * Author:
  7. * Colin Cross <ccross@android.com>
  8. *
  9. * This software is licensed under the terms of the GNU General Public
  10. * License version 2, as published by the Free Software Foundation, and
  11. * may be copied, distributed, and modified under those terms.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. */
  19. #include <linux/init.h>
  20. #include <linux/io.h>
  21. #include <linux/clk.h>
  22. #include <linux/delay.h>
  23. #include <linux/of_irq.h>
  24. #include <asm/hardware/cache-l2x0.h>
  25. #include <asm/hardware/gic.h>
  26. #include <mach/iomap.h>
  27. #include <mach/powergate.h>
  28. #include "board.h"
  29. #include "clock.h"
  30. #include "fuse.h"
  31. #include "pmc.h"
  32. /*
  33. * Storage for debug-macro.S's state.
  34. *
  35. * This must be in .data not .bss so that it gets initialized each time the
  36. * kernel is loaded. The data is declared here rather than debug-macro.S so
  37. * that multiple inclusions of debug-macro.S point at the same data.
  38. */
  39. #define TEGRA_DEBUG_UART_OFFSET (TEGRA_DEBUG_UART_BASE & 0xFFFF)
  40. u32 tegra_uart_config[3] = {
  41. /* Debug UART initialization required */
  42. 1,
  43. /* Debug UART physical address */
  44. (u32)(IO_APB_PHYS + TEGRA_DEBUG_UART_OFFSET),
  45. /* Debug UART virtual address */
  46. (u32)(IO_APB_VIRT + TEGRA_DEBUG_UART_OFFSET),
  47. };
  48. #ifdef CONFIG_OF
  49. static const struct of_device_id tegra_dt_irq_match[] __initconst = {
  50. { .compatible = "arm,cortex-a9-gic", .data = gic_of_init },
  51. { }
  52. };
  53. void __init tegra_dt_init_irq(void)
  54. {
  55. tegra_init_irq();
  56. of_irq_init(tegra_dt_irq_match);
  57. }
  58. #endif
  59. void tegra_assert_system_reset(char mode, const char *cmd)
  60. {
  61. void __iomem *reset = IO_ADDRESS(TEGRA_PMC_BASE + 0);
  62. u32 reg;
  63. reg = readl_relaxed(reset);
  64. reg |= 0x10;
  65. writel_relaxed(reg, reset);
  66. }
  67. #ifdef CONFIG_ARCH_TEGRA_2x_SOC
  68. static __initdata struct tegra_clk_init_table tegra20_clk_init_table[] = {
  69. /* name parent rate enabled */
  70. { "clk_m", NULL, 0, true },
  71. { "pll_p", "clk_m", 216000000, true },
  72. { "pll_p_out1", "pll_p", 28800000, true },
  73. { "pll_p_out2", "pll_p", 48000000, true },
  74. { "pll_p_out3", "pll_p", 72000000, true },
  75. { "pll_p_out4", "pll_p", 108000000, true },
  76. { "sclk", "pll_p_out4", 108000000, true },
  77. { "hclk", "sclk", 108000000, true },
  78. { "pclk", "hclk", 54000000, true },
  79. { "csite", NULL, 0, true },
  80. { "emc", NULL, 0, true },
  81. { "cpu", NULL, 0, true },
  82. { NULL, NULL, 0, 0},
  83. };
  84. #endif
  85. static void __init tegra_init_cache(u32 tag_latency, u32 data_latency)
  86. {
  87. #ifdef CONFIG_CACHE_L2X0
  88. void __iomem *p = IO_ADDRESS(TEGRA_ARM_PERIF_BASE) + 0x3000;
  89. u32 aux_ctrl, cache_type;
  90. writel_relaxed(tag_latency, p + L2X0_TAG_LATENCY_CTRL);
  91. writel_relaxed(data_latency, p + L2X0_DATA_LATENCY_CTRL);
  92. cache_type = readl(p + L2X0_CACHE_TYPE);
  93. aux_ctrl = (cache_type & 0x700) << (17-8);
  94. aux_ctrl |= 0x6C000001;
  95. l2x0_init(p, aux_ctrl, 0x8200c3fe);
  96. #endif
  97. }
  98. #ifdef CONFIG_ARCH_TEGRA_2x_SOC
  99. void __init tegra20_init_early(void)
  100. {
  101. tegra_init_fuse();
  102. tegra2_init_clocks();
  103. tegra_clk_init_from_table(tegra20_clk_init_table);
  104. tegra_init_cache(0x331, 0x441);
  105. tegra_pmc_init();
  106. tegra_powergate_init();
  107. }
  108. #endif
  109. #ifdef CONFIG_ARCH_TEGRA_3x_SOC
  110. void __init tegra30_init_early(void)
  111. {
  112. tegra_init_fuse();
  113. tegra30_init_clocks();
  114. tegra_init_cache(0x441, 0x551);
  115. tegra_pmc_init();
  116. tegra_powergate_init();
  117. }
  118. #endif