board-trimslice.c 4.4 KB

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  1. /*
  2. * arch/arm/mach-tegra/board-trimslice.c
  3. *
  4. * Copyright (C) 2011 CompuLab, Ltd.
  5. * Author: Mike Rapoport <mike@compulab.co.il>
  6. *
  7. * Based on board-harmony.c
  8. * Copyright (C) 2010 Google, Inc.
  9. *
  10. * This software is licensed under the terms of the GNU General Public
  11. * License version 2, as published by the Free Software Foundation, and
  12. * may be copied, distributed, and modified under those terms.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. */
  20. #include <linux/kernel.h>
  21. #include <linux/init.h>
  22. #include <linux/platform_device.h>
  23. #include <linux/serial_8250.h>
  24. #include <linux/io.h>
  25. #include <linux/i2c.h>
  26. #include <linux/gpio.h>
  27. #include <asm/hardware/gic.h>
  28. #include <asm/mach-types.h>
  29. #include <asm/mach/arch.h>
  30. #include <asm/setup.h>
  31. #include <mach/iomap.h>
  32. #include <mach/sdhci.h>
  33. #include "board.h"
  34. #include "clock.h"
  35. #include "devices.h"
  36. #include "gpio-names.h"
  37. #include "board-trimslice.h"
  38. static struct plat_serial8250_port debug_uart_platform_data[] = {
  39. {
  40. .membase = IO_ADDRESS(TEGRA_UARTA_BASE),
  41. .mapbase = TEGRA_UARTA_BASE,
  42. .irq = INT_UARTA,
  43. .flags = UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE,
  44. .type = PORT_TEGRA,
  45. .iotype = UPIO_MEM,
  46. .regshift = 2,
  47. .uartclk = 216000000,
  48. }, {
  49. .flags = 0
  50. }
  51. };
  52. static struct platform_device debug_uart = {
  53. .name = "serial8250",
  54. .id = PLAT8250_DEV_PLATFORM,
  55. .dev = {
  56. .platform_data = debug_uart_platform_data,
  57. },
  58. };
  59. static struct tegra_sdhci_platform_data sdhci_pdata1 = {
  60. .cd_gpio = -1,
  61. .wp_gpio = -1,
  62. .power_gpio = -1,
  63. };
  64. static struct tegra_sdhci_platform_data sdhci_pdata4 = {
  65. .cd_gpio = TRIMSLICE_GPIO_SD4_CD,
  66. .wp_gpio = TRIMSLICE_GPIO_SD4_WP,
  67. .power_gpio = -1,
  68. };
  69. static struct platform_device trimslice_audio_device = {
  70. .name = "tegra-snd-trimslice",
  71. .id = 0,
  72. };
  73. static struct platform_device *trimslice_devices[] __initdata = {
  74. &debug_uart,
  75. &tegra_sdhci_device1,
  76. &tegra_sdhci_device4,
  77. &tegra_i2s_device1,
  78. &tegra_das_device,
  79. &tegra_pcm_device,
  80. &trimslice_audio_device,
  81. };
  82. static struct i2c_board_info trimslice_i2c3_board_info[] = {
  83. {
  84. I2C_BOARD_INFO("tlv320aic23", 0x1a),
  85. },
  86. {
  87. I2C_BOARD_INFO("em3027", 0x56),
  88. },
  89. };
  90. static void trimslice_i2c_init(void)
  91. {
  92. platform_device_register(&tegra_i2c_device1);
  93. platform_device_register(&tegra_i2c_device2);
  94. platform_device_register(&tegra_i2c_device3);
  95. i2c_register_board_info(2, trimslice_i2c3_board_info,
  96. ARRAY_SIZE(trimslice_i2c3_board_info));
  97. }
  98. static void trimslice_usb_init(void)
  99. {
  100. int err;
  101. platform_device_register(&tegra_ehci3_device);
  102. platform_device_register(&tegra_ehci2_device);
  103. err = gpio_request_one(TRIMSLICE_GPIO_USB1_MODE, GPIOF_OUT_INIT_HIGH,
  104. "usb1mode");
  105. if (err) {
  106. pr_err("TrimSlice: failed to obtain USB1 mode gpio: %d\n", err);
  107. return;
  108. }
  109. platform_device_register(&tegra_ehci1_device);
  110. }
  111. static void __init tegra_trimslice_fixup(struct tag *tags, char **cmdline,
  112. struct meminfo *mi)
  113. {
  114. mi->nr_banks = 2;
  115. mi->bank[0].start = PHYS_OFFSET;
  116. mi->bank[0].size = 448 * SZ_1M;
  117. mi->bank[1].start = SZ_512M;
  118. mi->bank[1].size = SZ_512M;
  119. }
  120. static __initdata struct tegra_clk_init_table trimslice_clk_init_table[] = {
  121. /* name parent rate enabled */
  122. { "uarta", "pll_p", 216000000, true },
  123. { "pll_a", "pll_p_out1", 56448000, true },
  124. { "pll_a_out0", "pll_a", 11289600, true },
  125. { "cdev1", NULL, 0, true },
  126. { "i2s1", "pll_a_out0", 11289600, false},
  127. { NULL, NULL, 0, 0},
  128. };
  129. static int __init tegra_trimslice_pci_init(void)
  130. {
  131. if (!machine_is_trimslice())
  132. return 0;
  133. return tegra_pcie_init(true, true);
  134. }
  135. subsys_initcall(tegra_trimslice_pci_init);
  136. static void __init tegra_trimslice_init(void)
  137. {
  138. tegra_clk_init_from_table(trimslice_clk_init_table);
  139. trimslice_pinmux_init();
  140. tegra_sdhci_device1.dev.platform_data = &sdhci_pdata1;
  141. tegra_sdhci_device4.dev.platform_data = &sdhci_pdata4;
  142. platform_add_devices(trimslice_devices, ARRAY_SIZE(trimslice_devices));
  143. trimslice_i2c_init();
  144. trimslice_usb_init();
  145. }
  146. MACHINE_START(TRIMSLICE, "trimslice")
  147. .atag_offset = 0x100,
  148. .fixup = tegra_trimslice_fixup,
  149. .map_io = tegra_map_common_io,
  150. .init_early = tegra20_init_early,
  151. .init_irq = tegra_init_irq,
  152. .handle_irq = gic_handle_irq,
  153. .timer = &tegra_timer,
  154. .init_machine = tegra_trimslice_init,
  155. .restart = tegra_assert_system_reset,
  156. MACHINE_END