board-dt-tegra20.c 4.8 KB

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  1. /*
  2. * nVidia Tegra device tree board support
  3. *
  4. * Copyright (C) 2010 Secret Lab Technologies, Ltd.
  5. * Copyright (C) 2010 Google, Inc.
  6. *
  7. * This software is licensed under the terms of the GNU General Public
  8. * License version 2, as published by the Free Software Foundation, and
  9. * may be copied, distributed, and modified under those terms.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. */
  17. #include <linux/kernel.h>
  18. #include <linux/init.h>
  19. #include <linux/platform_device.h>
  20. #include <linux/serial_8250.h>
  21. #include <linux/clk.h>
  22. #include <linux/dma-mapping.h>
  23. #include <linux/irqdomain.h>
  24. #include <linux/of.h>
  25. #include <linux/of_address.h>
  26. #include <linux/of_fdt.h>
  27. #include <linux/of_irq.h>
  28. #include <linux/of_platform.h>
  29. #include <linux/pda_power.h>
  30. #include <linux/io.h>
  31. #include <linux/i2c.h>
  32. #include <linux/i2c-tegra.h>
  33. #include <asm/hardware/gic.h>
  34. #include <asm/mach-types.h>
  35. #include <asm/mach/arch.h>
  36. #include <asm/mach/time.h>
  37. #include <asm/setup.h>
  38. #include <asm/hardware/gic.h>
  39. #include <mach/iomap.h>
  40. #include <mach/irqs.h>
  41. #include "board.h"
  42. #include "board-harmony.h"
  43. #include "clock.h"
  44. #include "devices.h"
  45. void harmony_pinmux_init(void);
  46. void paz00_pinmux_init(void);
  47. void seaboard_pinmux_init(void);
  48. void trimslice_pinmux_init(void);
  49. void ventana_pinmux_init(void);
  50. struct of_dev_auxdata tegra20_auxdata_lookup[] __initdata = {
  51. OF_DEV_AUXDATA("nvidia,tegra20-pinmux", TEGRA_APB_MISC_BASE + 0x14, "tegra-pinmux", NULL),
  52. OF_DEV_AUXDATA("nvidia,tegra20-gpio", TEGRA_GPIO_BASE, "tegra-gpio", NULL),
  53. OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC1_BASE, "sdhci-tegra.0", NULL),
  54. OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC2_BASE, "sdhci-tegra.1", NULL),
  55. OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC3_BASE, "sdhci-tegra.2", NULL),
  56. OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC4_BASE, "sdhci-tegra.3", NULL),
  57. OF_DEV_AUXDATA("nvidia,tegra20-i2c", TEGRA_I2C_BASE, "tegra-i2c.0", NULL),
  58. OF_DEV_AUXDATA("nvidia,tegra20-i2c", TEGRA_I2C2_BASE, "tegra-i2c.1", NULL),
  59. OF_DEV_AUXDATA("nvidia,tegra20-i2c", TEGRA_I2C3_BASE, "tegra-i2c.2", NULL),
  60. OF_DEV_AUXDATA("nvidia,tegra20-i2c-dvc", TEGRA_DVC_BASE, "tegra-i2c.3", NULL),
  61. OF_DEV_AUXDATA("nvidia,tegra20-i2s", TEGRA_I2S1_BASE, "tegra-i2s.0", NULL),
  62. OF_DEV_AUXDATA("nvidia,tegra20-i2s", TEGRA_I2S2_BASE, "tegra-i2s.1", NULL),
  63. OF_DEV_AUXDATA("nvidia,tegra20-das", TEGRA_APB_MISC_DAS_BASE, "tegra-das", NULL),
  64. OF_DEV_AUXDATA("nvidia,tegra20-ehci", TEGRA_USB_BASE, "tegra-ehci.0",
  65. &tegra_ehci1_pdata),
  66. OF_DEV_AUXDATA("nvidia,tegra20-ehci", TEGRA_USB2_BASE, "tegra-ehci.1",
  67. &tegra_ehci2_pdata),
  68. OF_DEV_AUXDATA("nvidia,tegra20-ehci", TEGRA_USB3_BASE, "tegra-ehci.2",
  69. &tegra_ehci3_pdata),
  70. {}
  71. };
  72. static __initdata struct tegra_clk_init_table tegra_dt_clk_init_table[] = {
  73. /* name parent rate enabled */
  74. { "uartd", "pll_p", 216000000, true },
  75. { "usbd", "clk_m", 12000000, false },
  76. { "usb2", "clk_m", 12000000, false },
  77. { "usb3", "clk_m", 12000000, false },
  78. { "pll_a", "pll_p_out1", 56448000, true },
  79. { "pll_a_out0", "pll_a", 11289600, true },
  80. { "cdev1", NULL, 0, true },
  81. { "i2s1", "pll_a_out0", 11289600, false},
  82. { "i2s2", "pll_a_out0", 11289600, false},
  83. { NULL, NULL, 0, 0},
  84. };
  85. static struct of_device_id tegra_dt_match_table[] __initdata = {
  86. { .compatible = "simple-bus", },
  87. {}
  88. };
  89. static struct {
  90. char *machine;
  91. void (*init)(void);
  92. } pinmux_configs[] = {
  93. { "compulab,trimslice", trimslice_pinmux_init },
  94. { "nvidia,harmony", harmony_pinmux_init },
  95. { "compal,paz00", paz00_pinmux_init },
  96. { "nvidia,seaboard", seaboard_pinmux_init },
  97. { "nvidia,ventana", ventana_pinmux_init },
  98. };
  99. static void __init tegra_dt_init(void)
  100. {
  101. int i;
  102. tegra_clk_init_from_table(tegra_dt_clk_init_table);
  103. for (i = 0; i < ARRAY_SIZE(pinmux_configs); i++) {
  104. if (of_machine_is_compatible(pinmux_configs[i].machine)) {
  105. pinmux_configs[i].init();
  106. break;
  107. }
  108. }
  109. WARN(i == ARRAY_SIZE(pinmux_configs),
  110. "Unknown platform! Pinmuxing not initialized\n");
  111. /*
  112. * Finished with the static registrations now; fill in the missing
  113. * devices
  114. */
  115. of_platform_populate(NULL, tegra_dt_match_table,
  116. tegra20_auxdata_lookup, NULL);
  117. }
  118. static const char *tegra20_dt_board_compat[] = {
  119. "nvidia,tegra20",
  120. NULL
  121. };
  122. DT_MACHINE_START(TEGRA_DT, "nVidia Tegra20 (Flattened Device Tree)")
  123. .map_io = tegra_map_common_io,
  124. .init_early = tegra20_init_early,
  125. .init_irq = tegra_dt_init_irq,
  126. .handle_irq = gic_handle_irq,
  127. .timer = &tegra_timer,
  128. .init_machine = tegra_dt_init,
  129. .restart = tegra_assert_system_reset,
  130. .dt_compat = tegra20_dt_board_compat,
  131. MACHINE_END