irq-pm.c 2.9 KB

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  1. /* arch/arm/plat-s3c64xx/irq-pm.c
  2. *
  3. * Copyright 2008 Openmoko, Inc.
  4. * Copyright 2008 Simtec Electronics
  5. * Ben Dooks <ben@simtec.co.uk>
  6. * http://armlinux.simtec.co.uk/
  7. *
  8. * S3C64XX - Interrupt handling Power Management
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. */
  14. #include <linux/kernel.h>
  15. #include <linux/syscore_ops.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/serial_core.h>
  18. #include <linux/irq.h>
  19. #include <linux/io.h>
  20. #include <mach/map.h>
  21. #include <plat/regs-serial.h>
  22. #include <plat/regs-timer.h>
  23. #include <mach/regs-gpio.h>
  24. #include <plat/cpu.h>
  25. #include <plat/pm.h>
  26. /* We handled all the IRQ types in this code, to save having to make several
  27. * small files to handle each different type separately. Having the EINT_GRP
  28. * code here shouldn't be as much bloat as the IRQ table space needed when
  29. * they are enabled. The added benefit is we ensure that these registers are
  30. * in the same state as we suspended.
  31. */
  32. static struct sleep_save irq_save[] = {
  33. SAVE_ITEM(S3C64XX_PRIORITY),
  34. SAVE_ITEM(S3C64XX_EINT0CON0),
  35. SAVE_ITEM(S3C64XX_EINT0CON1),
  36. SAVE_ITEM(S3C64XX_EINT0FLTCON0),
  37. SAVE_ITEM(S3C64XX_EINT0FLTCON1),
  38. SAVE_ITEM(S3C64XX_EINT0FLTCON2),
  39. SAVE_ITEM(S3C64XX_EINT0FLTCON3),
  40. SAVE_ITEM(S3C64XX_EINT0MASK),
  41. SAVE_ITEM(S3C64XX_TINT_CSTAT),
  42. };
  43. static struct irq_grp_save {
  44. u32 fltcon;
  45. u32 con;
  46. u32 mask;
  47. } eint_grp_save[5];
  48. static u32 irq_uart_mask[CONFIG_SERIAL_SAMSUNG_UARTS];
  49. static int s3c64xx_irq_pm_suspend(void)
  50. {
  51. struct irq_grp_save *grp = eint_grp_save;
  52. int i;
  53. S3C_PMDBG("%s: suspending IRQs\n", __func__);
  54. s3c_pm_do_save(irq_save, ARRAY_SIZE(irq_save));
  55. for (i = 0; i < CONFIG_SERIAL_SAMSUNG_UARTS; i++)
  56. irq_uart_mask[i] = __raw_readl(S3C_VA_UARTx(i) + S3C64XX_UINTM);
  57. for (i = 0; i < ARRAY_SIZE(eint_grp_save); i++, grp++) {
  58. grp->con = __raw_readl(S3C64XX_EINT12CON + (i * 4));
  59. grp->mask = __raw_readl(S3C64XX_EINT12MASK + (i * 4));
  60. grp->fltcon = __raw_readl(S3C64XX_EINT12FLTCON + (i * 4));
  61. }
  62. return 0;
  63. }
  64. static void s3c64xx_irq_pm_resume(void)
  65. {
  66. struct irq_grp_save *grp = eint_grp_save;
  67. int i;
  68. S3C_PMDBG("%s: resuming IRQs\n", __func__);
  69. s3c_pm_do_restore(irq_save, ARRAY_SIZE(irq_save));
  70. for (i = 0; i < CONFIG_SERIAL_SAMSUNG_UARTS; i++)
  71. __raw_writel(irq_uart_mask[i], S3C_VA_UARTx(i) + S3C64XX_UINTM);
  72. for (i = 0; i < ARRAY_SIZE(eint_grp_save); i++, grp++) {
  73. __raw_writel(grp->con, S3C64XX_EINT12CON + (i * 4));
  74. __raw_writel(grp->mask, S3C64XX_EINT12MASK + (i * 4));
  75. __raw_writel(grp->fltcon, S3C64XX_EINT12FLTCON + (i * 4));
  76. }
  77. S3C_PMDBG("%s: IRQ configuration restored\n", __func__);
  78. }
  79. static struct syscore_ops s3c64xx_irq_syscore_ops = {
  80. .suspend = s3c64xx_irq_pm_suspend,
  81. .resume = s3c64xx_irq_pm_resume,
  82. };
  83. static __init int s3c64xx_syscore_init(void)
  84. {
  85. register_syscore_ops(&s3c64xx_irq_syscore_ops);
  86. return 0;
  87. }
  88. core_initcall(s3c64xx_syscore_init);