usb.c 12 KB

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  1. /*
  2. * Platform level USB initialization for FS USB OTG controller on omap1 and 24xx
  3. *
  4. * Copyright (C) 2004 Texas Instruments, Inc.
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  19. */
  20. #include <linux/module.h>
  21. #include <linux/kernel.h>
  22. #include <linux/init.h>
  23. #include <linux/platform_device.h>
  24. #include <linux/io.h>
  25. #include <asm/irq.h>
  26. #include <plat/mux.h>
  27. #include <plat/usb.h>
  28. /* These routines should handle the standard chip-specific modes
  29. * for usb0/1/2 ports, covering basic mux and transceiver setup.
  30. *
  31. * Some board-*.c files will need to set up additional mux options,
  32. * like for suspend handling, vbus sensing, GPIOs, and the D+ pullup.
  33. */
  34. /* TESTED ON:
  35. * - 1611B H2 (with usb1 mini-AB) using standard Mini-B or OTG cables
  36. * - 5912 OSK OHCI (with usb0 standard-A), standard A-to-B cables
  37. * - 5912 OSK UDC, with *nonstandard* A-to-A cable
  38. * - 1510 Innovator UDC with bundled usb0 cable
  39. * - 1510 Innovator OHCI with bundled usb1/usb2 cable
  40. * - 1510 Innovator OHCI with custom usb0 cable, feeding 5V VBUS
  41. * - 1710 custom development board using alternate pin group
  42. * - 1710 H3 (with usb1 mini-AB) using standard Mini-B or OTG cables
  43. */
  44. #define INT_USB_IRQ_GEN IH2_BASE + 20
  45. #define INT_USB_IRQ_NISO IH2_BASE + 30
  46. #define INT_USB_IRQ_ISO IH2_BASE + 29
  47. #define INT_USB_IRQ_HGEN INT_USB_HHC_1
  48. #define INT_USB_IRQ_OTG IH2_BASE + 8
  49. #ifdef CONFIG_USB_GADGET_OMAP
  50. static struct resource udc_resources[] = {
  51. /* order is significant! */
  52. { /* registers */
  53. .start = UDC_BASE,
  54. .end = UDC_BASE + 0xff,
  55. .flags = IORESOURCE_MEM,
  56. }, { /* general IRQ */
  57. .start = INT_USB_IRQ_GEN,
  58. .flags = IORESOURCE_IRQ,
  59. }, { /* PIO IRQ */
  60. .start = INT_USB_IRQ_NISO,
  61. .flags = IORESOURCE_IRQ,
  62. }, { /* SOF IRQ */
  63. .start = INT_USB_IRQ_ISO,
  64. .flags = IORESOURCE_IRQ,
  65. },
  66. };
  67. static u64 udc_dmamask = ~(u32)0;
  68. static struct platform_device udc_device = {
  69. .name = "omap_udc",
  70. .id = -1,
  71. .dev = {
  72. .dma_mask = &udc_dmamask,
  73. .coherent_dma_mask = 0xffffffff,
  74. },
  75. .num_resources = ARRAY_SIZE(udc_resources),
  76. .resource = udc_resources,
  77. };
  78. static inline void udc_device_init(struct omap_usb_config *pdata)
  79. {
  80. /* IRQ numbers for omap7xx */
  81. if(cpu_is_omap7xx()) {
  82. udc_resources[1].start = INT_7XX_USB_GENI;
  83. udc_resources[2].start = INT_7XX_USB_NON_ISO;
  84. udc_resources[3].start = INT_7XX_USB_ISO;
  85. }
  86. pdata->udc_device = &udc_device;
  87. }
  88. #else
  89. static inline void udc_device_init(struct omap_usb_config *pdata)
  90. {
  91. }
  92. #endif
  93. #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
  94. /* The dmamask must be set for OHCI to work */
  95. static u64 ohci_dmamask = ~(u32)0;
  96. static struct resource ohci_resources[] = {
  97. {
  98. .start = OMAP_OHCI_BASE,
  99. .end = OMAP_OHCI_BASE + 0xff,
  100. .flags = IORESOURCE_MEM,
  101. },
  102. {
  103. .start = INT_USB_IRQ_HGEN,
  104. .flags = IORESOURCE_IRQ,
  105. },
  106. };
  107. static struct platform_device ohci_device = {
  108. .name = "ohci",
  109. .id = -1,
  110. .dev = {
  111. .dma_mask = &ohci_dmamask,
  112. .coherent_dma_mask = 0xffffffff,
  113. },
  114. .num_resources = ARRAY_SIZE(ohci_resources),
  115. .resource = ohci_resources,
  116. };
  117. static inline void ohci_device_init(struct omap_usb_config *pdata)
  118. {
  119. if (cpu_is_omap7xx())
  120. ohci_resources[1].start = INT_7XX_USB_HHC_1;
  121. pdata->ohci_device = &ohci_device;
  122. }
  123. #else
  124. static inline void ohci_device_init(struct omap_usb_config *pdata)
  125. {
  126. }
  127. #endif
  128. #if defined(CONFIG_USB_OTG) && defined(CONFIG_ARCH_OMAP_OTG)
  129. static struct resource otg_resources[] = {
  130. /* order is significant! */
  131. {
  132. .start = OTG_BASE,
  133. .end = OTG_BASE + 0xff,
  134. .flags = IORESOURCE_MEM,
  135. }, {
  136. .start = INT_USB_IRQ_OTG,
  137. .flags = IORESOURCE_IRQ,
  138. },
  139. };
  140. static struct platform_device otg_device = {
  141. .name = "omap_otg",
  142. .id = -1,
  143. .num_resources = ARRAY_SIZE(otg_resources),
  144. .resource = otg_resources,
  145. };
  146. static inline void otg_device_init(struct omap_usb_config *pdata)
  147. {
  148. if (cpu_is_omap7xx())
  149. otg_resources[1].start = INT_7XX_USB_OTG;
  150. pdata->otg_device = &otg_device;
  151. }
  152. #else
  153. static inline void otg_device_init(struct omap_usb_config *pdata)
  154. {
  155. }
  156. #endif
  157. u32 __init omap1_usb0_init(unsigned nwires, unsigned is_device)
  158. {
  159. u32 syscon1 = 0;
  160. if (nwires == 0) {
  161. if (!cpu_is_omap15xx()) {
  162. u32 l;
  163. /* pulldown D+/D- */
  164. l = omap_readl(USB_TRANSCEIVER_CTRL);
  165. l &= ~(3 << 1);
  166. omap_writel(l, USB_TRANSCEIVER_CTRL);
  167. }
  168. return 0;
  169. }
  170. if (is_device) {
  171. if (cpu_is_omap7xx()) {
  172. omap_cfg_reg(AA17_7XX_USB_DM);
  173. omap_cfg_reg(W16_7XX_USB_PU_EN);
  174. omap_cfg_reg(W17_7XX_USB_VBUSI);
  175. omap_cfg_reg(W18_7XX_USB_DMCK_OUT);
  176. omap_cfg_reg(W19_7XX_USB_DCRST);
  177. } else
  178. omap_cfg_reg(W4_USB_PUEN);
  179. }
  180. if (nwires == 2) {
  181. u32 l;
  182. // omap_cfg_reg(P9_USB_DP);
  183. // omap_cfg_reg(R8_USB_DM);
  184. if (cpu_is_omap15xx()) {
  185. /* This works on 1510-Innovator */
  186. return 0;
  187. }
  188. /* NOTES:
  189. * - peripheral should configure VBUS detection!
  190. * - only peripherals may use the internal D+/D- pulldowns
  191. * - OTG support on this port not yet written
  192. */
  193. /* Don't do this for omap7xx -- it causes USB to not work correctly */
  194. if (!cpu_is_omap7xx()) {
  195. l = omap_readl(USB_TRANSCEIVER_CTRL);
  196. l &= ~(7 << 4);
  197. if (!is_device)
  198. l |= (3 << 1);
  199. omap_writel(l, USB_TRANSCEIVER_CTRL);
  200. }
  201. return 3 << 16;
  202. }
  203. /* alternate pin config, external transceiver */
  204. if (cpu_is_omap15xx()) {
  205. printk(KERN_ERR "no usb0 alt pin config on 15xx\n");
  206. return 0;
  207. }
  208. omap_cfg_reg(V6_USB0_TXD);
  209. omap_cfg_reg(W9_USB0_TXEN);
  210. omap_cfg_reg(W5_USB0_SE0);
  211. if (nwires != 3)
  212. omap_cfg_reg(Y5_USB0_RCV);
  213. /* NOTE: SPEED and SUSP aren't configured here. OTG hosts
  214. * may be able to use I2C requests to set those bits along
  215. * with VBUS switching and overcurrent detection.
  216. */
  217. if (nwires != 6) {
  218. u32 l;
  219. l = omap_readl(USB_TRANSCEIVER_CTRL);
  220. l &= ~CONF_USB2_UNI_R;
  221. omap_writel(l, USB_TRANSCEIVER_CTRL);
  222. }
  223. switch (nwires) {
  224. case 3:
  225. syscon1 = 2;
  226. break;
  227. case 4:
  228. syscon1 = 1;
  229. break;
  230. case 6:
  231. syscon1 = 3;
  232. {
  233. u32 l;
  234. omap_cfg_reg(AA9_USB0_VP);
  235. omap_cfg_reg(R9_USB0_VM);
  236. l = omap_readl(USB_TRANSCEIVER_CTRL);
  237. l |= CONF_USB2_UNI_R;
  238. omap_writel(l, USB_TRANSCEIVER_CTRL);
  239. }
  240. break;
  241. default:
  242. printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
  243. 0, nwires);
  244. }
  245. return syscon1 << 16;
  246. }
  247. u32 __init omap1_usb1_init(unsigned nwires)
  248. {
  249. u32 syscon1 = 0;
  250. if (!cpu_is_omap15xx() && nwires != 6) {
  251. u32 l;
  252. l = omap_readl(USB_TRANSCEIVER_CTRL);
  253. l &= ~CONF_USB1_UNI_R;
  254. omap_writel(l, USB_TRANSCEIVER_CTRL);
  255. }
  256. if (nwires == 0)
  257. return 0;
  258. /* external transceiver */
  259. omap_cfg_reg(USB1_TXD);
  260. omap_cfg_reg(USB1_TXEN);
  261. if (nwires != 3)
  262. omap_cfg_reg(USB1_RCV);
  263. if (cpu_is_omap15xx()) {
  264. omap_cfg_reg(USB1_SEO);
  265. omap_cfg_reg(USB1_SPEED);
  266. // SUSP
  267. } else if (cpu_is_omap1610() || cpu_is_omap5912()) {
  268. omap_cfg_reg(W13_1610_USB1_SE0);
  269. omap_cfg_reg(R13_1610_USB1_SPEED);
  270. // SUSP
  271. } else if (cpu_is_omap1710()) {
  272. omap_cfg_reg(R13_1710_USB1_SE0);
  273. // SUSP
  274. } else {
  275. pr_debug("usb%d cpu unrecognized\n", 1);
  276. return 0;
  277. }
  278. switch (nwires) {
  279. case 2:
  280. goto bad;
  281. case 3:
  282. syscon1 = 2;
  283. break;
  284. case 4:
  285. syscon1 = 1;
  286. break;
  287. case 6:
  288. syscon1 = 3;
  289. omap_cfg_reg(USB1_VP);
  290. omap_cfg_reg(USB1_VM);
  291. if (!cpu_is_omap15xx()) {
  292. u32 l;
  293. l = omap_readl(USB_TRANSCEIVER_CTRL);
  294. l |= CONF_USB1_UNI_R;
  295. omap_writel(l, USB_TRANSCEIVER_CTRL);
  296. }
  297. break;
  298. default:
  299. bad:
  300. printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
  301. 1, nwires);
  302. }
  303. return syscon1 << 20;
  304. }
  305. u32 __init omap1_usb2_init(unsigned nwires, unsigned alt_pingroup)
  306. {
  307. u32 syscon1 = 0;
  308. /* NOTE omap1 erratum: must leave USB2_UNI_R set if usb0 in use */
  309. if (alt_pingroup || nwires == 0)
  310. return 0;
  311. if (!cpu_is_omap15xx() && nwires != 6) {
  312. u32 l;
  313. l = omap_readl(USB_TRANSCEIVER_CTRL);
  314. l &= ~CONF_USB2_UNI_R;
  315. omap_writel(l, USB_TRANSCEIVER_CTRL);
  316. }
  317. /* external transceiver */
  318. if (cpu_is_omap15xx()) {
  319. omap_cfg_reg(USB2_TXD);
  320. omap_cfg_reg(USB2_TXEN);
  321. omap_cfg_reg(USB2_SEO);
  322. if (nwires != 3)
  323. omap_cfg_reg(USB2_RCV);
  324. /* there is no USB2_SPEED */
  325. } else if (cpu_is_omap16xx()) {
  326. omap_cfg_reg(V6_USB2_TXD);
  327. omap_cfg_reg(W9_USB2_TXEN);
  328. omap_cfg_reg(W5_USB2_SE0);
  329. if (nwires != 3)
  330. omap_cfg_reg(Y5_USB2_RCV);
  331. // FIXME omap_cfg_reg(USB2_SPEED);
  332. } else {
  333. pr_debug("usb%d cpu unrecognized\n", 1);
  334. return 0;
  335. }
  336. // omap_cfg_reg(USB2_SUSP);
  337. switch (nwires) {
  338. case 2:
  339. goto bad;
  340. case 3:
  341. syscon1 = 2;
  342. break;
  343. case 4:
  344. syscon1 = 1;
  345. break;
  346. case 5:
  347. goto bad;
  348. case 6:
  349. syscon1 = 3;
  350. if (cpu_is_omap15xx()) {
  351. omap_cfg_reg(USB2_VP);
  352. omap_cfg_reg(USB2_VM);
  353. } else {
  354. u32 l;
  355. omap_cfg_reg(AA9_USB2_VP);
  356. omap_cfg_reg(R9_USB2_VM);
  357. l = omap_readl(USB_TRANSCEIVER_CTRL);
  358. l |= CONF_USB2_UNI_R;
  359. omap_writel(l, USB_TRANSCEIVER_CTRL);
  360. }
  361. break;
  362. default:
  363. bad:
  364. printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
  365. 2, nwires);
  366. }
  367. return syscon1 << 24;
  368. }
  369. #ifdef CONFIG_ARCH_OMAP15XX
  370. /* ULPD_DPLL_CTRL */
  371. #define DPLL_IOB (1 << 13)
  372. #define DPLL_PLL_ENABLE (1 << 4)
  373. #define DPLL_LOCK (1 << 0)
  374. /* ULPD_APLL_CTRL */
  375. #define APLL_NDPLL_SWITCH (1 << 0)
  376. static void __init omap_1510_usb_init(struct omap_usb_config *config)
  377. {
  378. unsigned int val;
  379. u16 w;
  380. config->usb0_init(config->pins[0], is_usb0_device(config));
  381. config->usb1_init(config->pins[1]);
  382. config->usb2_init(config->pins[2], 0);
  383. val = omap_readl(MOD_CONF_CTRL_0) & ~(0x3f << 1);
  384. val |= (config->hmc_mode << 1);
  385. omap_writel(val, MOD_CONF_CTRL_0);
  386. printk("USB: hmc %d", config->hmc_mode);
  387. if (config->pins[0])
  388. printk(", usb0 %d wires%s", config->pins[0],
  389. is_usb0_device(config) ? " (dev)" : "");
  390. if (config->pins[1])
  391. printk(", usb1 %d wires", config->pins[1]);
  392. if (config->pins[2])
  393. printk(", usb2 %d wires", config->pins[2]);
  394. printk("\n");
  395. /* use DPLL for 48 MHz function clock */
  396. pr_debug("APLL %04x DPLL %04x REQ %04x\n", omap_readw(ULPD_APLL_CTRL),
  397. omap_readw(ULPD_DPLL_CTRL), omap_readw(ULPD_SOFT_REQ));
  398. w = omap_readw(ULPD_APLL_CTRL);
  399. w &= ~APLL_NDPLL_SWITCH;
  400. omap_writew(w, ULPD_APLL_CTRL);
  401. w = omap_readw(ULPD_DPLL_CTRL);
  402. w |= DPLL_IOB | DPLL_PLL_ENABLE;
  403. omap_writew(w, ULPD_DPLL_CTRL);
  404. w = omap_readw(ULPD_SOFT_REQ);
  405. w |= SOFT_UDC_REQ | SOFT_DPLL_REQ;
  406. omap_writew(w, ULPD_SOFT_REQ);
  407. while (!(omap_readw(ULPD_DPLL_CTRL) & DPLL_LOCK))
  408. cpu_relax();
  409. #ifdef CONFIG_USB_GADGET_OMAP
  410. if (config->register_dev) {
  411. int status;
  412. udc_device.dev.platform_data = config;
  413. status = platform_device_register(&udc_device);
  414. if (status)
  415. pr_debug("can't register UDC device, %d\n", status);
  416. /* udc driver gates 48MHz by D+ pullup */
  417. }
  418. #endif
  419. #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
  420. if (config->register_host) {
  421. int status;
  422. ohci_device.dev.platform_data = config;
  423. status = platform_device_register(&ohci_device);
  424. if (status)
  425. pr_debug("can't register OHCI device, %d\n", status);
  426. /* hcd explicitly gates 48MHz */
  427. }
  428. #endif
  429. }
  430. #else
  431. static inline void omap_1510_usb_init(struct omap_usb_config *config) {}
  432. #endif
  433. void __init omap1_usb_init(struct omap_usb_config *pdata)
  434. {
  435. pdata->usb0_init = omap1_usb0_init;
  436. pdata->usb1_init = omap1_usb1_init;
  437. pdata->usb2_init = omap1_usb2_init;
  438. udc_device_init(pdata);
  439. ohci_device_init(pdata);
  440. otg_device_init(pdata);
  441. if (cpu_is_omap7xx() || cpu_is_omap16xx())
  442. omap_otg_init(pdata);
  443. else if (cpu_is_omap15xx())
  444. omap_1510_usb_init(pdata);
  445. else
  446. printk(KERN_ERR "USB: No init for your chip yet\n");
  447. }