board-perseus2.c 7.7 KB

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  1. /*
  2. * linux/arch/arm/mach-omap1/board-perseus2.c
  3. *
  4. * Modified from board-generic.c
  5. *
  6. * Original OMAP730 support by Jean Pihet <j-pihet@ti.com>
  7. * Updated for 2.6 by Kevin Hilman <kjh@hilman.org>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. */
  13. #include <linux/gpio.h>
  14. #include <linux/kernel.h>
  15. #include <linux/init.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/delay.h>
  18. #include <linux/mtd/mtd.h>
  19. #include <linux/mtd/nand.h>
  20. #include <linux/mtd/partitions.h>
  21. #include <linux/mtd/physmap.h>
  22. #include <linux/input.h>
  23. #include <linux/smc91x.h>
  24. #include <linux/omapfb.h>
  25. #include <asm/mach-types.h>
  26. #include <asm/mach/arch.h>
  27. #include <asm/mach/map.h>
  28. #include <plat/tc.h>
  29. #include <plat/mux.h>
  30. #include <plat/fpga.h>
  31. #include <plat/flash.h>
  32. #include <plat/keypad.h>
  33. #include <plat/board.h>
  34. #include <mach/hardware.h>
  35. #include "iomap.h"
  36. #include "common.h"
  37. static const unsigned int p2_keymap[] = {
  38. KEY(0, 0, KEY_UP),
  39. KEY(1, 0, KEY_RIGHT),
  40. KEY(2, 0, KEY_LEFT),
  41. KEY(3, 0, KEY_DOWN),
  42. KEY(4, 0, KEY_ENTER),
  43. KEY(0, 1, KEY_F10),
  44. KEY(1, 1, KEY_SEND),
  45. KEY(2, 1, KEY_END),
  46. KEY(3, 1, KEY_VOLUMEDOWN),
  47. KEY(4, 1, KEY_VOLUMEUP),
  48. KEY(5, 1, KEY_RECORD),
  49. KEY(0, 2, KEY_F9),
  50. KEY(1, 2, KEY_3),
  51. KEY(2, 2, KEY_6),
  52. KEY(3, 2, KEY_9),
  53. KEY(4, 2, KEY_KPDOT),
  54. KEY(0, 3, KEY_BACK),
  55. KEY(1, 3, KEY_2),
  56. KEY(2, 3, KEY_5),
  57. KEY(3, 3, KEY_8),
  58. KEY(4, 3, KEY_0),
  59. KEY(5, 3, KEY_KPSLASH),
  60. KEY(0, 4, KEY_HOME),
  61. KEY(1, 4, KEY_1),
  62. KEY(2, 4, KEY_4),
  63. KEY(3, 4, KEY_7),
  64. KEY(4, 4, KEY_KPASTERISK),
  65. KEY(5, 4, KEY_POWER),
  66. };
  67. static struct smc91x_platdata smc91x_info = {
  68. .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
  69. .leda = RPC_LED_100_10,
  70. .ledb = RPC_LED_TX_RX,
  71. };
  72. static struct resource smc91x_resources[] = {
  73. [0] = {
  74. .start = H2P2_DBG_FPGA_ETHR_START, /* Physical */
  75. .end = H2P2_DBG_FPGA_ETHR_START + 0xf,
  76. .flags = IORESOURCE_MEM,
  77. },
  78. [1] = {
  79. .start = INT_7XX_MPU_EXT_NIRQ,
  80. .end = 0,
  81. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
  82. },
  83. };
  84. static struct mtd_partition nor_partitions[] = {
  85. /* bootloader (U-Boot, etc) in first sector */
  86. {
  87. .name = "bootloader",
  88. .offset = 0,
  89. .size = SZ_128K,
  90. .mask_flags = MTD_WRITEABLE, /* force read-only */
  91. },
  92. /* bootloader params in the next sector */
  93. {
  94. .name = "params",
  95. .offset = MTDPART_OFS_APPEND,
  96. .size = SZ_128K,
  97. .mask_flags = 0,
  98. },
  99. /* kernel */
  100. {
  101. .name = "kernel",
  102. .offset = MTDPART_OFS_APPEND,
  103. .size = SZ_2M,
  104. .mask_flags = 0
  105. },
  106. /* rest of flash is a file system */
  107. {
  108. .name = "rootfs",
  109. .offset = MTDPART_OFS_APPEND,
  110. .size = MTDPART_SIZ_FULL,
  111. .mask_flags = 0
  112. },
  113. };
  114. static struct physmap_flash_data nor_data = {
  115. .width = 2,
  116. .set_vpp = omap1_set_vpp,
  117. .parts = nor_partitions,
  118. .nr_parts = ARRAY_SIZE(nor_partitions),
  119. };
  120. static struct resource nor_resource = {
  121. .start = OMAP_CS0_PHYS,
  122. .end = OMAP_CS0_PHYS + SZ_32M - 1,
  123. .flags = IORESOURCE_MEM,
  124. };
  125. static struct platform_device nor_device = {
  126. .name = "physmap-flash",
  127. .id = 0,
  128. .dev = {
  129. .platform_data = &nor_data,
  130. },
  131. .num_resources = 1,
  132. .resource = &nor_resource,
  133. };
  134. static void nand_cmd_ctl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
  135. {
  136. struct nand_chip *this = mtd->priv;
  137. unsigned long mask;
  138. if (cmd == NAND_CMD_NONE)
  139. return;
  140. mask = (ctrl & NAND_CLE) ? 0x02 : 0;
  141. if (ctrl & NAND_ALE)
  142. mask |= 0x04;
  143. writeb(cmd, (unsigned long)this->IO_ADDR_W | mask);
  144. }
  145. #define P2_NAND_RB_GPIO_PIN 62
  146. static int nand_dev_ready(struct mtd_info *mtd)
  147. {
  148. return gpio_get_value(P2_NAND_RB_GPIO_PIN);
  149. }
  150. static const char *part_probes[] = { "cmdlinepart", NULL };
  151. static struct platform_nand_data nand_data = {
  152. .chip = {
  153. .nr_chips = 1,
  154. .chip_offset = 0,
  155. .options = NAND_SAMSUNG_LP_OPTIONS,
  156. .part_probe_types = part_probes,
  157. },
  158. .ctrl = {
  159. .cmd_ctrl = nand_cmd_ctl,
  160. .dev_ready = nand_dev_ready,
  161. },
  162. };
  163. static struct resource nand_resource = {
  164. .start = OMAP_CS3_PHYS,
  165. .end = OMAP_CS3_PHYS + SZ_4K - 1,
  166. .flags = IORESOURCE_MEM,
  167. };
  168. static struct platform_device nand_device = {
  169. .name = "gen_nand",
  170. .id = 0,
  171. .dev = {
  172. .platform_data = &nand_data,
  173. },
  174. .num_resources = 1,
  175. .resource = &nand_resource,
  176. };
  177. static struct platform_device smc91x_device = {
  178. .name = "smc91x",
  179. .id = 0,
  180. .dev = {
  181. .platform_data = &smc91x_info,
  182. },
  183. .num_resources = ARRAY_SIZE(smc91x_resources),
  184. .resource = smc91x_resources,
  185. };
  186. static struct resource kp_resources[] = {
  187. [0] = {
  188. .start = INT_7XX_MPUIO_KEYPAD,
  189. .end = INT_7XX_MPUIO_KEYPAD,
  190. .flags = IORESOURCE_IRQ,
  191. },
  192. };
  193. static const struct matrix_keymap_data p2_keymap_data = {
  194. .keymap = p2_keymap,
  195. .keymap_size = ARRAY_SIZE(p2_keymap),
  196. };
  197. static struct omap_kp_platform_data kp_data = {
  198. .rows = 8,
  199. .cols = 8,
  200. .keymap_data = &p2_keymap_data,
  201. .delay = 4,
  202. .dbounce = true,
  203. };
  204. static struct platform_device kp_device = {
  205. .name = "omap-keypad",
  206. .id = -1,
  207. .dev = {
  208. .platform_data = &kp_data,
  209. },
  210. .num_resources = ARRAY_SIZE(kp_resources),
  211. .resource = kp_resources,
  212. };
  213. static struct platform_device *devices[] __initdata = {
  214. &nor_device,
  215. &nand_device,
  216. &smc91x_device,
  217. &kp_device,
  218. };
  219. static struct omap_lcd_config perseus2_lcd_config __initdata = {
  220. .ctrl_name = "internal",
  221. };
  222. static void __init perseus2_init_smc91x(void)
  223. {
  224. fpga_write(1, H2P2_DBG_FPGA_LAN_RESET);
  225. mdelay(50);
  226. fpga_write(fpga_read(H2P2_DBG_FPGA_LAN_RESET) & ~1,
  227. H2P2_DBG_FPGA_LAN_RESET);
  228. mdelay(50);
  229. }
  230. static void __init omap_perseus2_init(void)
  231. {
  232. /* Early, board-dependent init */
  233. /*
  234. * Hold GSM Reset until needed
  235. */
  236. omap_writew(omap_readw(OMAP7XX_DSP_M_CTL) & ~1, OMAP7XX_DSP_M_CTL);
  237. /*
  238. * UARTs -> done automagically by 8250 driver
  239. */
  240. /*
  241. * CSx timings, GPIO Mux ... setup
  242. */
  243. /* Flash: CS0 timings setup */
  244. omap_writel(0x0000fff3, OMAP7XX_FLASH_CFG_0);
  245. omap_writel(0x00000088, OMAP7XX_FLASH_ACFG_0);
  246. /*
  247. * Ethernet support through the debug board
  248. * CS1 timings setup
  249. */
  250. omap_writel(0x0000fff3, OMAP7XX_FLASH_CFG_1);
  251. omap_writel(0x00000000, OMAP7XX_FLASH_ACFG_1);
  252. /*
  253. * Configure MPU_EXT_NIRQ IO in IO_CONF9 register,
  254. * It is used as the Ethernet controller interrupt
  255. */
  256. omap_writel(omap_readl(OMAP7XX_IO_CONF_9) & 0x1FFFFFFF,
  257. OMAP7XX_IO_CONF_9);
  258. perseus2_init_smc91x();
  259. if (gpio_request(P2_NAND_RB_GPIO_PIN, "NAND ready") < 0)
  260. BUG();
  261. gpio_direction_input(P2_NAND_RB_GPIO_PIN);
  262. omap_cfg_reg(L3_1610_FLASH_CS2B_OE);
  263. omap_cfg_reg(M8_1610_FLASH_CS2B_WE);
  264. /* Mux pins for keypad */
  265. omap_cfg_reg(E2_7XX_KBR0);
  266. omap_cfg_reg(J7_7XX_KBR1);
  267. omap_cfg_reg(E1_7XX_KBR2);
  268. omap_cfg_reg(F3_7XX_KBR3);
  269. omap_cfg_reg(D2_7XX_KBR4);
  270. omap_cfg_reg(C2_7XX_KBC0);
  271. omap_cfg_reg(D3_7XX_KBC1);
  272. omap_cfg_reg(E4_7XX_KBC2);
  273. omap_cfg_reg(F4_7XX_KBC3);
  274. omap_cfg_reg(E3_7XX_KBC4);
  275. platform_add_devices(devices, ARRAY_SIZE(devices));
  276. omap_serial_init();
  277. omap_register_i2c_bus(1, 100, NULL, 0);
  278. omapfb_set_lcd_config(&perseus2_lcd_config);
  279. }
  280. /* Only FPGA needs to be mapped here. All others are done with ioremap */
  281. static struct map_desc omap_perseus2_io_desc[] __initdata = {
  282. {
  283. .virtual = H2P2_DBG_FPGA_BASE,
  284. .pfn = __phys_to_pfn(H2P2_DBG_FPGA_START),
  285. .length = H2P2_DBG_FPGA_SIZE,
  286. .type = MT_DEVICE
  287. }
  288. };
  289. static void __init omap_perseus2_map_io(void)
  290. {
  291. omap7xx_map_io();
  292. iotable_init(omap_perseus2_io_desc,
  293. ARRAY_SIZE(omap_perseus2_io_desc));
  294. }
  295. MACHINE_START(OMAP_PERSEUS2, "OMAP730 Perseus2")
  296. /* Maintainer: Kevin Hilman <kjh@hilman.org> */
  297. .atag_offset = 0x100,
  298. .map_io = omap_perseus2_map_io,
  299. .init_early = omap1_init_early,
  300. .reserve = omap_reserve,
  301. .init_irq = omap1_init_irq,
  302. .init_machine = omap_perseus2_init,
  303. .timer = &omap1_timer,
  304. .restart = omap1_restart,
  305. MACHINE_END