setup-spi.c 1.8 KB

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  1. /* linux/arch/arm/mach-exynos4/setup-spi.c
  2. *
  3. * Copyright (C) 2011 Samsung Electronics Ltd.
  4. * http://www.samsung.com/
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #include <linux/gpio.h>
  11. #include <linux/platform_device.h>
  12. #include <plat/gpio-cfg.h>
  13. #include <plat/s3c64xx-spi.h>
  14. #ifdef CONFIG_S3C64XX_DEV_SPI0
  15. struct s3c64xx_spi_info s3c64xx_spi0_pdata __initdata = {
  16. .fifo_lvl_mask = 0x1ff,
  17. .rx_lvl_offset = 15,
  18. .high_speed = 1,
  19. .clk_from_cmu = true,
  20. .tx_st_done = 25,
  21. };
  22. int s3c64xx_spi0_cfg_gpio(struct platform_device *dev)
  23. {
  24. s3c_gpio_cfgpin(EXYNOS4_GPB(0), S3C_GPIO_SFN(2));
  25. s3c_gpio_setpull(EXYNOS4_GPB(0), S3C_GPIO_PULL_UP);
  26. s3c_gpio_cfgall_range(EXYNOS4_GPB(2), 2,
  27. S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
  28. return 0;
  29. }
  30. #endif
  31. #ifdef CONFIG_S3C64XX_DEV_SPI1
  32. struct s3c64xx_spi_info s3c64xx_spi1_pdata __initdata = {
  33. .fifo_lvl_mask = 0x7f,
  34. .rx_lvl_offset = 15,
  35. .high_speed = 1,
  36. .clk_from_cmu = true,
  37. .tx_st_done = 25,
  38. };
  39. int s3c64xx_spi1_cfg_gpio(struct platform_device *dev)
  40. {
  41. s3c_gpio_cfgpin(EXYNOS4_GPB(4), S3C_GPIO_SFN(2));
  42. s3c_gpio_setpull(EXYNOS4_GPB(4), S3C_GPIO_PULL_UP);
  43. s3c_gpio_cfgall_range(EXYNOS4_GPB(6), 2,
  44. S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
  45. return 0;
  46. }
  47. #endif
  48. #ifdef CONFIG_S3C64XX_DEV_SPI2
  49. struct s3c64xx_spi_info s3c64xx_spi2_pdata __initdata = {
  50. .fifo_lvl_mask = 0x7f,
  51. .rx_lvl_offset = 15,
  52. .high_speed = 1,
  53. .clk_from_cmu = true,
  54. .tx_st_done = 25,
  55. };
  56. int s3c64xx_spi2_cfg_gpio(struct platform_device *dev)
  57. {
  58. s3c_gpio_cfgpin(EXYNOS4_GPC1(1), S3C_GPIO_SFN(5));
  59. s3c_gpio_setpull(EXYNOS4_GPC1(1), S3C_GPIO_PULL_UP);
  60. s3c_gpio_cfgall_range(EXYNOS4_GPC1(3), 2,
  61. S3C_GPIO_SFN(5), S3C_GPIO_PULL_UP);
  62. return 0;
  63. }
  64. #endif