devices.c 8.3 KB

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  1. /*
  2. * mach-davinci/devices.c
  3. *
  4. * DaVinci platform device setup/initialization
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. */
  11. #include <linux/init.h>
  12. #include <linux/platform_device.h>
  13. #include <linux/dma-mapping.h>
  14. #include <linux/io.h>
  15. #include <mach/hardware.h>
  16. #include <mach/i2c.h>
  17. #include <mach/irqs.h>
  18. #include <mach/cputype.h>
  19. #include <mach/mux.h>
  20. #include <mach/edma.h>
  21. #include <mach/mmc.h>
  22. #include <mach/time.h>
  23. #include "davinci.h"
  24. #include "clock.h"
  25. #define DAVINCI_I2C_BASE 0x01C21000
  26. #define DAVINCI_ATA_BASE 0x01C66000
  27. #define DAVINCI_MMCSD0_BASE 0x01E10000
  28. #define DM355_MMCSD0_BASE 0x01E11000
  29. #define DM355_MMCSD1_BASE 0x01E00000
  30. #define DM365_MMCSD0_BASE 0x01D11000
  31. #define DM365_MMCSD1_BASE 0x01D00000
  32. void __iomem *davinci_sysmod_base;
  33. void davinci_map_sysmod(void)
  34. {
  35. davinci_sysmod_base = ioremap_nocache(DAVINCI_SYSTEM_MODULE_BASE,
  36. 0x800);
  37. /*
  38. * Throw a bug since a lot of board initialization code depends
  39. * on system module availability. ioremap() failing this early
  40. * need careful looking into anyway.
  41. */
  42. BUG_ON(!davinci_sysmod_base);
  43. }
  44. static struct resource i2c_resources[] = {
  45. {
  46. .start = DAVINCI_I2C_BASE,
  47. .end = DAVINCI_I2C_BASE + 0x40,
  48. .flags = IORESOURCE_MEM,
  49. },
  50. {
  51. .start = IRQ_I2C,
  52. .flags = IORESOURCE_IRQ,
  53. },
  54. };
  55. static struct platform_device davinci_i2c_device = {
  56. .name = "i2c_davinci",
  57. .id = 1,
  58. .num_resources = ARRAY_SIZE(i2c_resources),
  59. .resource = i2c_resources,
  60. };
  61. void __init davinci_init_i2c(struct davinci_i2c_platform_data *pdata)
  62. {
  63. if (cpu_is_davinci_dm644x())
  64. davinci_cfg_reg(DM644X_I2C);
  65. davinci_i2c_device.dev.platform_data = pdata;
  66. (void) platform_device_register(&davinci_i2c_device);
  67. }
  68. static struct resource ide_resources[] = {
  69. {
  70. .start = DAVINCI_ATA_BASE,
  71. .end = DAVINCI_ATA_BASE + 0x7ff,
  72. .flags = IORESOURCE_MEM,
  73. },
  74. {
  75. .start = IRQ_IDE,
  76. .end = IRQ_IDE,
  77. .flags = IORESOURCE_IRQ,
  78. },
  79. };
  80. static u64 ide_dma_mask = DMA_BIT_MASK(32);
  81. static struct platform_device ide_device = {
  82. .name = "palm_bk3710",
  83. .id = -1,
  84. .resource = ide_resources,
  85. .num_resources = ARRAY_SIZE(ide_resources),
  86. .dev = {
  87. .dma_mask = &ide_dma_mask,
  88. .coherent_dma_mask = DMA_BIT_MASK(32),
  89. },
  90. };
  91. void __init davinci_init_ide(void)
  92. {
  93. if (cpu_is_davinci_dm644x()) {
  94. davinci_cfg_reg(DM644X_HPIEN_DISABLE);
  95. davinci_cfg_reg(DM644X_ATAEN);
  96. davinci_cfg_reg(DM644X_HDIREN);
  97. } else if (cpu_is_davinci_dm646x()) {
  98. /* IRQ_DM646X_IDE is the same as IRQ_IDE */
  99. davinci_cfg_reg(DM646X_ATAEN);
  100. } else {
  101. WARN_ON(1);
  102. return;
  103. }
  104. platform_device_register(&ide_device);
  105. }
  106. #if defined(CONFIG_MMC_DAVINCI) || defined(CONFIG_MMC_DAVINCI_MODULE)
  107. static u64 mmcsd0_dma_mask = DMA_BIT_MASK(32);
  108. static struct resource mmcsd0_resources[] = {
  109. {
  110. /* different on dm355 */
  111. .start = DAVINCI_MMCSD0_BASE,
  112. .end = DAVINCI_MMCSD0_BASE + SZ_4K - 1,
  113. .flags = IORESOURCE_MEM,
  114. },
  115. /* IRQs: MMC/SD, then SDIO */
  116. {
  117. .start = IRQ_MMCINT,
  118. .flags = IORESOURCE_IRQ,
  119. }, {
  120. /* different on dm355 */
  121. .start = IRQ_SDIOINT,
  122. .flags = IORESOURCE_IRQ,
  123. },
  124. /* DMA channels: RX, then TX */
  125. {
  126. .start = EDMA_CTLR_CHAN(0, DAVINCI_DMA_MMCRXEVT),
  127. .flags = IORESOURCE_DMA,
  128. }, {
  129. .start = EDMA_CTLR_CHAN(0, DAVINCI_DMA_MMCTXEVT),
  130. .flags = IORESOURCE_DMA,
  131. },
  132. };
  133. static struct platform_device davinci_mmcsd0_device = {
  134. .name = "davinci_mmc",
  135. .id = 0,
  136. .dev = {
  137. .dma_mask = &mmcsd0_dma_mask,
  138. .coherent_dma_mask = DMA_BIT_MASK(32),
  139. },
  140. .num_resources = ARRAY_SIZE(mmcsd0_resources),
  141. .resource = mmcsd0_resources,
  142. };
  143. static u64 mmcsd1_dma_mask = DMA_BIT_MASK(32);
  144. static struct resource mmcsd1_resources[] = {
  145. {
  146. .start = DM355_MMCSD1_BASE,
  147. .end = DM355_MMCSD1_BASE + SZ_4K - 1,
  148. .flags = IORESOURCE_MEM,
  149. },
  150. /* IRQs: MMC/SD, then SDIO */
  151. {
  152. .start = IRQ_DM355_MMCINT1,
  153. .flags = IORESOURCE_IRQ,
  154. }, {
  155. .start = IRQ_DM355_SDIOINT1,
  156. .flags = IORESOURCE_IRQ,
  157. },
  158. /* DMA channels: RX, then TX */
  159. {
  160. .start = EDMA_CTLR_CHAN(0, 30), /* rx */
  161. .flags = IORESOURCE_DMA,
  162. }, {
  163. .start = EDMA_CTLR_CHAN(0, 31), /* tx */
  164. .flags = IORESOURCE_DMA,
  165. },
  166. };
  167. static struct platform_device davinci_mmcsd1_device = {
  168. .name = "davinci_mmc",
  169. .id = 1,
  170. .dev = {
  171. .dma_mask = &mmcsd1_dma_mask,
  172. .coherent_dma_mask = DMA_BIT_MASK(32),
  173. },
  174. .num_resources = ARRAY_SIZE(mmcsd1_resources),
  175. .resource = mmcsd1_resources,
  176. };
  177. void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
  178. {
  179. struct platform_device *pdev = NULL;
  180. if (WARN_ON(cpu_is_davinci_dm646x()))
  181. return;
  182. /* REVISIT: update PINMUX, ARM_IRQMUX, and EDMA_EVTMUX here too;
  183. * for example if MMCSD1 is used for SDIO, maybe DAT2 is unused.
  184. *
  185. * FIXME dm6441 (no MMC/SD), dm357 (one), and dm335 (two) are
  186. * not handled right here ...
  187. */
  188. switch (module) {
  189. case 1:
  190. if (cpu_is_davinci_dm355()) {
  191. /* REVISIT we may not need all these pins if e.g. this
  192. * is a hard-wired SDIO device...
  193. */
  194. davinci_cfg_reg(DM355_SD1_CMD);
  195. davinci_cfg_reg(DM355_SD1_CLK);
  196. davinci_cfg_reg(DM355_SD1_DATA0);
  197. davinci_cfg_reg(DM355_SD1_DATA1);
  198. davinci_cfg_reg(DM355_SD1_DATA2);
  199. davinci_cfg_reg(DM355_SD1_DATA3);
  200. } else if (cpu_is_davinci_dm365()) {
  201. /* Configure pull down control */
  202. unsigned v;
  203. v = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_PUPDCTL1));
  204. __raw_writel(v & ~0xfc0,
  205. DAVINCI_SYSMOD_VIRT(SYSMOD_PUPDCTL1));
  206. mmcsd1_resources[0].start = DM365_MMCSD1_BASE;
  207. mmcsd1_resources[0].end = DM365_MMCSD1_BASE +
  208. SZ_4K - 1;
  209. mmcsd1_resources[2].start = IRQ_DM365_SDIOINT1;
  210. } else
  211. break;
  212. pdev = &davinci_mmcsd1_device;
  213. break;
  214. case 0:
  215. if (cpu_is_davinci_dm355()) {
  216. mmcsd0_resources[0].start = DM355_MMCSD0_BASE;
  217. mmcsd0_resources[0].end = DM355_MMCSD0_BASE + SZ_4K - 1;
  218. mmcsd0_resources[2].start = IRQ_DM355_SDIOINT0;
  219. /* expose all 6 MMC0 signals: CLK, CMD, DATA[0..3] */
  220. davinci_cfg_reg(DM355_MMCSD0);
  221. /* enable RX EDMA */
  222. davinci_cfg_reg(DM355_EVT26_MMC0_RX);
  223. } else if (cpu_is_davinci_dm365()) {
  224. mmcsd0_resources[0].start = DM365_MMCSD0_BASE;
  225. mmcsd0_resources[0].end = DM365_MMCSD0_BASE +
  226. SZ_4K - 1;
  227. mmcsd0_resources[2].start = IRQ_DM365_SDIOINT0;
  228. } else if (cpu_is_davinci_dm644x()) {
  229. /* REVISIT: should this be in board-init code? */
  230. /* Power-on 3.3V IO cells */
  231. __raw_writel(0,
  232. DAVINCI_SYSMOD_VIRT(SYSMOD_VDD3P3VPWDN));
  233. /*Set up the pull regiter for MMC */
  234. davinci_cfg_reg(DM644X_MSTK);
  235. }
  236. pdev = &davinci_mmcsd0_device;
  237. break;
  238. }
  239. if (WARN_ON(!pdev))
  240. return;
  241. pdev->dev.platform_data = config;
  242. platform_device_register(pdev);
  243. }
  244. #else
  245. void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
  246. {
  247. }
  248. #endif
  249. /*-------------------------------------------------------------------------*/
  250. static struct resource wdt_resources[] = {
  251. {
  252. .start = DAVINCI_WDOG_BASE,
  253. .end = DAVINCI_WDOG_BASE + SZ_1K - 1,
  254. .flags = IORESOURCE_MEM,
  255. },
  256. };
  257. struct platform_device davinci_wdt_device = {
  258. .name = "watchdog",
  259. .id = -1,
  260. .num_resources = ARRAY_SIZE(wdt_resources),
  261. .resource = wdt_resources,
  262. };
  263. void davinci_restart(char mode, const char *cmd)
  264. {
  265. davinci_watchdog_reset(&davinci_wdt_device);
  266. }
  267. static void davinci_init_wdt(void)
  268. {
  269. platform_device_register(&davinci_wdt_device);
  270. }
  271. /*-------------------------------------------------------------------------*/
  272. static struct platform_device davinci_pcm_device = {
  273. .name = "davinci-pcm-audio",
  274. .id = -1,
  275. };
  276. static void davinci_init_pcm(void)
  277. {
  278. platform_device_register(&davinci_pcm_device);
  279. }
  280. /*-------------------------------------------------------------------------*/
  281. struct davinci_timer_instance davinci_timer_instance[2] = {
  282. {
  283. .base = DAVINCI_TIMER0_BASE,
  284. .bottom_irq = IRQ_TINT0_TINT12,
  285. .top_irq = IRQ_TINT0_TINT34,
  286. },
  287. {
  288. .base = DAVINCI_TIMER1_BASE,
  289. .bottom_irq = IRQ_TINT1_TINT12,
  290. .top_irq = IRQ_TINT1_TINT34,
  291. },
  292. };
  293. /*-------------------------------------------------------------------------*/
  294. static int __init davinci_init_devices(void)
  295. {
  296. /* please keep these calls, and their implementations above,
  297. * in alphabetical order so they're easier to sort through.
  298. */
  299. davinci_init_pcm();
  300. davinci_init_wdt();
  301. return 0;
  302. }
  303. arch_initcall(davinci_init_devices);