board-da830-evm.c 17 KB

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  1. /*
  2. * TI DA830/OMAP L137 EVM board
  3. *
  4. * Author: Mark A. Greer <mgreer@mvista.com>
  5. * Derived from: arch/arm/mach-davinci/board-dm644x-evm.c
  6. *
  7. * 2007, 2009 (c) MontaVista Software, Inc. This file is licensed under
  8. * the terms of the GNU General Public License version 2. This program
  9. * is licensed "as is" without any warranty of any kind, whether express
  10. * or implied.
  11. */
  12. #include <linux/kernel.h>
  13. #include <linux/init.h>
  14. #include <linux/console.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/gpio.h>
  17. #include <linux/platform_device.h>
  18. #include <linux/i2c.h>
  19. #include <linux/i2c/pcf857x.h>
  20. #include <linux/i2c/at24.h>
  21. #include <linux/mtd/mtd.h>
  22. #include <linux/mtd/partitions.h>
  23. #include <linux/spi/spi.h>
  24. #include <linux/spi/flash.h>
  25. #include <asm/mach-types.h>
  26. #include <asm/mach/arch.h>
  27. #include <mach/cp_intc.h>
  28. #include <mach/mux.h>
  29. #include <mach/nand.h>
  30. #include <mach/da8xx.h>
  31. #include <mach/usb.h>
  32. #include <mach/aemif.h>
  33. #include <mach/spi.h>
  34. #define DA830_EVM_PHY_ID ""
  35. /*
  36. * USB1 VBUS is controlled by GPIO1[15], over-current is reported on GPIO2[4].
  37. */
  38. #define ON_BD_USB_DRV GPIO_TO_PIN(1, 15)
  39. #define ON_BD_USB_OVC GPIO_TO_PIN(2, 4)
  40. static const short da830_evm_usb11_pins[] = {
  41. DA830_GPIO1_15, DA830_GPIO2_4,
  42. -1
  43. };
  44. static da8xx_ocic_handler_t da830_evm_usb_ocic_handler;
  45. static int da830_evm_usb_set_power(unsigned port, int on)
  46. {
  47. gpio_set_value(ON_BD_USB_DRV, on);
  48. return 0;
  49. }
  50. static int da830_evm_usb_get_power(unsigned port)
  51. {
  52. return gpio_get_value(ON_BD_USB_DRV);
  53. }
  54. static int da830_evm_usb_get_oci(unsigned port)
  55. {
  56. return !gpio_get_value(ON_BD_USB_OVC);
  57. }
  58. static irqreturn_t da830_evm_usb_ocic_irq(int, void *);
  59. static int da830_evm_usb_ocic_notify(da8xx_ocic_handler_t handler)
  60. {
  61. int irq = gpio_to_irq(ON_BD_USB_OVC);
  62. int error = 0;
  63. if (handler != NULL) {
  64. da830_evm_usb_ocic_handler = handler;
  65. error = request_irq(irq, da830_evm_usb_ocic_irq, IRQF_DISABLED |
  66. IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
  67. "OHCI over-current indicator", NULL);
  68. if (error)
  69. printk(KERN_ERR "%s: could not request IRQ to watch "
  70. "over-current indicator changes\n", __func__);
  71. } else
  72. free_irq(irq, NULL);
  73. return error;
  74. }
  75. static struct da8xx_ohci_root_hub da830_evm_usb11_pdata = {
  76. .set_power = da830_evm_usb_set_power,
  77. .get_power = da830_evm_usb_get_power,
  78. .get_oci = da830_evm_usb_get_oci,
  79. .ocic_notify = da830_evm_usb_ocic_notify,
  80. /* TPS2065 switch @ 5V */
  81. .potpgt = (3 + 1) / 2, /* 3 ms max */
  82. };
  83. static irqreturn_t da830_evm_usb_ocic_irq(int irq, void *dev_id)
  84. {
  85. da830_evm_usb_ocic_handler(&da830_evm_usb11_pdata, 1);
  86. return IRQ_HANDLED;
  87. }
  88. static __init void da830_evm_usb_init(void)
  89. {
  90. u32 cfgchip2;
  91. int ret;
  92. /*
  93. * Set up USB clock/mode in the CFGCHIP2 register.
  94. * FYI: CFGCHIP2 is 0x0000ef00 initially.
  95. */
  96. cfgchip2 = __raw_readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));
  97. /* USB2.0 PHY reference clock is 24 MHz */
  98. cfgchip2 &= ~CFGCHIP2_REFFREQ;
  99. cfgchip2 |= CFGCHIP2_REFFREQ_24MHZ;
  100. /*
  101. * Select internal reference clock for USB 2.0 PHY
  102. * and use it as a clock source for USB 1.1 PHY
  103. * (this is the default setting anyway).
  104. */
  105. cfgchip2 &= ~CFGCHIP2_USB1PHYCLKMUX;
  106. cfgchip2 |= CFGCHIP2_USB2PHYCLKMUX;
  107. /*
  108. * We have to override VBUS/ID signals when MUSB is configured into the
  109. * host-only mode -- ID pin will float if no cable is connected, so the
  110. * controller won't be able to drive VBUS thinking that it's a B-device.
  111. * Otherwise, we want to use the OTG mode and enable VBUS comparators.
  112. */
  113. cfgchip2 &= ~CFGCHIP2_OTGMODE;
  114. #ifdef CONFIG_USB_MUSB_HOST
  115. cfgchip2 |= CFGCHIP2_FORCE_HOST;
  116. #else
  117. cfgchip2 |= CFGCHIP2_SESENDEN | CFGCHIP2_VBDTCTEN;
  118. #endif
  119. __raw_writel(cfgchip2, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));
  120. /* USB_REFCLKIN is not used. */
  121. ret = davinci_cfg_reg(DA830_USB0_DRVVBUS);
  122. if (ret)
  123. pr_warning("%s: USB 2.0 PinMux setup failed: %d\n",
  124. __func__, ret);
  125. else {
  126. /*
  127. * TPS2065 switch @ 5V supplies 1 A (sustains 1.5 A),
  128. * with the power on to power good time of 3 ms.
  129. */
  130. ret = da8xx_register_usb20(1000, 3);
  131. if (ret)
  132. pr_warning("%s: USB 2.0 registration failed: %d\n",
  133. __func__, ret);
  134. }
  135. ret = davinci_cfg_reg_list(da830_evm_usb11_pins);
  136. if (ret) {
  137. pr_warning("%s: USB 1.1 PinMux setup failed: %d\n",
  138. __func__, ret);
  139. return;
  140. }
  141. ret = gpio_request(ON_BD_USB_DRV, "ON_BD_USB_DRV");
  142. if (ret) {
  143. printk(KERN_ERR "%s: failed to request GPIO for USB 1.1 port "
  144. "power control: %d\n", __func__, ret);
  145. return;
  146. }
  147. gpio_direction_output(ON_BD_USB_DRV, 0);
  148. ret = gpio_request(ON_BD_USB_OVC, "ON_BD_USB_OVC");
  149. if (ret) {
  150. printk(KERN_ERR "%s: failed to request GPIO for USB 1.1 port "
  151. "over-current indicator: %d\n", __func__, ret);
  152. return;
  153. }
  154. gpio_direction_input(ON_BD_USB_OVC);
  155. ret = da8xx_register_usb11(&da830_evm_usb11_pdata);
  156. if (ret)
  157. pr_warning("%s: USB 1.1 registration failed: %d\n",
  158. __func__, ret);
  159. }
  160. static struct davinci_uart_config da830_evm_uart_config __initdata = {
  161. .enabled_uarts = 0x7,
  162. };
  163. static const short da830_evm_mcasp1_pins[] = {
  164. DA830_AHCLKX1, DA830_ACLKX1, DA830_AFSX1, DA830_AHCLKR1, DA830_AFSR1,
  165. DA830_AMUTE1, DA830_AXR1_0, DA830_AXR1_1, DA830_AXR1_2, DA830_AXR1_5,
  166. DA830_ACLKR1, DA830_AXR1_6, DA830_AXR1_7, DA830_AXR1_8, DA830_AXR1_10,
  167. DA830_AXR1_11,
  168. -1
  169. };
  170. static u8 da830_iis_serializer_direction[] = {
  171. RX_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
  172. INACTIVE_MODE, TX_MODE, INACTIVE_MODE, INACTIVE_MODE,
  173. INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
  174. };
  175. static struct snd_platform_data da830_evm_snd_data = {
  176. .tx_dma_offset = 0x2000,
  177. .rx_dma_offset = 0x2000,
  178. .op_mode = DAVINCI_MCASP_IIS_MODE,
  179. .num_serializer = ARRAY_SIZE(da830_iis_serializer_direction),
  180. .tdm_slots = 2,
  181. .serial_dir = da830_iis_serializer_direction,
  182. .asp_chan_q = EVENTQ_0,
  183. .version = MCASP_VERSION_2,
  184. .txnumevt = 1,
  185. .rxnumevt = 1,
  186. };
  187. /*
  188. * GPIO2[1] is used as MMC_SD_WP and GPIO2[2] as MMC_SD_INS.
  189. */
  190. static const short da830_evm_mmc_sd_pins[] = {
  191. DA830_MMCSD_DAT_0, DA830_MMCSD_DAT_1, DA830_MMCSD_DAT_2,
  192. DA830_MMCSD_DAT_3, DA830_MMCSD_DAT_4, DA830_MMCSD_DAT_5,
  193. DA830_MMCSD_DAT_6, DA830_MMCSD_DAT_7, DA830_MMCSD_CLK,
  194. DA830_MMCSD_CMD, DA830_GPIO2_1, DA830_GPIO2_2,
  195. -1
  196. };
  197. #define DA830_MMCSD_WP_PIN GPIO_TO_PIN(2, 1)
  198. #define DA830_MMCSD_CD_PIN GPIO_TO_PIN(2, 2)
  199. static int da830_evm_mmc_get_ro(int index)
  200. {
  201. return gpio_get_value(DA830_MMCSD_WP_PIN);
  202. }
  203. static int da830_evm_mmc_get_cd(int index)
  204. {
  205. return !gpio_get_value(DA830_MMCSD_CD_PIN);
  206. }
  207. static struct davinci_mmc_config da830_evm_mmc_config = {
  208. .get_ro = da830_evm_mmc_get_ro,
  209. .get_cd = da830_evm_mmc_get_cd,
  210. .wires = 8,
  211. .max_freq = 50000000,
  212. .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
  213. .version = MMC_CTLR_VERSION_2,
  214. };
  215. static inline void da830_evm_init_mmc(void)
  216. {
  217. int ret;
  218. ret = davinci_cfg_reg_list(da830_evm_mmc_sd_pins);
  219. if (ret) {
  220. pr_warning("da830_evm_init: mmc/sd mux setup failed: %d\n",
  221. ret);
  222. return;
  223. }
  224. ret = gpio_request(DA830_MMCSD_WP_PIN, "MMC WP");
  225. if (ret) {
  226. pr_warning("da830_evm_init: can not open GPIO %d\n",
  227. DA830_MMCSD_WP_PIN);
  228. return;
  229. }
  230. gpio_direction_input(DA830_MMCSD_WP_PIN);
  231. ret = gpio_request(DA830_MMCSD_CD_PIN, "MMC CD\n");
  232. if (ret) {
  233. pr_warning("da830_evm_init: can not open GPIO %d\n",
  234. DA830_MMCSD_CD_PIN);
  235. return;
  236. }
  237. gpio_direction_input(DA830_MMCSD_CD_PIN);
  238. ret = da8xx_register_mmcsd0(&da830_evm_mmc_config);
  239. if (ret) {
  240. pr_warning("da830_evm_init: mmc/sd registration failed: %d\n",
  241. ret);
  242. gpio_free(DA830_MMCSD_WP_PIN);
  243. }
  244. }
  245. /*
  246. * UI board NAND/NOR flashes only use 8-bit data bus.
  247. */
  248. static const short da830_evm_emif25_pins[] = {
  249. DA830_EMA_D_0, DA830_EMA_D_1, DA830_EMA_D_2, DA830_EMA_D_3,
  250. DA830_EMA_D_4, DA830_EMA_D_5, DA830_EMA_D_6, DA830_EMA_D_7,
  251. DA830_EMA_A_0, DA830_EMA_A_1, DA830_EMA_A_2, DA830_EMA_A_3,
  252. DA830_EMA_A_4, DA830_EMA_A_5, DA830_EMA_A_6, DA830_EMA_A_7,
  253. DA830_EMA_A_8, DA830_EMA_A_9, DA830_EMA_A_10, DA830_EMA_A_11,
  254. DA830_EMA_A_12, DA830_EMA_BA_0, DA830_EMA_BA_1, DA830_NEMA_WE,
  255. DA830_NEMA_CS_2, DA830_NEMA_CS_3, DA830_NEMA_OE, DA830_EMA_WAIT_0,
  256. -1
  257. };
  258. #if defined(CONFIG_MMC_DAVINCI) || defined(CONFIG_MMC_DAVINCI_MODULE)
  259. #define HAS_MMC 1
  260. #else
  261. #define HAS_MMC 0
  262. #endif
  263. #ifdef CONFIG_DA830_UI_NAND
  264. static struct mtd_partition da830_evm_nand_partitions[] = {
  265. /* bootloader (U-Boot, etc) in first sector */
  266. [0] = {
  267. .name = "bootloader",
  268. .offset = 0,
  269. .size = SZ_128K,
  270. .mask_flags = MTD_WRITEABLE, /* force read-only */
  271. },
  272. /* bootloader params in the next sector */
  273. [1] = {
  274. .name = "params",
  275. .offset = MTDPART_OFS_APPEND,
  276. .size = SZ_128K,
  277. .mask_flags = MTD_WRITEABLE, /* force read-only */
  278. },
  279. /* kernel */
  280. [2] = {
  281. .name = "kernel",
  282. .offset = MTDPART_OFS_APPEND,
  283. .size = SZ_2M,
  284. .mask_flags = 0,
  285. },
  286. /* file system */
  287. [3] = {
  288. .name = "filesystem",
  289. .offset = MTDPART_OFS_APPEND,
  290. .size = MTDPART_SIZ_FULL,
  291. .mask_flags = 0,
  292. }
  293. };
  294. /* flash bbt decriptors */
  295. static uint8_t da830_evm_nand_bbt_pattern[] = { 'B', 'b', 't', '0' };
  296. static uint8_t da830_evm_nand_mirror_pattern[] = { '1', 't', 'b', 'B' };
  297. static struct nand_bbt_descr da830_evm_nand_bbt_main_descr = {
  298. .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE |
  299. NAND_BBT_WRITE | NAND_BBT_2BIT |
  300. NAND_BBT_VERSION | NAND_BBT_PERCHIP,
  301. .offs = 2,
  302. .len = 4,
  303. .veroffs = 16,
  304. .maxblocks = 4,
  305. .pattern = da830_evm_nand_bbt_pattern
  306. };
  307. static struct nand_bbt_descr da830_evm_nand_bbt_mirror_descr = {
  308. .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE |
  309. NAND_BBT_WRITE | NAND_BBT_2BIT |
  310. NAND_BBT_VERSION | NAND_BBT_PERCHIP,
  311. .offs = 2,
  312. .len = 4,
  313. .veroffs = 16,
  314. .maxblocks = 4,
  315. .pattern = da830_evm_nand_mirror_pattern
  316. };
  317. static struct davinci_aemif_timing da830_evm_nandflash_timing = {
  318. .wsetup = 24,
  319. .wstrobe = 21,
  320. .whold = 14,
  321. .rsetup = 19,
  322. .rstrobe = 50,
  323. .rhold = 0,
  324. .ta = 20,
  325. };
  326. static struct davinci_nand_pdata da830_evm_nand_pdata = {
  327. .parts = da830_evm_nand_partitions,
  328. .nr_parts = ARRAY_SIZE(da830_evm_nand_partitions),
  329. .ecc_mode = NAND_ECC_HW,
  330. .ecc_bits = 4,
  331. .bbt_options = NAND_BBT_USE_FLASH,
  332. .bbt_td = &da830_evm_nand_bbt_main_descr,
  333. .bbt_md = &da830_evm_nand_bbt_mirror_descr,
  334. .timing = &da830_evm_nandflash_timing,
  335. };
  336. static struct resource da830_evm_nand_resources[] = {
  337. [0] = { /* First memory resource is NAND I/O window */
  338. .start = DA8XX_AEMIF_CS3_BASE,
  339. .end = DA8XX_AEMIF_CS3_BASE + PAGE_SIZE - 1,
  340. .flags = IORESOURCE_MEM,
  341. },
  342. [1] = { /* Second memory resource is AEMIF control registers */
  343. .start = DA8XX_AEMIF_CTL_BASE,
  344. .end = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1,
  345. .flags = IORESOURCE_MEM,
  346. },
  347. };
  348. static struct platform_device da830_evm_nand_device = {
  349. .name = "davinci_nand",
  350. .id = 1,
  351. .dev = {
  352. .platform_data = &da830_evm_nand_pdata,
  353. },
  354. .num_resources = ARRAY_SIZE(da830_evm_nand_resources),
  355. .resource = da830_evm_nand_resources,
  356. };
  357. static inline void da830_evm_init_nand(int mux_mode)
  358. {
  359. int ret;
  360. if (HAS_MMC) {
  361. pr_warning("WARNING: both MMC/SD and NAND are "
  362. "enabled, but they share AEMIF pins.\n"
  363. "\tDisable MMC/SD for NAND support.\n");
  364. return;
  365. }
  366. ret = davinci_cfg_reg_list(da830_evm_emif25_pins);
  367. if (ret)
  368. pr_warning("da830_evm_init: emif25 mux setup failed: %d\n",
  369. ret);
  370. ret = platform_device_register(&da830_evm_nand_device);
  371. if (ret)
  372. pr_warning("da830_evm_init: NAND device not registered.\n");
  373. gpio_direction_output(mux_mode, 1);
  374. }
  375. #else
  376. static inline void da830_evm_init_nand(int mux_mode) { }
  377. #endif
  378. #ifdef CONFIG_DA830_UI_LCD
  379. static inline void da830_evm_init_lcdc(int mux_mode)
  380. {
  381. int ret;
  382. ret = davinci_cfg_reg_list(da830_lcdcntl_pins);
  383. if (ret)
  384. pr_warning("da830_evm_init: lcdcntl mux setup failed: %d\n",
  385. ret);
  386. ret = da8xx_register_lcdc(&sharp_lcd035q3dg01_pdata);
  387. if (ret)
  388. pr_warning("da830_evm_init: lcd setup failed: %d\n", ret);
  389. gpio_direction_output(mux_mode, 0);
  390. }
  391. #else
  392. static inline void da830_evm_init_lcdc(int mux_mode) { }
  393. #endif
  394. static struct at24_platform_data da830_evm_i2c_eeprom_info = {
  395. .byte_len = SZ_256K / 8,
  396. .page_size = 64,
  397. .flags = AT24_FLAG_ADDR16,
  398. .setup = davinci_get_mac_addr,
  399. .context = (void *)0x7f00,
  400. };
  401. static int __init da830_evm_ui_expander_setup(struct i2c_client *client,
  402. int gpio, unsigned ngpio, void *context)
  403. {
  404. gpio_request(gpio + 6, "UI MUX_MODE");
  405. /* Drive mux mode low to match the default without UI card */
  406. gpio_direction_output(gpio + 6, 0);
  407. da830_evm_init_lcdc(gpio + 6);
  408. da830_evm_init_nand(gpio + 6);
  409. return 0;
  410. }
  411. static int da830_evm_ui_expander_teardown(struct i2c_client *client, int gpio,
  412. unsigned ngpio, void *context)
  413. {
  414. gpio_free(gpio + 6);
  415. return 0;
  416. }
  417. static struct pcf857x_platform_data __initdata da830_evm_ui_expander_info = {
  418. .gpio_base = DAVINCI_N_GPIO,
  419. .setup = da830_evm_ui_expander_setup,
  420. .teardown = da830_evm_ui_expander_teardown,
  421. };
  422. static struct i2c_board_info __initdata da830_evm_i2c_devices[] = {
  423. {
  424. I2C_BOARD_INFO("24c256", 0x50),
  425. .platform_data = &da830_evm_i2c_eeprom_info,
  426. },
  427. {
  428. I2C_BOARD_INFO("tlv320aic3x", 0x18),
  429. },
  430. {
  431. I2C_BOARD_INFO("pcf8574", 0x3f),
  432. .platform_data = &da830_evm_ui_expander_info,
  433. },
  434. };
  435. static struct davinci_i2c_platform_data da830_evm_i2c_0_pdata = {
  436. .bus_freq = 100, /* kHz */
  437. .bus_delay = 0, /* usec */
  438. };
  439. /*
  440. * The following EDMA channels/slots are not being used by drivers (for
  441. * example: Timer, GPIO, UART events etc) on da830/omap-l137 EVM, hence
  442. * they are being reserved for codecs on the DSP side.
  443. */
  444. static const s16 da830_dma_rsv_chans[][2] = {
  445. /* (offset, number) */
  446. { 8, 2},
  447. {12, 2},
  448. {24, 4},
  449. {30, 2},
  450. {-1, -1}
  451. };
  452. static const s16 da830_dma_rsv_slots[][2] = {
  453. /* (offset, number) */
  454. { 8, 2},
  455. {12, 2},
  456. {24, 4},
  457. {30, 26},
  458. {-1, -1}
  459. };
  460. static struct edma_rsv_info da830_edma_rsv[] = {
  461. {
  462. .rsv_chans = da830_dma_rsv_chans,
  463. .rsv_slots = da830_dma_rsv_slots,
  464. },
  465. };
  466. static struct mtd_partition da830evm_spiflash_part[] = {
  467. [0] = {
  468. .name = "DSP-UBL",
  469. .offset = 0,
  470. .size = SZ_8K,
  471. .mask_flags = MTD_WRITEABLE,
  472. },
  473. [1] = {
  474. .name = "ARM-UBL",
  475. .offset = MTDPART_OFS_APPEND,
  476. .size = SZ_16K + SZ_8K,
  477. .mask_flags = MTD_WRITEABLE,
  478. },
  479. [2] = {
  480. .name = "U-Boot",
  481. .offset = MTDPART_OFS_APPEND,
  482. .size = SZ_256K - SZ_32K,
  483. .mask_flags = MTD_WRITEABLE,
  484. },
  485. [3] = {
  486. .name = "U-Boot-Environment",
  487. .offset = MTDPART_OFS_APPEND,
  488. .size = SZ_16K,
  489. .mask_flags = 0,
  490. },
  491. [4] = {
  492. .name = "Kernel",
  493. .offset = MTDPART_OFS_APPEND,
  494. .size = MTDPART_SIZ_FULL,
  495. .mask_flags = 0,
  496. },
  497. };
  498. static struct flash_platform_data da830evm_spiflash_data = {
  499. .name = "m25p80",
  500. .parts = da830evm_spiflash_part,
  501. .nr_parts = ARRAY_SIZE(da830evm_spiflash_part),
  502. .type = "w25x32",
  503. };
  504. static struct davinci_spi_config da830evm_spiflash_cfg = {
  505. .io_type = SPI_IO_TYPE_DMA,
  506. .c2tdelay = 8,
  507. .t2cdelay = 8,
  508. };
  509. static struct spi_board_info da830evm_spi_info[] = {
  510. {
  511. .modalias = "m25p80",
  512. .platform_data = &da830evm_spiflash_data,
  513. .controller_data = &da830evm_spiflash_cfg,
  514. .mode = SPI_MODE_0,
  515. .max_speed_hz = 30000000,
  516. .bus_num = 0,
  517. .chip_select = 0,
  518. },
  519. };
  520. static __init void da830_evm_init(void)
  521. {
  522. struct davinci_soc_info *soc_info = &davinci_soc_info;
  523. int ret;
  524. ret = da830_register_edma(da830_edma_rsv);
  525. if (ret)
  526. pr_warning("da830_evm_init: edma registration failed: %d\n",
  527. ret);
  528. ret = davinci_cfg_reg_list(da830_i2c0_pins);
  529. if (ret)
  530. pr_warning("da830_evm_init: i2c0 mux setup failed: %d\n",
  531. ret);
  532. ret = da8xx_register_i2c(0, &da830_evm_i2c_0_pdata);
  533. if (ret)
  534. pr_warning("da830_evm_init: i2c0 registration failed: %d\n",
  535. ret);
  536. da830_evm_usb_init();
  537. soc_info->emac_pdata->rmii_en = 1;
  538. soc_info->emac_pdata->phy_id = DA830_EVM_PHY_ID;
  539. ret = davinci_cfg_reg_list(da830_cpgmac_pins);
  540. if (ret)
  541. pr_warning("da830_evm_init: cpgmac mux setup failed: %d\n",
  542. ret);
  543. ret = da8xx_register_emac();
  544. if (ret)
  545. pr_warning("da830_evm_init: emac registration failed: %d\n",
  546. ret);
  547. ret = da8xx_register_watchdog();
  548. if (ret)
  549. pr_warning("da830_evm_init: watchdog registration failed: %d\n",
  550. ret);
  551. davinci_serial_init(&da830_evm_uart_config);
  552. i2c_register_board_info(1, da830_evm_i2c_devices,
  553. ARRAY_SIZE(da830_evm_i2c_devices));
  554. ret = davinci_cfg_reg_list(da830_evm_mcasp1_pins);
  555. if (ret)
  556. pr_warning("da830_evm_init: mcasp1 mux setup failed: %d\n",
  557. ret);
  558. da8xx_register_mcasp(1, &da830_evm_snd_data);
  559. da830_evm_init_mmc();
  560. ret = da8xx_register_rtc();
  561. if (ret)
  562. pr_warning("da830_evm_init: rtc setup failed: %d\n", ret);
  563. ret = da8xx_register_spi(0, da830evm_spi_info,
  564. ARRAY_SIZE(da830evm_spi_info));
  565. if (ret)
  566. pr_warning("da830_evm_init: spi 0 registration failed: %d\n",
  567. ret);
  568. }
  569. #ifdef CONFIG_SERIAL_8250_CONSOLE
  570. static int __init da830_evm_console_init(void)
  571. {
  572. if (!machine_is_davinci_da830_evm())
  573. return 0;
  574. return add_preferred_console("ttyS", 2, "115200");
  575. }
  576. console_initcall(da830_evm_console_init);
  577. #endif
  578. static void __init da830_evm_map_io(void)
  579. {
  580. da830_init();
  581. }
  582. MACHINE_START(DAVINCI_DA830_EVM, "DaVinci DA830/OMAP-L137/AM17x EVM")
  583. .atag_offset = 0x100,
  584. .map_io = da830_evm_map_io,
  585. .init_irq = cp_intc_init,
  586. .timer = &davinci_timer,
  587. .init_machine = da830_evm_init,
  588. .dma_zone_size = SZ_128M,
  589. .restart = da8xx_restart,
  590. MACHINE_END