irq.c 3.6 KB

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  1. /*
  2. *
  3. * Copyright (C) 1999 ARM Limited
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; either version 2 of the License, or
  8. * (at your option) any later version.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  18. */
  19. #include <linux/init.h>
  20. #include <linux/stddef.h>
  21. #include <linux/list.h>
  22. #include <linux/timer.h>
  23. #include <linux/io.h>
  24. #include <mach/hardware.h>
  25. #include <asm/irq.h>
  26. #include <asm/mach/irq.h>
  27. #include <mach/csp/intcHw_reg.h>
  28. #include <mach/csp/mm_io.h>
  29. static void bcmring_mask_irq0(struct irq_data *d)
  30. {
  31. writel(1 << (d->irq - IRQ_INTC0_START),
  32. MM_IO_BASE_INTC0 + INTCHW_INTENCLEAR);
  33. }
  34. static void bcmring_unmask_irq0(struct irq_data *d)
  35. {
  36. writel(1 << (d->irq - IRQ_INTC0_START),
  37. MM_IO_BASE_INTC0 + INTCHW_INTENABLE);
  38. }
  39. static void bcmring_mask_irq1(struct irq_data *d)
  40. {
  41. writel(1 << (d->irq - IRQ_INTC1_START),
  42. MM_IO_BASE_INTC1 + INTCHW_INTENCLEAR);
  43. }
  44. static void bcmring_unmask_irq1(struct irq_data *d)
  45. {
  46. writel(1 << (d->irq - IRQ_INTC1_START),
  47. MM_IO_BASE_INTC1 + INTCHW_INTENABLE);
  48. }
  49. static void bcmring_mask_irq2(struct irq_data *d)
  50. {
  51. writel(1 << (d->irq - IRQ_SINTC_START),
  52. MM_IO_BASE_SINTC + INTCHW_INTENCLEAR);
  53. }
  54. static void bcmring_unmask_irq2(struct irq_data *d)
  55. {
  56. writel(1 << (d->irq - IRQ_SINTC_START),
  57. MM_IO_BASE_SINTC + INTCHW_INTENABLE);
  58. }
  59. static struct irq_chip bcmring_irq0_chip = {
  60. .name = "ARM-INTC0",
  61. .irq_ack = bcmring_mask_irq0,
  62. .irq_mask = bcmring_mask_irq0, /* mask a specific interrupt, blocking its delivery. */
  63. .irq_unmask = bcmring_unmask_irq0, /* unmaks an interrupt */
  64. };
  65. static struct irq_chip bcmring_irq1_chip = {
  66. .name = "ARM-INTC1",
  67. .irq_ack = bcmring_mask_irq1,
  68. .irq_mask = bcmring_mask_irq1,
  69. .irq_unmask = bcmring_unmask_irq1,
  70. };
  71. static struct irq_chip bcmring_irq2_chip = {
  72. .name = "ARM-SINTC",
  73. .irq_ack = bcmring_mask_irq2,
  74. .irq_mask = bcmring_mask_irq2,
  75. .irq_unmask = bcmring_unmask_irq2,
  76. };
  77. static void vic_init(void __iomem *base, struct irq_chip *chip,
  78. unsigned int irq_start, unsigned int vic_sources)
  79. {
  80. unsigned int i;
  81. for (i = 0; i < 32; i++) {
  82. unsigned int irq = irq_start + i;
  83. irq_set_chip(irq, chip);
  84. irq_set_chip_data(irq, base);
  85. if (vic_sources & (1 << i)) {
  86. irq_set_handler(irq, handle_level_irq);
  87. set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
  88. }
  89. }
  90. writel(0, base + INTCHW_INTSELECT);
  91. writel(0, base + INTCHW_INTENABLE);
  92. writel(~0, base + INTCHW_INTENCLEAR);
  93. writel(0, base + INTCHW_IRQSTATUS);
  94. writel(~0, base + INTCHW_SOFTINTCLEAR);
  95. }
  96. void __init bcmring_init_irq(void)
  97. {
  98. vic_init((void __iomem *)MM_IO_BASE_INTC0, &bcmring_irq0_chip,
  99. IRQ_INTC0_START, IRQ_INTC0_VALID_MASK);
  100. vic_init((void __iomem *)MM_IO_BASE_INTC1, &bcmring_irq1_chip,
  101. IRQ_INTC1_START, IRQ_INTC1_VALID_MASK);
  102. vic_init((void __iomem *)MM_IO_BASE_SINTC, &bcmring_irq2_chip,
  103. IRQ_SINTC_START, IRQ_SINTC_VALID_MASK);
  104. /* special cases */
  105. if (INTCHW_INTC1_GPIO0 & IRQ_INTC1_VALID_MASK) {
  106. irq_set_handler(IRQ_GPIO0, handle_simple_irq);
  107. }
  108. if (INTCHW_INTC1_GPIO1 & IRQ_INTC1_VALID_MASK) {
  109. irq_set_handler(IRQ_GPIO1, handle_simple_irq);
  110. }
  111. }