musb_virthub.c 12 KB

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  1. /*
  2. * MUSB OTG driver virtual root hub support
  3. *
  4. * Copyright 2005 Mentor Graphics Corporation
  5. * Copyright (C) 2005-2006 by Texas Instruments
  6. * Copyright (C) 2006-2007 Nokia Corporation
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License
  10. * version 2 as published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but
  13. * WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  15. * General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  20. * 02110-1301 USA
  21. *
  22. * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
  23. * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  24. * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
  25. * NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  26. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  27. * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
  28. * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  29. * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  31. * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32. *
  33. */
  34. #include <linux/module.h>
  35. #include <linux/kernel.h>
  36. #include <linux/sched.h>
  37. #include <linux/errno.h>
  38. #include <linux/init.h>
  39. #include <linux/time.h>
  40. #include <linux/timer.h>
  41. #include <asm/unaligned.h>
  42. #include "musb_core.h"
  43. static void musb_port_suspend(struct musb *musb, bool do_suspend)
  44. {
  45. struct usb_otg *otg = musb->xceiv->otg;
  46. u8 power;
  47. void __iomem *mbase = musb->mregs;
  48. if (!is_host_active(musb))
  49. return;
  50. /* NOTE: this doesn't necessarily put PHY into low power mode,
  51. * turning off its clock; that's a function of PHY integration and
  52. * MUSB_POWER_ENSUSPEND. PHY may need a clock (sigh) to detect
  53. * SE0 changing to connect (J) or wakeup (K) states.
  54. */
  55. power = musb_readb(mbase, MUSB_POWER);
  56. if (do_suspend) {
  57. int retries = 10000;
  58. power &= ~MUSB_POWER_RESUME;
  59. power |= MUSB_POWER_SUSPENDM;
  60. musb_writeb(mbase, MUSB_POWER, power);
  61. /* Needed for OPT A tests */
  62. power = musb_readb(mbase, MUSB_POWER);
  63. while (power & MUSB_POWER_SUSPENDM) {
  64. power = musb_readb(mbase, MUSB_POWER);
  65. if (retries-- < 1)
  66. break;
  67. }
  68. dev_dbg(musb->controller, "Root port suspended, power %02x\n", power);
  69. musb->port1_status |= USB_PORT_STAT_SUSPEND;
  70. switch (musb->xceiv->state) {
  71. case OTG_STATE_A_HOST:
  72. musb->xceiv->state = OTG_STATE_A_SUSPEND;
  73. musb->is_active = is_otg_enabled(musb)
  74. && otg->host->b_hnp_enable;
  75. if (musb->is_active)
  76. mod_timer(&musb->otg_timer, jiffies
  77. + msecs_to_jiffies(
  78. OTG_TIME_A_AIDL_BDIS));
  79. musb_platform_try_idle(musb, 0);
  80. break;
  81. case OTG_STATE_B_HOST:
  82. musb->xceiv->state = OTG_STATE_B_WAIT_ACON;
  83. musb->is_active = is_otg_enabled(musb)
  84. && otg->host->b_hnp_enable;
  85. musb_platform_try_idle(musb, 0);
  86. break;
  87. default:
  88. dev_dbg(musb->controller, "bogus rh suspend? %s\n",
  89. otg_state_string(musb->xceiv->state));
  90. }
  91. } else if (power & MUSB_POWER_SUSPENDM) {
  92. power &= ~MUSB_POWER_SUSPENDM;
  93. power |= MUSB_POWER_RESUME;
  94. musb_writeb(mbase, MUSB_POWER, power);
  95. dev_dbg(musb->controller, "Root port resuming, power %02x\n", power);
  96. /* later, GetPortStatus will stop RESUME signaling */
  97. musb->port1_status |= MUSB_PORT_STAT_RESUME;
  98. musb->rh_timer = jiffies + msecs_to_jiffies(20);
  99. }
  100. }
  101. static void musb_port_reset(struct musb *musb, bool do_reset)
  102. {
  103. u8 power;
  104. void __iomem *mbase = musb->mregs;
  105. if (musb->xceiv->state == OTG_STATE_B_IDLE) {
  106. dev_dbg(musb->controller, "HNP: Returning from HNP; no hub reset from b_idle\n");
  107. musb->port1_status &= ~USB_PORT_STAT_RESET;
  108. return;
  109. }
  110. if (!is_host_active(musb))
  111. return;
  112. /* NOTE: caller guarantees it will turn off the reset when
  113. * the appropriate amount of time has passed
  114. */
  115. power = musb_readb(mbase, MUSB_POWER);
  116. if (do_reset) {
  117. /*
  118. * If RESUME is set, we must make sure it stays minimum 20 ms.
  119. * Then we must clear RESUME and wait a bit to let musb start
  120. * generating SOFs. If we don't do this, OPT HS A 6.8 tests
  121. * fail with "Error! Did not receive an SOF before suspend
  122. * detected".
  123. */
  124. if (power & MUSB_POWER_RESUME) {
  125. while (time_before(jiffies, musb->rh_timer))
  126. msleep(1);
  127. musb_writeb(mbase, MUSB_POWER,
  128. power & ~MUSB_POWER_RESUME);
  129. msleep(1);
  130. }
  131. musb->ignore_disconnect = true;
  132. power &= 0xf0;
  133. musb_writeb(mbase, MUSB_POWER,
  134. power | MUSB_POWER_RESET);
  135. musb->port1_status |= USB_PORT_STAT_RESET;
  136. musb->port1_status &= ~USB_PORT_STAT_ENABLE;
  137. musb->rh_timer = jiffies + msecs_to_jiffies(50);
  138. } else {
  139. dev_dbg(musb->controller, "root port reset stopped\n");
  140. musb_writeb(mbase, MUSB_POWER,
  141. power & ~MUSB_POWER_RESET);
  142. musb->ignore_disconnect = false;
  143. power = musb_readb(mbase, MUSB_POWER);
  144. if (power & MUSB_POWER_HSMODE) {
  145. dev_dbg(musb->controller, "high-speed device connected\n");
  146. musb->port1_status |= USB_PORT_STAT_HIGH_SPEED;
  147. }
  148. musb->port1_status &= ~USB_PORT_STAT_RESET;
  149. musb->port1_status |= USB_PORT_STAT_ENABLE
  150. | (USB_PORT_STAT_C_RESET << 16)
  151. | (USB_PORT_STAT_C_ENABLE << 16);
  152. usb_hcd_poll_rh_status(musb_to_hcd(musb));
  153. musb->vbuserr_retry = VBUSERR_RETRY_COUNT;
  154. }
  155. }
  156. void musb_root_disconnect(struct musb *musb)
  157. {
  158. struct usb_otg *otg = musb->xceiv->otg;
  159. musb->port1_status = USB_PORT_STAT_POWER
  160. | (USB_PORT_STAT_C_CONNECTION << 16);
  161. usb_hcd_poll_rh_status(musb_to_hcd(musb));
  162. musb->is_active = 0;
  163. switch (musb->xceiv->state) {
  164. case OTG_STATE_A_SUSPEND:
  165. if (is_otg_enabled(musb)
  166. && otg->host->b_hnp_enable) {
  167. musb->xceiv->state = OTG_STATE_A_PERIPHERAL;
  168. musb->g.is_a_peripheral = 1;
  169. break;
  170. }
  171. /* FALLTHROUGH */
  172. case OTG_STATE_A_HOST:
  173. musb->xceiv->state = OTG_STATE_A_WAIT_BCON;
  174. musb->is_active = 0;
  175. break;
  176. case OTG_STATE_A_WAIT_VFALL:
  177. musb->xceiv->state = OTG_STATE_B_IDLE;
  178. break;
  179. default:
  180. dev_dbg(musb->controller, "host disconnect (%s)\n",
  181. otg_state_string(musb->xceiv->state));
  182. }
  183. }
  184. /*---------------------------------------------------------------------*/
  185. /* Caller may or may not hold musb->lock */
  186. int musb_hub_status_data(struct usb_hcd *hcd, char *buf)
  187. {
  188. struct musb *musb = hcd_to_musb(hcd);
  189. int retval = 0;
  190. /* called in_irq() via usb_hcd_poll_rh_status() */
  191. if (musb->port1_status & 0xffff0000) {
  192. *buf = 0x02;
  193. retval = 1;
  194. }
  195. return retval;
  196. }
  197. int musb_hub_control(
  198. struct usb_hcd *hcd,
  199. u16 typeReq,
  200. u16 wValue,
  201. u16 wIndex,
  202. char *buf,
  203. u16 wLength)
  204. {
  205. struct musb *musb = hcd_to_musb(hcd);
  206. u32 temp;
  207. int retval = 0;
  208. unsigned long flags;
  209. spin_lock_irqsave(&musb->lock, flags);
  210. if (unlikely(!HCD_HW_ACCESSIBLE(hcd))) {
  211. spin_unlock_irqrestore(&musb->lock, flags);
  212. return -ESHUTDOWN;
  213. }
  214. /* hub features: always zero, setting is a NOP
  215. * port features: reported, sometimes updated when host is active
  216. * no indicators
  217. */
  218. switch (typeReq) {
  219. case ClearHubFeature:
  220. case SetHubFeature:
  221. switch (wValue) {
  222. case C_HUB_OVER_CURRENT:
  223. case C_HUB_LOCAL_POWER:
  224. break;
  225. default:
  226. goto error;
  227. }
  228. break;
  229. case ClearPortFeature:
  230. if ((wIndex & 0xff) != 1)
  231. goto error;
  232. switch (wValue) {
  233. case USB_PORT_FEAT_ENABLE:
  234. break;
  235. case USB_PORT_FEAT_SUSPEND:
  236. musb_port_suspend(musb, false);
  237. break;
  238. case USB_PORT_FEAT_POWER:
  239. if (!(is_otg_enabled(musb) && hcd->self.is_b_host))
  240. musb_platform_set_vbus(musb, 0);
  241. break;
  242. case USB_PORT_FEAT_C_CONNECTION:
  243. case USB_PORT_FEAT_C_ENABLE:
  244. case USB_PORT_FEAT_C_OVER_CURRENT:
  245. case USB_PORT_FEAT_C_RESET:
  246. case USB_PORT_FEAT_C_SUSPEND:
  247. break;
  248. default:
  249. goto error;
  250. }
  251. dev_dbg(musb->controller, "clear feature %d\n", wValue);
  252. musb->port1_status &= ~(1 << wValue);
  253. break;
  254. case GetHubDescriptor:
  255. {
  256. struct usb_hub_descriptor *desc = (void *)buf;
  257. desc->bDescLength = 9;
  258. desc->bDescriptorType = 0x29;
  259. desc->bNbrPorts = 1;
  260. desc->wHubCharacteristics = cpu_to_le16(
  261. 0x0001 /* per-port power switching */
  262. | 0x0010 /* no overcurrent reporting */
  263. );
  264. desc->bPwrOn2PwrGood = 5; /* msec/2 */
  265. desc->bHubContrCurrent = 0;
  266. /* workaround bogus struct definition */
  267. desc->u.hs.DeviceRemovable[0] = 0x02; /* port 1 */
  268. desc->u.hs.DeviceRemovable[1] = 0xff;
  269. }
  270. break;
  271. case GetHubStatus:
  272. temp = 0;
  273. *(__le32 *) buf = cpu_to_le32(temp);
  274. break;
  275. case GetPortStatus:
  276. if (wIndex != 1)
  277. goto error;
  278. /* finish RESET signaling? */
  279. if ((musb->port1_status & USB_PORT_STAT_RESET)
  280. && time_after_eq(jiffies, musb->rh_timer))
  281. musb_port_reset(musb, false);
  282. /* finish RESUME signaling? */
  283. if ((musb->port1_status & MUSB_PORT_STAT_RESUME)
  284. && time_after_eq(jiffies, musb->rh_timer)) {
  285. u8 power;
  286. power = musb_readb(musb->mregs, MUSB_POWER);
  287. power &= ~MUSB_POWER_RESUME;
  288. dev_dbg(musb->controller, "root port resume stopped, power %02x\n",
  289. power);
  290. musb_writeb(musb->mregs, MUSB_POWER, power);
  291. /* ISSUE: DaVinci (RTL 1.300) disconnects after
  292. * resume of high speed peripherals (but not full
  293. * speed ones).
  294. */
  295. musb->is_active = 1;
  296. musb->port1_status &= ~(USB_PORT_STAT_SUSPEND
  297. | MUSB_PORT_STAT_RESUME);
  298. musb->port1_status |= USB_PORT_STAT_C_SUSPEND << 16;
  299. usb_hcd_poll_rh_status(musb_to_hcd(musb));
  300. /* NOTE: it might really be A_WAIT_BCON ... */
  301. musb->xceiv->state = OTG_STATE_A_HOST;
  302. }
  303. put_unaligned(cpu_to_le32(musb->port1_status
  304. & ~MUSB_PORT_STAT_RESUME),
  305. (__le32 *) buf);
  306. /* port change status is more interesting */
  307. dev_dbg(musb->controller, "port status %08x\n",
  308. musb->port1_status);
  309. break;
  310. case SetPortFeature:
  311. if ((wIndex & 0xff) != 1)
  312. goto error;
  313. switch (wValue) {
  314. case USB_PORT_FEAT_POWER:
  315. /* NOTE: this controller has a strange state machine
  316. * that involves "requesting sessions" according to
  317. * magic side effects from incompletely-described
  318. * rules about startup...
  319. *
  320. * This call is what really starts the host mode; be
  321. * very careful about side effects if you reorder any
  322. * initialization logic, e.g. for OTG, or change any
  323. * logic relating to VBUS power-up.
  324. */
  325. if (!(is_otg_enabled(musb) && hcd->self.is_b_host))
  326. musb_start(musb);
  327. break;
  328. case USB_PORT_FEAT_RESET:
  329. musb_port_reset(musb, true);
  330. break;
  331. case USB_PORT_FEAT_SUSPEND:
  332. musb_port_suspend(musb, true);
  333. break;
  334. case USB_PORT_FEAT_TEST:
  335. if (unlikely(is_host_active(musb)))
  336. goto error;
  337. wIndex >>= 8;
  338. switch (wIndex) {
  339. case 1:
  340. pr_debug("TEST_J\n");
  341. temp = MUSB_TEST_J;
  342. break;
  343. case 2:
  344. pr_debug("TEST_K\n");
  345. temp = MUSB_TEST_K;
  346. break;
  347. case 3:
  348. pr_debug("TEST_SE0_NAK\n");
  349. temp = MUSB_TEST_SE0_NAK;
  350. break;
  351. case 4:
  352. pr_debug("TEST_PACKET\n");
  353. temp = MUSB_TEST_PACKET;
  354. musb_load_testpacket(musb);
  355. break;
  356. case 5:
  357. pr_debug("TEST_FORCE_ENABLE\n");
  358. temp = MUSB_TEST_FORCE_HOST
  359. | MUSB_TEST_FORCE_HS;
  360. musb_writeb(musb->mregs, MUSB_DEVCTL,
  361. MUSB_DEVCTL_SESSION);
  362. break;
  363. case 6:
  364. pr_debug("TEST_FIFO_ACCESS\n");
  365. temp = MUSB_TEST_FIFO_ACCESS;
  366. break;
  367. default:
  368. goto error;
  369. }
  370. musb_writeb(musb->mregs, MUSB_TESTMODE, temp);
  371. break;
  372. default:
  373. goto error;
  374. }
  375. dev_dbg(musb->controller, "set feature %d\n", wValue);
  376. musb->port1_status |= 1 << wValue;
  377. break;
  378. default:
  379. error:
  380. /* "protocol stall" on error */
  381. retval = -EPIPE;
  382. }
  383. spin_unlock_irqrestore(&musb->lock, flags);
  384. return retval;
  385. }