ohci-omap.c 13 KB

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  1. /*
  2. * OHCI HCD (Host Controller Driver) for USB.
  3. *
  4. * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
  5. * (C) Copyright 2000-2005 David Brownell
  6. * (C) Copyright 2002 Hewlett-Packard Company
  7. *
  8. * OMAP Bus Glue
  9. *
  10. * Modified for OMAP by Tony Lindgren <tony@atomide.com>
  11. * Based on the 2.4 OMAP OHCI driver originally done by MontaVista Software Inc.
  12. * and on ohci-sa1111.c by Christopher Hoover <ch@hpl.hp.com>
  13. *
  14. * This file is licenced under the GPL.
  15. */
  16. #include <linux/signal.h>
  17. #include <linux/jiffies.h>
  18. #include <linux/platform_device.h>
  19. #include <linux/clk.h>
  20. #include <linux/gpio.h>
  21. #include <mach/hardware.h>
  22. #include <asm/io.h>
  23. #include <asm/mach-types.h>
  24. #include <plat/mux.h>
  25. #include <mach/irqs.h>
  26. #include <plat/fpga.h>
  27. #include <plat/usb.h>
  28. /* OMAP-1510 OHCI has its own MMU for DMA */
  29. #define OMAP1510_LB_MEMSIZE 32 /* Should be same as SDRAM size */
  30. #define OMAP1510_LB_CLOCK_DIV 0xfffec10c
  31. #define OMAP1510_LB_MMU_CTL 0xfffec208
  32. #define OMAP1510_LB_MMU_LCK 0xfffec224
  33. #define OMAP1510_LB_MMU_LD_TLB 0xfffec228
  34. #define OMAP1510_LB_MMU_CAM_H 0xfffec22c
  35. #define OMAP1510_LB_MMU_CAM_L 0xfffec230
  36. #define OMAP1510_LB_MMU_RAM_H 0xfffec234
  37. #define OMAP1510_LB_MMU_RAM_L 0xfffec238
  38. #ifndef CONFIG_ARCH_OMAP
  39. #error "This file is OMAP bus glue. CONFIG_OMAP must be defined."
  40. #endif
  41. #ifdef CONFIG_TPS65010
  42. #include <linux/i2c/tps65010.h>
  43. #else
  44. #define LOW 0
  45. #define HIGH 1
  46. #define GPIO1 1
  47. static inline int tps65010_set_gpio_out_value(unsigned gpio, unsigned value)
  48. {
  49. return 0;
  50. }
  51. #endif
  52. extern int usb_disabled(void);
  53. extern int ocpi_enable(void);
  54. static struct clk *usb_host_ck;
  55. static struct clk *usb_dc_ck;
  56. static int host_enabled;
  57. static int host_initialized;
  58. static void omap_ohci_clock_power(int on)
  59. {
  60. if (on) {
  61. clk_enable(usb_dc_ck);
  62. clk_enable(usb_host_ck);
  63. /* guesstimate for T5 == 1x 32K clock + APLL lock time */
  64. udelay(100);
  65. } else {
  66. clk_disable(usb_host_ck);
  67. clk_disable(usb_dc_ck);
  68. }
  69. }
  70. /*
  71. * Board specific gang-switched transceiver power on/off.
  72. * NOTE: OSK supplies power from DC, not battery.
  73. */
  74. static int omap_ohci_transceiver_power(int on)
  75. {
  76. if (on) {
  77. if (machine_is_omap_innovator() && cpu_is_omap1510())
  78. fpga_write(fpga_read(INNOVATOR_FPGA_CAM_USB_CONTROL)
  79. | ((1 << 5/*usb1*/) | (1 << 3/*usb2*/)),
  80. INNOVATOR_FPGA_CAM_USB_CONTROL);
  81. else if (machine_is_omap_osk())
  82. tps65010_set_gpio_out_value(GPIO1, LOW);
  83. } else {
  84. if (machine_is_omap_innovator() && cpu_is_omap1510())
  85. fpga_write(fpga_read(INNOVATOR_FPGA_CAM_USB_CONTROL)
  86. & ~((1 << 5/*usb1*/) | (1 << 3/*usb2*/)),
  87. INNOVATOR_FPGA_CAM_USB_CONTROL);
  88. else if (machine_is_omap_osk())
  89. tps65010_set_gpio_out_value(GPIO1, HIGH);
  90. }
  91. return 0;
  92. }
  93. #ifdef CONFIG_ARCH_OMAP15XX
  94. /*
  95. * OMAP-1510 specific Local Bus clock on/off
  96. */
  97. static int omap_1510_local_bus_power(int on)
  98. {
  99. if (on) {
  100. omap_writel((1 << 1) | (1 << 0), OMAP1510_LB_MMU_CTL);
  101. udelay(200);
  102. } else {
  103. omap_writel(0, OMAP1510_LB_MMU_CTL);
  104. }
  105. return 0;
  106. }
  107. /*
  108. * OMAP-1510 specific Local Bus initialization
  109. * NOTE: This assumes 32MB memory size in OMAP1510LB_MEMSIZE.
  110. * See also arch/mach-omap/memory.h for __virt_to_dma() and
  111. * __dma_to_virt() which need to match with the physical
  112. * Local Bus address below.
  113. */
  114. static int omap_1510_local_bus_init(void)
  115. {
  116. unsigned int tlb;
  117. unsigned long lbaddr, physaddr;
  118. omap_writel((omap_readl(OMAP1510_LB_CLOCK_DIV) & 0xfffffff8) | 0x4,
  119. OMAP1510_LB_CLOCK_DIV);
  120. /* Configure the Local Bus MMU table */
  121. for (tlb = 0; tlb < OMAP1510_LB_MEMSIZE; tlb++) {
  122. lbaddr = tlb * 0x00100000 + OMAP1510_LB_OFFSET;
  123. physaddr = tlb * 0x00100000 + PHYS_OFFSET;
  124. omap_writel((lbaddr & 0x0fffffff) >> 22, OMAP1510_LB_MMU_CAM_H);
  125. omap_writel(((lbaddr & 0x003ffc00) >> 6) | 0xc,
  126. OMAP1510_LB_MMU_CAM_L);
  127. omap_writel(physaddr >> 16, OMAP1510_LB_MMU_RAM_H);
  128. omap_writel((physaddr & 0x0000fc00) | 0x300, OMAP1510_LB_MMU_RAM_L);
  129. omap_writel(tlb << 4, OMAP1510_LB_MMU_LCK);
  130. omap_writel(0x1, OMAP1510_LB_MMU_LD_TLB);
  131. }
  132. /* Enable the walking table */
  133. omap_writel(omap_readl(OMAP1510_LB_MMU_CTL) | (1 << 3), OMAP1510_LB_MMU_CTL);
  134. udelay(200);
  135. return 0;
  136. }
  137. #else
  138. #define omap_1510_local_bus_power(x) {}
  139. #define omap_1510_local_bus_init() {}
  140. #endif
  141. #ifdef CONFIG_USB_OTG
  142. static void start_hnp(struct ohci_hcd *ohci)
  143. {
  144. const unsigned port = ohci_to_hcd(ohci)->self.otg_port - 1;
  145. unsigned long flags;
  146. u32 l;
  147. otg_start_hnp(ohci->transceiver->otg);
  148. local_irq_save(flags);
  149. ohci->transceiver->state = OTG_STATE_A_SUSPEND;
  150. writel (RH_PS_PSS, &ohci->regs->roothub.portstatus [port]);
  151. l = omap_readl(OTG_CTRL);
  152. l &= ~OTG_A_BUSREQ;
  153. omap_writel(l, OTG_CTRL);
  154. local_irq_restore(flags);
  155. }
  156. #endif
  157. /*-------------------------------------------------------------------------*/
  158. static int ohci_omap_init(struct usb_hcd *hcd)
  159. {
  160. struct ohci_hcd *ohci = hcd_to_ohci(hcd);
  161. struct omap_usb_config *config = hcd->self.controller->platform_data;
  162. int need_transceiver = (config->otg != 0);
  163. int ret;
  164. dev_dbg(hcd->self.controller, "starting USB Controller\n");
  165. if (config->otg) {
  166. ohci_to_hcd(ohci)->self.otg_port = config->otg;
  167. /* default/minimum OTG power budget: 8 mA */
  168. ohci_to_hcd(ohci)->power_budget = 8;
  169. }
  170. /* boards can use OTG transceivers in non-OTG modes */
  171. need_transceiver = need_transceiver
  172. || machine_is_omap_h2() || machine_is_omap_h3();
  173. if (cpu_is_omap16xx())
  174. ocpi_enable();
  175. #ifdef CONFIG_USB_OTG
  176. if (need_transceiver) {
  177. ohci->transceiver = usb_get_transceiver();
  178. if (ohci->transceiver) {
  179. int status = otg_set_host(ohci->transceiver->otg,
  180. &ohci_to_hcd(ohci)->self);
  181. dev_dbg(hcd->self.controller, "init %s transceiver, status %d\n",
  182. ohci->transceiver->label, status);
  183. if (status) {
  184. if (ohci->transceiver)
  185. put_device(ohci->transceiver->dev);
  186. return status;
  187. }
  188. } else {
  189. dev_err(hcd->self.controller, "can't find transceiver\n");
  190. return -ENODEV;
  191. }
  192. ohci->start_hnp = start_hnp;
  193. }
  194. #endif
  195. omap_ohci_clock_power(1);
  196. if (cpu_is_omap15xx()) {
  197. omap_1510_local_bus_power(1);
  198. omap_1510_local_bus_init();
  199. }
  200. if ((ret = ohci_init(ohci)) < 0)
  201. return ret;
  202. /* board-specific power switching and overcurrent support */
  203. if (machine_is_omap_osk() || machine_is_omap_innovator()) {
  204. u32 rh = roothub_a (ohci);
  205. /* power switching (ganged by default) */
  206. rh &= ~RH_A_NPS;
  207. /* TPS2045 switch for internal transceiver (port 1) */
  208. if (machine_is_omap_osk()) {
  209. ohci_to_hcd(ohci)->power_budget = 250;
  210. rh &= ~RH_A_NOCP;
  211. /* gpio9 for overcurrent detction */
  212. omap_cfg_reg(W8_1610_GPIO9);
  213. gpio_request(9, "OHCI overcurrent");
  214. gpio_direction_input(9);
  215. /* for paranoia's sake: disable USB.PUEN */
  216. omap_cfg_reg(W4_USB_HIGHZ);
  217. }
  218. ohci_writel(ohci, rh, &ohci->regs->roothub.a);
  219. ohci->flags &= ~OHCI_QUIRK_HUB_POWER;
  220. } else if (machine_is_nokia770()) {
  221. /* We require a self-powered hub, which should have
  222. * plenty of power. */
  223. ohci_to_hcd(ohci)->power_budget = 0;
  224. }
  225. /* FIXME khubd hub requests should manage power switching */
  226. omap_ohci_transceiver_power(1);
  227. /* board init will have already handled HMC and mux setup.
  228. * any external transceiver should already be initialized
  229. * too, so all configured ports use the right signaling now.
  230. */
  231. return 0;
  232. }
  233. static void ohci_omap_stop(struct usb_hcd *hcd)
  234. {
  235. dev_dbg(hcd->self.controller, "stopping USB Controller\n");
  236. ohci_stop(hcd);
  237. omap_ohci_clock_power(0);
  238. }
  239. /*-------------------------------------------------------------------------*/
  240. /**
  241. * usb_hcd_omap_probe - initialize OMAP-based HCDs
  242. * Context: !in_interrupt()
  243. *
  244. * Allocates basic resources for this USB host controller, and
  245. * then invokes the start() method for the HCD associated with it
  246. * through the hotplug entry's driver_data.
  247. */
  248. static int usb_hcd_omap_probe (const struct hc_driver *driver,
  249. struct platform_device *pdev)
  250. {
  251. int retval, irq;
  252. struct usb_hcd *hcd = 0;
  253. struct ohci_hcd *ohci;
  254. if (pdev->num_resources != 2) {
  255. printk(KERN_ERR "hcd probe: invalid num_resources: %i\n",
  256. pdev->num_resources);
  257. return -ENODEV;
  258. }
  259. if (pdev->resource[0].flags != IORESOURCE_MEM
  260. || pdev->resource[1].flags != IORESOURCE_IRQ) {
  261. printk(KERN_ERR "hcd probe: invalid resource type\n");
  262. return -ENODEV;
  263. }
  264. usb_host_ck = clk_get(&pdev->dev, "usb_hhc_ck");
  265. if (IS_ERR(usb_host_ck))
  266. return PTR_ERR(usb_host_ck);
  267. if (!cpu_is_omap15xx())
  268. usb_dc_ck = clk_get(&pdev->dev, "usb_dc_ck");
  269. else
  270. usb_dc_ck = clk_get(&pdev->dev, "lb_ck");
  271. if (IS_ERR(usb_dc_ck)) {
  272. clk_put(usb_host_ck);
  273. return PTR_ERR(usb_dc_ck);
  274. }
  275. hcd = usb_create_hcd (driver, &pdev->dev, dev_name(&pdev->dev));
  276. if (!hcd) {
  277. retval = -ENOMEM;
  278. goto err0;
  279. }
  280. hcd->rsrc_start = pdev->resource[0].start;
  281. hcd->rsrc_len = pdev->resource[0].end - pdev->resource[0].start + 1;
  282. if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) {
  283. dev_dbg(&pdev->dev, "request_mem_region failed\n");
  284. retval = -EBUSY;
  285. goto err1;
  286. }
  287. hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len);
  288. if (!hcd->regs) {
  289. dev_err(&pdev->dev, "can't ioremap OHCI HCD\n");
  290. retval = -ENOMEM;
  291. goto err2;
  292. }
  293. ohci = hcd_to_ohci(hcd);
  294. ohci_hcd_init(ohci);
  295. host_initialized = 0;
  296. host_enabled = 1;
  297. irq = platform_get_irq(pdev, 0);
  298. if (irq < 0) {
  299. retval = -ENXIO;
  300. goto err3;
  301. }
  302. retval = usb_add_hcd(hcd, irq, 0);
  303. if (retval)
  304. goto err3;
  305. host_initialized = 1;
  306. if (!host_enabled)
  307. omap_ohci_clock_power(0);
  308. return 0;
  309. err3:
  310. iounmap(hcd->regs);
  311. err2:
  312. release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
  313. err1:
  314. usb_put_hcd(hcd);
  315. err0:
  316. clk_put(usb_dc_ck);
  317. clk_put(usb_host_ck);
  318. return retval;
  319. }
  320. /* may be called with controller, bus, and devices active */
  321. /**
  322. * usb_hcd_omap_remove - shutdown processing for OMAP-based HCDs
  323. * @dev: USB Host Controller being removed
  324. * Context: !in_interrupt()
  325. *
  326. * Reverses the effect of usb_hcd_omap_probe(), first invoking
  327. * the HCD's stop() method. It is always called from a thread
  328. * context, normally "rmmod", "apmd", or something similar.
  329. */
  330. static inline void
  331. usb_hcd_omap_remove (struct usb_hcd *hcd, struct platform_device *pdev)
  332. {
  333. struct ohci_hcd *ohci = hcd_to_ohci (hcd);
  334. usb_remove_hcd(hcd);
  335. if (ohci->transceiver) {
  336. (void) otg_set_host(ohci->transceiver->otg, 0);
  337. put_device(ohci->transceiver->dev);
  338. }
  339. if (machine_is_omap_osk())
  340. gpio_free(9);
  341. iounmap(hcd->regs);
  342. release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
  343. usb_put_hcd(hcd);
  344. clk_put(usb_dc_ck);
  345. clk_put(usb_host_ck);
  346. }
  347. /*-------------------------------------------------------------------------*/
  348. static int
  349. ohci_omap_start (struct usb_hcd *hcd)
  350. {
  351. struct omap_usb_config *config;
  352. struct ohci_hcd *ohci = hcd_to_ohci (hcd);
  353. int ret;
  354. if (!host_enabled)
  355. return 0;
  356. config = hcd->self.controller->platform_data;
  357. if (config->otg || config->rwc) {
  358. ohci->hc_control = OHCI_CTRL_RWC;
  359. writel(OHCI_CTRL_RWC, &ohci->regs->control);
  360. }
  361. if ((ret = ohci_run (ohci)) < 0) {
  362. dev_err(hcd->self.controller, "can't start\n");
  363. ohci_stop (hcd);
  364. return ret;
  365. }
  366. return 0;
  367. }
  368. /*-------------------------------------------------------------------------*/
  369. static const struct hc_driver ohci_omap_hc_driver = {
  370. .description = hcd_name,
  371. .product_desc = "OMAP OHCI",
  372. .hcd_priv_size = sizeof(struct ohci_hcd),
  373. /*
  374. * generic hardware linkage
  375. */
  376. .irq = ohci_irq,
  377. .flags = HCD_USB11 | HCD_MEMORY,
  378. /*
  379. * basic lifecycle operations
  380. */
  381. .reset = ohci_omap_init,
  382. .start = ohci_omap_start,
  383. .stop = ohci_omap_stop,
  384. .shutdown = ohci_shutdown,
  385. /*
  386. * managing i/o requests and associated device resources
  387. */
  388. .urb_enqueue = ohci_urb_enqueue,
  389. .urb_dequeue = ohci_urb_dequeue,
  390. .endpoint_disable = ohci_endpoint_disable,
  391. /*
  392. * scheduling support
  393. */
  394. .get_frame_number = ohci_get_frame,
  395. /*
  396. * root hub support
  397. */
  398. .hub_status_data = ohci_hub_status_data,
  399. .hub_control = ohci_hub_control,
  400. #ifdef CONFIG_PM
  401. .bus_suspend = ohci_bus_suspend,
  402. .bus_resume = ohci_bus_resume,
  403. #endif
  404. .start_port_reset = ohci_start_port_reset,
  405. };
  406. /*-------------------------------------------------------------------------*/
  407. static int ohci_hcd_omap_drv_probe(struct platform_device *dev)
  408. {
  409. return usb_hcd_omap_probe(&ohci_omap_hc_driver, dev);
  410. }
  411. static int ohci_hcd_omap_drv_remove(struct platform_device *dev)
  412. {
  413. struct usb_hcd *hcd = platform_get_drvdata(dev);
  414. usb_hcd_omap_remove(hcd, dev);
  415. platform_set_drvdata(dev, NULL);
  416. return 0;
  417. }
  418. /*-------------------------------------------------------------------------*/
  419. #ifdef CONFIG_PM
  420. static int ohci_omap_suspend(struct platform_device *dev, pm_message_t message)
  421. {
  422. struct ohci_hcd *ohci = hcd_to_ohci(platform_get_drvdata(dev));
  423. if (time_before(jiffies, ohci->next_statechange))
  424. msleep(5);
  425. ohci->next_statechange = jiffies;
  426. omap_ohci_clock_power(0);
  427. return 0;
  428. }
  429. static int ohci_omap_resume(struct platform_device *dev)
  430. {
  431. struct usb_hcd *hcd = platform_get_drvdata(dev);
  432. struct ohci_hcd *ohci = hcd_to_ohci(hcd);
  433. if (time_before(jiffies, ohci->next_statechange))
  434. msleep(5);
  435. ohci->next_statechange = jiffies;
  436. omap_ohci_clock_power(1);
  437. ohci_finish_controller_resume(hcd);
  438. return 0;
  439. }
  440. #endif
  441. /*-------------------------------------------------------------------------*/
  442. /*
  443. * Driver definition to register with the OMAP bus
  444. */
  445. static struct platform_driver ohci_hcd_omap_driver = {
  446. .probe = ohci_hcd_omap_drv_probe,
  447. .remove = ohci_hcd_omap_drv_remove,
  448. .shutdown = usb_hcd_platform_shutdown,
  449. #ifdef CONFIG_PM
  450. .suspend = ohci_omap_suspend,
  451. .resume = ohci_omap_resume,
  452. #endif
  453. .driver = {
  454. .owner = THIS_MODULE,
  455. .name = "ohci",
  456. },
  457. };
  458. MODULE_ALIAS("platform:ohci");