ehci-s5p.c 7.7 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314
  1. /*
  2. * SAMSUNG S5P USB HOST EHCI Controller
  3. *
  4. * Copyright (C) 2011 Samsung Electronics Co.Ltd
  5. * Author: Jingoo Han <jg1.han@samsung.com>
  6. * Author: Joonyoung Shim <jy0922.shim@samsung.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of the GNU General Public License as published by the
  10. * Free Software Foundation; either version 2 of the License, or (at your
  11. * option) any later version.
  12. *
  13. */
  14. #include <linux/clk.h>
  15. #include <linux/platform_device.h>
  16. #include <plat/ehci.h>
  17. #include <plat/usb-phy.h>
  18. #define EHCI_INSNREG00(base) (base + 0x90)
  19. #define EHCI_INSNREG00_ENA_INCR16 (0x1 << 25)
  20. #define EHCI_INSNREG00_ENA_INCR8 (0x1 << 24)
  21. #define EHCI_INSNREG00_ENA_INCR4 (0x1 << 23)
  22. #define EHCI_INSNREG00_ENA_INCRX_ALIGN (0x1 << 22)
  23. #define EHCI_INSNREG00_ENABLE_DMA_BURST \
  24. (EHCI_INSNREG00_ENA_INCR16 | EHCI_INSNREG00_ENA_INCR8 | \
  25. EHCI_INSNREG00_ENA_INCR4 | EHCI_INSNREG00_ENA_INCRX_ALIGN)
  26. struct s5p_ehci_hcd {
  27. struct device *dev;
  28. struct usb_hcd *hcd;
  29. struct clk *clk;
  30. };
  31. static const struct hc_driver s5p_ehci_hc_driver = {
  32. .description = hcd_name,
  33. .product_desc = "S5P EHCI Host Controller",
  34. .hcd_priv_size = sizeof(struct ehci_hcd),
  35. .irq = ehci_irq,
  36. .flags = HCD_MEMORY | HCD_USB2,
  37. .reset = ehci_init,
  38. .start = ehci_run,
  39. .stop = ehci_stop,
  40. .shutdown = ehci_shutdown,
  41. .get_frame_number = ehci_get_frame,
  42. .urb_enqueue = ehci_urb_enqueue,
  43. .urb_dequeue = ehci_urb_dequeue,
  44. .endpoint_disable = ehci_endpoint_disable,
  45. .endpoint_reset = ehci_endpoint_reset,
  46. .hub_status_data = ehci_hub_status_data,
  47. .hub_control = ehci_hub_control,
  48. .bus_suspend = ehci_bus_suspend,
  49. .bus_resume = ehci_bus_resume,
  50. .relinquish_port = ehci_relinquish_port,
  51. .port_handed_over = ehci_port_handed_over,
  52. .clear_tt_buffer_complete = ehci_clear_tt_buffer_complete,
  53. };
  54. static int __devinit s5p_ehci_probe(struct platform_device *pdev)
  55. {
  56. struct s5p_ehci_platdata *pdata;
  57. struct s5p_ehci_hcd *s5p_ehci;
  58. struct usb_hcd *hcd;
  59. struct ehci_hcd *ehci;
  60. struct resource *res;
  61. int irq;
  62. int err;
  63. pdata = pdev->dev.platform_data;
  64. if (!pdata) {
  65. dev_err(&pdev->dev, "No platform data defined\n");
  66. return -EINVAL;
  67. }
  68. s5p_ehci = kzalloc(sizeof(struct s5p_ehci_hcd), GFP_KERNEL);
  69. if (!s5p_ehci)
  70. return -ENOMEM;
  71. s5p_ehci->dev = &pdev->dev;
  72. hcd = usb_create_hcd(&s5p_ehci_hc_driver, &pdev->dev,
  73. dev_name(&pdev->dev));
  74. if (!hcd) {
  75. dev_err(&pdev->dev, "Unable to create HCD\n");
  76. err = -ENOMEM;
  77. goto fail_hcd;
  78. }
  79. s5p_ehci->hcd = hcd;
  80. s5p_ehci->clk = clk_get(&pdev->dev, "usbhost");
  81. if (IS_ERR(s5p_ehci->clk)) {
  82. dev_err(&pdev->dev, "Failed to get usbhost clock\n");
  83. err = PTR_ERR(s5p_ehci->clk);
  84. goto fail_clk;
  85. }
  86. err = clk_enable(s5p_ehci->clk);
  87. if (err)
  88. goto fail_clken;
  89. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  90. if (!res) {
  91. dev_err(&pdev->dev, "Failed to get I/O memory\n");
  92. err = -ENXIO;
  93. goto fail_io;
  94. }
  95. hcd->rsrc_start = res->start;
  96. hcd->rsrc_len = resource_size(res);
  97. hcd->regs = ioremap(res->start, resource_size(res));
  98. if (!hcd->regs) {
  99. dev_err(&pdev->dev, "Failed to remap I/O memory\n");
  100. err = -ENOMEM;
  101. goto fail_io;
  102. }
  103. irq = platform_get_irq(pdev, 0);
  104. if (!irq) {
  105. dev_err(&pdev->dev, "Failed to get IRQ\n");
  106. err = -ENODEV;
  107. goto fail;
  108. }
  109. if (pdata->phy_init)
  110. pdata->phy_init(pdev, S5P_USB_PHY_HOST);
  111. ehci = hcd_to_ehci(hcd);
  112. ehci->caps = hcd->regs;
  113. ehci->regs = hcd->regs +
  114. HC_LENGTH(ehci, readl(&ehci->caps->hc_capbase));
  115. /* DMA burst Enable */
  116. writel(EHCI_INSNREG00_ENABLE_DMA_BURST, EHCI_INSNREG00(hcd->regs));
  117. dbg_hcs_params(ehci, "reset");
  118. dbg_hcc_params(ehci, "reset");
  119. /* cache this readonly data; minimize chip reads */
  120. ehci->hcs_params = readl(&ehci->caps->hcs_params);
  121. ehci_reset(ehci);
  122. err = usb_add_hcd(hcd, irq, IRQF_SHARED);
  123. if (err) {
  124. dev_err(&pdev->dev, "Failed to add USB HCD\n");
  125. goto fail;
  126. }
  127. platform_set_drvdata(pdev, s5p_ehci);
  128. return 0;
  129. fail:
  130. iounmap(hcd->regs);
  131. fail_io:
  132. clk_disable(s5p_ehci->clk);
  133. fail_clken:
  134. clk_put(s5p_ehci->clk);
  135. fail_clk:
  136. usb_put_hcd(hcd);
  137. fail_hcd:
  138. kfree(s5p_ehci);
  139. return err;
  140. }
  141. static int __devexit s5p_ehci_remove(struct platform_device *pdev)
  142. {
  143. struct s5p_ehci_platdata *pdata = pdev->dev.platform_data;
  144. struct s5p_ehci_hcd *s5p_ehci = platform_get_drvdata(pdev);
  145. struct usb_hcd *hcd = s5p_ehci->hcd;
  146. usb_remove_hcd(hcd);
  147. if (pdata && pdata->phy_exit)
  148. pdata->phy_exit(pdev, S5P_USB_PHY_HOST);
  149. iounmap(hcd->regs);
  150. clk_disable(s5p_ehci->clk);
  151. clk_put(s5p_ehci->clk);
  152. usb_put_hcd(hcd);
  153. kfree(s5p_ehci);
  154. return 0;
  155. }
  156. static void s5p_ehci_shutdown(struct platform_device *pdev)
  157. {
  158. struct s5p_ehci_hcd *s5p_ehci = platform_get_drvdata(pdev);
  159. struct usb_hcd *hcd = s5p_ehci->hcd;
  160. if (hcd->driver->shutdown)
  161. hcd->driver->shutdown(hcd);
  162. }
  163. #ifdef CONFIG_PM
  164. static int s5p_ehci_suspend(struct device *dev)
  165. {
  166. struct s5p_ehci_hcd *s5p_ehci = dev_get_drvdata(dev);
  167. struct usb_hcd *hcd = s5p_ehci->hcd;
  168. struct ehci_hcd *ehci = hcd_to_ehci(hcd);
  169. struct platform_device *pdev = to_platform_device(dev);
  170. struct s5p_ehci_platdata *pdata = pdev->dev.platform_data;
  171. unsigned long flags;
  172. int rc = 0;
  173. if (time_before(jiffies, ehci->next_statechange))
  174. msleep(20);
  175. /*
  176. * Root hub was already suspended. Disable irq emission and
  177. * mark HW unaccessible. The PM and USB cores make sure that
  178. * the root hub is either suspended or stopped.
  179. */
  180. ehci_prepare_ports_for_controller_suspend(ehci, device_may_wakeup(dev));
  181. spin_lock_irqsave(&ehci->lock, flags);
  182. ehci_writel(ehci, 0, &ehci->regs->intr_enable);
  183. (void)ehci_readl(ehci, &ehci->regs->intr_enable);
  184. clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
  185. spin_unlock_irqrestore(&ehci->lock, flags);
  186. if (pdata && pdata->phy_exit)
  187. pdata->phy_exit(pdev, S5P_USB_PHY_HOST);
  188. return rc;
  189. }
  190. static int s5p_ehci_resume(struct device *dev)
  191. {
  192. struct s5p_ehci_hcd *s5p_ehci = dev_get_drvdata(dev);
  193. struct usb_hcd *hcd = s5p_ehci->hcd;
  194. struct ehci_hcd *ehci = hcd_to_ehci(hcd);
  195. struct platform_device *pdev = to_platform_device(dev);
  196. struct s5p_ehci_platdata *pdata = pdev->dev.platform_data;
  197. if (pdata && pdata->phy_init)
  198. pdata->phy_init(pdev, S5P_USB_PHY_HOST);
  199. /* DMA burst Enable */
  200. writel(EHCI_INSNREG00_ENABLE_DMA_BURST, EHCI_INSNREG00(hcd->regs));
  201. if (time_before(jiffies, ehci->next_statechange))
  202. msleep(100);
  203. /* Mark hardware accessible again as we are out of D3 state by now */
  204. set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
  205. if (ehci_readl(ehci, &ehci->regs->configured_flag) == FLAG_CF) {
  206. int mask = INTR_MASK;
  207. ehci_prepare_ports_for_controller_resume(ehci);
  208. if (!hcd->self.root_hub->do_remote_wakeup)
  209. mask &= ~STS_PCD;
  210. ehci_writel(ehci, mask, &ehci->regs->intr_enable);
  211. ehci_readl(ehci, &ehci->regs->intr_enable);
  212. return 0;
  213. }
  214. usb_root_hub_lost_power(hcd->self.root_hub);
  215. (void) ehci_halt(ehci);
  216. (void) ehci_reset(ehci);
  217. /* emptying the schedule aborts any urbs */
  218. spin_lock_irq(&ehci->lock);
  219. if (ehci->reclaim)
  220. end_unlink_async(ehci);
  221. ehci_work(ehci);
  222. spin_unlock_irq(&ehci->lock);
  223. ehci_writel(ehci, ehci->command, &ehci->regs->command);
  224. ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag);
  225. ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */
  226. /* here we "know" root ports should always stay powered */
  227. ehci_port_power(ehci, 1);
  228. ehci->rh_state = EHCI_RH_SUSPENDED;
  229. return 0;
  230. }
  231. #else
  232. #define s5p_ehci_suspend NULL
  233. #define s5p_ehci_resume NULL
  234. #endif
  235. static const struct dev_pm_ops s5p_ehci_pm_ops = {
  236. .suspend = s5p_ehci_suspend,
  237. .resume = s5p_ehci_resume,
  238. };
  239. static struct platform_driver s5p_ehci_driver = {
  240. .probe = s5p_ehci_probe,
  241. .remove = __devexit_p(s5p_ehci_remove),
  242. .shutdown = s5p_ehci_shutdown,
  243. .driver = {
  244. .name = "s5p-ehci",
  245. .owner = THIS_MODULE,
  246. .pm = &s5p_ehci_pm_ops,
  247. }
  248. };
  249. MODULE_ALIAS("platform:s5p-ehci");