ehci-q.c 40 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427
  1. /*
  2. * Copyright (C) 2001-2004 by David Brownell
  3. *
  4. * This program is free software; you can redistribute it and/or modify it
  5. * under the terms of the GNU General Public License as published by the
  6. * Free Software Foundation; either version 2 of the License, or (at your
  7. * option) any later version.
  8. *
  9. * This program is distributed in the hope that it will be useful, but
  10. * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  11. * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  12. * for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software Foundation,
  16. * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17. */
  18. /* this file is part of ehci-hcd.c */
  19. /*-------------------------------------------------------------------------*/
  20. /*
  21. * EHCI hardware queue manipulation ... the core. QH/QTD manipulation.
  22. *
  23. * Control, bulk, and interrupt traffic all use "qh" lists. They list "qtd"
  24. * entries describing USB transactions, max 16-20kB/entry (with 4kB-aligned
  25. * buffers needed for the larger number). We use one QH per endpoint, queue
  26. * multiple urbs (all three types) per endpoint. URBs may need several qtds.
  27. *
  28. * ISO traffic uses "ISO TD" (itd, and sitd) records, and (along with
  29. * interrupts) needs careful scheduling. Performance improvements can be
  30. * an ongoing challenge. That's in "ehci-sched.c".
  31. *
  32. * USB 1.1 devices are handled (a) by "companion" OHCI or UHCI root hubs,
  33. * or otherwise through transaction translators (TTs) in USB 2.0 hubs using
  34. * (b) special fields in qh entries or (c) split iso entries. TTs will
  35. * buffer low/full speed data so the host collects it at high speed.
  36. */
  37. /*-------------------------------------------------------------------------*/
  38. /* fill a qtd, returning how much of the buffer we were able to queue up */
  39. static int
  40. qtd_fill(struct ehci_hcd *ehci, struct ehci_qtd *qtd, dma_addr_t buf,
  41. size_t len, int token, int maxpacket)
  42. {
  43. int i, count;
  44. u64 addr = buf;
  45. /* one buffer entry per 4K ... first might be short or unaligned */
  46. qtd->hw_buf[0] = cpu_to_hc32(ehci, (u32)addr);
  47. qtd->hw_buf_hi[0] = cpu_to_hc32(ehci, (u32)(addr >> 32));
  48. count = 0x1000 - (buf & 0x0fff); /* rest of that page */
  49. if (likely (len < count)) /* ... iff needed */
  50. count = len;
  51. else {
  52. buf += 0x1000;
  53. buf &= ~0x0fff;
  54. /* per-qtd limit: from 16K to 20K (best alignment) */
  55. for (i = 1; count < len && i < 5; i++) {
  56. addr = buf;
  57. qtd->hw_buf[i] = cpu_to_hc32(ehci, (u32)addr);
  58. qtd->hw_buf_hi[i] = cpu_to_hc32(ehci,
  59. (u32)(addr >> 32));
  60. buf += 0x1000;
  61. if ((count + 0x1000) < len)
  62. count += 0x1000;
  63. else
  64. count = len;
  65. }
  66. /* short packets may only terminate transfers */
  67. if (count != len)
  68. count -= (count % maxpacket);
  69. }
  70. qtd->hw_token = cpu_to_hc32(ehci, (count << 16) | token);
  71. qtd->length = count;
  72. return count;
  73. }
  74. /*-------------------------------------------------------------------------*/
  75. static inline void
  76. qh_update (struct ehci_hcd *ehci, struct ehci_qh *qh, struct ehci_qtd *qtd)
  77. {
  78. struct ehci_qh_hw *hw = qh->hw;
  79. /* writes to an active overlay are unsafe */
  80. BUG_ON(qh->qh_state != QH_STATE_IDLE);
  81. hw->hw_qtd_next = QTD_NEXT(ehci, qtd->qtd_dma);
  82. hw->hw_alt_next = EHCI_LIST_END(ehci);
  83. /* Except for control endpoints, we make hardware maintain data
  84. * toggle (like OHCI) ... here (re)initialize the toggle in the QH,
  85. * and set the pseudo-toggle in udev. Only usb_clear_halt() will
  86. * ever clear it.
  87. */
  88. if (!(hw->hw_info1 & cpu_to_hc32(ehci, 1 << 14))) {
  89. unsigned is_out, epnum;
  90. is_out = qh->is_out;
  91. epnum = (hc32_to_cpup(ehci, &hw->hw_info1) >> 8) & 0x0f;
  92. if (unlikely (!usb_gettoggle (qh->dev, epnum, is_out))) {
  93. hw->hw_token &= ~cpu_to_hc32(ehci, QTD_TOGGLE);
  94. usb_settoggle (qh->dev, epnum, is_out, 1);
  95. }
  96. }
  97. hw->hw_token &= cpu_to_hc32(ehci, QTD_TOGGLE | QTD_STS_PING);
  98. }
  99. /* if it weren't for a common silicon quirk (writing the dummy into the qh
  100. * overlay, so qh->hw_token wrongly becomes inactive/halted), only fault
  101. * recovery (including urb dequeue) would need software changes to a QH...
  102. */
  103. static void
  104. qh_refresh (struct ehci_hcd *ehci, struct ehci_qh *qh)
  105. {
  106. struct ehci_qtd *qtd;
  107. if (list_empty (&qh->qtd_list))
  108. qtd = qh->dummy;
  109. else {
  110. qtd = list_entry (qh->qtd_list.next,
  111. struct ehci_qtd, qtd_list);
  112. /*
  113. * first qtd may already be partially processed.
  114. * If we come here during unlink, the QH overlay region
  115. * might have reference to the just unlinked qtd. The
  116. * qtd is updated in qh_completions(). Update the QH
  117. * overlay here.
  118. */
  119. if (cpu_to_hc32(ehci, qtd->qtd_dma) == qh->hw->hw_current) {
  120. qh->hw->hw_qtd_next = qtd->hw_next;
  121. qtd = NULL;
  122. }
  123. }
  124. if (qtd)
  125. qh_update (ehci, qh, qtd);
  126. }
  127. /*-------------------------------------------------------------------------*/
  128. static void qh_link_async(struct ehci_hcd *ehci, struct ehci_qh *qh);
  129. static void ehci_clear_tt_buffer_complete(struct usb_hcd *hcd,
  130. struct usb_host_endpoint *ep)
  131. {
  132. struct ehci_hcd *ehci = hcd_to_ehci(hcd);
  133. struct ehci_qh *qh = ep->hcpriv;
  134. unsigned long flags;
  135. spin_lock_irqsave(&ehci->lock, flags);
  136. qh->clearing_tt = 0;
  137. if (qh->qh_state == QH_STATE_IDLE && !list_empty(&qh->qtd_list)
  138. && ehci->rh_state == EHCI_RH_RUNNING)
  139. qh_link_async(ehci, qh);
  140. spin_unlock_irqrestore(&ehci->lock, flags);
  141. }
  142. static void ehci_clear_tt_buffer(struct ehci_hcd *ehci, struct ehci_qh *qh,
  143. struct urb *urb, u32 token)
  144. {
  145. /* If an async split transaction gets an error or is unlinked,
  146. * the TT buffer may be left in an indeterminate state. We
  147. * have to clear the TT buffer.
  148. *
  149. * Note: this routine is never called for Isochronous transfers.
  150. */
  151. if (urb->dev->tt && !usb_pipeint(urb->pipe) && !qh->clearing_tt) {
  152. #ifdef DEBUG
  153. struct usb_device *tt = urb->dev->tt->hub;
  154. dev_dbg(&tt->dev,
  155. "clear tt buffer port %d, a%d ep%d t%08x\n",
  156. urb->dev->ttport, urb->dev->devnum,
  157. usb_pipeendpoint(urb->pipe), token);
  158. #endif /* DEBUG */
  159. if (!ehci_is_TDI(ehci)
  160. || urb->dev->tt->hub !=
  161. ehci_to_hcd(ehci)->self.root_hub) {
  162. if (usb_hub_clear_tt_buffer(urb) == 0)
  163. qh->clearing_tt = 1;
  164. } else {
  165. /* REVISIT ARC-derived cores don't clear the root
  166. * hub TT buffer in this way...
  167. */
  168. }
  169. }
  170. }
  171. static int qtd_copy_status (
  172. struct ehci_hcd *ehci,
  173. struct urb *urb,
  174. size_t length,
  175. u32 token
  176. )
  177. {
  178. int status = -EINPROGRESS;
  179. /* count IN/OUT bytes, not SETUP (even short packets) */
  180. if (likely (QTD_PID (token) != 2))
  181. urb->actual_length += length - QTD_LENGTH (token);
  182. /* don't modify error codes */
  183. if (unlikely(urb->unlinked))
  184. return status;
  185. /* force cleanup after short read; not always an error */
  186. if (unlikely (IS_SHORT_READ (token)))
  187. status = -EREMOTEIO;
  188. /* serious "can't proceed" faults reported by the hardware */
  189. if (token & QTD_STS_HALT) {
  190. if (token & QTD_STS_BABBLE) {
  191. /* FIXME "must" disable babbling device's port too */
  192. status = -EOVERFLOW;
  193. /* CERR nonzero + halt --> stall */
  194. } else if (QTD_CERR(token)) {
  195. status = -EPIPE;
  196. /* In theory, more than one of the following bits can be set
  197. * since they are sticky and the transaction is retried.
  198. * Which to test first is rather arbitrary.
  199. */
  200. } else if (token & QTD_STS_MMF) {
  201. /* fs/ls interrupt xfer missed the complete-split */
  202. status = -EPROTO;
  203. } else if (token & QTD_STS_DBE) {
  204. status = (QTD_PID (token) == 1) /* IN ? */
  205. ? -ENOSR /* hc couldn't read data */
  206. : -ECOMM; /* hc couldn't write data */
  207. } else if (token & QTD_STS_XACT) {
  208. /* timeout, bad CRC, wrong PID, etc */
  209. ehci_dbg(ehci, "devpath %s ep%d%s 3strikes\n",
  210. urb->dev->devpath,
  211. usb_pipeendpoint(urb->pipe),
  212. usb_pipein(urb->pipe) ? "in" : "out");
  213. status = -EPROTO;
  214. } else { /* unknown */
  215. status = -EPROTO;
  216. }
  217. ehci_vdbg (ehci,
  218. "dev%d ep%d%s qtd token %08x --> status %d\n",
  219. usb_pipedevice (urb->pipe),
  220. usb_pipeendpoint (urb->pipe),
  221. usb_pipein (urb->pipe) ? "in" : "out",
  222. token, status);
  223. }
  224. return status;
  225. }
  226. static void
  227. ehci_urb_done(struct ehci_hcd *ehci, struct urb *urb, int status)
  228. __releases(ehci->lock)
  229. __acquires(ehci->lock)
  230. {
  231. if (usb_pipetype(urb->pipe) == PIPE_INTERRUPT) {
  232. /* ... update hc-wide periodic stats */
  233. ehci_to_hcd(ehci)->self.bandwidth_int_reqs--;
  234. }
  235. if (usb_pipetype(urb->pipe) != PIPE_ISOCHRONOUS)
  236. qh_put((struct ehci_qh *) urb->hcpriv);
  237. if (unlikely(urb->unlinked)) {
  238. COUNT(ehci->stats.unlink);
  239. } else {
  240. /* report non-error and short read status as zero */
  241. if (status == -EINPROGRESS || status == -EREMOTEIO)
  242. status = 0;
  243. COUNT(ehci->stats.complete);
  244. }
  245. #ifdef EHCI_URB_TRACE
  246. ehci_dbg (ehci,
  247. "%s %s urb %pK ep%d%s status %d len %d/%d\n",
  248. __func__, urb->dev->devpath, urb,
  249. usb_pipeendpoint (urb->pipe),
  250. usb_pipein (urb->pipe) ? "in" : "out",
  251. status,
  252. urb->actual_length, urb->transfer_buffer_length);
  253. #endif
  254. /* complete() can reenter this HCD */
  255. usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
  256. spin_unlock (&ehci->lock);
  257. usb_hcd_giveback_urb(ehci_to_hcd(ehci), urb, status);
  258. spin_lock (&ehci->lock);
  259. }
  260. static void start_unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh);
  261. static void unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh);
  262. static int qh_schedule (struct ehci_hcd *ehci, struct ehci_qh *qh);
  263. /*
  264. * Process and free completed qtds for a qh, returning URBs to drivers.
  265. * Chases up to qh->hw_current. Returns number of completions called,
  266. * indicating how much "real" work we did.
  267. */
  268. static unsigned
  269. qh_completions (struct ehci_hcd *ehci, struct ehci_qh *qh)
  270. {
  271. struct ehci_qtd *last, *end = qh->dummy;
  272. struct list_head *entry, *tmp;
  273. int last_status;
  274. int stopped;
  275. unsigned count = 0;
  276. u8 state;
  277. struct ehci_qh_hw *hw = qh->hw;
  278. if (unlikely (list_empty (&qh->qtd_list)))
  279. return count;
  280. /* completions (or tasks on other cpus) must never clobber HALT
  281. * till we've gone through and cleaned everything up, even when
  282. * they add urbs to this qh's queue or mark them for unlinking.
  283. *
  284. * NOTE: unlinking expects to be done in queue order.
  285. *
  286. * It's a bug for qh->qh_state to be anything other than
  287. * QH_STATE_IDLE, unless our caller is scan_async() or
  288. * scan_periodic().
  289. */
  290. state = qh->qh_state;
  291. qh->qh_state = QH_STATE_COMPLETING;
  292. stopped = (state == QH_STATE_IDLE);
  293. rescan:
  294. last = NULL;
  295. last_status = -EINPROGRESS;
  296. qh->needs_rescan = 0;
  297. /* remove de-activated QTDs from front of queue.
  298. * after faults (including short reads), cleanup this urb
  299. * then let the queue advance.
  300. * if queue is stopped, handles unlinks.
  301. */
  302. list_for_each_safe (entry, tmp, &qh->qtd_list) {
  303. struct ehci_qtd *qtd;
  304. struct urb *urb;
  305. u32 token = 0;
  306. qtd = list_entry (entry, struct ehci_qtd, qtd_list);
  307. urb = qtd->urb;
  308. /* clean up any state from previous QTD ...*/
  309. if (last) {
  310. if (likely (last->urb != urb)) {
  311. ehci_urb_done(ehci, last->urb, last_status);
  312. count++;
  313. last_status = -EINPROGRESS;
  314. }
  315. ehci_qtd_free (ehci, last);
  316. last = NULL;
  317. }
  318. /* ignore urbs submitted during completions we reported */
  319. if (qtd == end)
  320. break;
  321. /* hardware copies qtd out of qh overlay */
  322. rmb ();
  323. token = hc32_to_cpu(ehci, qtd->hw_token);
  324. /* always clean up qtds the hc de-activated */
  325. retry_xacterr:
  326. if ((token & QTD_STS_ACTIVE) == 0) {
  327. /* Report Data Buffer Error: non-fatal but useful */
  328. if (token & QTD_STS_DBE)
  329. ehci_dbg(ehci,
  330. "detected DataBufferErr for urb %pK ep%d%s len %d, qtd %pK [qh %pK]\n",
  331. urb,
  332. usb_endpoint_num(&urb->ep->desc),
  333. usb_endpoint_dir_in(&urb->ep->desc) ? "in" : "out",
  334. urb->transfer_buffer_length,
  335. qtd,
  336. qh);
  337. /* on STALL, error, and short reads this urb must
  338. * complete and all its qtds must be recycled.
  339. */
  340. if ((token & QTD_STS_HALT) != 0) {
  341. /* retry transaction errors until we
  342. * reach the software xacterr limit
  343. */
  344. if ((token & QTD_STS_XACT) &&
  345. QTD_CERR(token) == 0 &&
  346. ++qh->xacterrs < QH_XACTERR_MAX &&
  347. !urb->unlinked) {
  348. ehci_dbg(ehci,
  349. "detected XactErr len %zu/%zu retry %d\n",
  350. qtd->length - QTD_LENGTH(token), qtd->length, qh->xacterrs);
  351. /* reset the token in the qtd and the
  352. * qh overlay (which still contains
  353. * the qtd) so that we pick up from
  354. * where we left off
  355. */
  356. token &= ~QTD_STS_HALT;
  357. token |= QTD_STS_ACTIVE |
  358. (EHCI_TUNE_CERR << 10);
  359. qtd->hw_token = cpu_to_hc32(ehci,
  360. token);
  361. wmb();
  362. hw->hw_token = cpu_to_hc32(ehci,
  363. token);
  364. goto retry_xacterr;
  365. }
  366. stopped = 1;
  367. /* magic dummy for some short reads; qh won't advance.
  368. * that silicon quirk can kick in with this dummy too.
  369. *
  370. * other short reads won't stop the queue, including
  371. * control transfers (status stage handles that) or
  372. * most other single-qtd reads ... the queue stops if
  373. * URB_SHORT_NOT_OK was set so the driver submitting
  374. * the urbs could clean it up.
  375. */
  376. } else if (IS_SHORT_READ (token)
  377. && !(qtd->hw_alt_next
  378. & EHCI_LIST_END(ehci))) {
  379. stopped = 1;
  380. }
  381. /* stop scanning when we reach qtds the hc is using */
  382. } else if (likely (!stopped
  383. && ehci->rh_state == EHCI_RH_RUNNING)) {
  384. break;
  385. /* scan the whole queue for unlinks whenever it stops */
  386. } else {
  387. stopped = 1;
  388. /* cancel everything if we halt, suspend, etc */
  389. if (ehci->rh_state != EHCI_RH_RUNNING)
  390. last_status = -ESHUTDOWN;
  391. /* this qtd is active; skip it unless a previous qtd
  392. * for its urb faulted, or its urb was canceled.
  393. */
  394. else if (last_status == -EINPROGRESS && !urb->unlinked)
  395. continue;
  396. /* qh unlinked; token in overlay may be most current */
  397. if (state == QH_STATE_IDLE
  398. && cpu_to_hc32(ehci, qtd->qtd_dma)
  399. == hw->hw_current) {
  400. token = hc32_to_cpu(ehci, hw->hw_token);
  401. /* An unlink may leave an incomplete
  402. * async transaction in the TT buffer.
  403. * We have to clear it.
  404. */
  405. ehci_clear_tt_buffer(ehci, qh, urb, token);
  406. }
  407. }
  408. /* unless we already know the urb's status, collect qtd status
  409. * and update count of bytes transferred. in common short read
  410. * cases with only one data qtd (including control transfers),
  411. * queue processing won't halt. but with two or more qtds (for
  412. * example, with a 32 KB transfer), when the first qtd gets a
  413. * short read the second must be removed by hand.
  414. */
  415. if (last_status == -EINPROGRESS) {
  416. last_status = qtd_copy_status(ehci, urb,
  417. qtd->length, token);
  418. if (last_status == -EREMOTEIO
  419. && (qtd->hw_alt_next
  420. & EHCI_LIST_END(ehci)))
  421. last_status = -EINPROGRESS;
  422. /* As part of low/full-speed endpoint-halt processing
  423. * we must clear the TT buffer (11.17.5).
  424. */
  425. if (unlikely(last_status != -EINPROGRESS &&
  426. last_status != -EREMOTEIO)) {
  427. /* The TT's in some hubs malfunction when they
  428. * receive this request following a STALL (they
  429. * stop sending isochronous packets). Since a
  430. * STALL can't leave the TT buffer in a busy
  431. * state (if you believe Figures 11-48 - 11-51
  432. * in the USB 2.0 spec), we won't clear the TT
  433. * buffer in this case. Strictly speaking this
  434. * is a violation of the spec.
  435. */
  436. if (last_status != -EPIPE)
  437. ehci_clear_tt_buffer(ehci, qh, urb,
  438. token);
  439. }
  440. }
  441. /* if we're removing something not at the queue head,
  442. * patch the hardware queue pointer.
  443. */
  444. if (stopped && qtd->qtd_list.prev != &qh->qtd_list) {
  445. last = list_entry (qtd->qtd_list.prev,
  446. struct ehci_qtd, qtd_list);
  447. last->hw_next = qtd->hw_next;
  448. }
  449. /* remove qtd; it's recycled after possible urb completion */
  450. list_del (&qtd->qtd_list);
  451. last = qtd;
  452. /* reinit the xacterr counter for the next qtd */
  453. qh->xacterrs = 0;
  454. }
  455. /* last urb's completion might still need calling */
  456. if (likely (last != NULL)) {
  457. ehci_urb_done(ehci, last->urb, last_status);
  458. count++;
  459. ehci_qtd_free (ehci, last);
  460. }
  461. /* Do we need to rescan for URBs dequeued during a giveback? */
  462. if (unlikely(qh->needs_rescan)) {
  463. /* If the QH is already unlinked, do the rescan now. */
  464. if (state == QH_STATE_IDLE)
  465. goto rescan;
  466. /* Otherwise we have to wait until the QH is fully unlinked.
  467. * Our caller will start an unlink if qh->needs_rescan is
  468. * set. But if an unlink has already started, nothing needs
  469. * to be done.
  470. */
  471. if (state != QH_STATE_LINKED)
  472. qh->needs_rescan = 0;
  473. }
  474. /* restore original state; caller must unlink or relink */
  475. qh->qh_state = state;
  476. /* be sure the hardware's done with the qh before refreshing
  477. * it after fault cleanup, or recovering from silicon wrongly
  478. * overlaying the dummy qtd (which reduces DMA chatter).
  479. */
  480. if (stopped != 0 || hw->hw_qtd_next == EHCI_LIST_END(ehci)) {
  481. switch (state) {
  482. case QH_STATE_IDLE:
  483. qh_refresh(ehci, qh);
  484. break;
  485. case QH_STATE_LINKED:
  486. /* We won't refresh a QH that's linked (after the HC
  487. * stopped the queue). That avoids a race:
  488. * - HC reads first part of QH;
  489. * - CPU updates that first part and the token;
  490. * - HC reads rest of that QH, including token
  491. * Result: HC gets an inconsistent image, and then
  492. * DMAs to/from the wrong memory (corrupting it).
  493. *
  494. * That should be rare for interrupt transfers,
  495. * except maybe high bandwidth ...
  496. */
  497. /* Tell the caller to start an unlink */
  498. qh->needs_rescan = 1;
  499. break;
  500. /* otherwise, unlink already started */
  501. }
  502. }
  503. return count;
  504. }
  505. /*-------------------------------------------------------------------------*/
  506. // high bandwidth multiplier, as encoded in highspeed endpoint descriptors
  507. #define hb_mult(wMaxPacketSize) (1 + (((wMaxPacketSize) >> 11) & 0x03))
  508. // ... and packet size, for any kind of endpoint descriptor
  509. #define max_packet(wMaxPacketSize) ((wMaxPacketSize) & 0x07ff)
  510. /*
  511. * reverse of qh_urb_transaction: free a list of TDs.
  512. * used for cleanup after errors, before HC sees an URB's TDs.
  513. */
  514. static void qtd_list_free (
  515. struct ehci_hcd *ehci,
  516. struct urb *urb,
  517. struct list_head *qtd_list
  518. ) {
  519. struct list_head *entry, *temp;
  520. list_for_each_safe (entry, temp, qtd_list) {
  521. struct ehci_qtd *qtd;
  522. qtd = list_entry (entry, struct ehci_qtd, qtd_list);
  523. list_del (&qtd->qtd_list);
  524. ehci_qtd_free (ehci, qtd);
  525. }
  526. }
  527. /*
  528. * create a list of filled qtds for this URB; won't link into qh.
  529. */
  530. static struct list_head *
  531. qh_urb_transaction (
  532. struct ehci_hcd *ehci,
  533. struct urb *urb,
  534. struct list_head *head,
  535. gfp_t flags
  536. ) {
  537. struct ehci_qtd *qtd, *qtd_prev;
  538. dma_addr_t buf;
  539. int len, this_sg_len, maxpacket;
  540. int is_input;
  541. u32 token;
  542. int i;
  543. struct scatterlist *sg;
  544. /*
  545. * URBs map to sequences of QTDs: one logical transaction
  546. */
  547. qtd = ehci_qtd_alloc (ehci, flags);
  548. if (unlikely (!qtd))
  549. return NULL;
  550. list_add_tail (&qtd->qtd_list, head);
  551. qtd->urb = urb;
  552. token = QTD_STS_ACTIVE;
  553. if (!ehci->disable_cerr)
  554. token |= (EHCI_TUNE_CERR << 10);
  555. /* for split transactions, SplitXState initialized to zero */
  556. len = urb->transfer_buffer_length;
  557. is_input = usb_pipein (urb->pipe);
  558. if (usb_pipecontrol (urb->pipe)) {
  559. /* SETUP pid */
  560. qtd_fill(ehci, qtd, urb->setup_dma,
  561. sizeof (struct usb_ctrlrequest),
  562. token | (2 /* "setup" */ << 8), 8);
  563. /* ... and always at least one more pid */
  564. token ^= QTD_TOGGLE;
  565. qtd_prev = qtd;
  566. qtd = ehci_qtd_alloc (ehci, flags);
  567. if (unlikely (!qtd))
  568. goto cleanup;
  569. qtd->urb = urb;
  570. qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
  571. list_add_tail (&qtd->qtd_list, head);
  572. /* for zero length DATA stages, STATUS is always IN */
  573. if (len == 0)
  574. token |= (1 /* "in" */ << 8);
  575. }
  576. /*
  577. * data transfer stage: buffer setup
  578. */
  579. i = urb->num_mapped_sgs;
  580. if (len > 0 && i > 0) {
  581. sg = urb->sg;
  582. buf = sg_dma_address(sg);
  583. /* urb->transfer_buffer_length may be smaller than the
  584. * size of the scatterlist (or vice versa)
  585. */
  586. this_sg_len = min_t(int, sg_dma_len(sg), len);
  587. } else {
  588. sg = NULL;
  589. buf = urb->transfer_dma;
  590. this_sg_len = len;
  591. }
  592. if (is_input)
  593. token |= (1 /* "in" */ << 8);
  594. /* else it's already initted to "out" pid (0 << 8) */
  595. maxpacket = max_packet(usb_maxpacket(urb->dev, urb->pipe, !is_input));
  596. /*
  597. * buffer gets wrapped in one or more qtds;
  598. * last one may be "short" (including zero len)
  599. * and may serve as a control status ack
  600. */
  601. for (;;) {
  602. int this_qtd_len;
  603. this_qtd_len = qtd_fill(ehci, qtd, buf, this_sg_len, token,
  604. maxpacket);
  605. this_sg_len -= this_qtd_len;
  606. len -= this_qtd_len;
  607. buf += this_qtd_len;
  608. /*
  609. * short reads advance to a "magic" dummy instead of the next
  610. * qtd ... that forces the queue to stop, for manual cleanup.
  611. * (this will usually be overridden later.)
  612. */
  613. if (is_input)
  614. qtd->hw_alt_next = ehci->async->hw->hw_alt_next;
  615. /* qh makes control packets use qtd toggle; maybe switch it */
  616. if ((maxpacket & (this_qtd_len + (maxpacket - 1))) == 0)
  617. token ^= QTD_TOGGLE;
  618. if (likely(this_sg_len <= 0)) {
  619. if (--i <= 0 || len <= 0)
  620. break;
  621. sg = sg_next(sg);
  622. buf = sg_dma_address(sg);
  623. this_sg_len = min_t(int, sg_dma_len(sg), len);
  624. }
  625. qtd_prev = qtd;
  626. qtd = ehci_qtd_alloc (ehci, flags);
  627. if (unlikely (!qtd))
  628. goto cleanup;
  629. qtd->urb = urb;
  630. qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
  631. list_add_tail (&qtd->qtd_list, head);
  632. }
  633. /*
  634. * unless the caller requires manual cleanup after short reads,
  635. * have the alt_next mechanism keep the queue running after the
  636. * last data qtd (the only one, for control and most other cases).
  637. */
  638. if (likely ((urb->transfer_flags & URB_SHORT_NOT_OK) == 0
  639. || usb_pipecontrol (urb->pipe)))
  640. qtd->hw_alt_next = EHCI_LIST_END(ehci);
  641. /*
  642. * control requests may need a terminating data "status" ack;
  643. * other OUT ones may need a terminating short packet
  644. * (zero length).
  645. */
  646. if (likely (urb->transfer_buffer_length != 0)) {
  647. int one_more = 0;
  648. if (usb_pipecontrol (urb->pipe)) {
  649. one_more = 1;
  650. token ^= 0x0100; /* "in" <--> "out" */
  651. token |= QTD_TOGGLE; /* force DATA1 */
  652. } else if (usb_pipeout(urb->pipe)
  653. && (urb->transfer_flags & URB_ZERO_PACKET)
  654. && !(urb->transfer_buffer_length % maxpacket)) {
  655. one_more = 1;
  656. }
  657. if (one_more) {
  658. qtd_prev = qtd;
  659. qtd = ehci_qtd_alloc (ehci, flags);
  660. if (unlikely (!qtd))
  661. goto cleanup;
  662. qtd->urb = urb;
  663. qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
  664. list_add_tail (&qtd->qtd_list, head);
  665. /* never any data in such packets */
  666. qtd_fill(ehci, qtd, 0, 0, token, 0);
  667. }
  668. }
  669. /* by default, enable interrupt on urb completion */
  670. if (likely (!(urb->transfer_flags & URB_NO_INTERRUPT)))
  671. qtd->hw_token |= cpu_to_hc32(ehci, QTD_IOC);
  672. return head;
  673. cleanup:
  674. qtd_list_free (ehci, urb, head);
  675. return NULL;
  676. }
  677. /*-------------------------------------------------------------------------*/
  678. // Would be best to create all qh's from config descriptors,
  679. // when each interface/altsetting is established. Unlink
  680. // any previous qh and cancel its urbs first; endpoints are
  681. // implicitly reset then (data toggle too).
  682. // That'd mean updating how usbcore talks to HCDs. (2.7?)
  683. /*
  684. * Each QH holds a qtd list; a QH is used for everything except iso.
  685. *
  686. * For interrupt urbs, the scheduler must set the microframe scheduling
  687. * mask(s) each time the QH gets scheduled. For highspeed, that's
  688. * just one microframe in the s-mask. For split interrupt transactions
  689. * there are additional complications: c-mask, maybe FSTNs.
  690. */
  691. static struct ehci_qh *
  692. qh_make (
  693. struct ehci_hcd *ehci,
  694. struct urb *urb,
  695. gfp_t flags
  696. ) {
  697. struct ehci_qh *qh = ehci_qh_alloc (ehci, flags);
  698. u32 info1 = 0, info2 = 0;
  699. int is_input, type;
  700. int maxp = 0;
  701. struct usb_tt *tt = urb->dev->tt;
  702. struct ehci_qh_hw *hw;
  703. if (!qh)
  704. return qh;
  705. /*
  706. * init endpoint/device data for this QH
  707. */
  708. info1 |= usb_pipeendpoint (urb->pipe) << 8;
  709. info1 |= usb_pipedevice (urb->pipe) << 0;
  710. is_input = usb_pipein (urb->pipe);
  711. type = usb_pipetype (urb->pipe);
  712. maxp = usb_maxpacket (urb->dev, urb->pipe, !is_input);
  713. /* 1024 byte maxpacket is a hardware ceiling. High bandwidth
  714. * acts like up to 3KB, but is built from smaller packets.
  715. */
  716. if (max_packet(maxp) > 1024) {
  717. ehci_dbg(ehci, "bogus qh maxpacket %d\n", max_packet(maxp));
  718. goto done;
  719. }
  720. /* Compute interrupt scheduling parameters just once, and save.
  721. * - allowing for high bandwidth, how many nsec/uframe are used?
  722. * - split transactions need a second CSPLIT uframe; same question
  723. * - splits also need a schedule gap (for full/low speed I/O)
  724. * - qh has a polling interval
  725. *
  726. * For control/bulk requests, the HC or TT handles these.
  727. */
  728. if (type == PIPE_INTERRUPT) {
  729. qh->usecs = NS_TO_US(usb_calc_bus_time(USB_SPEED_HIGH,
  730. is_input, 0,
  731. hb_mult(maxp) * max_packet(maxp)));
  732. qh->start = NO_FRAME;
  733. qh->stamp = ehci->periodic_stamp;
  734. if (urb->dev->speed == USB_SPEED_HIGH) {
  735. qh->c_usecs = 0;
  736. qh->gap_uf = 0;
  737. qh->period = urb->interval >> 3;
  738. if (qh->period == 0 && urb->interval != 1) {
  739. /* NOTE interval 2 or 4 uframes could work.
  740. * But interval 1 scheduling is simpler, and
  741. * includes high bandwidth.
  742. */
  743. urb->interval = 1;
  744. } else if (qh->period > ehci->periodic_size) {
  745. qh->period = ehci->periodic_size;
  746. urb->interval = qh->period << 3;
  747. }
  748. } else {
  749. int think_time;
  750. /* gap is f(FS/LS transfer times) */
  751. qh->gap_uf = 1 + usb_calc_bus_time (urb->dev->speed,
  752. is_input, 0, maxp) / (125 * 1000);
  753. /* FIXME this just approximates SPLIT/CSPLIT times */
  754. if (is_input) { // SPLIT, gap, CSPLIT+DATA
  755. qh->c_usecs = qh->usecs + HS_USECS (0);
  756. qh->usecs = HS_USECS (1);
  757. } else { // SPLIT+DATA, gap, CSPLIT
  758. qh->usecs += HS_USECS (1);
  759. qh->c_usecs = HS_USECS (0);
  760. }
  761. think_time = tt ? tt->think_time : 0;
  762. qh->tt_usecs = NS_TO_US (think_time +
  763. usb_calc_bus_time (urb->dev->speed,
  764. is_input, 0, max_packet (maxp)));
  765. qh->period = urb->interval;
  766. if (qh->period > ehci->periodic_size) {
  767. qh->period = ehci->periodic_size;
  768. urb->interval = qh->period;
  769. }
  770. }
  771. }
  772. /* support for tt scheduling, and access to toggles */
  773. qh->dev = urb->dev;
  774. /* using TT? */
  775. switch (urb->dev->speed) {
  776. case USB_SPEED_LOW:
  777. info1 |= (1 << 12); /* EPS "low" */
  778. /* FALL THROUGH */
  779. case USB_SPEED_FULL:
  780. /* EPS 0 means "full" */
  781. if (type != PIPE_INTERRUPT)
  782. info1 |= (EHCI_TUNE_RL_TT << 28);
  783. if (type == PIPE_CONTROL) {
  784. info1 |= (1 << 27); /* for TT */
  785. info1 |= 1 << 14; /* toggle from qtd */
  786. }
  787. info1 |= maxp << 16;
  788. info2 |= (EHCI_TUNE_MULT_TT << 30);
  789. /* Some Freescale processors have an erratum in which the
  790. * port number in the queue head was 0..N-1 instead of 1..N.
  791. */
  792. if (ehci_has_fsl_portno_bug(ehci))
  793. info2 |= (urb->dev->ttport-1) << 23;
  794. else
  795. info2 |= urb->dev->ttport << 23;
  796. /* set the address of the TT; for TDI's integrated
  797. * root hub tt, leave it zeroed.
  798. */
  799. if (tt && tt->hub != ehci_to_hcd(ehci)->self.root_hub)
  800. info2 |= tt->hub->devnum << 16;
  801. /* NOTE: if (PIPE_INTERRUPT) { scheduler sets c-mask } */
  802. break;
  803. case USB_SPEED_HIGH: /* no TT involved */
  804. info1 |= (2 << 12); /* EPS "high" */
  805. if (type == PIPE_CONTROL) {
  806. info1 |= (EHCI_TUNE_RL_HS << 28);
  807. info1 |= 64 << 16; /* usb2 fixed maxpacket */
  808. info1 |= 1 << 14; /* toggle from qtd */
  809. info2 |= (EHCI_TUNE_MULT_HS << 30);
  810. } else if (type == PIPE_BULK) {
  811. info1 |= (EHCI_TUNE_RL_HS << 28);
  812. /* The USB spec says that high speed bulk endpoints
  813. * always use 512 byte maxpacket. But some device
  814. * vendors decided to ignore that, and MSFT is happy
  815. * to help them do so. So now people expect to use
  816. * such nonconformant devices with Linux too; sigh.
  817. */
  818. info1 |= max_packet(maxp) << 16;
  819. info2 |= (EHCI_TUNE_MULT_HS << 30);
  820. } else { /* PIPE_INTERRUPT */
  821. info1 |= max_packet (maxp) << 16;
  822. info2 |= hb_mult (maxp) << 30;
  823. }
  824. break;
  825. default:
  826. dbg ("bogus dev %pK speed %d", urb->dev, urb->dev->speed);
  827. done:
  828. qh_put (qh);
  829. return NULL;
  830. }
  831. /* NOTE: if (PIPE_INTERRUPT) { scheduler sets s-mask } */
  832. /* init as live, toggle clear, advance to dummy */
  833. qh->qh_state = QH_STATE_IDLE;
  834. hw = qh->hw;
  835. hw->hw_info1 = cpu_to_hc32(ehci, info1);
  836. hw->hw_info2 = cpu_to_hc32(ehci, info2);
  837. qh->is_out = !is_input;
  838. usb_settoggle (urb->dev, usb_pipeendpoint (urb->pipe), !is_input, 1);
  839. qh_refresh (ehci, qh);
  840. return qh;
  841. }
  842. /*-------------------------------------------------------------------------*/
  843. /* move qh (and its qtds) onto async queue; maybe enable queue. */
  844. static void qh_link_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
  845. {
  846. __hc32 dma = QH_NEXT(ehci, qh->qh_dma);
  847. struct ehci_qh *head;
  848. /* Don't link a QH if there's a Clear-TT-Buffer pending */
  849. if (unlikely(qh->clearing_tt))
  850. return;
  851. WARN_ON(qh->qh_state != QH_STATE_IDLE);
  852. /* (re)start the async schedule? */
  853. head = ehci->async;
  854. timer_action_done (ehci, TIMER_ASYNC_OFF);
  855. if (!head->qh_next.qh) {
  856. u32 cmd = ehci_readl(ehci, &ehci->regs->command);
  857. if (!(cmd & CMD_ASE)) {
  858. /* in case a clear of CMD_ASE didn't take yet */
  859. (void)handshake(ehci, &ehci->regs->status,
  860. STS_ASS, 0, 150);
  861. cmd |= CMD_ASE;
  862. ehci_writel(ehci, cmd, &ehci->regs->command);
  863. /* posted write need not be known to HC yet ... */
  864. }
  865. }
  866. /* clear halt and/or toggle; and maybe recover from silicon quirk */
  867. qh_refresh(ehci, qh);
  868. /* splice right after start */
  869. qh->qh_next = head->qh_next;
  870. qh->hw->hw_next = head->hw->hw_next;
  871. wmb ();
  872. head->qh_next.qh = qh;
  873. head->hw->hw_next = dma;
  874. qh_get(qh);
  875. qh->xacterrs = 0;
  876. qh->qh_state = QH_STATE_LINKED;
  877. /* qtd completions reported later by interrupt */
  878. }
  879. /*-------------------------------------------------------------------------*/
  880. /*
  881. * For control/bulk/interrupt, return QH with these TDs appended.
  882. * Allocates and initializes the QH if necessary.
  883. * Returns null if it can't allocate a QH it needs to.
  884. * If the QH has TDs (urbs) already, that's great.
  885. */
  886. static struct ehci_qh *qh_append_tds (
  887. struct ehci_hcd *ehci,
  888. struct urb *urb,
  889. struct list_head *qtd_list,
  890. int epnum,
  891. void **ptr
  892. )
  893. {
  894. struct ehci_qh *qh = NULL;
  895. __hc32 qh_addr_mask = cpu_to_hc32(ehci, 0x7f);
  896. qh = (struct ehci_qh *) *ptr;
  897. if (unlikely (qh == NULL)) {
  898. /* can't sleep here, we have ehci->lock... */
  899. qh = qh_make (ehci, urb, GFP_ATOMIC);
  900. *ptr = qh;
  901. }
  902. if (likely (qh != NULL)) {
  903. struct ehci_qtd *qtd;
  904. if (unlikely (list_empty (qtd_list)))
  905. qtd = NULL;
  906. else
  907. qtd = list_entry (qtd_list->next, struct ehci_qtd,
  908. qtd_list);
  909. /* control qh may need patching ... */
  910. if (unlikely (epnum == 0)) {
  911. /* usb_reset_device() briefly reverts to address 0 */
  912. if (usb_pipedevice (urb->pipe) == 0)
  913. qh->hw->hw_info1 &= ~qh_addr_mask;
  914. }
  915. /* just one way to queue requests: swap with the dummy qtd.
  916. * only hc or qh_refresh() ever modify the overlay.
  917. */
  918. if (likely (qtd != NULL)) {
  919. struct ehci_qtd *dummy;
  920. dma_addr_t dma;
  921. __hc32 token;
  922. /* to avoid racing the HC, use the dummy td instead of
  923. * the first td of our list (becomes new dummy). both
  924. * tds stay deactivated until we're done, when the
  925. * HC is allowed to fetch the old dummy (4.10.2).
  926. */
  927. token = qtd->hw_token;
  928. qtd->hw_token = HALT_BIT(ehci);
  929. dummy = qh->dummy;
  930. dma = dummy->qtd_dma;
  931. *dummy = *qtd;
  932. dummy->qtd_dma = dma;
  933. list_del (&qtd->qtd_list);
  934. list_add (&dummy->qtd_list, qtd_list);
  935. list_splice_tail(qtd_list, &qh->qtd_list);
  936. ehci_qtd_init(ehci, qtd, qtd->qtd_dma);
  937. qh->dummy = qtd;
  938. /* hc must see the new dummy at list end */
  939. dma = qtd->qtd_dma;
  940. qtd = list_entry (qh->qtd_list.prev,
  941. struct ehci_qtd, qtd_list);
  942. qtd->hw_next = QTD_NEXT(ehci, dma);
  943. /* let the hc process these next qtds */
  944. wmb ();
  945. dummy->hw_token = token;
  946. urb->hcpriv = qh_get (qh);
  947. }
  948. }
  949. return qh;
  950. }
  951. /*-------------------------------------------------------------------------*/
  952. static int
  953. submit_async (
  954. struct ehci_hcd *ehci,
  955. struct urb *urb,
  956. struct list_head *qtd_list,
  957. gfp_t mem_flags
  958. ) {
  959. int epnum;
  960. unsigned long flags;
  961. struct ehci_qh *qh = NULL;
  962. int rc;
  963. epnum = urb->ep->desc.bEndpointAddress;
  964. #ifdef EHCI_URB_TRACE
  965. {
  966. struct ehci_qtd *qtd;
  967. qtd = list_entry(qtd_list->next, struct ehci_qtd, qtd_list);
  968. ehci_dbg(ehci,
  969. "%s %s urb %pK ep%d%s len %d, qtd %pK [qh %pK]\n",
  970. __func__, urb->dev->devpath, urb,
  971. epnum & 0x0f, (epnum & USB_DIR_IN) ? "in" : "out",
  972. urb->transfer_buffer_length,
  973. qtd, urb->ep->hcpriv);
  974. }
  975. #endif
  976. spin_lock_irqsave (&ehci->lock, flags);
  977. if (unlikely(!HCD_HW_ACCESSIBLE(ehci_to_hcd(ehci)))) {
  978. rc = -ESHUTDOWN;
  979. goto done;
  980. }
  981. rc = usb_hcd_link_urb_to_ep(ehci_to_hcd(ehci), urb);
  982. if (unlikely(rc))
  983. goto done;
  984. qh = qh_append_tds(ehci, urb, qtd_list, epnum, &urb->ep->hcpriv);
  985. if (unlikely(qh == NULL)) {
  986. usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
  987. rc = -ENOMEM;
  988. goto done;
  989. }
  990. /* Control/bulk operations through TTs don't need scheduling,
  991. * the HC and TT handle it when the TT has a buffer ready.
  992. */
  993. if (likely (qh->qh_state == QH_STATE_IDLE))
  994. qh_link_async(ehci, qh);
  995. done:
  996. spin_unlock_irqrestore (&ehci->lock, flags);
  997. if (unlikely (qh == NULL))
  998. qtd_list_free (ehci, urb, qtd_list);
  999. return rc;
  1000. }
  1001. /*-------------------------------------------------------------------------*/
  1002. /* This function creates the qtds and submits them for the
  1003. * SINGLE_STEP_SET_FEATURE Test.
  1004. * This is done in two parts: first SETUP req for GetDesc is sent then
  1005. * 15 seconds later, the IN stage for GetDesc starts to req data from dev
  1006. *
  1007. * is_setup : i/p arguement decides which of the two stage needs to be
  1008. * performed; TRUE - SETUP and FALSE - IN+STATUS
  1009. * Returns 0 if success
  1010. */
  1011. #ifdef CONFIG_USB_EHCI_EHSET
  1012. static int
  1013. submit_single_step_set_feature(
  1014. struct usb_hcd *hcd,
  1015. struct urb *urb,
  1016. int is_setup
  1017. ) {
  1018. struct ehci_hcd *ehci = hcd_to_ehci(hcd);
  1019. struct list_head qtd_list;
  1020. struct list_head *head ;
  1021. struct ehci_qtd *qtd, *qtd_prev;
  1022. dma_addr_t buf;
  1023. int len, maxpacket;
  1024. u32 token;
  1025. INIT_LIST_HEAD(&qtd_list);
  1026. head = &qtd_list;
  1027. /*
  1028. * URBs map to sequences of QTDs: one logical transaction
  1029. */
  1030. qtd = ehci_qtd_alloc(ehci, GFP_KERNEL);
  1031. if (unlikely(!qtd))
  1032. return -1;
  1033. list_add_tail(&qtd->qtd_list, head);
  1034. qtd->urb = urb;
  1035. token = QTD_STS_ACTIVE;
  1036. token |= (EHCI_TUNE_CERR << 10);
  1037. len = urb->transfer_buffer_length;
  1038. /* Check if the request is to perform just the SETUP stage (getDesc)
  1039. * as in SINGLE_STEP_SET_FEATURE test, DATA stage (IN) happens
  1040. * 15 secs after the setup
  1041. */
  1042. if (is_setup) {
  1043. /* SETUP pid */
  1044. qtd_fill(ehci, qtd, urb->setup_dma,
  1045. sizeof(struct usb_ctrlrequest),
  1046. token | (2 /* "setup" */ << 8), 8);
  1047. submit_async(ehci, urb, &qtd_list, GFP_ATOMIC);
  1048. return 0; /*Return now; we shall come back after 15 seconds*/
  1049. }
  1050. /*---------------------------------------------------------------------
  1051. * IN: data transfer stage: buffer setup : start the IN txn phase for
  1052. * the get_Desc SETUP which was sent 15seconds back
  1053. */
  1054. token ^= QTD_TOGGLE; /*We need to start IN with DATA-1 Pid-sequence*/
  1055. buf = urb->transfer_dma;
  1056. token |= (1 /* "in" */ << 8); /*This is IN stage*/
  1057. maxpacket = max_packet(usb_maxpacket(urb->dev, urb->pipe, 0));
  1058. qtd_fill(ehci, qtd, buf, len, token, maxpacket);
  1059. /* Our IN phase shall always be a short read; so keep the queue running
  1060. * and let it advance to the next qtd which zero length OUT status */
  1061. qtd->hw_alt_next = EHCI_LIST_END(ehci);
  1062. /*----------------------------------------------------------------------
  1063. * STATUS stage for GetDesc control request
  1064. */
  1065. token ^= 0x0100; /* "in" <--> "out" */
  1066. token |= QTD_TOGGLE; /* force DATA1 */
  1067. qtd_prev = qtd;
  1068. qtd = ehci_qtd_alloc(ehci, GFP_ATOMIC);
  1069. if (unlikely(!qtd))
  1070. goto cleanup;
  1071. qtd->urb = urb;
  1072. qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
  1073. list_add_tail(&qtd->qtd_list, head);
  1074. /* dont fill any data in such packets */
  1075. qtd_fill(ehci, qtd, 0, 0, token, 0);
  1076. /* by default, enable interrupt on urb completion */
  1077. if (likely(!(urb->transfer_flags & URB_NO_INTERRUPT)))
  1078. qtd->hw_token |= cpu_to_hc32(ehci, QTD_IOC);
  1079. submit_async(ehci, urb, &qtd_list, GFP_KERNEL);
  1080. return 0;
  1081. cleanup:
  1082. qtd_list_free(ehci, urb, head);
  1083. return -1;
  1084. }
  1085. #endif
  1086. /*-------------------------------------------------------------------------*/
  1087. /* the async qh for the qtds being reclaimed are now unlinked from the HC */
  1088. static void end_unlink_async (struct ehci_hcd *ehci)
  1089. {
  1090. struct ehci_qh *qh = ehci->reclaim;
  1091. struct ehci_qh *next;
  1092. iaa_watchdog_done(ehci);
  1093. // qh->hw_next = cpu_to_hc32(qh->qh_dma);
  1094. qh->qh_state = QH_STATE_IDLE;
  1095. qh->qh_next.qh = NULL;
  1096. qh_put (qh); // refcount from reclaim
  1097. /* other unlink(s) may be pending (in QH_STATE_UNLINK_WAIT) */
  1098. next = qh->reclaim;
  1099. ehci->reclaim = next;
  1100. qh->reclaim = NULL;
  1101. qh_completions (ehci, qh);
  1102. if (!list_empty(&qh->qtd_list) && ehci->rh_state == EHCI_RH_RUNNING) {
  1103. qh_link_async (ehci, qh);
  1104. } else {
  1105. /* it's not free to turn the async schedule on/off; leave it
  1106. * active but idle for a while once it empties.
  1107. */
  1108. if (ehci->rh_state == EHCI_RH_RUNNING
  1109. && ehci->async->qh_next.qh == NULL)
  1110. timer_action (ehci, TIMER_ASYNC_OFF);
  1111. }
  1112. qh_put(qh); /* refcount from async list */
  1113. if (next) {
  1114. ehci->reclaim = NULL;
  1115. start_unlink_async (ehci, next);
  1116. }
  1117. if (ehci->has_synopsys_hc_bug)
  1118. ehci_writel(ehci, (u32) ehci->async->qh_dma,
  1119. &ehci->regs->async_next);
  1120. }
  1121. /* makes sure the async qh will become idle */
  1122. /* caller must own ehci->lock */
  1123. static void start_unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
  1124. {
  1125. int cmd = ehci_readl(ehci, &ehci->regs->command);
  1126. struct ehci_qh *prev;
  1127. #ifdef DEBUG
  1128. assert_spin_locked(&ehci->lock);
  1129. if (ehci->reclaim
  1130. || (qh->qh_state != QH_STATE_LINKED
  1131. && qh->qh_state != QH_STATE_UNLINK_WAIT)
  1132. )
  1133. BUG ();
  1134. #endif
  1135. /* stop async schedule right now? */
  1136. if (unlikely (qh == ehci->async)) {
  1137. /* can't get here without STS_ASS set */
  1138. if (ehci->rh_state != EHCI_RH_HALTED
  1139. && !ehci->reclaim) {
  1140. /* ... and CMD_IAAD clear */
  1141. ehci_writel(ehci, cmd & ~CMD_ASE,
  1142. &ehci->regs->command);
  1143. wmb ();
  1144. // handshake later, if we need to
  1145. timer_action_done (ehci, TIMER_ASYNC_OFF);
  1146. }
  1147. return;
  1148. }
  1149. qh->qh_state = QH_STATE_UNLINK;
  1150. ehci->reclaim = qh = qh_get (qh);
  1151. prev = ehci->async;
  1152. while (prev->qh_next.qh != qh)
  1153. prev = prev->qh_next.qh;
  1154. prev->hw->hw_next = qh->hw->hw_next;
  1155. prev->qh_next = qh->qh_next;
  1156. if (ehci->qh_scan_next == qh)
  1157. ehci->qh_scan_next = qh->qh_next.qh;
  1158. wmb ();
  1159. /* If the controller isn't running, we don't have to wait for it */
  1160. if (unlikely(ehci->rh_state != EHCI_RH_RUNNING)) {
  1161. /* if (unlikely (qh->reclaim != 0))
  1162. * this will recurse, probably not much
  1163. */
  1164. end_unlink_async (ehci);
  1165. return;
  1166. }
  1167. cmd |= CMD_IAAD;
  1168. ehci_writel(ehci, cmd, &ehci->regs->command);
  1169. (void)ehci_readl(ehci, &ehci->regs->command);
  1170. iaa_watchdog_start(ehci);
  1171. }
  1172. /*-------------------------------------------------------------------------*/
  1173. static void scan_async (struct ehci_hcd *ehci)
  1174. {
  1175. bool stopped;
  1176. struct ehci_qh *qh;
  1177. enum ehci_timer_action action = TIMER_IO_WATCHDOG;
  1178. timer_action_done (ehci, TIMER_ASYNC_SHRINK);
  1179. stopped = (ehci->rh_state != EHCI_RH_RUNNING);
  1180. ehci->qh_scan_next = ehci->async->qh_next.qh;
  1181. while (ehci->qh_scan_next) {
  1182. qh = ehci->qh_scan_next;
  1183. ehci->qh_scan_next = qh->qh_next.qh;
  1184. rescan:
  1185. /* clean any finished work for this qh */
  1186. if (!list_empty(&qh->qtd_list)) {
  1187. int temp;
  1188. /*
  1189. * Unlinks could happen here; completion reporting
  1190. * drops the lock. That's why ehci->qh_scan_next
  1191. * always holds the next qh to scan; if the next qh
  1192. * gets unlinked then ehci->qh_scan_next is adjusted
  1193. * in start_unlink_async().
  1194. */
  1195. qh = qh_get(qh);
  1196. temp = qh_completions(ehci, qh);
  1197. if (qh->needs_rescan)
  1198. unlink_async(ehci, qh);
  1199. qh->unlink_time = jiffies + EHCI_SHRINK_JIFFIES;
  1200. qh_put(qh);
  1201. if (temp != 0)
  1202. goto rescan;
  1203. }
  1204. /* unlink idle entries, reducing DMA usage as well
  1205. * as HCD schedule-scanning costs. delay for any qh
  1206. * we just scanned, there's a not-unusual case that it
  1207. * doesn't stay idle for long.
  1208. * (plus, avoids some kind of re-activation race.)
  1209. */
  1210. if (list_empty(&qh->qtd_list)
  1211. && qh->qh_state == QH_STATE_LINKED) {
  1212. if (!ehci->reclaim && (stopped ||
  1213. time_after_eq(jiffies, qh->unlink_time)))
  1214. start_unlink_async(ehci, qh);
  1215. else
  1216. action = TIMER_ASYNC_SHRINK;
  1217. }
  1218. }
  1219. if (action == TIMER_ASYNC_SHRINK)
  1220. timer_action (ehci, TIMER_ASYNC_SHRINK);
  1221. }