nsp32.c 89 KB

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  1. /*
  2. * NinjaSCSI-32Bi Cardbus, NinjaSCSI-32UDE PCI/CardBus SCSI driver
  3. * Copyright (C) 2001, 2002, 2003
  4. * YOKOTA Hiroshi <yokota@netlab.is.tsukuba.ac.jp>
  5. * GOTO Masanori <gotom@debian.or.jp>, <gotom@debian.org>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2, or (at your option)
  10. * any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. *
  18. * Revision History:
  19. * 1.0: Initial Release.
  20. * 1.1: Add /proc SDTR status.
  21. * Remove obsolete error handler nsp32_reset.
  22. * Some clean up.
  23. * 1.2: PowerPC (big endian) support.
  24. */
  25. #include <linux/module.h>
  26. #include <linux/init.h>
  27. #include <linux/kernel.h>
  28. #include <linux/string.h>
  29. #include <linux/timer.h>
  30. #include <linux/ioport.h>
  31. #include <linux/major.h>
  32. #include <linux/blkdev.h>
  33. #include <linux/interrupt.h>
  34. #include <linux/pci.h>
  35. #include <linux/delay.h>
  36. #include <linux/ctype.h>
  37. #include <linux/dma-mapping.h>
  38. #include <asm/dma.h>
  39. #include <asm/io.h>
  40. #include <scsi/scsi.h>
  41. #include <scsi/scsi_cmnd.h>
  42. #include <scsi/scsi_device.h>
  43. #include <scsi/scsi_host.h>
  44. #include <scsi/scsi_ioctl.h>
  45. #include "nsp32.h"
  46. /***********************************************************************
  47. * Module parameters
  48. */
  49. static int trans_mode = 0; /* default: BIOS */
  50. module_param (trans_mode, int, 0);
  51. MODULE_PARM_DESC(trans_mode, "transfer mode (0: BIOS(default) 1: Async 2: Ultra20M");
  52. #define ASYNC_MODE 1
  53. #define ULTRA20M_MODE 2
  54. static bool auto_param = 0; /* default: ON */
  55. module_param (auto_param, bool, 0);
  56. MODULE_PARM_DESC(auto_param, "AutoParameter mode (0: ON(default) 1: OFF)");
  57. static bool disc_priv = 1; /* default: OFF */
  58. module_param (disc_priv, bool, 0);
  59. MODULE_PARM_DESC(disc_priv, "disconnection privilege mode (0: ON 1: OFF(default))");
  60. MODULE_AUTHOR("YOKOTA Hiroshi <yokota@netlab.is.tsukuba.ac.jp>, GOTO Masanori <gotom@debian.or.jp>");
  61. MODULE_DESCRIPTION("Workbit NinjaSCSI-32Bi/UDE CardBus/PCI SCSI host bus adapter module");
  62. MODULE_LICENSE("GPL");
  63. static const char *nsp32_release_version = "1.2";
  64. /****************************************************************************
  65. * Supported hardware
  66. */
  67. static struct pci_device_id nsp32_pci_table[] __devinitdata = {
  68. {
  69. .vendor = PCI_VENDOR_ID_IODATA,
  70. .device = PCI_DEVICE_ID_NINJASCSI_32BI_CBSC_II,
  71. .subvendor = PCI_ANY_ID,
  72. .subdevice = PCI_ANY_ID,
  73. .driver_data = MODEL_IODATA,
  74. },
  75. {
  76. .vendor = PCI_VENDOR_ID_WORKBIT,
  77. .device = PCI_DEVICE_ID_NINJASCSI_32BI_KME,
  78. .subvendor = PCI_ANY_ID,
  79. .subdevice = PCI_ANY_ID,
  80. .driver_data = MODEL_KME,
  81. },
  82. {
  83. .vendor = PCI_VENDOR_ID_WORKBIT,
  84. .device = PCI_DEVICE_ID_NINJASCSI_32BI_WBT,
  85. .subvendor = PCI_ANY_ID,
  86. .subdevice = PCI_ANY_ID,
  87. .driver_data = MODEL_WORKBIT,
  88. },
  89. {
  90. .vendor = PCI_VENDOR_ID_WORKBIT,
  91. .device = PCI_DEVICE_ID_WORKBIT_STANDARD,
  92. .subvendor = PCI_ANY_ID,
  93. .subdevice = PCI_ANY_ID,
  94. .driver_data = MODEL_PCI_WORKBIT,
  95. },
  96. {
  97. .vendor = PCI_VENDOR_ID_WORKBIT,
  98. .device = PCI_DEVICE_ID_NINJASCSI_32BI_LOGITEC,
  99. .subvendor = PCI_ANY_ID,
  100. .subdevice = PCI_ANY_ID,
  101. .driver_data = MODEL_LOGITEC,
  102. },
  103. {
  104. .vendor = PCI_VENDOR_ID_WORKBIT,
  105. .device = PCI_DEVICE_ID_NINJASCSI_32BIB_LOGITEC,
  106. .subvendor = PCI_ANY_ID,
  107. .subdevice = PCI_ANY_ID,
  108. .driver_data = MODEL_PCI_LOGITEC,
  109. },
  110. {
  111. .vendor = PCI_VENDOR_ID_WORKBIT,
  112. .device = PCI_DEVICE_ID_NINJASCSI_32UDE_MELCO,
  113. .subvendor = PCI_ANY_ID,
  114. .subdevice = PCI_ANY_ID,
  115. .driver_data = MODEL_PCI_MELCO,
  116. },
  117. {
  118. .vendor = PCI_VENDOR_ID_WORKBIT,
  119. .device = PCI_DEVICE_ID_NINJASCSI_32UDE_MELCO_II,
  120. .subvendor = PCI_ANY_ID,
  121. .subdevice = PCI_ANY_ID,
  122. .driver_data = MODEL_PCI_MELCO,
  123. },
  124. {0,0,},
  125. };
  126. MODULE_DEVICE_TABLE(pci, nsp32_pci_table);
  127. static nsp32_hw_data nsp32_data_base; /* probe <-> detect glue */
  128. /*
  129. * Period/AckWidth speed conversion table
  130. *
  131. * Note: This period/ackwidth speed table must be in descending order.
  132. */
  133. static nsp32_sync_table nsp32_sync_table_40M[] = {
  134. /* {PNo, AW, SP, EP, SREQ smpl} Speed(MB/s) Period AckWidth */
  135. {0x1, 0, 0x0c, 0x0c, SMPL_40M}, /* 20.0 : 50ns, 25ns */
  136. {0x2, 0, 0x0d, 0x18, SMPL_40M}, /* 13.3 : 75ns, 25ns */
  137. {0x3, 1, 0x19, 0x19, SMPL_40M}, /* 10.0 : 100ns, 50ns */
  138. {0x4, 1, 0x1a, 0x1f, SMPL_20M}, /* 8.0 : 125ns, 50ns */
  139. {0x5, 2, 0x20, 0x25, SMPL_20M}, /* 6.7 : 150ns, 75ns */
  140. {0x6, 2, 0x26, 0x31, SMPL_20M}, /* 5.7 : 175ns, 75ns */
  141. {0x7, 3, 0x32, 0x32, SMPL_20M}, /* 5.0 : 200ns, 100ns */
  142. {0x8, 3, 0x33, 0x38, SMPL_10M}, /* 4.4 : 225ns, 100ns */
  143. {0x9, 3, 0x39, 0x3e, SMPL_10M}, /* 4.0 : 250ns, 100ns */
  144. };
  145. static nsp32_sync_table nsp32_sync_table_20M[] = {
  146. {0x1, 0, 0x19, 0x19, SMPL_40M}, /* 10.0 : 100ns, 50ns */
  147. {0x2, 0, 0x1a, 0x25, SMPL_20M}, /* 6.7 : 150ns, 50ns */
  148. {0x3, 1, 0x26, 0x32, SMPL_20M}, /* 5.0 : 200ns, 100ns */
  149. {0x4, 1, 0x33, 0x3e, SMPL_10M}, /* 4.0 : 250ns, 100ns */
  150. {0x5, 2, 0x3f, 0x4b, SMPL_10M}, /* 3.3 : 300ns, 150ns */
  151. {0x6, 2, 0x4c, 0x57, SMPL_10M}, /* 2.8 : 350ns, 150ns */
  152. {0x7, 3, 0x58, 0x64, SMPL_10M}, /* 2.5 : 400ns, 200ns */
  153. {0x8, 3, 0x65, 0x70, SMPL_10M}, /* 2.2 : 450ns, 200ns */
  154. {0x9, 3, 0x71, 0x7d, SMPL_10M}, /* 2.0 : 500ns, 200ns */
  155. };
  156. static nsp32_sync_table nsp32_sync_table_pci[] = {
  157. {0x1, 0, 0x0c, 0x0f, SMPL_40M}, /* 16.6 : 60ns, 30ns */
  158. {0x2, 0, 0x10, 0x16, SMPL_40M}, /* 11.1 : 90ns, 30ns */
  159. {0x3, 1, 0x17, 0x1e, SMPL_20M}, /* 8.3 : 120ns, 60ns */
  160. {0x4, 1, 0x1f, 0x25, SMPL_20M}, /* 6.7 : 150ns, 60ns */
  161. {0x5, 2, 0x26, 0x2d, SMPL_20M}, /* 5.6 : 180ns, 90ns */
  162. {0x6, 2, 0x2e, 0x34, SMPL_10M}, /* 4.8 : 210ns, 90ns */
  163. {0x7, 3, 0x35, 0x3c, SMPL_10M}, /* 4.2 : 240ns, 120ns */
  164. {0x8, 3, 0x3d, 0x43, SMPL_10M}, /* 3.7 : 270ns, 120ns */
  165. {0x9, 3, 0x44, 0x4b, SMPL_10M}, /* 3.3 : 300ns, 120ns */
  166. };
  167. /*
  168. * function declaration
  169. */
  170. /* module entry point */
  171. static int __devinit nsp32_probe (struct pci_dev *, const struct pci_device_id *);
  172. static void __devexit nsp32_remove(struct pci_dev *);
  173. static int __init init_nsp32 (void);
  174. static void __exit exit_nsp32 (void);
  175. /* struct struct scsi_host_template */
  176. static int nsp32_proc_info (struct Scsi_Host *, char *, char **, off_t, int, int);
  177. static int nsp32_detect (struct pci_dev *pdev);
  178. static int nsp32_queuecommand(struct Scsi_Host *, struct scsi_cmnd *);
  179. static const char *nsp32_info (struct Scsi_Host *);
  180. static int nsp32_release (struct Scsi_Host *);
  181. /* SCSI error handler */
  182. static int nsp32_eh_abort (struct scsi_cmnd *);
  183. static int nsp32_eh_bus_reset (struct scsi_cmnd *);
  184. static int nsp32_eh_host_reset(struct scsi_cmnd *);
  185. /* generate SCSI message */
  186. static void nsp32_build_identify(struct scsi_cmnd *);
  187. static void nsp32_build_nop (struct scsi_cmnd *);
  188. static void nsp32_build_reject (struct scsi_cmnd *);
  189. static void nsp32_build_sdtr (struct scsi_cmnd *, unsigned char, unsigned char);
  190. /* SCSI message handler */
  191. static int nsp32_busfree_occur(struct scsi_cmnd *, unsigned short);
  192. static void nsp32_msgout_occur (struct scsi_cmnd *);
  193. static void nsp32_msgin_occur (struct scsi_cmnd *, unsigned long, unsigned short);
  194. static int nsp32_setup_sg_table (struct scsi_cmnd *);
  195. static int nsp32_selection_autopara(struct scsi_cmnd *);
  196. static int nsp32_selection_autoscsi(struct scsi_cmnd *);
  197. static void nsp32_scsi_done (struct scsi_cmnd *);
  198. static int nsp32_arbitration (struct scsi_cmnd *, unsigned int);
  199. static int nsp32_reselection (struct scsi_cmnd *, unsigned char);
  200. static void nsp32_adjust_busfree (struct scsi_cmnd *, unsigned int);
  201. static void nsp32_restart_autoscsi (struct scsi_cmnd *, unsigned short);
  202. /* SCSI SDTR */
  203. static void nsp32_analyze_sdtr (struct scsi_cmnd *);
  204. static int nsp32_search_period_entry(nsp32_hw_data *, nsp32_target *, unsigned char);
  205. static void nsp32_set_async (nsp32_hw_data *, nsp32_target *);
  206. static void nsp32_set_max_sync (nsp32_hw_data *, nsp32_target *, unsigned char *, unsigned char *);
  207. static void nsp32_set_sync_entry (nsp32_hw_data *, nsp32_target *, int, unsigned char);
  208. /* SCSI bus status handler */
  209. static void nsp32_wait_req (nsp32_hw_data *, int);
  210. static void nsp32_wait_sack (nsp32_hw_data *, int);
  211. static void nsp32_sack_assert (nsp32_hw_data *);
  212. static void nsp32_sack_negate (nsp32_hw_data *);
  213. static void nsp32_do_bus_reset(nsp32_hw_data *);
  214. /* hardware interrupt handler */
  215. static irqreturn_t do_nsp32_isr(int, void *);
  216. /* initialize hardware */
  217. static int nsp32hw_init(nsp32_hw_data *);
  218. /* EEPROM handler */
  219. static int nsp32_getprom_param (nsp32_hw_data *);
  220. static int nsp32_getprom_at24 (nsp32_hw_data *);
  221. static int nsp32_getprom_c16 (nsp32_hw_data *);
  222. static void nsp32_prom_start (nsp32_hw_data *);
  223. static void nsp32_prom_stop (nsp32_hw_data *);
  224. static int nsp32_prom_read (nsp32_hw_data *, int);
  225. static int nsp32_prom_read_bit (nsp32_hw_data *);
  226. static void nsp32_prom_write_bit(nsp32_hw_data *, int);
  227. static void nsp32_prom_set (nsp32_hw_data *, int, int);
  228. static int nsp32_prom_get (nsp32_hw_data *, int);
  229. /* debug/warning/info message */
  230. static void nsp32_message (const char *, int, char *, char *, ...);
  231. #ifdef NSP32_DEBUG
  232. static void nsp32_dmessage(const char *, int, int, char *, ...);
  233. #endif
  234. /*
  235. * max_sectors is currently limited up to 128.
  236. */
  237. static struct scsi_host_template nsp32_template = {
  238. .proc_name = "nsp32",
  239. .name = "Workbit NinjaSCSI-32Bi/UDE",
  240. .proc_info = nsp32_proc_info,
  241. .info = nsp32_info,
  242. .queuecommand = nsp32_queuecommand,
  243. .can_queue = 1,
  244. .sg_tablesize = NSP32_SG_SIZE,
  245. .max_sectors = 128,
  246. .cmd_per_lun = 1,
  247. .this_id = NSP32_HOST_SCSIID,
  248. .use_clustering = DISABLE_CLUSTERING,
  249. .eh_abort_handler = nsp32_eh_abort,
  250. .eh_bus_reset_handler = nsp32_eh_bus_reset,
  251. .eh_host_reset_handler = nsp32_eh_host_reset,
  252. /* .highmem_io = 1, */
  253. };
  254. #include "nsp32_io.h"
  255. /***********************************************************************
  256. * debug, error print
  257. */
  258. #ifndef NSP32_DEBUG
  259. # define NSP32_DEBUG_MASK 0x000000
  260. # define nsp32_msg(type, args...) nsp32_message ("", 0, (type), args)
  261. # define nsp32_dbg(mask, args...) /* */
  262. #else
  263. # define NSP32_DEBUG_MASK 0xffffff
  264. # define nsp32_msg(type, args...) \
  265. nsp32_message (__func__, __LINE__, (type), args)
  266. # define nsp32_dbg(mask, args...) \
  267. nsp32_dmessage(__func__, __LINE__, (mask), args)
  268. #endif
  269. #define NSP32_DEBUG_QUEUECOMMAND BIT(0)
  270. #define NSP32_DEBUG_REGISTER BIT(1)
  271. #define NSP32_DEBUG_AUTOSCSI BIT(2)
  272. #define NSP32_DEBUG_INTR BIT(3)
  273. #define NSP32_DEBUG_SGLIST BIT(4)
  274. #define NSP32_DEBUG_BUSFREE BIT(5)
  275. #define NSP32_DEBUG_CDB_CONTENTS BIT(6)
  276. #define NSP32_DEBUG_RESELECTION BIT(7)
  277. #define NSP32_DEBUG_MSGINOCCUR BIT(8)
  278. #define NSP32_DEBUG_EEPROM BIT(9)
  279. #define NSP32_DEBUG_MSGOUTOCCUR BIT(10)
  280. #define NSP32_DEBUG_BUSRESET BIT(11)
  281. #define NSP32_DEBUG_RESTART BIT(12)
  282. #define NSP32_DEBUG_SYNC BIT(13)
  283. #define NSP32_DEBUG_WAIT BIT(14)
  284. #define NSP32_DEBUG_TARGETFLAG BIT(15)
  285. #define NSP32_DEBUG_PROC BIT(16)
  286. #define NSP32_DEBUG_INIT BIT(17)
  287. #define NSP32_SPECIAL_PRINT_REGISTER BIT(20)
  288. #define NSP32_DEBUG_BUF_LEN 100
  289. static void nsp32_message(const char *func, int line, char *type, char *fmt, ...)
  290. {
  291. va_list args;
  292. char buf[NSP32_DEBUG_BUF_LEN];
  293. va_start(args, fmt);
  294. vsnprintf(buf, sizeof(buf), fmt, args);
  295. va_end(args);
  296. #ifndef NSP32_DEBUG
  297. printk("%snsp32: %s\n", type, buf);
  298. #else
  299. printk("%snsp32: %s (%d): %s\n", type, func, line, buf);
  300. #endif
  301. }
  302. #ifdef NSP32_DEBUG
  303. static void nsp32_dmessage(const char *func, int line, int mask, char *fmt, ...)
  304. {
  305. va_list args;
  306. char buf[NSP32_DEBUG_BUF_LEN];
  307. va_start(args, fmt);
  308. vsnprintf(buf, sizeof(buf), fmt, args);
  309. va_end(args);
  310. if (mask & NSP32_DEBUG_MASK) {
  311. printk("nsp32-debug: 0x%x %s (%d): %s\n", mask, func, line, buf);
  312. }
  313. }
  314. #endif
  315. #ifdef NSP32_DEBUG
  316. # include "nsp32_debug.c"
  317. #else
  318. # define show_command(arg) /* */
  319. # define show_busphase(arg) /* */
  320. # define show_autophase(arg) /* */
  321. #endif
  322. /*
  323. * IDENTIFY Message
  324. */
  325. static void nsp32_build_identify(struct scsi_cmnd *SCpnt)
  326. {
  327. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  328. int pos = data->msgout_len;
  329. int mode = FALSE;
  330. /* XXX: Auto DiscPriv detection is progressing... */
  331. if (disc_priv == 0) {
  332. /* mode = TRUE; */
  333. }
  334. data->msgoutbuf[pos] = IDENTIFY(mode, SCpnt->device->lun); pos++;
  335. data->msgout_len = pos;
  336. }
  337. /*
  338. * SDTR Message Routine
  339. */
  340. static void nsp32_build_sdtr(struct scsi_cmnd *SCpnt,
  341. unsigned char period,
  342. unsigned char offset)
  343. {
  344. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  345. int pos = data->msgout_len;
  346. data->msgoutbuf[pos] = EXTENDED_MESSAGE; pos++;
  347. data->msgoutbuf[pos] = EXTENDED_SDTR_LEN; pos++;
  348. data->msgoutbuf[pos] = EXTENDED_SDTR; pos++;
  349. data->msgoutbuf[pos] = period; pos++;
  350. data->msgoutbuf[pos] = offset; pos++;
  351. data->msgout_len = pos;
  352. }
  353. /*
  354. * No Operation Message
  355. */
  356. static void nsp32_build_nop(struct scsi_cmnd *SCpnt)
  357. {
  358. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  359. int pos = data->msgout_len;
  360. if (pos != 0) {
  361. nsp32_msg(KERN_WARNING,
  362. "Some messages are already contained!");
  363. return;
  364. }
  365. data->msgoutbuf[pos] = NOP; pos++;
  366. data->msgout_len = pos;
  367. }
  368. /*
  369. * Reject Message
  370. */
  371. static void nsp32_build_reject(struct scsi_cmnd *SCpnt)
  372. {
  373. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  374. int pos = data->msgout_len;
  375. data->msgoutbuf[pos] = MESSAGE_REJECT; pos++;
  376. data->msgout_len = pos;
  377. }
  378. /*
  379. * timer
  380. */
  381. #if 0
  382. static void nsp32_start_timer(struct scsi_cmnd *SCpnt, int time)
  383. {
  384. unsigned int base = SCpnt->host->io_port;
  385. nsp32_dbg(NSP32_DEBUG_INTR, "timer=%d", time);
  386. if (time & (~TIMER_CNT_MASK)) {
  387. nsp32_dbg(NSP32_DEBUG_INTR, "timer set overflow");
  388. }
  389. nsp32_write2(base, TIMER_SET, time & TIMER_CNT_MASK);
  390. }
  391. #endif
  392. /*
  393. * set SCSI command and other parameter to asic, and start selection phase
  394. */
  395. static int nsp32_selection_autopara(struct scsi_cmnd *SCpnt)
  396. {
  397. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  398. unsigned int base = SCpnt->device->host->io_port;
  399. unsigned int host_id = SCpnt->device->host->this_id;
  400. unsigned char target = scmd_id(SCpnt);
  401. nsp32_autoparam *param = data->autoparam;
  402. unsigned char phase;
  403. int i, ret;
  404. unsigned int msgout;
  405. u16_le s;
  406. nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "in");
  407. /*
  408. * check bus free
  409. */
  410. phase = nsp32_read1(base, SCSI_BUS_MONITOR);
  411. if (phase != BUSMON_BUS_FREE) {
  412. nsp32_msg(KERN_WARNING, "bus busy");
  413. show_busphase(phase & BUSMON_PHASE_MASK);
  414. SCpnt->result = DID_BUS_BUSY << 16;
  415. return FALSE;
  416. }
  417. /*
  418. * message out
  419. *
  420. * Note: If the range of msgout_len is 1 - 3, fill scsi_msgout.
  421. * over 3 messages needs another routine.
  422. */
  423. if (data->msgout_len == 0) {
  424. nsp32_msg(KERN_ERR, "SCSI MsgOut without any message!");
  425. SCpnt->result = DID_ERROR << 16;
  426. return FALSE;
  427. } else if (data->msgout_len > 0 && data->msgout_len <= 3) {
  428. msgout = 0;
  429. for (i = 0; i < data->msgout_len; i++) {
  430. /*
  431. * the sending order of the message is:
  432. * MCNT 3: MSG#0 -> MSG#1 -> MSG#2
  433. * MCNT 2: MSG#1 -> MSG#2
  434. * MCNT 1: MSG#2
  435. */
  436. msgout >>= 8;
  437. msgout |= ((unsigned int)(data->msgoutbuf[i]) << 24);
  438. }
  439. msgout |= MV_VALID; /* MV valid */
  440. msgout |= (unsigned int)data->msgout_len; /* len */
  441. } else {
  442. /* data->msgout_len > 3 */
  443. msgout = 0;
  444. }
  445. // nsp_dbg(NSP32_DEBUG_AUTOSCSI, "sel time out=0x%x\n", nsp32_read2(base, SEL_TIME_OUT));
  446. // nsp32_write2(base, SEL_TIME_OUT, SEL_TIMEOUT_TIME);
  447. /*
  448. * setup asic parameter
  449. */
  450. memset(param, 0, sizeof(nsp32_autoparam));
  451. /* cdb */
  452. for (i = 0; i < SCpnt->cmd_len; i++) {
  453. param->cdb[4 * i] = SCpnt->cmnd[i];
  454. }
  455. /* outgoing messages */
  456. param->msgout = cpu_to_le32(msgout);
  457. /* syncreg, ackwidth, target id, SREQ sampling rate */
  458. param->syncreg = data->cur_target->syncreg;
  459. param->ackwidth = data->cur_target->ackwidth;
  460. param->target_id = BIT(host_id) | BIT(target);
  461. param->sample_reg = data->cur_target->sample_reg;
  462. // nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "sample rate=0x%x\n", data->cur_target->sample_reg);
  463. /* command control */
  464. param->command_control = cpu_to_le16(CLEAR_CDB_FIFO_POINTER |
  465. AUTOSCSI_START |
  466. AUTO_MSGIN_00_OR_04 |
  467. AUTO_MSGIN_02 |
  468. AUTO_ATN );
  469. /* transfer control */
  470. s = 0;
  471. switch (data->trans_method) {
  472. case NSP32_TRANSFER_BUSMASTER:
  473. s |= BM_START;
  474. break;
  475. case NSP32_TRANSFER_MMIO:
  476. s |= CB_MMIO_MODE;
  477. break;
  478. case NSP32_TRANSFER_PIO:
  479. s |= CB_IO_MODE;
  480. break;
  481. default:
  482. nsp32_msg(KERN_ERR, "unknown trans_method");
  483. break;
  484. }
  485. /*
  486. * OR-ed BLIEND_MODE, FIFO intr is decreased, instead of PCI bus waits.
  487. * For bus master transfer, it's taken off.
  488. */
  489. s |= (TRANSFER_GO | ALL_COUNTER_CLR);
  490. param->transfer_control = cpu_to_le16(s);
  491. /* sg table addr */
  492. param->sgt_pointer = cpu_to_le32(data->cur_lunt->sglun_paddr);
  493. /*
  494. * transfer parameter to ASIC
  495. */
  496. nsp32_write4(base, SGT_ADR, data->auto_paddr);
  497. nsp32_write2(base, COMMAND_CONTROL, CLEAR_CDB_FIFO_POINTER |
  498. AUTO_PARAMETER );
  499. /*
  500. * Check arbitration
  501. */
  502. ret = nsp32_arbitration(SCpnt, base);
  503. return ret;
  504. }
  505. /*
  506. * Selection with AUTO SCSI (without AUTO PARAMETER)
  507. */
  508. static int nsp32_selection_autoscsi(struct scsi_cmnd *SCpnt)
  509. {
  510. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  511. unsigned int base = SCpnt->device->host->io_port;
  512. unsigned int host_id = SCpnt->device->host->this_id;
  513. unsigned char target = scmd_id(SCpnt);
  514. unsigned char phase;
  515. int status;
  516. unsigned short command = 0;
  517. unsigned int msgout = 0;
  518. unsigned short execph;
  519. int i;
  520. nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "in");
  521. /*
  522. * IRQ disable
  523. */
  524. nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
  525. /*
  526. * check bus line
  527. */
  528. phase = nsp32_read1(base, SCSI_BUS_MONITOR);
  529. if(((phase & BUSMON_BSY) == 1) || (phase & BUSMON_SEL) == 1) {
  530. nsp32_msg(KERN_WARNING, "bus busy");
  531. SCpnt->result = DID_BUS_BUSY << 16;
  532. status = 1;
  533. goto out;
  534. }
  535. /*
  536. * clear execph
  537. */
  538. execph = nsp32_read2(base, SCSI_EXECUTE_PHASE);
  539. /*
  540. * clear FIFO counter to set CDBs
  541. */
  542. nsp32_write2(base, COMMAND_CONTROL, CLEAR_CDB_FIFO_POINTER);
  543. /*
  544. * set CDB0 - CDB15
  545. */
  546. for (i = 0; i < SCpnt->cmd_len; i++) {
  547. nsp32_write1(base, COMMAND_DATA, SCpnt->cmnd[i]);
  548. }
  549. nsp32_dbg(NSP32_DEBUG_CDB_CONTENTS, "CDB[0]=[0x%x]", SCpnt->cmnd[0]);
  550. /*
  551. * set SCSIOUT LATCH(initiator)/TARGET(target) (OR-ed) ID
  552. */
  553. nsp32_write1(base, SCSI_OUT_LATCH_TARGET_ID, BIT(host_id) | BIT(target));
  554. /*
  555. * set SCSI MSGOUT REG
  556. *
  557. * Note: If the range of msgout_len is 1 - 3, fill scsi_msgout.
  558. * over 3 messages needs another routine.
  559. */
  560. if (data->msgout_len == 0) {
  561. nsp32_msg(KERN_ERR, "SCSI MsgOut without any message!");
  562. SCpnt->result = DID_ERROR << 16;
  563. status = 1;
  564. goto out;
  565. } else if (data->msgout_len > 0 && data->msgout_len <= 3) {
  566. msgout = 0;
  567. for (i = 0; i < data->msgout_len; i++) {
  568. /*
  569. * the sending order of the message is:
  570. * MCNT 3: MSG#0 -> MSG#1 -> MSG#2
  571. * MCNT 2: MSG#1 -> MSG#2
  572. * MCNT 1: MSG#2
  573. */
  574. msgout >>= 8;
  575. msgout |= ((unsigned int)(data->msgoutbuf[i]) << 24);
  576. }
  577. msgout |= MV_VALID; /* MV valid */
  578. msgout |= (unsigned int)data->msgout_len; /* len */
  579. nsp32_write4(base, SCSI_MSG_OUT, msgout);
  580. } else {
  581. /* data->msgout_len > 3 */
  582. nsp32_write4(base, SCSI_MSG_OUT, 0);
  583. }
  584. /*
  585. * set selection timeout(= 250ms)
  586. */
  587. nsp32_write2(base, SEL_TIME_OUT, SEL_TIMEOUT_TIME);
  588. /*
  589. * set SREQ hazard killer sampling rate
  590. *
  591. * TODO: sample_rate (BASE+0F) is 0 when internal clock = 40MHz.
  592. * check other internal clock!
  593. */
  594. nsp32_write1(base, SREQ_SMPL_RATE, data->cur_target->sample_reg);
  595. /*
  596. * clear Arbit
  597. */
  598. nsp32_write1(base, SET_ARBIT, ARBIT_CLEAR);
  599. /*
  600. * set SYNCREG
  601. * Don't set BM_START_ADR before setting this register.
  602. */
  603. nsp32_write1(base, SYNC_REG, data->cur_target->syncreg);
  604. /*
  605. * set ACKWIDTH
  606. */
  607. nsp32_write1(base, ACK_WIDTH, data->cur_target->ackwidth);
  608. nsp32_dbg(NSP32_DEBUG_AUTOSCSI,
  609. "syncreg=0x%x, ackwidth=0x%x, sgtpaddr=0x%x, id=0x%x",
  610. nsp32_read1(base, SYNC_REG), nsp32_read1(base, ACK_WIDTH),
  611. nsp32_read4(base, SGT_ADR), nsp32_read1(base, SCSI_OUT_LATCH_TARGET_ID));
  612. nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "msgout_len=%d, msgout=0x%x",
  613. data->msgout_len, msgout);
  614. /*
  615. * set SGT ADDR (physical address)
  616. */
  617. nsp32_write4(base, SGT_ADR, data->cur_lunt->sglun_paddr);
  618. /*
  619. * set TRANSFER CONTROL REG
  620. */
  621. command = 0;
  622. command |= (TRANSFER_GO | ALL_COUNTER_CLR);
  623. if (data->trans_method & NSP32_TRANSFER_BUSMASTER) {
  624. if (scsi_bufflen(SCpnt) > 0) {
  625. command |= BM_START;
  626. }
  627. } else if (data->trans_method & NSP32_TRANSFER_MMIO) {
  628. command |= CB_MMIO_MODE;
  629. } else if (data->trans_method & NSP32_TRANSFER_PIO) {
  630. command |= CB_IO_MODE;
  631. }
  632. nsp32_write2(base, TRANSFER_CONTROL, command);
  633. /*
  634. * start AUTO SCSI, kick off arbitration
  635. */
  636. command = (CLEAR_CDB_FIFO_POINTER |
  637. AUTOSCSI_START |
  638. AUTO_MSGIN_00_OR_04 |
  639. AUTO_MSGIN_02 |
  640. AUTO_ATN );
  641. nsp32_write2(base, COMMAND_CONTROL, command);
  642. /*
  643. * Check arbitration
  644. */
  645. status = nsp32_arbitration(SCpnt, base);
  646. out:
  647. /*
  648. * IRQ enable
  649. */
  650. nsp32_write2(base, IRQ_CONTROL, 0);
  651. return status;
  652. }
  653. /*
  654. * Arbitration Status Check
  655. *
  656. * Note: Arbitration counter is waited during ARBIT_GO is not lifting.
  657. * Using udelay(1) consumes CPU time and system time, but
  658. * arbitration delay time is defined minimal 2.4us in SCSI
  659. * specification, thus udelay works as coarse grained wait timer.
  660. */
  661. static int nsp32_arbitration(struct scsi_cmnd *SCpnt, unsigned int base)
  662. {
  663. unsigned char arbit;
  664. int status = TRUE;
  665. int time = 0;
  666. do {
  667. arbit = nsp32_read1(base, ARBIT_STATUS);
  668. time++;
  669. } while ((arbit & (ARBIT_WIN | ARBIT_FAIL)) == 0 &&
  670. (time <= ARBIT_TIMEOUT_TIME));
  671. nsp32_dbg(NSP32_DEBUG_AUTOSCSI,
  672. "arbit: 0x%x, delay time: %d", arbit, time);
  673. if (arbit & ARBIT_WIN) {
  674. /* Arbitration succeeded */
  675. SCpnt->result = DID_OK << 16;
  676. nsp32_index_write1(base, EXT_PORT, LED_ON); /* PCI LED on */
  677. } else if (arbit & ARBIT_FAIL) {
  678. /* Arbitration failed */
  679. SCpnt->result = DID_BUS_BUSY << 16;
  680. status = FALSE;
  681. } else {
  682. /*
  683. * unknown error or ARBIT_GO timeout,
  684. * something lock up! guess no connection.
  685. */
  686. nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "arbit timeout");
  687. SCpnt->result = DID_NO_CONNECT << 16;
  688. status = FALSE;
  689. }
  690. /*
  691. * clear Arbit
  692. */
  693. nsp32_write1(base, SET_ARBIT, ARBIT_CLEAR);
  694. return status;
  695. }
  696. /*
  697. * reselection
  698. *
  699. * Note: This reselection routine is called from msgin_occur,
  700. * reselection target id&lun must be already set.
  701. * SCSI-2 says IDENTIFY implies RESTORE_POINTER operation.
  702. */
  703. static int nsp32_reselection(struct scsi_cmnd *SCpnt, unsigned char newlun)
  704. {
  705. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  706. unsigned int host_id = SCpnt->device->host->this_id;
  707. unsigned int base = SCpnt->device->host->io_port;
  708. unsigned char tmpid, newid;
  709. nsp32_dbg(NSP32_DEBUG_RESELECTION, "enter");
  710. /*
  711. * calculate reselected SCSI ID
  712. */
  713. tmpid = nsp32_read1(base, RESELECT_ID);
  714. tmpid &= (~BIT(host_id));
  715. newid = 0;
  716. while (tmpid) {
  717. if (tmpid & 1) {
  718. break;
  719. }
  720. tmpid >>= 1;
  721. newid++;
  722. }
  723. /*
  724. * If reselected New ID:LUN is not existed
  725. * or current nexus is not existed, unexpected
  726. * reselection is occurred. Send reject message.
  727. */
  728. if (newid >= ARRAY_SIZE(data->lunt) || newlun >= ARRAY_SIZE(data->lunt[0])) {
  729. nsp32_msg(KERN_WARNING, "unknown id/lun");
  730. return FALSE;
  731. } else if(data->lunt[newid][newlun].SCpnt == NULL) {
  732. nsp32_msg(KERN_WARNING, "no SCSI command is processing");
  733. return FALSE;
  734. }
  735. data->cur_id = newid;
  736. data->cur_lun = newlun;
  737. data->cur_target = &(data->target[newid]);
  738. data->cur_lunt = &(data->lunt[newid][newlun]);
  739. /* reset SACK/SavedACK counter (or ALL clear?) */
  740. nsp32_write4(base, CLR_COUNTER, CLRCOUNTER_ALLMASK);
  741. return TRUE;
  742. }
  743. /*
  744. * nsp32_setup_sg_table - build scatter gather list for transfer data
  745. * with bus master.
  746. *
  747. * Note: NinjaSCSI-32Bi/UDE bus master can not transfer over 64KB at a time.
  748. */
  749. static int nsp32_setup_sg_table(struct scsi_cmnd *SCpnt)
  750. {
  751. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  752. struct scatterlist *sg;
  753. nsp32_sgtable *sgt = data->cur_lunt->sglun->sgt;
  754. int num, i;
  755. u32_le l;
  756. if (sgt == NULL) {
  757. nsp32_dbg(NSP32_DEBUG_SGLIST, "SGT == null");
  758. return FALSE;
  759. }
  760. num = scsi_dma_map(SCpnt);
  761. if (!num)
  762. return TRUE;
  763. else if (num < 0)
  764. return FALSE;
  765. else {
  766. scsi_for_each_sg(SCpnt, sg, num, i) {
  767. /*
  768. * Build nsp32_sglist, substitute sg dma addresses.
  769. */
  770. sgt[i].addr = cpu_to_le32(sg_dma_address(sg));
  771. sgt[i].len = cpu_to_le32(sg_dma_len(sg));
  772. if (le32_to_cpu(sgt[i].len) > 0x10000) {
  773. nsp32_msg(KERN_ERR,
  774. "can't transfer over 64KB at a time, size=0x%lx", le32_to_cpu(sgt[i].len));
  775. return FALSE;
  776. }
  777. nsp32_dbg(NSP32_DEBUG_SGLIST,
  778. "num 0x%x : addr 0x%lx len 0x%lx",
  779. i,
  780. le32_to_cpu(sgt[i].addr),
  781. le32_to_cpu(sgt[i].len ));
  782. }
  783. /* set end mark */
  784. l = le32_to_cpu(sgt[num-1].len);
  785. sgt[num-1].len = cpu_to_le32(l | SGTEND);
  786. }
  787. return TRUE;
  788. }
  789. static int nsp32_queuecommand_lck(struct scsi_cmnd *SCpnt, void (*done)(struct scsi_cmnd *))
  790. {
  791. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  792. nsp32_target *target;
  793. nsp32_lunt *cur_lunt;
  794. int ret;
  795. nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
  796. "enter. target: 0x%x LUN: 0x%x cmnd: 0x%x cmndlen: 0x%x "
  797. "use_sg: 0x%x reqbuf: 0x%lx reqlen: 0x%x",
  798. SCpnt->device->id, SCpnt->device->lun, SCpnt->cmnd[0], SCpnt->cmd_len,
  799. scsi_sg_count(SCpnt), scsi_sglist(SCpnt), scsi_bufflen(SCpnt));
  800. if (data->CurrentSC != NULL) {
  801. nsp32_msg(KERN_ERR, "Currentsc != NULL. Cancel this command request");
  802. data->CurrentSC = NULL;
  803. SCpnt->result = DID_NO_CONNECT << 16;
  804. done(SCpnt);
  805. return 0;
  806. }
  807. /* check target ID is not same as this initiator ID */
  808. if (scmd_id(SCpnt) == SCpnt->device->host->this_id) {
  809. nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, "terget==host???");
  810. SCpnt->result = DID_BAD_TARGET << 16;
  811. done(SCpnt);
  812. return 0;
  813. }
  814. /* check target LUN is allowable value */
  815. if (SCpnt->device->lun >= MAX_LUN) {
  816. nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, "no more lun");
  817. SCpnt->result = DID_BAD_TARGET << 16;
  818. done(SCpnt);
  819. return 0;
  820. }
  821. show_command(SCpnt);
  822. SCpnt->scsi_done = done;
  823. data->CurrentSC = SCpnt;
  824. SCpnt->SCp.Status = CHECK_CONDITION;
  825. SCpnt->SCp.Message = 0;
  826. scsi_set_resid(SCpnt, scsi_bufflen(SCpnt));
  827. SCpnt->SCp.ptr = (char *)scsi_sglist(SCpnt);
  828. SCpnt->SCp.this_residual = scsi_bufflen(SCpnt);
  829. SCpnt->SCp.buffer = NULL;
  830. SCpnt->SCp.buffers_residual = 0;
  831. /* initialize data */
  832. data->msgout_len = 0;
  833. data->msgin_len = 0;
  834. cur_lunt = &(data->lunt[SCpnt->device->id][SCpnt->device->lun]);
  835. cur_lunt->SCpnt = SCpnt;
  836. cur_lunt->save_datp = 0;
  837. cur_lunt->msgin03 = FALSE;
  838. data->cur_lunt = cur_lunt;
  839. data->cur_id = SCpnt->device->id;
  840. data->cur_lun = SCpnt->device->lun;
  841. ret = nsp32_setup_sg_table(SCpnt);
  842. if (ret == FALSE) {
  843. nsp32_msg(KERN_ERR, "SGT fail");
  844. SCpnt->result = DID_ERROR << 16;
  845. nsp32_scsi_done(SCpnt);
  846. return 0;
  847. }
  848. /* Build IDENTIFY */
  849. nsp32_build_identify(SCpnt);
  850. /*
  851. * If target is the first time to transfer after the reset
  852. * (target don't have SDTR_DONE and SDTR_INITIATOR), sync
  853. * message SDTR is needed to do synchronous transfer.
  854. */
  855. target = &data->target[scmd_id(SCpnt)];
  856. data->cur_target = target;
  857. if (!(target->sync_flag & (SDTR_DONE | SDTR_INITIATOR | SDTR_TARGET))) {
  858. unsigned char period, offset;
  859. if (trans_mode != ASYNC_MODE) {
  860. nsp32_set_max_sync(data, target, &period, &offset);
  861. nsp32_build_sdtr(SCpnt, period, offset);
  862. target->sync_flag |= SDTR_INITIATOR;
  863. } else {
  864. nsp32_set_async(data, target);
  865. target->sync_flag |= SDTR_DONE;
  866. }
  867. nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
  868. "SDTR: entry: %d start_period: 0x%x offset: 0x%x\n",
  869. target->limit_entry, period, offset);
  870. } else if (target->sync_flag & SDTR_INITIATOR) {
  871. /*
  872. * It was negotiating SDTR with target, sending from the
  873. * initiator, but there are no chance to remove this flag.
  874. * Set async because we don't get proper negotiation.
  875. */
  876. nsp32_set_async(data, target);
  877. target->sync_flag &= ~SDTR_INITIATOR;
  878. target->sync_flag |= SDTR_DONE;
  879. nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
  880. "SDTR_INITIATOR: fall back to async");
  881. } else if (target->sync_flag & SDTR_TARGET) {
  882. /*
  883. * It was negotiating SDTR with target, sending from target,
  884. * but there are no chance to remove this flag. Set async
  885. * because we don't get proper negotiation.
  886. */
  887. nsp32_set_async(data, target);
  888. target->sync_flag &= ~SDTR_TARGET;
  889. target->sync_flag |= SDTR_DONE;
  890. nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
  891. "Unknown SDTR from target is reached, fall back to async.");
  892. }
  893. nsp32_dbg(NSP32_DEBUG_TARGETFLAG,
  894. "target: %d sync_flag: 0x%x syncreg: 0x%x ackwidth: 0x%x",
  895. SCpnt->device->id, target->sync_flag, target->syncreg,
  896. target->ackwidth);
  897. /* Selection */
  898. if (auto_param == 0) {
  899. ret = nsp32_selection_autopara(SCpnt);
  900. } else {
  901. ret = nsp32_selection_autoscsi(SCpnt);
  902. }
  903. if (ret != TRUE) {
  904. nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, "selection fail");
  905. nsp32_scsi_done(SCpnt);
  906. }
  907. return 0;
  908. }
  909. static DEF_SCSI_QCMD(nsp32_queuecommand)
  910. /* initialize asic */
  911. static int nsp32hw_init(nsp32_hw_data *data)
  912. {
  913. unsigned int base = data->BaseAddress;
  914. unsigned short irq_stat;
  915. unsigned long lc_reg;
  916. unsigned char power;
  917. lc_reg = nsp32_index_read4(base, CFG_LATE_CACHE);
  918. if ((lc_reg & 0xff00) == 0) {
  919. lc_reg |= (0x20 << 8);
  920. nsp32_index_write2(base, CFG_LATE_CACHE, lc_reg & 0xffff);
  921. }
  922. nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
  923. nsp32_write2(base, TRANSFER_CONTROL, 0);
  924. nsp32_write4(base, BM_CNT, 0);
  925. nsp32_write2(base, SCSI_EXECUTE_PHASE, 0);
  926. do {
  927. irq_stat = nsp32_read2(base, IRQ_STATUS);
  928. nsp32_dbg(NSP32_DEBUG_INIT, "irq_stat 0x%x", irq_stat);
  929. } while (irq_stat & IRQSTATUS_ANY_IRQ);
  930. /*
  931. * Fill FIFO_FULL_SHLD, FIFO_EMPTY_SHLD. Below parameter is
  932. * designated by specification.
  933. */
  934. if ((data->trans_method & NSP32_TRANSFER_PIO) ||
  935. (data->trans_method & NSP32_TRANSFER_MMIO)) {
  936. nsp32_index_write1(base, FIFO_FULL_SHLD_COUNT, 0x40);
  937. nsp32_index_write1(base, FIFO_EMPTY_SHLD_COUNT, 0x40);
  938. } else if (data->trans_method & NSP32_TRANSFER_BUSMASTER) {
  939. nsp32_index_write1(base, FIFO_FULL_SHLD_COUNT, 0x10);
  940. nsp32_index_write1(base, FIFO_EMPTY_SHLD_COUNT, 0x60);
  941. } else {
  942. nsp32_dbg(NSP32_DEBUG_INIT, "unknown transfer mode");
  943. }
  944. nsp32_dbg(NSP32_DEBUG_INIT, "full 0x%x emp 0x%x",
  945. nsp32_index_read1(base, FIFO_FULL_SHLD_COUNT),
  946. nsp32_index_read1(base, FIFO_EMPTY_SHLD_COUNT));
  947. nsp32_index_write1(base, CLOCK_DIV, data->clock);
  948. nsp32_index_write1(base, BM_CYCLE, MEMRD_CMD1 | SGT_AUTO_PARA_MEMED_CMD);
  949. nsp32_write1(base, PARITY_CONTROL, 0); /* parity check is disable */
  950. /*
  951. * initialize MISC_WRRD register
  952. *
  953. * Note: Designated parameters is obeyed as following:
  954. * MISC_SCSI_DIRECTION_DETECTOR_SELECT: It must be set.
  955. * MISC_MASTER_TERMINATION_SELECT: It must be set.
  956. * MISC_BMREQ_NEGATE_TIMING_SEL: It should be set.
  957. * MISC_AUTOSEL_TIMING_SEL: It should be set.
  958. * MISC_BMSTOP_CHANGE2_NONDATA_PHASE: It should be set.
  959. * MISC_DELAYED_BMSTART: It's selected for safety.
  960. *
  961. * Note: If MISC_BMSTOP_CHANGE2_NONDATA_PHASE is set, then
  962. * we have to set TRANSFERCONTROL_BM_START as 0 and set
  963. * appropriate value before restarting bus master transfer.
  964. */
  965. nsp32_index_write2(base, MISC_WR,
  966. (SCSI_DIRECTION_DETECTOR_SELECT |
  967. DELAYED_BMSTART |
  968. MASTER_TERMINATION_SELECT |
  969. BMREQ_NEGATE_TIMING_SEL |
  970. AUTOSEL_TIMING_SEL |
  971. BMSTOP_CHANGE2_NONDATA_PHASE));
  972. nsp32_index_write1(base, TERM_PWR_CONTROL, 0);
  973. power = nsp32_index_read1(base, TERM_PWR_CONTROL);
  974. if (!(power & SENSE)) {
  975. nsp32_msg(KERN_INFO, "term power on");
  976. nsp32_index_write1(base, TERM_PWR_CONTROL, BPWR);
  977. }
  978. nsp32_write2(base, TIMER_SET, TIMER_STOP);
  979. nsp32_write2(base, TIMER_SET, TIMER_STOP); /* Required 2 times */
  980. nsp32_write1(base, SYNC_REG, 0);
  981. nsp32_write1(base, ACK_WIDTH, 0);
  982. nsp32_write2(base, SEL_TIME_OUT, SEL_TIMEOUT_TIME);
  983. /*
  984. * enable to select designated IRQ (except for
  985. * IRQSELECT_SERR, IRQSELECT_PERR, IRQSELECT_BMCNTERR)
  986. */
  987. nsp32_index_write2(base, IRQ_SELECT, IRQSELECT_TIMER_IRQ |
  988. IRQSELECT_SCSIRESET_IRQ |
  989. IRQSELECT_FIFO_SHLD_IRQ |
  990. IRQSELECT_RESELECT_IRQ |
  991. IRQSELECT_PHASE_CHANGE_IRQ |
  992. IRQSELECT_AUTO_SCSI_SEQ_IRQ |
  993. // IRQSELECT_BMCNTERR_IRQ |
  994. IRQSELECT_TARGET_ABORT_IRQ |
  995. IRQSELECT_MASTER_ABORT_IRQ );
  996. nsp32_write2(base, IRQ_CONTROL, 0);
  997. /* PCI LED off */
  998. nsp32_index_write1(base, EXT_PORT_DDR, LED_OFF);
  999. nsp32_index_write1(base, EXT_PORT, LED_OFF);
  1000. return TRUE;
  1001. }
  1002. /* interrupt routine */
  1003. static irqreturn_t do_nsp32_isr(int irq, void *dev_id)
  1004. {
  1005. nsp32_hw_data *data = dev_id;
  1006. unsigned int base = data->BaseAddress;
  1007. struct scsi_cmnd *SCpnt = data->CurrentSC;
  1008. unsigned short auto_stat, irq_stat, trans_stat;
  1009. unsigned char busmon, busphase;
  1010. unsigned long flags;
  1011. int ret;
  1012. int handled = 0;
  1013. struct Scsi_Host *host = data->Host;
  1014. spin_lock_irqsave(host->host_lock, flags);
  1015. /*
  1016. * IRQ check, then enable IRQ mask
  1017. */
  1018. irq_stat = nsp32_read2(base, IRQ_STATUS);
  1019. nsp32_dbg(NSP32_DEBUG_INTR,
  1020. "enter IRQ: %d, IRQstatus: 0x%x", irq, irq_stat);
  1021. /* is this interrupt comes from Ninja asic? */
  1022. if ((irq_stat & IRQSTATUS_ANY_IRQ) == 0) {
  1023. nsp32_dbg(NSP32_DEBUG_INTR, "shared interrupt: irq other 0x%x", irq_stat);
  1024. goto out2;
  1025. }
  1026. handled = 1;
  1027. nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
  1028. busmon = nsp32_read1(base, SCSI_BUS_MONITOR);
  1029. busphase = busmon & BUSMON_PHASE_MASK;
  1030. trans_stat = nsp32_read2(base, TRANSFER_STATUS);
  1031. if ((irq_stat == 0xffff) && (trans_stat == 0xffff)) {
  1032. nsp32_msg(KERN_INFO, "card disconnect");
  1033. if (data->CurrentSC != NULL) {
  1034. nsp32_msg(KERN_INFO, "clean up current SCSI command");
  1035. SCpnt->result = DID_BAD_TARGET << 16;
  1036. nsp32_scsi_done(SCpnt);
  1037. }
  1038. goto out;
  1039. }
  1040. /* Timer IRQ */
  1041. if (irq_stat & IRQSTATUS_TIMER_IRQ) {
  1042. nsp32_dbg(NSP32_DEBUG_INTR, "timer stop");
  1043. nsp32_write2(base, TIMER_SET, TIMER_STOP);
  1044. goto out;
  1045. }
  1046. /* SCSI reset */
  1047. if (irq_stat & IRQSTATUS_SCSIRESET_IRQ) {
  1048. nsp32_msg(KERN_INFO, "detected someone do bus reset");
  1049. nsp32_do_bus_reset(data);
  1050. if (SCpnt != NULL) {
  1051. SCpnt->result = DID_RESET << 16;
  1052. nsp32_scsi_done(SCpnt);
  1053. }
  1054. goto out;
  1055. }
  1056. if (SCpnt == NULL) {
  1057. nsp32_msg(KERN_WARNING, "SCpnt==NULL this can't be happened");
  1058. nsp32_msg(KERN_WARNING, "irq_stat=0x%x trans_stat=0x%x", irq_stat, trans_stat);
  1059. goto out;
  1060. }
  1061. /*
  1062. * AutoSCSI Interrupt.
  1063. * Note: This interrupt is occurred when AutoSCSI is finished. Then
  1064. * check SCSIEXECUTEPHASE, and do appropriate action. Each phases are
  1065. * recorded when AutoSCSI sequencer has been processed.
  1066. */
  1067. if(irq_stat & IRQSTATUS_AUTOSCSI_IRQ) {
  1068. /* getting SCSI executed phase */
  1069. auto_stat = nsp32_read2(base, SCSI_EXECUTE_PHASE);
  1070. nsp32_write2(base, SCSI_EXECUTE_PHASE, 0);
  1071. /* Selection Timeout, go busfree phase. */
  1072. if (auto_stat & SELECTION_TIMEOUT) {
  1073. nsp32_dbg(NSP32_DEBUG_INTR,
  1074. "selection timeout occurred");
  1075. SCpnt->result = DID_TIME_OUT << 16;
  1076. nsp32_scsi_done(SCpnt);
  1077. goto out;
  1078. }
  1079. if (auto_stat & MSGOUT_PHASE) {
  1080. /*
  1081. * MsgOut phase was processed.
  1082. * If MSG_IN_OCCUER is not set, then MsgOut phase is
  1083. * completed. Thus, msgout_len must reset. Otherwise,
  1084. * nothing to do here. If MSG_OUT_OCCUER is occurred,
  1085. * then we will encounter the condition and check.
  1086. */
  1087. if (!(auto_stat & MSG_IN_OCCUER) &&
  1088. (data->msgout_len <= 3)) {
  1089. /*
  1090. * !MSG_IN_OCCUER && msgout_len <=3
  1091. * ---> AutoSCSI with MSGOUTreg is processed.
  1092. */
  1093. data->msgout_len = 0;
  1094. };
  1095. nsp32_dbg(NSP32_DEBUG_INTR, "MsgOut phase processed");
  1096. }
  1097. if ((auto_stat & DATA_IN_PHASE) &&
  1098. (scsi_get_resid(SCpnt) > 0) &&
  1099. ((nsp32_read2(base, FIFO_REST_CNT) & FIFO_REST_MASK) != 0)) {
  1100. printk( "auto+fifo\n");
  1101. //nsp32_pio_read(SCpnt);
  1102. }
  1103. if (auto_stat & (DATA_IN_PHASE | DATA_OUT_PHASE)) {
  1104. /* DATA_IN_PHASE/DATA_OUT_PHASE was processed. */
  1105. nsp32_dbg(NSP32_DEBUG_INTR,
  1106. "Data in/out phase processed");
  1107. /* read BMCNT, SGT pointer addr */
  1108. nsp32_dbg(NSP32_DEBUG_INTR, "BMCNT=0x%lx",
  1109. nsp32_read4(base, BM_CNT));
  1110. nsp32_dbg(NSP32_DEBUG_INTR, "addr=0x%lx",
  1111. nsp32_read4(base, SGT_ADR));
  1112. nsp32_dbg(NSP32_DEBUG_INTR, "SACK=0x%lx",
  1113. nsp32_read4(base, SACK_CNT));
  1114. nsp32_dbg(NSP32_DEBUG_INTR, "SSACK=0x%lx",
  1115. nsp32_read4(base, SAVED_SACK_CNT));
  1116. scsi_set_resid(SCpnt, 0); /* all data transferred! */
  1117. }
  1118. /*
  1119. * MsgIn Occur
  1120. */
  1121. if (auto_stat & MSG_IN_OCCUER) {
  1122. nsp32_msgin_occur(SCpnt, irq_stat, auto_stat);
  1123. }
  1124. /*
  1125. * MsgOut Occur
  1126. */
  1127. if (auto_stat & MSG_OUT_OCCUER) {
  1128. nsp32_msgout_occur(SCpnt);
  1129. }
  1130. /*
  1131. * Bus Free Occur
  1132. */
  1133. if (auto_stat & BUS_FREE_OCCUER) {
  1134. ret = nsp32_busfree_occur(SCpnt, auto_stat);
  1135. if (ret == TRUE) {
  1136. goto out;
  1137. }
  1138. }
  1139. if (auto_stat & STATUS_PHASE) {
  1140. /*
  1141. * Read CSB and substitute CSB for SCpnt->result
  1142. * to save status phase stutas byte.
  1143. * scsi error handler checks host_byte (DID_*:
  1144. * low level driver to indicate status), then checks
  1145. * status_byte (SCSI status byte).
  1146. */
  1147. SCpnt->result = (int)nsp32_read1(base, SCSI_CSB_IN);
  1148. }
  1149. if (auto_stat & ILLEGAL_PHASE) {
  1150. /* Illegal phase is detected. SACK is not back. */
  1151. nsp32_msg(KERN_WARNING,
  1152. "AUTO SCSI ILLEGAL PHASE OCCUR!!!!");
  1153. /* TODO: currently we don't have any action... bus reset? */
  1154. /*
  1155. * To send back SACK, assert, wait, and negate.
  1156. */
  1157. nsp32_sack_assert(data);
  1158. nsp32_wait_req(data, NEGATE);
  1159. nsp32_sack_negate(data);
  1160. }
  1161. if (auto_stat & COMMAND_PHASE) {
  1162. /* nothing to do */
  1163. nsp32_dbg(NSP32_DEBUG_INTR, "Command phase processed");
  1164. }
  1165. if (auto_stat & AUTOSCSI_BUSY) {
  1166. /* AutoSCSI is running */
  1167. }
  1168. show_autophase(auto_stat);
  1169. }
  1170. /* FIFO_SHLD_IRQ */
  1171. if (irq_stat & IRQSTATUS_FIFO_SHLD_IRQ) {
  1172. nsp32_dbg(NSP32_DEBUG_INTR, "FIFO IRQ");
  1173. switch(busphase) {
  1174. case BUSPHASE_DATA_OUT:
  1175. nsp32_dbg(NSP32_DEBUG_INTR, "fifo/write");
  1176. //nsp32_pio_write(SCpnt);
  1177. break;
  1178. case BUSPHASE_DATA_IN:
  1179. nsp32_dbg(NSP32_DEBUG_INTR, "fifo/read");
  1180. //nsp32_pio_read(SCpnt);
  1181. break;
  1182. case BUSPHASE_STATUS:
  1183. nsp32_dbg(NSP32_DEBUG_INTR, "fifo/status");
  1184. SCpnt->SCp.Status = nsp32_read1(base, SCSI_CSB_IN);
  1185. break;
  1186. default:
  1187. nsp32_dbg(NSP32_DEBUG_INTR, "fifo/other phase");
  1188. nsp32_dbg(NSP32_DEBUG_INTR, "irq_stat=0x%x trans_stat=0x%x", irq_stat, trans_stat);
  1189. show_busphase(busphase);
  1190. break;
  1191. }
  1192. goto out;
  1193. }
  1194. /* Phase Change IRQ */
  1195. if (irq_stat & IRQSTATUS_PHASE_CHANGE_IRQ) {
  1196. nsp32_dbg(NSP32_DEBUG_INTR, "phase change IRQ");
  1197. switch(busphase) {
  1198. case BUSPHASE_MESSAGE_IN:
  1199. nsp32_dbg(NSP32_DEBUG_INTR, "phase chg/msg in");
  1200. nsp32_msgin_occur(SCpnt, irq_stat, 0);
  1201. break;
  1202. default:
  1203. nsp32_msg(KERN_WARNING, "phase chg/other phase?");
  1204. nsp32_msg(KERN_WARNING, "irq_stat=0x%x trans_stat=0x%x\n",
  1205. irq_stat, trans_stat);
  1206. show_busphase(busphase);
  1207. break;
  1208. }
  1209. goto out;
  1210. }
  1211. /* PCI_IRQ */
  1212. if (irq_stat & IRQSTATUS_PCI_IRQ) {
  1213. nsp32_dbg(NSP32_DEBUG_INTR, "PCI IRQ occurred");
  1214. /* Do nothing */
  1215. }
  1216. /* BMCNTERR_IRQ */
  1217. if (irq_stat & IRQSTATUS_BMCNTERR_IRQ) {
  1218. nsp32_msg(KERN_ERR, "Received unexpected BMCNTERR IRQ! ");
  1219. /*
  1220. * TODO: To be implemented improving bus master
  1221. * transfer reliability when BMCNTERR is occurred in
  1222. * AutoSCSI phase described in specification.
  1223. */
  1224. }
  1225. #if 0
  1226. nsp32_dbg(NSP32_DEBUG_INTR,
  1227. "irq_stat=0x%x trans_stat=0x%x", irq_stat, trans_stat);
  1228. show_busphase(busphase);
  1229. #endif
  1230. out:
  1231. /* disable IRQ mask */
  1232. nsp32_write2(base, IRQ_CONTROL, 0);
  1233. out2:
  1234. spin_unlock_irqrestore(host->host_lock, flags);
  1235. nsp32_dbg(NSP32_DEBUG_INTR, "exit");
  1236. return IRQ_RETVAL(handled);
  1237. }
  1238. #undef SPRINTF
  1239. #define SPRINTF(args...) \
  1240. do { \
  1241. if(length > (pos - buffer)) { \
  1242. pos += snprintf(pos, length - (pos - buffer) + 1, ## args); \
  1243. nsp32_dbg(NSP32_DEBUG_PROC, "buffer=0x%p pos=0x%p length=%d %d\n", buffer, pos, length, length - (pos - buffer));\
  1244. } \
  1245. } while(0)
  1246. static int nsp32_proc_info(struct Scsi_Host *host, char *buffer, char **start,
  1247. off_t offset, int length, int inout)
  1248. {
  1249. char *pos = buffer;
  1250. int thislength;
  1251. unsigned long flags;
  1252. nsp32_hw_data *data;
  1253. int hostno;
  1254. unsigned int base;
  1255. unsigned char mode_reg;
  1256. int id, speed;
  1257. long model;
  1258. /* Write is not supported, just return. */
  1259. if (inout == TRUE) {
  1260. return -EINVAL;
  1261. }
  1262. hostno = host->host_no;
  1263. data = (nsp32_hw_data *)host->hostdata;
  1264. base = host->io_port;
  1265. SPRINTF("NinjaSCSI-32 status\n\n");
  1266. SPRINTF("Driver version: %s, $Revision: 1.33 $\n", nsp32_release_version);
  1267. SPRINTF("SCSI host No.: %d\n", hostno);
  1268. SPRINTF("IRQ: %d\n", host->irq);
  1269. SPRINTF("IO: 0x%lx-0x%lx\n", host->io_port, host->io_port + host->n_io_port - 1);
  1270. SPRINTF("MMIO(virtual address): 0x%lx-0x%lx\n", host->base, host->base + data->MmioLength - 1);
  1271. SPRINTF("sg_tablesize: %d\n", host->sg_tablesize);
  1272. SPRINTF("Chip revision: 0x%x\n", (nsp32_read2(base, INDEX_REG) >> 8) & 0xff);
  1273. mode_reg = nsp32_index_read1(base, CHIP_MODE);
  1274. model = data->pci_devid->driver_data;
  1275. #ifdef CONFIG_PM
  1276. SPRINTF("Power Management: %s\n", (mode_reg & OPTF) ? "yes" : "no");
  1277. #endif
  1278. SPRINTF("OEM: %ld, %s\n", (mode_reg & (OEM0|OEM1)), nsp32_model[model]);
  1279. spin_lock_irqsave(&(data->Lock), flags);
  1280. SPRINTF("CurrentSC: 0x%p\n\n", data->CurrentSC);
  1281. spin_unlock_irqrestore(&(data->Lock), flags);
  1282. SPRINTF("SDTR status\n");
  1283. for (id = 0; id < ARRAY_SIZE(data->target); id++) {
  1284. SPRINTF("id %d: ", id);
  1285. if (id == host->this_id) {
  1286. SPRINTF("----- NinjaSCSI-32 host adapter\n");
  1287. continue;
  1288. }
  1289. if (data->target[id].sync_flag == SDTR_DONE) {
  1290. if (data->target[id].period == 0 &&
  1291. data->target[id].offset == ASYNC_OFFSET ) {
  1292. SPRINTF("async");
  1293. } else {
  1294. SPRINTF(" sync");
  1295. }
  1296. } else {
  1297. SPRINTF(" none");
  1298. }
  1299. if (data->target[id].period != 0) {
  1300. speed = 1000000 / (data->target[id].period * 4);
  1301. SPRINTF(" transfer %d.%dMB/s, offset %d",
  1302. speed / 1000,
  1303. speed % 1000,
  1304. data->target[id].offset
  1305. );
  1306. }
  1307. SPRINTF("\n");
  1308. }
  1309. thislength = pos - (buffer + offset);
  1310. if(thislength < 0) {
  1311. *start = NULL;
  1312. return 0;
  1313. }
  1314. thislength = min(thislength, length);
  1315. *start = buffer + offset;
  1316. return thislength;
  1317. }
  1318. #undef SPRINTF
  1319. /*
  1320. * Reset parameters and call scsi_done for data->cur_lunt.
  1321. * Be careful setting SCpnt->result = DID_* before calling this function.
  1322. */
  1323. static void nsp32_scsi_done(struct scsi_cmnd *SCpnt)
  1324. {
  1325. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  1326. unsigned int base = SCpnt->device->host->io_port;
  1327. scsi_dma_unmap(SCpnt);
  1328. /*
  1329. * clear TRANSFERCONTROL_BM_START
  1330. */
  1331. nsp32_write2(base, TRANSFER_CONTROL, 0);
  1332. nsp32_write4(base, BM_CNT, 0);
  1333. /*
  1334. * call scsi_done
  1335. */
  1336. (*SCpnt->scsi_done)(SCpnt);
  1337. /*
  1338. * reset parameters
  1339. */
  1340. data->cur_lunt->SCpnt = NULL;
  1341. data->cur_lunt = NULL;
  1342. data->cur_target = NULL;
  1343. data->CurrentSC = NULL;
  1344. }
  1345. /*
  1346. * Bus Free Occur
  1347. *
  1348. * Current Phase is BUSFREE. AutoSCSI is automatically execute BUSFREE phase
  1349. * with ACK reply when below condition is matched:
  1350. * MsgIn 00: Command Complete.
  1351. * MsgIn 02: Save Data Pointer.
  1352. * MsgIn 04: Diconnect.
  1353. * In other case, unexpected BUSFREE is detected.
  1354. */
  1355. static int nsp32_busfree_occur(struct scsi_cmnd *SCpnt, unsigned short execph)
  1356. {
  1357. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  1358. unsigned int base = SCpnt->device->host->io_port;
  1359. nsp32_dbg(NSP32_DEBUG_BUSFREE, "enter execph=0x%x", execph);
  1360. show_autophase(execph);
  1361. nsp32_write4(base, BM_CNT, 0);
  1362. nsp32_write2(base, TRANSFER_CONTROL, 0);
  1363. /*
  1364. * MsgIn 02: Save Data Pointer
  1365. *
  1366. * VALID:
  1367. * Save Data Pointer is received. Adjust pointer.
  1368. *
  1369. * NO-VALID:
  1370. * SCSI-3 says if Save Data Pointer is not received, then we restart
  1371. * processing and we can't adjust any SCSI data pointer in next data
  1372. * phase.
  1373. */
  1374. if (execph & MSGIN_02_VALID) {
  1375. nsp32_dbg(NSP32_DEBUG_BUSFREE, "MsgIn02_Valid");
  1376. /*
  1377. * Check sack_cnt/saved_sack_cnt, then adjust sg table if
  1378. * needed.
  1379. */
  1380. if (!(execph & MSGIN_00_VALID) &&
  1381. ((execph & DATA_IN_PHASE) || (execph & DATA_OUT_PHASE))) {
  1382. unsigned int sacklen, s_sacklen;
  1383. /*
  1384. * Read SACK count and SAVEDSACK count, then compare.
  1385. */
  1386. sacklen = nsp32_read4(base, SACK_CNT );
  1387. s_sacklen = nsp32_read4(base, SAVED_SACK_CNT);
  1388. /*
  1389. * If SAVEDSACKCNT == 0, it means SavedDataPointer is
  1390. * come after data transferring.
  1391. */
  1392. if (s_sacklen > 0) {
  1393. /*
  1394. * Comparing between sack and savedsack to
  1395. * check the condition of AutoMsgIn03.
  1396. *
  1397. * If they are same, set msgin03 == TRUE,
  1398. * COMMANDCONTROL_AUTO_MSGIN_03 is enabled at
  1399. * reselection. On the other hand, if they
  1400. * aren't same, set msgin03 == FALSE, and
  1401. * COMMANDCONTROL_AUTO_MSGIN_03 is disabled at
  1402. * reselection.
  1403. */
  1404. if (sacklen != s_sacklen) {
  1405. data->cur_lunt->msgin03 = FALSE;
  1406. } else {
  1407. data->cur_lunt->msgin03 = TRUE;
  1408. }
  1409. nsp32_adjust_busfree(SCpnt, s_sacklen);
  1410. }
  1411. }
  1412. /* This value has not substitude with valid value yet... */
  1413. //data->cur_lunt->save_datp = data->cur_datp;
  1414. } else {
  1415. /*
  1416. * no processing.
  1417. */
  1418. }
  1419. if (execph & MSGIN_03_VALID) {
  1420. /* MsgIn03 was valid to be processed. No need processing. */
  1421. }
  1422. /*
  1423. * target SDTR check
  1424. */
  1425. if (data->cur_target->sync_flag & SDTR_INITIATOR) {
  1426. /*
  1427. * SDTR negotiation pulled by the initiator has not
  1428. * finished yet. Fall back to ASYNC mode.
  1429. */
  1430. nsp32_set_async(data, data->cur_target);
  1431. data->cur_target->sync_flag &= ~SDTR_INITIATOR;
  1432. data->cur_target->sync_flag |= SDTR_DONE;
  1433. } else if (data->cur_target->sync_flag & SDTR_TARGET) {
  1434. /*
  1435. * SDTR negotiation pulled by the target has been
  1436. * negotiating.
  1437. */
  1438. if (execph & (MSGIN_00_VALID | MSGIN_04_VALID)) {
  1439. /*
  1440. * If valid message is received, then
  1441. * negotiation is succeeded.
  1442. */
  1443. } else {
  1444. /*
  1445. * On the contrary, if unexpected bus free is
  1446. * occurred, then negotiation is failed. Fall
  1447. * back to ASYNC mode.
  1448. */
  1449. nsp32_set_async(data, data->cur_target);
  1450. }
  1451. data->cur_target->sync_flag &= ~SDTR_TARGET;
  1452. data->cur_target->sync_flag |= SDTR_DONE;
  1453. }
  1454. /*
  1455. * It is always ensured by SCSI standard that initiator
  1456. * switches into Bus Free Phase after
  1457. * receiving message 00 (Command Complete), 04 (Disconnect).
  1458. * It's the reason that processing here is valid.
  1459. */
  1460. if (execph & MSGIN_00_VALID) {
  1461. /* MsgIn 00: Command Complete */
  1462. nsp32_dbg(NSP32_DEBUG_BUSFREE, "command complete");
  1463. SCpnt->SCp.Status = nsp32_read1(base, SCSI_CSB_IN);
  1464. SCpnt->SCp.Message = 0;
  1465. nsp32_dbg(NSP32_DEBUG_BUSFREE,
  1466. "normal end stat=0x%x resid=0x%x\n",
  1467. SCpnt->SCp.Status, scsi_get_resid(SCpnt));
  1468. SCpnt->result = (DID_OK << 16) |
  1469. (SCpnt->SCp.Message << 8) |
  1470. (SCpnt->SCp.Status << 0);
  1471. nsp32_scsi_done(SCpnt);
  1472. /* All operation is done */
  1473. return TRUE;
  1474. } else if (execph & MSGIN_04_VALID) {
  1475. /* MsgIn 04: Disconnect */
  1476. SCpnt->SCp.Status = nsp32_read1(base, SCSI_CSB_IN);
  1477. SCpnt->SCp.Message = 4;
  1478. nsp32_dbg(NSP32_DEBUG_BUSFREE, "disconnect");
  1479. return TRUE;
  1480. } else {
  1481. /* Unexpected bus free */
  1482. nsp32_msg(KERN_WARNING, "unexpected bus free occurred");
  1483. /* DID_ERROR? */
  1484. //SCpnt->result = (DID_OK << 16) | (SCpnt->SCp.Message << 8) | (SCpnt->SCp.Status << 0);
  1485. SCpnt->result = DID_ERROR << 16;
  1486. nsp32_scsi_done(SCpnt);
  1487. return TRUE;
  1488. }
  1489. return FALSE;
  1490. }
  1491. /*
  1492. * nsp32_adjust_busfree - adjusting SG table
  1493. *
  1494. * Note: This driver adjust the SG table using SCSI ACK
  1495. * counter instead of BMCNT counter!
  1496. */
  1497. static void nsp32_adjust_busfree(struct scsi_cmnd *SCpnt, unsigned int s_sacklen)
  1498. {
  1499. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  1500. int old_entry = data->cur_entry;
  1501. int new_entry;
  1502. int sg_num = data->cur_lunt->sg_num;
  1503. nsp32_sgtable *sgt = data->cur_lunt->sglun->sgt;
  1504. unsigned int restlen, sentlen;
  1505. u32_le len, addr;
  1506. nsp32_dbg(NSP32_DEBUG_SGLIST, "old resid=0x%x", scsi_get_resid(SCpnt));
  1507. /* adjust saved SACK count with 4 byte start address boundary */
  1508. s_sacklen -= le32_to_cpu(sgt[old_entry].addr) & 3;
  1509. /*
  1510. * calculate new_entry from sack count and each sgt[].len
  1511. * calculate the byte which is intent to send
  1512. */
  1513. sentlen = 0;
  1514. for (new_entry = old_entry; new_entry < sg_num; new_entry++) {
  1515. sentlen += (le32_to_cpu(sgt[new_entry].len) & ~SGTEND);
  1516. if (sentlen > s_sacklen) {
  1517. break;
  1518. }
  1519. }
  1520. /* all sgt is processed */
  1521. if (new_entry == sg_num) {
  1522. goto last;
  1523. }
  1524. if (sentlen == s_sacklen) {
  1525. /* XXX: confirm it's ok or not */
  1526. /* In this case, it's ok because we are at
  1527. the head element of the sg. restlen is correctly calculated. */
  1528. }
  1529. /* calculate the rest length for transferring */
  1530. restlen = sentlen - s_sacklen;
  1531. /* update adjusting current SG table entry */
  1532. len = le32_to_cpu(sgt[new_entry].len);
  1533. addr = le32_to_cpu(sgt[new_entry].addr);
  1534. addr += (len - restlen);
  1535. sgt[new_entry].addr = cpu_to_le32(addr);
  1536. sgt[new_entry].len = cpu_to_le32(restlen);
  1537. /* set cur_entry with new_entry */
  1538. data->cur_entry = new_entry;
  1539. return;
  1540. last:
  1541. if (scsi_get_resid(SCpnt) < sentlen) {
  1542. nsp32_msg(KERN_ERR, "resid underflow");
  1543. }
  1544. scsi_set_resid(SCpnt, scsi_get_resid(SCpnt) - sentlen);
  1545. nsp32_dbg(NSP32_DEBUG_SGLIST, "new resid=0x%x", scsi_get_resid(SCpnt));
  1546. /* update hostdata and lun */
  1547. return;
  1548. }
  1549. /*
  1550. * It's called MsgOut phase occur.
  1551. * NinjaSCSI-32Bi/UDE automatically processes up to 3 messages in
  1552. * message out phase. It, however, has more than 3 messages,
  1553. * HBA creates the interrupt and we have to process by hand.
  1554. */
  1555. static void nsp32_msgout_occur(struct scsi_cmnd *SCpnt)
  1556. {
  1557. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  1558. unsigned int base = SCpnt->device->host->io_port;
  1559. //unsigned short command;
  1560. long new_sgtp;
  1561. int i;
  1562. nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR,
  1563. "enter: msgout_len: 0x%x", data->msgout_len);
  1564. /*
  1565. * If MsgOut phase is occurred without having any
  1566. * message, then No_Operation is sent (SCSI-2).
  1567. */
  1568. if (data->msgout_len == 0) {
  1569. nsp32_build_nop(SCpnt);
  1570. }
  1571. /*
  1572. * Set SGTP ADDR current entry for restarting AUTOSCSI,
  1573. * because SGTP is incremented next point.
  1574. * There is few statement in the specification...
  1575. */
  1576. new_sgtp = data->cur_lunt->sglun_paddr +
  1577. (data->cur_lunt->cur_entry * sizeof(nsp32_sgtable));
  1578. /*
  1579. * send messages
  1580. */
  1581. for (i = 0; i < data->msgout_len; i++) {
  1582. nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR,
  1583. "%d : 0x%x", i, data->msgoutbuf[i]);
  1584. /*
  1585. * Check REQ is asserted.
  1586. */
  1587. nsp32_wait_req(data, ASSERT);
  1588. if (i == (data->msgout_len - 1)) {
  1589. /*
  1590. * If the last message, set the AutoSCSI restart
  1591. * before send back the ack message. AutoSCSI
  1592. * restart automatically negate ATN signal.
  1593. */
  1594. //command = (AUTO_MSGIN_00_OR_04 | AUTO_MSGIN_02);
  1595. //nsp32_restart_autoscsi(SCpnt, command);
  1596. nsp32_write2(base, COMMAND_CONTROL,
  1597. (CLEAR_CDB_FIFO_POINTER |
  1598. AUTO_COMMAND_PHASE |
  1599. AUTOSCSI_RESTART |
  1600. AUTO_MSGIN_00_OR_04 |
  1601. AUTO_MSGIN_02 ));
  1602. }
  1603. /*
  1604. * Write data with SACK, then wait sack is
  1605. * automatically negated.
  1606. */
  1607. nsp32_write1(base, SCSI_DATA_WITH_ACK, data->msgoutbuf[i]);
  1608. nsp32_wait_sack(data, NEGATE);
  1609. nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR, "bus: 0x%x\n",
  1610. nsp32_read1(base, SCSI_BUS_MONITOR));
  1611. };
  1612. data->msgout_len = 0;
  1613. nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR, "exit");
  1614. }
  1615. /*
  1616. * Restart AutoSCSI
  1617. *
  1618. * Note: Restarting AutoSCSI needs set:
  1619. * SYNC_REG, ACK_WIDTH, SGT_ADR, TRANSFER_CONTROL
  1620. */
  1621. static void nsp32_restart_autoscsi(struct scsi_cmnd *SCpnt, unsigned short command)
  1622. {
  1623. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  1624. unsigned int base = data->BaseAddress;
  1625. unsigned short transfer = 0;
  1626. nsp32_dbg(NSP32_DEBUG_RESTART, "enter");
  1627. if (data->cur_target == NULL || data->cur_lunt == NULL) {
  1628. nsp32_msg(KERN_ERR, "Target or Lun is invalid");
  1629. }
  1630. /*
  1631. * set SYNC_REG
  1632. * Don't set BM_START_ADR before setting this register.
  1633. */
  1634. nsp32_write1(base, SYNC_REG, data->cur_target->syncreg);
  1635. /*
  1636. * set ACKWIDTH
  1637. */
  1638. nsp32_write1(base, ACK_WIDTH, data->cur_target->ackwidth);
  1639. /*
  1640. * set SREQ hazard killer sampling rate
  1641. */
  1642. nsp32_write1(base, SREQ_SMPL_RATE, data->cur_target->sample_reg);
  1643. /*
  1644. * set SGT ADDR (physical address)
  1645. */
  1646. nsp32_write4(base, SGT_ADR, data->cur_lunt->sglun_paddr);
  1647. /*
  1648. * set TRANSFER CONTROL REG
  1649. */
  1650. transfer = 0;
  1651. transfer |= (TRANSFER_GO | ALL_COUNTER_CLR);
  1652. if (data->trans_method & NSP32_TRANSFER_BUSMASTER) {
  1653. if (scsi_bufflen(SCpnt) > 0) {
  1654. transfer |= BM_START;
  1655. }
  1656. } else if (data->trans_method & NSP32_TRANSFER_MMIO) {
  1657. transfer |= CB_MMIO_MODE;
  1658. } else if (data->trans_method & NSP32_TRANSFER_PIO) {
  1659. transfer |= CB_IO_MODE;
  1660. }
  1661. nsp32_write2(base, TRANSFER_CONTROL, transfer);
  1662. /*
  1663. * restart AutoSCSI
  1664. *
  1665. * TODO: COMMANDCONTROL_AUTO_COMMAND_PHASE is needed ?
  1666. */
  1667. command |= (CLEAR_CDB_FIFO_POINTER |
  1668. AUTO_COMMAND_PHASE |
  1669. AUTOSCSI_RESTART );
  1670. nsp32_write2(base, COMMAND_CONTROL, command);
  1671. nsp32_dbg(NSP32_DEBUG_RESTART, "exit");
  1672. }
  1673. /*
  1674. * cannot run automatically message in occur
  1675. */
  1676. static void nsp32_msgin_occur(struct scsi_cmnd *SCpnt,
  1677. unsigned long irq_status,
  1678. unsigned short execph)
  1679. {
  1680. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  1681. unsigned int base = SCpnt->device->host->io_port;
  1682. unsigned char msg;
  1683. unsigned char msgtype;
  1684. unsigned char newlun;
  1685. unsigned short command = 0;
  1686. int msgclear = TRUE;
  1687. long new_sgtp;
  1688. int ret;
  1689. /*
  1690. * read first message
  1691. * Use SCSIDATA_W_ACK instead of SCSIDATAIN, because the procedure
  1692. * of Message-In have to be processed before sending back SCSI ACK.
  1693. */
  1694. msg = nsp32_read1(base, SCSI_DATA_IN);
  1695. data->msginbuf[(unsigned char)data->msgin_len] = msg;
  1696. msgtype = data->msginbuf[0];
  1697. nsp32_dbg(NSP32_DEBUG_MSGINOCCUR,
  1698. "enter: msglen: 0x%x msgin: 0x%x msgtype: 0x%x",
  1699. data->msgin_len, msg, msgtype);
  1700. /*
  1701. * TODO: We need checking whether bus phase is message in?
  1702. */
  1703. /*
  1704. * assert SCSI ACK
  1705. */
  1706. nsp32_sack_assert(data);
  1707. /*
  1708. * processing IDENTIFY
  1709. */
  1710. if (msgtype & 0x80) {
  1711. if (!(irq_status & IRQSTATUS_RESELECT_OCCUER)) {
  1712. /* Invalid (non reselect) phase */
  1713. goto reject;
  1714. }
  1715. newlun = msgtype & 0x1f; /* TODO: SPI-3 compliant? */
  1716. ret = nsp32_reselection(SCpnt, newlun);
  1717. if (ret == TRUE) {
  1718. goto restart;
  1719. } else {
  1720. goto reject;
  1721. }
  1722. }
  1723. /*
  1724. * processing messages except for IDENTIFY
  1725. *
  1726. * TODO: Messages are all SCSI-2 terminology. SCSI-3 compliance is TODO.
  1727. */
  1728. switch (msgtype) {
  1729. /*
  1730. * 1-byte message
  1731. */
  1732. case COMMAND_COMPLETE:
  1733. case DISCONNECT:
  1734. /*
  1735. * These messages should not be occurred.
  1736. * They should be processed on AutoSCSI sequencer.
  1737. */
  1738. nsp32_msg(KERN_WARNING,
  1739. "unexpected message of AutoSCSI MsgIn: 0x%x", msg);
  1740. break;
  1741. case RESTORE_POINTERS:
  1742. /*
  1743. * AutoMsgIn03 is disabled, and HBA gets this message.
  1744. */
  1745. if ((execph & DATA_IN_PHASE) || (execph & DATA_OUT_PHASE)) {
  1746. unsigned int s_sacklen;
  1747. s_sacklen = nsp32_read4(base, SAVED_SACK_CNT);
  1748. if ((execph & MSGIN_02_VALID) && (s_sacklen > 0)) {
  1749. nsp32_adjust_busfree(SCpnt, s_sacklen);
  1750. } else {
  1751. /* No need to rewrite SGT */
  1752. }
  1753. }
  1754. data->cur_lunt->msgin03 = FALSE;
  1755. /* Update with the new value */
  1756. /* reset SACK/SavedACK counter (or ALL clear?) */
  1757. nsp32_write4(base, CLR_COUNTER, CLRCOUNTER_ALLMASK);
  1758. /*
  1759. * set new sg pointer
  1760. */
  1761. new_sgtp = data->cur_lunt->sglun_paddr +
  1762. (data->cur_lunt->cur_entry * sizeof(nsp32_sgtable));
  1763. nsp32_write4(base, SGT_ADR, new_sgtp);
  1764. break;
  1765. case SAVE_POINTERS:
  1766. /*
  1767. * These messages should not be occurred.
  1768. * They should be processed on AutoSCSI sequencer.
  1769. */
  1770. nsp32_msg (KERN_WARNING,
  1771. "unexpected message of AutoSCSI MsgIn: SAVE_POINTERS");
  1772. break;
  1773. case MESSAGE_REJECT:
  1774. /* If previous message_out is sending SDTR, and get
  1775. message_reject from target, SDTR negotiation is failed */
  1776. if (data->cur_target->sync_flag &
  1777. (SDTR_INITIATOR | SDTR_TARGET)) {
  1778. /*
  1779. * Current target is negotiating SDTR, but it's
  1780. * failed. Fall back to async transfer mode, and set
  1781. * SDTR_DONE.
  1782. */
  1783. nsp32_set_async(data, data->cur_target);
  1784. data->cur_target->sync_flag &= ~SDTR_INITIATOR;
  1785. data->cur_target->sync_flag |= SDTR_DONE;
  1786. }
  1787. break;
  1788. case LINKED_CMD_COMPLETE:
  1789. case LINKED_FLG_CMD_COMPLETE:
  1790. /* queue tag is not supported currently */
  1791. nsp32_msg (KERN_WARNING,
  1792. "unsupported message: 0x%x", msgtype);
  1793. break;
  1794. case INITIATE_RECOVERY:
  1795. /* staring ECA (Extended Contingent Allegiance) state. */
  1796. /* This message is declined in SPI2 or later. */
  1797. goto reject;
  1798. /*
  1799. * 2-byte message
  1800. */
  1801. case SIMPLE_QUEUE_TAG:
  1802. case 0x23:
  1803. /*
  1804. * 0x23: Ignore_Wide_Residue is not declared in scsi.h.
  1805. * No support is needed.
  1806. */
  1807. if (data->msgin_len >= 1) {
  1808. goto reject;
  1809. }
  1810. /* current position is 1-byte of 2 byte */
  1811. msgclear = FALSE;
  1812. break;
  1813. /*
  1814. * extended message
  1815. */
  1816. case EXTENDED_MESSAGE:
  1817. if (data->msgin_len < 1) {
  1818. /*
  1819. * Current position does not reach 2-byte
  1820. * (2-byte is extended message length).
  1821. */
  1822. msgclear = FALSE;
  1823. break;
  1824. }
  1825. if ((data->msginbuf[1] + 1) > data->msgin_len) {
  1826. /*
  1827. * Current extended message has msginbuf[1] + 2
  1828. * (msgin_len starts counting from 0, so buf[1] + 1).
  1829. * If current message position is not finished,
  1830. * continue receiving message.
  1831. */
  1832. msgclear = FALSE;
  1833. break;
  1834. }
  1835. /*
  1836. * Reach here means regular length of each type of
  1837. * extended messages.
  1838. */
  1839. switch (data->msginbuf[2]) {
  1840. case EXTENDED_MODIFY_DATA_POINTER:
  1841. /* TODO */
  1842. goto reject; /* not implemented yet */
  1843. break;
  1844. case EXTENDED_SDTR:
  1845. /*
  1846. * Exchange this message between initiator and target.
  1847. */
  1848. if (data->msgin_len != EXTENDED_SDTR_LEN + 1) {
  1849. /*
  1850. * received inappropriate message.
  1851. */
  1852. goto reject;
  1853. break;
  1854. }
  1855. nsp32_analyze_sdtr(SCpnt);
  1856. break;
  1857. case EXTENDED_EXTENDED_IDENTIFY:
  1858. /* SCSI-I only, not supported. */
  1859. goto reject; /* not implemented yet */
  1860. break;
  1861. case EXTENDED_WDTR:
  1862. goto reject; /* not implemented yet */
  1863. break;
  1864. default:
  1865. goto reject;
  1866. }
  1867. break;
  1868. default:
  1869. goto reject;
  1870. }
  1871. restart:
  1872. if (msgclear == TRUE) {
  1873. data->msgin_len = 0;
  1874. /*
  1875. * If restarting AutoSCSI, but there are some message to out
  1876. * (msgout_len > 0), set AutoATN, and set SCSIMSGOUT as 0
  1877. * (MV_VALID = 0). When commandcontrol is written with
  1878. * AutoSCSI restart, at the same time MsgOutOccur should be
  1879. * happened (however, such situation is really possible...?).
  1880. */
  1881. if (data->msgout_len > 0) {
  1882. nsp32_write4(base, SCSI_MSG_OUT, 0);
  1883. command |= AUTO_ATN;
  1884. }
  1885. /*
  1886. * restart AutoSCSI
  1887. * If it's failed, COMMANDCONTROL_AUTO_COMMAND_PHASE is needed.
  1888. */
  1889. command |= (AUTO_MSGIN_00_OR_04 | AUTO_MSGIN_02);
  1890. /*
  1891. * If current msgin03 is TRUE, then flag on.
  1892. */
  1893. if (data->cur_lunt->msgin03 == TRUE) {
  1894. command |= AUTO_MSGIN_03;
  1895. }
  1896. data->cur_lunt->msgin03 = FALSE;
  1897. } else {
  1898. data->msgin_len++;
  1899. }
  1900. /*
  1901. * restart AutoSCSI
  1902. */
  1903. nsp32_restart_autoscsi(SCpnt, command);
  1904. /*
  1905. * wait SCSI REQ negate for REQ-ACK handshake
  1906. */
  1907. nsp32_wait_req(data, NEGATE);
  1908. /*
  1909. * negate SCSI ACK
  1910. */
  1911. nsp32_sack_negate(data);
  1912. nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "exit");
  1913. return;
  1914. reject:
  1915. nsp32_msg(KERN_WARNING,
  1916. "invalid or unsupported MessageIn, rejected. "
  1917. "current msg: 0x%x (len: 0x%x), processing msg: 0x%x",
  1918. msg, data->msgin_len, msgtype);
  1919. nsp32_build_reject(SCpnt);
  1920. data->msgin_len = 0;
  1921. goto restart;
  1922. }
  1923. /*
  1924. *
  1925. */
  1926. static void nsp32_analyze_sdtr(struct scsi_cmnd *SCpnt)
  1927. {
  1928. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  1929. nsp32_target *target = data->cur_target;
  1930. nsp32_sync_table *synct;
  1931. unsigned char get_period = data->msginbuf[3];
  1932. unsigned char get_offset = data->msginbuf[4];
  1933. int entry;
  1934. int syncnum;
  1935. nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "enter");
  1936. synct = data->synct;
  1937. syncnum = data->syncnum;
  1938. /*
  1939. * If this inititor sent the SDTR message, then target responds SDTR,
  1940. * initiator SYNCREG, ACKWIDTH from SDTR parameter.
  1941. * Messages are not appropriate, then send back reject message.
  1942. * If initiator did not send the SDTR, but target sends SDTR,
  1943. * initiator calculator the appropriate parameter and send back SDTR.
  1944. */
  1945. if (target->sync_flag & SDTR_INITIATOR) {
  1946. /*
  1947. * Initiator sent SDTR, the target responds and
  1948. * send back negotiation SDTR.
  1949. */
  1950. nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "target responds SDTR");
  1951. target->sync_flag &= ~SDTR_INITIATOR;
  1952. target->sync_flag |= SDTR_DONE;
  1953. /*
  1954. * offset:
  1955. */
  1956. if (get_offset > SYNC_OFFSET) {
  1957. /*
  1958. * Negotiation is failed, the target send back
  1959. * unexpected offset value.
  1960. */
  1961. goto reject;
  1962. }
  1963. if (get_offset == ASYNC_OFFSET) {
  1964. /*
  1965. * Negotiation is succeeded, the target want
  1966. * to fall back into asynchronous transfer mode.
  1967. */
  1968. goto async;
  1969. }
  1970. /*
  1971. * period:
  1972. * Check whether sync period is too short. If too short,
  1973. * fall back to async mode. If it's ok, then investigate
  1974. * the received sync period. If sync period is acceptable
  1975. * between sync table start_period and end_period, then
  1976. * set this I_T nexus as sent offset and period.
  1977. * If it's not acceptable, send back reject and fall back
  1978. * to async mode.
  1979. */
  1980. if (get_period < data->synct[0].period_num) {
  1981. /*
  1982. * Negotiation is failed, the target send back
  1983. * unexpected period value.
  1984. */
  1985. goto reject;
  1986. }
  1987. entry = nsp32_search_period_entry(data, target, get_period);
  1988. if (entry < 0) {
  1989. /*
  1990. * Target want to use long period which is not
  1991. * acceptable NinjaSCSI-32Bi/UDE.
  1992. */
  1993. goto reject;
  1994. }
  1995. /*
  1996. * Set new sync table and offset in this I_T nexus.
  1997. */
  1998. nsp32_set_sync_entry(data, target, entry, get_offset);
  1999. } else {
  2000. /* Target send SDTR to initiator. */
  2001. nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "target send SDTR");
  2002. target->sync_flag |= SDTR_INITIATOR;
  2003. /* offset: */
  2004. if (get_offset > SYNC_OFFSET) {
  2005. /* send back as SYNC_OFFSET */
  2006. get_offset = SYNC_OFFSET;
  2007. }
  2008. /* period: */
  2009. if (get_period < data->synct[0].period_num) {
  2010. get_period = data->synct[0].period_num;
  2011. }
  2012. entry = nsp32_search_period_entry(data, target, get_period);
  2013. if (get_offset == ASYNC_OFFSET || entry < 0) {
  2014. nsp32_set_async(data, target);
  2015. nsp32_build_sdtr(SCpnt, 0, ASYNC_OFFSET);
  2016. } else {
  2017. nsp32_set_sync_entry(data, target, entry, get_offset);
  2018. nsp32_build_sdtr(SCpnt, get_period, get_offset);
  2019. }
  2020. }
  2021. target->period = get_period;
  2022. nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "exit");
  2023. return;
  2024. reject:
  2025. /*
  2026. * If the current message is unacceptable, send back to the target
  2027. * with reject message.
  2028. */
  2029. nsp32_build_reject(SCpnt);
  2030. async:
  2031. nsp32_set_async(data, target); /* set as ASYNC transfer mode */
  2032. target->period = 0;
  2033. nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "exit: set async");
  2034. return;
  2035. }
  2036. /*
  2037. * Search config entry number matched in sync_table from given
  2038. * target and speed period value. If failed to search, return negative value.
  2039. */
  2040. static int nsp32_search_period_entry(nsp32_hw_data *data,
  2041. nsp32_target *target,
  2042. unsigned char period)
  2043. {
  2044. int i;
  2045. if (target->limit_entry >= data->syncnum) {
  2046. nsp32_msg(KERN_ERR, "limit_entry exceeds syncnum!");
  2047. target->limit_entry = 0;
  2048. }
  2049. for (i = target->limit_entry; i < data->syncnum; i++) {
  2050. if (period >= data->synct[i].start_period &&
  2051. period <= data->synct[i].end_period) {
  2052. break;
  2053. }
  2054. }
  2055. /*
  2056. * Check given period value is over the sync_table value.
  2057. * If so, return max value.
  2058. */
  2059. if (i == data->syncnum) {
  2060. i = -1;
  2061. }
  2062. return i;
  2063. }
  2064. /*
  2065. * target <-> initiator use ASYNC transfer
  2066. */
  2067. static void nsp32_set_async(nsp32_hw_data *data, nsp32_target *target)
  2068. {
  2069. unsigned char period = data->synct[target->limit_entry].period_num;
  2070. target->offset = ASYNC_OFFSET;
  2071. target->period = 0;
  2072. target->syncreg = TO_SYNCREG(period, ASYNC_OFFSET);
  2073. target->ackwidth = 0;
  2074. target->sample_reg = 0;
  2075. nsp32_dbg(NSP32_DEBUG_SYNC, "set async");
  2076. }
  2077. /*
  2078. * target <-> initiator use maximum SYNC transfer
  2079. */
  2080. static void nsp32_set_max_sync(nsp32_hw_data *data,
  2081. nsp32_target *target,
  2082. unsigned char *period,
  2083. unsigned char *offset)
  2084. {
  2085. unsigned char period_num, ackwidth;
  2086. period_num = data->synct[target->limit_entry].period_num;
  2087. *period = data->synct[target->limit_entry].start_period;
  2088. ackwidth = data->synct[target->limit_entry].ackwidth;
  2089. *offset = SYNC_OFFSET;
  2090. target->syncreg = TO_SYNCREG(period_num, *offset);
  2091. target->ackwidth = ackwidth;
  2092. target->offset = *offset;
  2093. target->sample_reg = 0; /* disable SREQ sampling */
  2094. }
  2095. /*
  2096. * target <-> initiator use entry number speed
  2097. */
  2098. static void nsp32_set_sync_entry(nsp32_hw_data *data,
  2099. nsp32_target *target,
  2100. int entry,
  2101. unsigned char offset)
  2102. {
  2103. unsigned char period, ackwidth, sample_rate;
  2104. period = data->synct[entry].period_num;
  2105. ackwidth = data->synct[entry].ackwidth;
  2106. offset = offset;
  2107. sample_rate = data->synct[entry].sample_rate;
  2108. target->syncreg = TO_SYNCREG(period, offset);
  2109. target->ackwidth = ackwidth;
  2110. target->offset = offset;
  2111. target->sample_reg = sample_rate | SAMPLING_ENABLE;
  2112. nsp32_dbg(NSP32_DEBUG_SYNC, "set sync");
  2113. }
  2114. /*
  2115. * It waits until SCSI REQ becomes assertion or negation state.
  2116. *
  2117. * Note: If nsp32_msgin_occur is called, we asserts SCSI ACK. Then
  2118. * connected target responds SCSI REQ negation. We have to wait
  2119. * SCSI REQ becomes negation in order to negate SCSI ACK signal for
  2120. * REQ-ACK handshake.
  2121. */
  2122. static void nsp32_wait_req(nsp32_hw_data *data, int state)
  2123. {
  2124. unsigned int base = data->BaseAddress;
  2125. int wait_time = 0;
  2126. unsigned char bus, req_bit;
  2127. if (!((state == ASSERT) || (state == NEGATE))) {
  2128. nsp32_msg(KERN_ERR, "unknown state designation");
  2129. }
  2130. /* REQ is BIT(5) */
  2131. req_bit = (state == ASSERT ? BUSMON_REQ : 0);
  2132. do {
  2133. bus = nsp32_read1(base, SCSI_BUS_MONITOR);
  2134. if ((bus & BUSMON_REQ) == req_bit) {
  2135. nsp32_dbg(NSP32_DEBUG_WAIT,
  2136. "wait_time: %d", wait_time);
  2137. return;
  2138. }
  2139. udelay(1);
  2140. wait_time++;
  2141. } while (wait_time < REQSACK_TIMEOUT_TIME);
  2142. nsp32_msg(KERN_WARNING, "wait REQ timeout, req_bit: 0x%x", req_bit);
  2143. }
  2144. /*
  2145. * It waits until SCSI SACK becomes assertion or negation state.
  2146. */
  2147. static void nsp32_wait_sack(nsp32_hw_data *data, int state)
  2148. {
  2149. unsigned int base = data->BaseAddress;
  2150. int wait_time = 0;
  2151. unsigned char bus, ack_bit;
  2152. if (!((state == ASSERT) || (state == NEGATE))) {
  2153. nsp32_msg(KERN_ERR, "unknown state designation");
  2154. }
  2155. /* ACK is BIT(4) */
  2156. ack_bit = (state == ASSERT ? BUSMON_ACK : 0);
  2157. do {
  2158. bus = nsp32_read1(base, SCSI_BUS_MONITOR);
  2159. if ((bus & BUSMON_ACK) == ack_bit) {
  2160. nsp32_dbg(NSP32_DEBUG_WAIT,
  2161. "wait_time: %d", wait_time);
  2162. return;
  2163. }
  2164. udelay(1);
  2165. wait_time++;
  2166. } while (wait_time < REQSACK_TIMEOUT_TIME);
  2167. nsp32_msg(KERN_WARNING, "wait SACK timeout, ack_bit: 0x%x", ack_bit);
  2168. }
  2169. /*
  2170. * assert SCSI ACK
  2171. *
  2172. * Note: SCSI ACK assertion needs with ACKENB=1, AUTODIRECTION=1.
  2173. */
  2174. static void nsp32_sack_assert(nsp32_hw_data *data)
  2175. {
  2176. unsigned int base = data->BaseAddress;
  2177. unsigned char busctrl;
  2178. busctrl = nsp32_read1(base, SCSI_BUS_CONTROL);
  2179. busctrl |= (BUSCTL_ACK | AUTODIRECTION | ACKENB);
  2180. nsp32_write1(base, SCSI_BUS_CONTROL, busctrl);
  2181. }
  2182. /*
  2183. * negate SCSI ACK
  2184. */
  2185. static void nsp32_sack_negate(nsp32_hw_data *data)
  2186. {
  2187. unsigned int base = data->BaseAddress;
  2188. unsigned char busctrl;
  2189. busctrl = nsp32_read1(base, SCSI_BUS_CONTROL);
  2190. busctrl &= ~BUSCTL_ACK;
  2191. nsp32_write1(base, SCSI_BUS_CONTROL, busctrl);
  2192. }
  2193. /*
  2194. * Note: n_io_port is defined as 0x7f because I/O register port is
  2195. * assigned as:
  2196. * 0x800-0x8ff: memory mapped I/O port
  2197. * 0x900-0xbff: (map same 0x800-0x8ff I/O port image repeatedly)
  2198. * 0xc00-0xfff: CardBus status registers
  2199. */
  2200. static int nsp32_detect(struct pci_dev *pdev)
  2201. {
  2202. struct Scsi_Host *host; /* registered host structure */
  2203. struct resource *res;
  2204. nsp32_hw_data *data;
  2205. int ret;
  2206. int i, j;
  2207. nsp32_dbg(NSP32_DEBUG_REGISTER, "enter");
  2208. /*
  2209. * register this HBA as SCSI device
  2210. */
  2211. host = scsi_host_alloc(&nsp32_template, sizeof(nsp32_hw_data));
  2212. if (host == NULL) {
  2213. nsp32_msg (KERN_ERR, "failed to scsi register");
  2214. goto err;
  2215. }
  2216. /*
  2217. * set nsp32_hw_data
  2218. */
  2219. data = (nsp32_hw_data *)host->hostdata;
  2220. memcpy(data, &nsp32_data_base, sizeof(nsp32_hw_data));
  2221. host->irq = data->IrqNumber;
  2222. host->io_port = data->BaseAddress;
  2223. host->unique_id = data->BaseAddress;
  2224. host->n_io_port = data->NumAddress;
  2225. host->base = (unsigned long)data->MmioAddress;
  2226. data->Host = host;
  2227. spin_lock_init(&(data->Lock));
  2228. data->cur_lunt = NULL;
  2229. data->cur_target = NULL;
  2230. /*
  2231. * Bus master transfer mode is supported currently.
  2232. */
  2233. data->trans_method = NSP32_TRANSFER_BUSMASTER;
  2234. /*
  2235. * Set clock div, CLOCK_4 (HBA has own external clock, and
  2236. * dividing * 100ns/4).
  2237. * Currently CLOCK_4 has only tested, not for CLOCK_2/PCICLK yet.
  2238. */
  2239. data->clock = CLOCK_4;
  2240. /*
  2241. * Select appropriate nsp32_sync_table and set I_CLOCKDIV.
  2242. */
  2243. switch (data->clock) {
  2244. case CLOCK_4:
  2245. /* If data->clock is CLOCK_4, then select 40M sync table. */
  2246. data->synct = nsp32_sync_table_40M;
  2247. data->syncnum = ARRAY_SIZE(nsp32_sync_table_40M);
  2248. break;
  2249. case CLOCK_2:
  2250. /* If data->clock is CLOCK_2, then select 20M sync table. */
  2251. data->synct = nsp32_sync_table_20M;
  2252. data->syncnum = ARRAY_SIZE(nsp32_sync_table_20M);
  2253. break;
  2254. case PCICLK:
  2255. /* If data->clock is PCICLK, then select pci sync table. */
  2256. data->synct = nsp32_sync_table_pci;
  2257. data->syncnum = ARRAY_SIZE(nsp32_sync_table_pci);
  2258. break;
  2259. default:
  2260. nsp32_msg(KERN_WARNING,
  2261. "Invalid clock div is selected, set CLOCK_4.");
  2262. /* Use default value CLOCK_4 */
  2263. data->clock = CLOCK_4;
  2264. data->synct = nsp32_sync_table_40M;
  2265. data->syncnum = ARRAY_SIZE(nsp32_sync_table_40M);
  2266. }
  2267. /*
  2268. * setup nsp32_lunt
  2269. */
  2270. /*
  2271. * setup DMA
  2272. */
  2273. if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) {
  2274. nsp32_msg (KERN_ERR, "failed to set PCI DMA mask");
  2275. goto scsi_unregister;
  2276. }
  2277. /*
  2278. * allocate autoparam DMA resource.
  2279. */
  2280. data->autoparam = pci_alloc_consistent(pdev, sizeof(nsp32_autoparam), &(data->auto_paddr));
  2281. if (data->autoparam == NULL) {
  2282. nsp32_msg(KERN_ERR, "failed to allocate DMA memory");
  2283. goto scsi_unregister;
  2284. }
  2285. /*
  2286. * allocate scatter-gather DMA resource.
  2287. */
  2288. data->sg_list = pci_alloc_consistent(pdev, NSP32_SG_TABLE_SIZE,
  2289. &(data->sg_paddr));
  2290. if (data->sg_list == NULL) {
  2291. nsp32_msg(KERN_ERR, "failed to allocate DMA memory");
  2292. goto free_autoparam;
  2293. }
  2294. for (i = 0; i < ARRAY_SIZE(data->lunt); i++) {
  2295. for (j = 0; j < ARRAY_SIZE(data->lunt[0]); j++) {
  2296. int offset = i * ARRAY_SIZE(data->lunt[0]) + j;
  2297. nsp32_lunt tmp = {
  2298. .SCpnt = NULL,
  2299. .save_datp = 0,
  2300. .msgin03 = FALSE,
  2301. .sg_num = 0,
  2302. .cur_entry = 0,
  2303. .sglun = &(data->sg_list[offset]),
  2304. .sglun_paddr = data->sg_paddr + (offset * sizeof(nsp32_sglun)),
  2305. };
  2306. data->lunt[i][j] = tmp;
  2307. }
  2308. }
  2309. /*
  2310. * setup target
  2311. */
  2312. for (i = 0; i < ARRAY_SIZE(data->target); i++) {
  2313. nsp32_target *target = &(data->target[i]);
  2314. target->limit_entry = 0;
  2315. target->sync_flag = 0;
  2316. nsp32_set_async(data, target);
  2317. }
  2318. /*
  2319. * EEPROM check
  2320. */
  2321. ret = nsp32_getprom_param(data);
  2322. if (ret == FALSE) {
  2323. data->resettime = 3; /* default 3 */
  2324. }
  2325. /*
  2326. * setup HBA
  2327. */
  2328. nsp32hw_init(data);
  2329. snprintf(data->info_str, sizeof(data->info_str),
  2330. "NinjaSCSI-32Bi/UDE: irq %d, io 0x%lx+0x%x",
  2331. host->irq, host->io_port, host->n_io_port);
  2332. /*
  2333. * SCSI bus reset
  2334. *
  2335. * Note: It's important to reset SCSI bus in initialization phase.
  2336. * NinjaSCSI-32Bi/UDE HBA EEPROM seems to exchange SDTR when
  2337. * system is coming up, so SCSI devices connected to HBA is set as
  2338. * un-asynchronous mode. It brings the merit that this HBA is
  2339. * ready to start synchronous transfer without any preparation,
  2340. * but we are difficult to control transfer speed. In addition,
  2341. * it prevents device transfer speed from effecting EEPROM start-up
  2342. * SDTR. NinjaSCSI-32Bi/UDE has the feature if EEPROM is set as
  2343. * Auto Mode, then FAST-10M is selected when SCSI devices are
  2344. * connected same or more than 4 devices. It should be avoided
  2345. * depending on this specification. Thus, resetting the SCSI bus
  2346. * restores all connected SCSI devices to asynchronous mode, then
  2347. * this driver set SDTR safely later, and we can control all SCSI
  2348. * device transfer mode.
  2349. */
  2350. nsp32_do_bus_reset(data);
  2351. ret = request_irq(host->irq, do_nsp32_isr, IRQF_SHARED, "nsp32", data);
  2352. if (ret < 0) {
  2353. nsp32_msg(KERN_ERR, "Unable to allocate IRQ for NinjaSCSI32 "
  2354. "SCSI PCI controller. Interrupt: %d", host->irq);
  2355. goto free_sg_list;
  2356. }
  2357. /*
  2358. * PCI IO register
  2359. */
  2360. res = request_region(host->io_port, host->n_io_port, "nsp32");
  2361. if (res == NULL) {
  2362. nsp32_msg(KERN_ERR,
  2363. "I/O region 0x%lx+0x%lx is already used",
  2364. data->BaseAddress, data->NumAddress);
  2365. goto free_irq;
  2366. }
  2367. ret = scsi_add_host(host, &pdev->dev);
  2368. if (ret) {
  2369. nsp32_msg(KERN_ERR, "failed to add scsi host");
  2370. goto free_region;
  2371. }
  2372. scsi_scan_host(host);
  2373. pci_set_drvdata(pdev, host);
  2374. return 0;
  2375. free_region:
  2376. release_region(host->io_port, host->n_io_port);
  2377. free_irq:
  2378. free_irq(host->irq, data);
  2379. free_sg_list:
  2380. pci_free_consistent(pdev, NSP32_SG_TABLE_SIZE,
  2381. data->sg_list, data->sg_paddr);
  2382. free_autoparam:
  2383. pci_free_consistent(pdev, sizeof(nsp32_autoparam),
  2384. data->autoparam, data->auto_paddr);
  2385. scsi_unregister:
  2386. scsi_host_put(host);
  2387. err:
  2388. return 1;
  2389. }
  2390. static int nsp32_release(struct Scsi_Host *host)
  2391. {
  2392. nsp32_hw_data *data = (nsp32_hw_data *)host->hostdata;
  2393. if (data->autoparam) {
  2394. pci_free_consistent(data->Pci, sizeof(nsp32_autoparam),
  2395. data->autoparam, data->auto_paddr);
  2396. }
  2397. if (data->sg_list) {
  2398. pci_free_consistent(data->Pci, NSP32_SG_TABLE_SIZE,
  2399. data->sg_list, data->sg_paddr);
  2400. }
  2401. if (host->irq) {
  2402. free_irq(host->irq, data);
  2403. }
  2404. if (host->io_port && host->n_io_port) {
  2405. release_region(host->io_port, host->n_io_port);
  2406. }
  2407. if (data->MmioAddress) {
  2408. iounmap(data->MmioAddress);
  2409. }
  2410. return 0;
  2411. }
  2412. static const char *nsp32_info(struct Scsi_Host *shpnt)
  2413. {
  2414. nsp32_hw_data *data = (nsp32_hw_data *)shpnt->hostdata;
  2415. return data->info_str;
  2416. }
  2417. /****************************************************************************
  2418. * error handler
  2419. */
  2420. static int nsp32_eh_abort(struct scsi_cmnd *SCpnt)
  2421. {
  2422. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  2423. unsigned int base = SCpnt->device->host->io_port;
  2424. nsp32_msg(KERN_WARNING, "abort");
  2425. if (data->cur_lunt->SCpnt == NULL) {
  2426. nsp32_dbg(NSP32_DEBUG_BUSRESET, "abort failed");
  2427. return FAILED;
  2428. }
  2429. if (data->cur_target->sync_flag & (SDTR_INITIATOR | SDTR_TARGET)) {
  2430. /* reset SDTR negotiation */
  2431. data->cur_target->sync_flag = 0;
  2432. nsp32_set_async(data, data->cur_target);
  2433. }
  2434. nsp32_write2(base, TRANSFER_CONTROL, 0);
  2435. nsp32_write2(base, BM_CNT, 0);
  2436. SCpnt->result = DID_ABORT << 16;
  2437. nsp32_scsi_done(SCpnt);
  2438. nsp32_dbg(NSP32_DEBUG_BUSRESET, "abort success");
  2439. return SUCCESS;
  2440. }
  2441. static int nsp32_eh_bus_reset(struct scsi_cmnd *SCpnt)
  2442. {
  2443. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  2444. unsigned int base = SCpnt->device->host->io_port;
  2445. spin_lock_irq(SCpnt->device->host->host_lock);
  2446. nsp32_msg(KERN_INFO, "Bus Reset");
  2447. nsp32_dbg(NSP32_DEBUG_BUSRESET, "SCpnt=0x%x", SCpnt);
  2448. nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
  2449. nsp32_do_bus_reset(data);
  2450. nsp32_write2(base, IRQ_CONTROL, 0);
  2451. spin_unlock_irq(SCpnt->device->host->host_lock);
  2452. return SUCCESS; /* SCSI bus reset is succeeded at any time. */
  2453. }
  2454. static void nsp32_do_bus_reset(nsp32_hw_data *data)
  2455. {
  2456. unsigned int base = data->BaseAddress;
  2457. unsigned short intrdat;
  2458. int i;
  2459. nsp32_dbg(NSP32_DEBUG_BUSRESET, "in");
  2460. /*
  2461. * stop all transfer
  2462. * clear TRANSFERCONTROL_BM_START
  2463. * clear counter
  2464. */
  2465. nsp32_write2(base, TRANSFER_CONTROL, 0);
  2466. nsp32_write4(base, BM_CNT, 0);
  2467. nsp32_write4(base, CLR_COUNTER, CLRCOUNTER_ALLMASK);
  2468. /*
  2469. * fall back to asynchronous transfer mode
  2470. * initialize SDTR negotiation flag
  2471. */
  2472. for (i = 0; i < ARRAY_SIZE(data->target); i++) {
  2473. nsp32_target *target = &data->target[i];
  2474. target->sync_flag = 0;
  2475. nsp32_set_async(data, target);
  2476. }
  2477. /*
  2478. * reset SCSI bus
  2479. */
  2480. nsp32_write1(base, SCSI_BUS_CONTROL, BUSCTL_RST);
  2481. mdelay(RESET_HOLD_TIME / 1000);
  2482. nsp32_write1(base, SCSI_BUS_CONTROL, 0);
  2483. for(i = 0; i < 5; i++) {
  2484. intrdat = nsp32_read2(base, IRQ_STATUS); /* dummy read */
  2485. nsp32_dbg(NSP32_DEBUG_BUSRESET, "irq:1: 0x%x", intrdat);
  2486. }
  2487. data->CurrentSC = NULL;
  2488. }
  2489. static int nsp32_eh_host_reset(struct scsi_cmnd *SCpnt)
  2490. {
  2491. struct Scsi_Host *host = SCpnt->device->host;
  2492. unsigned int base = SCpnt->device->host->io_port;
  2493. nsp32_hw_data *data = (nsp32_hw_data *)host->hostdata;
  2494. nsp32_msg(KERN_INFO, "Host Reset");
  2495. nsp32_dbg(NSP32_DEBUG_BUSRESET, "SCpnt=0x%x", SCpnt);
  2496. spin_lock_irq(SCpnt->device->host->host_lock);
  2497. nsp32hw_init(data);
  2498. nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
  2499. nsp32_do_bus_reset(data);
  2500. nsp32_write2(base, IRQ_CONTROL, 0);
  2501. spin_unlock_irq(SCpnt->device->host->host_lock);
  2502. return SUCCESS; /* Host reset is succeeded at any time. */
  2503. }
  2504. /**************************************************************************
  2505. * EEPROM handler
  2506. */
  2507. /*
  2508. * getting EEPROM parameter
  2509. */
  2510. static int nsp32_getprom_param(nsp32_hw_data *data)
  2511. {
  2512. int vendor = data->pci_devid->vendor;
  2513. int device = data->pci_devid->device;
  2514. int ret, val, i;
  2515. /*
  2516. * EEPROM checking.
  2517. */
  2518. ret = nsp32_prom_read(data, 0x7e);
  2519. if (ret != 0x55) {
  2520. nsp32_msg(KERN_INFO, "No EEPROM detected: 0x%x", ret);
  2521. return FALSE;
  2522. }
  2523. ret = nsp32_prom_read(data, 0x7f);
  2524. if (ret != 0xaa) {
  2525. nsp32_msg(KERN_INFO, "Invalid number: 0x%x", ret);
  2526. return FALSE;
  2527. }
  2528. /*
  2529. * check EEPROM type
  2530. */
  2531. if (vendor == PCI_VENDOR_ID_WORKBIT &&
  2532. device == PCI_DEVICE_ID_WORKBIT_STANDARD) {
  2533. ret = nsp32_getprom_c16(data);
  2534. } else if (vendor == PCI_VENDOR_ID_WORKBIT &&
  2535. device == PCI_DEVICE_ID_NINJASCSI_32BIB_LOGITEC) {
  2536. ret = nsp32_getprom_at24(data);
  2537. } else if (vendor == PCI_VENDOR_ID_WORKBIT &&
  2538. device == PCI_DEVICE_ID_NINJASCSI_32UDE_MELCO ) {
  2539. ret = nsp32_getprom_at24(data);
  2540. } else {
  2541. nsp32_msg(KERN_WARNING, "Unknown EEPROM");
  2542. ret = FALSE;
  2543. }
  2544. /* for debug : SPROM data full checking */
  2545. for (i = 0; i <= 0x1f; i++) {
  2546. val = nsp32_prom_read(data, i);
  2547. nsp32_dbg(NSP32_DEBUG_EEPROM,
  2548. "rom address 0x%x : 0x%x", i, val);
  2549. }
  2550. return ret;
  2551. }
  2552. /*
  2553. * AT24C01A (Logitec: LHA-600S), AT24C02 (Melco Buffalo: IFC-USLP) data map:
  2554. *
  2555. * ROMADDR
  2556. * 0x00 - 0x06 : Device Synchronous Transfer Period (SCSI ID 0 - 6)
  2557. * Value 0x0: ASYNC, 0x0c: Ultra-20M, 0x19: Fast-10M
  2558. * 0x07 : HBA Synchronous Transfer Period
  2559. * Value 0: AutoSync, 1: Manual Setting
  2560. * 0x08 - 0x0f : Not Used? (0x0)
  2561. * 0x10 : Bus Termination
  2562. * Value 0: Auto[ON], 1: ON, 2: OFF
  2563. * 0x11 : Not Used? (0)
  2564. * 0x12 : Bus Reset Delay Time (0x03)
  2565. * 0x13 : Bootable CD Support
  2566. * Value 0: Disable, 1: Enable
  2567. * 0x14 : Device Scan
  2568. * Bit 7 6 5 4 3 2 1 0
  2569. * | <----------------->
  2570. * | SCSI ID: Value 0: Skip, 1: YES
  2571. * |-> Value 0: ALL scan, Value 1: Manual
  2572. * 0x15 - 0x1b : Not Used? (0)
  2573. * 0x1c : Constant? (0x01) (clock div?)
  2574. * 0x1d - 0x7c : Not Used (0xff)
  2575. * 0x7d : Not Used? (0xff)
  2576. * 0x7e : Constant (0x55), Validity signature
  2577. * 0x7f : Constant (0xaa), Validity signature
  2578. */
  2579. static int nsp32_getprom_at24(nsp32_hw_data *data)
  2580. {
  2581. int ret, i;
  2582. int auto_sync;
  2583. nsp32_target *target;
  2584. int entry;
  2585. /*
  2586. * Reset time which is designated by EEPROM.
  2587. *
  2588. * TODO: Not used yet.
  2589. */
  2590. data->resettime = nsp32_prom_read(data, 0x12);
  2591. /*
  2592. * HBA Synchronous Transfer Period
  2593. *
  2594. * Note: auto_sync = 0: auto, 1: manual. Ninja SCSI HBA spec says
  2595. * that if auto_sync is 0 (auto), and connected SCSI devices are
  2596. * same or lower than 3, then transfer speed is set as ULTRA-20M.
  2597. * On the contrary if connected SCSI devices are same or higher
  2598. * than 4, then transfer speed is set as FAST-10M.
  2599. *
  2600. * I break this rule. The number of connected SCSI devices are
  2601. * only ignored. If auto_sync is 0 (auto), then transfer speed is
  2602. * forced as ULTRA-20M.
  2603. */
  2604. ret = nsp32_prom_read(data, 0x07);
  2605. switch (ret) {
  2606. case 0:
  2607. auto_sync = TRUE;
  2608. break;
  2609. case 1:
  2610. auto_sync = FALSE;
  2611. break;
  2612. default:
  2613. nsp32_msg(KERN_WARNING,
  2614. "Unsupported Auto Sync mode. Fall back to manual mode.");
  2615. auto_sync = TRUE;
  2616. }
  2617. if (trans_mode == ULTRA20M_MODE) {
  2618. auto_sync = TRUE;
  2619. }
  2620. /*
  2621. * each device Synchronous Transfer Period
  2622. */
  2623. for (i = 0; i < NSP32_HOST_SCSIID; i++) {
  2624. target = &data->target[i];
  2625. if (auto_sync == TRUE) {
  2626. target->limit_entry = 0; /* set as ULTRA20M */
  2627. } else {
  2628. ret = nsp32_prom_read(data, i);
  2629. entry = nsp32_search_period_entry(data, target, ret);
  2630. if (entry < 0) {
  2631. /* search failed... set maximum speed */
  2632. entry = 0;
  2633. }
  2634. target->limit_entry = entry;
  2635. }
  2636. }
  2637. return TRUE;
  2638. }
  2639. /*
  2640. * C16 110 (I-O Data: SC-NBD) data map:
  2641. *
  2642. * ROMADDR
  2643. * 0x00 - 0x06 : Device Synchronous Transfer Period (SCSI ID 0 - 6)
  2644. * Value 0x0: 20MB/S, 0x1: 10MB/S, 0x2: 5MB/S, 0x3: ASYNC
  2645. * 0x07 : 0 (HBA Synchronous Transfer Period: Auto Sync)
  2646. * 0x08 - 0x0f : Not Used? (0x0)
  2647. * 0x10 : Transfer Mode
  2648. * Value 0: PIO, 1: Busmater
  2649. * 0x11 : Bus Reset Delay Time (0x00-0x20)
  2650. * 0x12 : Bus Termination
  2651. * Value 0: Disable, 1: Enable
  2652. * 0x13 - 0x19 : Disconnection
  2653. * Value 0: Disable, 1: Enable
  2654. * 0x1a - 0x7c : Not Used? (0)
  2655. * 0x7d : Not Used? (0xf8)
  2656. * 0x7e : Constant (0x55), Validity signature
  2657. * 0x7f : Constant (0xaa), Validity signature
  2658. */
  2659. static int nsp32_getprom_c16(nsp32_hw_data *data)
  2660. {
  2661. int ret, i;
  2662. nsp32_target *target;
  2663. int entry, val;
  2664. /*
  2665. * Reset time which is designated by EEPROM.
  2666. *
  2667. * TODO: Not used yet.
  2668. */
  2669. data->resettime = nsp32_prom_read(data, 0x11);
  2670. /*
  2671. * each device Synchronous Transfer Period
  2672. */
  2673. for (i = 0; i < NSP32_HOST_SCSIID; i++) {
  2674. target = &data->target[i];
  2675. ret = nsp32_prom_read(data, i);
  2676. switch (ret) {
  2677. case 0: /* 20MB/s */
  2678. val = 0x0c;
  2679. break;
  2680. case 1: /* 10MB/s */
  2681. val = 0x19;
  2682. break;
  2683. case 2: /* 5MB/s */
  2684. val = 0x32;
  2685. break;
  2686. case 3: /* ASYNC */
  2687. val = 0x00;
  2688. break;
  2689. default: /* default 20MB/s */
  2690. val = 0x0c;
  2691. break;
  2692. }
  2693. entry = nsp32_search_period_entry(data, target, val);
  2694. if (entry < 0 || trans_mode == ULTRA20M_MODE) {
  2695. /* search failed... set maximum speed */
  2696. entry = 0;
  2697. }
  2698. target->limit_entry = entry;
  2699. }
  2700. return TRUE;
  2701. }
  2702. /*
  2703. * Atmel AT24C01A (drived in 5V) serial EEPROM routines
  2704. */
  2705. static int nsp32_prom_read(nsp32_hw_data *data, int romaddr)
  2706. {
  2707. int i, val;
  2708. /* start condition */
  2709. nsp32_prom_start(data);
  2710. /* device address */
  2711. nsp32_prom_write_bit(data, 1); /* 1 */
  2712. nsp32_prom_write_bit(data, 0); /* 0 */
  2713. nsp32_prom_write_bit(data, 1); /* 1 */
  2714. nsp32_prom_write_bit(data, 0); /* 0 */
  2715. nsp32_prom_write_bit(data, 0); /* A2: 0 (GND) */
  2716. nsp32_prom_write_bit(data, 0); /* A1: 0 (GND) */
  2717. nsp32_prom_write_bit(data, 0); /* A0: 0 (GND) */
  2718. /* R/W: W for dummy write */
  2719. nsp32_prom_write_bit(data, 0);
  2720. /* ack */
  2721. nsp32_prom_write_bit(data, 0);
  2722. /* word address */
  2723. for (i = 7; i >= 0; i--) {
  2724. nsp32_prom_write_bit(data, ((romaddr >> i) & 1));
  2725. }
  2726. /* ack */
  2727. nsp32_prom_write_bit(data, 0);
  2728. /* start condition */
  2729. nsp32_prom_start(data);
  2730. /* device address */
  2731. nsp32_prom_write_bit(data, 1); /* 1 */
  2732. nsp32_prom_write_bit(data, 0); /* 0 */
  2733. nsp32_prom_write_bit(data, 1); /* 1 */
  2734. nsp32_prom_write_bit(data, 0); /* 0 */
  2735. nsp32_prom_write_bit(data, 0); /* A2: 0 (GND) */
  2736. nsp32_prom_write_bit(data, 0); /* A1: 0 (GND) */
  2737. nsp32_prom_write_bit(data, 0); /* A0: 0 (GND) */
  2738. /* R/W: R */
  2739. nsp32_prom_write_bit(data, 1);
  2740. /* ack */
  2741. nsp32_prom_write_bit(data, 0);
  2742. /* data... */
  2743. val = 0;
  2744. for (i = 7; i >= 0; i--) {
  2745. val += (nsp32_prom_read_bit(data) << i);
  2746. }
  2747. /* no ack */
  2748. nsp32_prom_write_bit(data, 1);
  2749. /* stop condition */
  2750. nsp32_prom_stop(data);
  2751. return val;
  2752. }
  2753. static void nsp32_prom_set(nsp32_hw_data *data, int bit, int val)
  2754. {
  2755. int base = data->BaseAddress;
  2756. int tmp;
  2757. tmp = nsp32_index_read1(base, SERIAL_ROM_CTL);
  2758. if (val == 0) {
  2759. tmp &= ~bit;
  2760. } else {
  2761. tmp |= bit;
  2762. }
  2763. nsp32_index_write1(base, SERIAL_ROM_CTL, tmp);
  2764. udelay(10);
  2765. }
  2766. static int nsp32_prom_get(nsp32_hw_data *data, int bit)
  2767. {
  2768. int base = data->BaseAddress;
  2769. int tmp, ret;
  2770. if (bit != SDA) {
  2771. nsp32_msg(KERN_ERR, "return value is not appropriate");
  2772. return 0;
  2773. }
  2774. tmp = nsp32_index_read1(base, SERIAL_ROM_CTL) & bit;
  2775. if (tmp == 0) {
  2776. ret = 0;
  2777. } else {
  2778. ret = 1;
  2779. }
  2780. udelay(10);
  2781. return ret;
  2782. }
  2783. static void nsp32_prom_start (nsp32_hw_data *data)
  2784. {
  2785. /* start condition */
  2786. nsp32_prom_set(data, SCL, 1);
  2787. nsp32_prom_set(data, SDA, 1);
  2788. nsp32_prom_set(data, ENA, 1); /* output mode */
  2789. nsp32_prom_set(data, SDA, 0); /* keeping SCL=1 and transiting
  2790. * SDA 1->0 is start condition */
  2791. nsp32_prom_set(data, SCL, 0);
  2792. }
  2793. static void nsp32_prom_stop (nsp32_hw_data *data)
  2794. {
  2795. /* stop condition */
  2796. nsp32_prom_set(data, SCL, 1);
  2797. nsp32_prom_set(data, SDA, 0);
  2798. nsp32_prom_set(data, ENA, 1); /* output mode */
  2799. nsp32_prom_set(data, SDA, 1);
  2800. nsp32_prom_set(data, SCL, 0);
  2801. }
  2802. static void nsp32_prom_write_bit(nsp32_hw_data *data, int val)
  2803. {
  2804. /* write */
  2805. nsp32_prom_set(data, SDA, val);
  2806. nsp32_prom_set(data, SCL, 1 );
  2807. nsp32_prom_set(data, SCL, 0 );
  2808. }
  2809. static int nsp32_prom_read_bit(nsp32_hw_data *data)
  2810. {
  2811. int val;
  2812. /* read */
  2813. nsp32_prom_set(data, ENA, 0); /* input mode */
  2814. nsp32_prom_set(data, SCL, 1);
  2815. val = nsp32_prom_get(data, SDA);
  2816. nsp32_prom_set(data, SCL, 0);
  2817. nsp32_prom_set(data, ENA, 1); /* output mode */
  2818. return val;
  2819. }
  2820. /**************************************************************************
  2821. * Power Management
  2822. */
  2823. #ifdef CONFIG_PM
  2824. /* Device suspended */
  2825. static int nsp32_suspend(struct pci_dev *pdev, pm_message_t state)
  2826. {
  2827. struct Scsi_Host *host = pci_get_drvdata(pdev);
  2828. nsp32_msg(KERN_INFO, "pci-suspend: pdev=0x%p, state=%ld, slot=%s, host=0x%p", pdev, state, pci_name(pdev), host);
  2829. pci_save_state (pdev);
  2830. pci_disable_device (pdev);
  2831. pci_set_power_state(pdev, pci_choose_state(pdev, state));
  2832. return 0;
  2833. }
  2834. /* Device woken up */
  2835. static int nsp32_resume(struct pci_dev *pdev)
  2836. {
  2837. struct Scsi_Host *host = pci_get_drvdata(pdev);
  2838. nsp32_hw_data *data = (nsp32_hw_data *)host->hostdata;
  2839. unsigned short reg;
  2840. nsp32_msg(KERN_INFO, "pci-resume: pdev=0x%p, slot=%s, host=0x%p", pdev, pci_name(pdev), host);
  2841. pci_set_power_state(pdev, PCI_D0);
  2842. pci_enable_wake (pdev, PCI_D0, 0);
  2843. pci_restore_state (pdev);
  2844. reg = nsp32_read2(data->BaseAddress, INDEX_REG);
  2845. nsp32_msg(KERN_INFO, "io=0x%x reg=0x%x", data->BaseAddress, reg);
  2846. if (reg == 0xffff) {
  2847. nsp32_msg(KERN_INFO, "missing device. abort resume.");
  2848. return 0;
  2849. }
  2850. nsp32hw_init (data);
  2851. nsp32_do_bus_reset(data);
  2852. nsp32_msg(KERN_INFO, "resume success");
  2853. return 0;
  2854. }
  2855. #endif
  2856. /************************************************************************
  2857. * PCI/Cardbus probe/remove routine
  2858. */
  2859. static int __devinit nsp32_probe(struct pci_dev *pdev, const struct pci_device_id *id)
  2860. {
  2861. int ret;
  2862. nsp32_hw_data *data = &nsp32_data_base;
  2863. nsp32_dbg(NSP32_DEBUG_REGISTER, "enter");
  2864. ret = pci_enable_device(pdev);
  2865. if (ret) {
  2866. nsp32_msg(KERN_ERR, "failed to enable pci device");
  2867. return ret;
  2868. }
  2869. data->Pci = pdev;
  2870. data->pci_devid = id;
  2871. data->IrqNumber = pdev->irq;
  2872. data->BaseAddress = pci_resource_start(pdev, 0);
  2873. data->NumAddress = pci_resource_len (pdev, 0);
  2874. data->MmioAddress = pci_ioremap_bar(pdev, 1);
  2875. data->MmioLength = pci_resource_len (pdev, 1);
  2876. pci_set_master(pdev);
  2877. ret = nsp32_detect(pdev);
  2878. nsp32_msg(KERN_INFO, "irq: %i mmio: %p+0x%lx slot: %s model: %s",
  2879. pdev->irq,
  2880. data->MmioAddress, data->MmioLength,
  2881. pci_name(pdev),
  2882. nsp32_model[id->driver_data]);
  2883. nsp32_dbg(NSP32_DEBUG_REGISTER, "exit %d", ret);
  2884. return ret;
  2885. }
  2886. static void __devexit nsp32_remove(struct pci_dev *pdev)
  2887. {
  2888. struct Scsi_Host *host = pci_get_drvdata(pdev);
  2889. nsp32_dbg(NSP32_DEBUG_REGISTER, "enter");
  2890. scsi_remove_host(host);
  2891. nsp32_release(host);
  2892. scsi_host_put(host);
  2893. }
  2894. static struct pci_driver nsp32_driver = {
  2895. .name = "nsp32",
  2896. .id_table = nsp32_pci_table,
  2897. .probe = nsp32_probe,
  2898. .remove = __devexit_p(nsp32_remove),
  2899. #ifdef CONFIG_PM
  2900. .suspend = nsp32_suspend,
  2901. .resume = nsp32_resume,
  2902. #endif
  2903. };
  2904. /*********************************************************************
  2905. * Moule entry point
  2906. */
  2907. static int __init init_nsp32(void) {
  2908. nsp32_msg(KERN_INFO, "loading...");
  2909. return pci_register_driver(&nsp32_driver);
  2910. }
  2911. static void __exit exit_nsp32(void) {
  2912. nsp32_msg(KERN_INFO, "unloading...");
  2913. pci_unregister_driver(&nsp32_driver);
  2914. }
  2915. module_init(init_nsp32);
  2916. module_exit(exit_nsp32);
  2917. /* end */