hpsa.c 133 KB

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  1. /*
  2. * Disk Array driver for HP Smart Array SAS controllers
  3. * Copyright 2000, 2009 Hewlett-Packard Development Company, L.P.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; version 2 of the License.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  12. * NON INFRINGEMENT. See the GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17. *
  18. * Questions/Comments/Bugfixes to iss_storagedev@hp.com
  19. *
  20. */
  21. #include <linux/module.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/types.h>
  24. #include <linux/pci.h>
  25. #include <linux/pci-aspm.h>
  26. #include <linux/kernel.h>
  27. #include <linux/slab.h>
  28. #include <linux/delay.h>
  29. #include <linux/fs.h>
  30. #include <linux/timer.h>
  31. #include <linux/seq_file.h>
  32. #include <linux/init.h>
  33. #include <linux/spinlock.h>
  34. #include <linux/compat.h>
  35. #include <linux/blktrace_api.h>
  36. #include <linux/uaccess.h>
  37. #include <linux/io.h>
  38. #include <linux/dma-mapping.h>
  39. #include <linux/completion.h>
  40. #include <linux/moduleparam.h>
  41. #include <scsi/scsi.h>
  42. #include <scsi/scsi_cmnd.h>
  43. #include <scsi/scsi_device.h>
  44. #include <scsi/scsi_host.h>
  45. #include <scsi/scsi_tcq.h>
  46. #include <linux/cciss_ioctl.h>
  47. #include <linux/string.h>
  48. #include <linux/bitmap.h>
  49. #include <linux/atomic.h>
  50. #include <linux/kthread.h>
  51. #include <linux/jiffies.h>
  52. #include "hpsa_cmd.h"
  53. #include "hpsa.h"
  54. /* HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' */
  55. #define HPSA_DRIVER_VERSION "2.0.2-1"
  56. #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
  57. #define HPSA "hpsa"
  58. /* How long to wait (in milliseconds) for board to go into simple mode */
  59. #define MAX_CONFIG_WAIT 30000
  60. #define MAX_IOCTL_CONFIG_WAIT 1000
  61. /*define how many times we will try a command because of bus resets */
  62. #define MAX_CMD_RETRIES 3
  63. /* Embedded module documentation macros - see modules.h */
  64. MODULE_AUTHOR("Hewlett-Packard Company");
  65. MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
  66. HPSA_DRIVER_VERSION);
  67. MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
  68. MODULE_VERSION(HPSA_DRIVER_VERSION);
  69. MODULE_LICENSE("GPL");
  70. static int hpsa_allow_any;
  71. module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR);
  72. MODULE_PARM_DESC(hpsa_allow_any,
  73. "Allow hpsa driver to access unknown HP Smart Array hardware");
  74. static int hpsa_simple_mode;
  75. module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR);
  76. MODULE_PARM_DESC(hpsa_simple_mode,
  77. "Use 'simple mode' rather than 'performant mode'");
  78. /* define the PCI info for the cards we can control */
  79. static const struct pci_device_id hpsa_pci_device_id[] = {
  80. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241},
  81. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243},
  82. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245},
  83. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247},
  84. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249},
  85. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324a},
  86. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324b},
  87. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233},
  88. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350},
  89. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351},
  90. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352},
  91. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353},
  92. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354},
  93. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355},
  94. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356},
  95. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1920},
  96. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1921},
  97. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1922},
  98. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1923},
  99. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1924},
  100. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1925},
  101. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1926},
  102. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1928},
  103. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x334d},
  104. {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
  105. PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
  106. {0,}
  107. };
  108. MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
  109. /* board_id = Subsystem Device ID & Vendor ID
  110. * product = Marketing Name for the board
  111. * access = Address of the struct of function pointers
  112. */
  113. static struct board_type products[] = {
  114. {0x3241103C, "Smart Array P212", &SA5_access},
  115. {0x3243103C, "Smart Array P410", &SA5_access},
  116. {0x3245103C, "Smart Array P410i", &SA5_access},
  117. {0x3247103C, "Smart Array P411", &SA5_access},
  118. {0x3249103C, "Smart Array P812", &SA5_access},
  119. {0x324a103C, "Smart Array P712m", &SA5_access},
  120. {0x324b103C, "Smart Array P711m", &SA5_access},
  121. {0x3350103C, "Smart Array P222", &SA5_access},
  122. {0x3351103C, "Smart Array P420", &SA5_access},
  123. {0x3352103C, "Smart Array P421", &SA5_access},
  124. {0x3353103C, "Smart Array P822", &SA5_access},
  125. {0x3354103C, "Smart Array P420i", &SA5_access},
  126. {0x3355103C, "Smart Array P220i", &SA5_access},
  127. {0x3356103C, "Smart Array P721m", &SA5_access},
  128. {0x1920103C, "Smart Array", &SA5_access},
  129. {0x1921103C, "Smart Array", &SA5_access},
  130. {0x1922103C, "Smart Array", &SA5_access},
  131. {0x1923103C, "Smart Array", &SA5_access},
  132. {0x1924103C, "Smart Array", &SA5_access},
  133. {0x1925103C, "Smart Array", &SA5_access},
  134. {0x1926103C, "Smart Array", &SA5_access},
  135. {0x1928103C, "Smart Array", &SA5_access},
  136. {0x334d103C, "Smart Array P822se", &SA5_access},
  137. {0xFFFF103C, "Unknown Smart Array", &SA5_access},
  138. };
  139. static int number_of_controllers;
  140. static struct list_head hpsa_ctlr_list = LIST_HEAD_INIT(hpsa_ctlr_list);
  141. static spinlock_t lockup_detector_lock;
  142. static struct task_struct *hpsa_lockup_detector;
  143. static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
  144. static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
  145. static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg);
  146. static void start_io(struct ctlr_info *h);
  147. #ifdef CONFIG_COMPAT
  148. static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg);
  149. #endif
  150. static void cmd_free(struct ctlr_info *h, struct CommandList *c);
  151. static void cmd_special_free(struct ctlr_info *h, struct CommandList *c);
  152. static struct CommandList *cmd_alloc(struct ctlr_info *h);
  153. static struct CommandList *cmd_special_alloc(struct ctlr_info *h);
  154. static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
  155. void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
  156. int cmd_type);
  157. static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
  158. static void hpsa_scan_start(struct Scsi_Host *);
  159. static int hpsa_scan_finished(struct Scsi_Host *sh,
  160. unsigned long elapsed_time);
  161. static int hpsa_change_queue_depth(struct scsi_device *sdev,
  162. int qdepth, int reason);
  163. static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
  164. static int hpsa_slave_alloc(struct scsi_device *sdev);
  165. static void hpsa_slave_destroy(struct scsi_device *sdev);
  166. static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno);
  167. static int check_for_unit_attention(struct ctlr_info *h,
  168. struct CommandList *c);
  169. static void check_ioctl_unit_attention(struct ctlr_info *h,
  170. struct CommandList *c);
  171. /* performant mode helper functions */
  172. static void calc_bucket_map(int *bucket, int num_buckets,
  173. int nsgs, int *bucket_map);
  174. static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
  175. static inline u32 next_command(struct ctlr_info *h);
  176. static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev,
  177. void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
  178. u64 *cfg_offset);
  179. static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
  180. unsigned long *memory_bar);
  181. static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id);
  182. static int __devinit hpsa_wait_for_board_state(struct pci_dev *pdev,
  183. void __iomem *vaddr, int wait_for_ready);
  184. #define BOARD_NOT_READY 0
  185. #define BOARD_READY 1
  186. static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
  187. {
  188. unsigned long *priv = shost_priv(sdev->host);
  189. return (struct ctlr_info *) *priv;
  190. }
  191. static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
  192. {
  193. unsigned long *priv = shost_priv(sh);
  194. return (struct ctlr_info *) *priv;
  195. }
  196. static int check_for_unit_attention(struct ctlr_info *h,
  197. struct CommandList *c)
  198. {
  199. if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
  200. return 0;
  201. switch (c->err_info->SenseInfo[12]) {
  202. case STATE_CHANGED:
  203. dev_warn(&h->pdev->dev, HPSA "%d: a state change "
  204. "detected, command retried\n", h->ctlr);
  205. break;
  206. case LUN_FAILED:
  207. dev_warn(&h->pdev->dev, HPSA "%d: LUN failure "
  208. "detected, action required\n", h->ctlr);
  209. break;
  210. case REPORT_LUNS_CHANGED:
  211. dev_warn(&h->pdev->dev, HPSA "%d: report LUN data "
  212. "changed, action required\n", h->ctlr);
  213. /*
  214. * Note: this REPORT_LUNS_CHANGED condition only occurs on the external
  215. * target (array) devices.
  216. */
  217. break;
  218. case POWER_OR_RESET:
  219. dev_warn(&h->pdev->dev, HPSA "%d: a power on "
  220. "or device reset detected\n", h->ctlr);
  221. break;
  222. case UNIT_ATTENTION_CLEARED:
  223. dev_warn(&h->pdev->dev, HPSA "%d: unit attention "
  224. "cleared by another initiator\n", h->ctlr);
  225. break;
  226. default:
  227. dev_warn(&h->pdev->dev, HPSA "%d: unknown "
  228. "unit attention detected\n", h->ctlr);
  229. break;
  230. }
  231. return 1;
  232. }
  233. static ssize_t host_store_rescan(struct device *dev,
  234. struct device_attribute *attr,
  235. const char *buf, size_t count)
  236. {
  237. struct ctlr_info *h;
  238. struct Scsi_Host *shost = class_to_shost(dev);
  239. h = shost_to_hba(shost);
  240. hpsa_scan_start(h->scsi_host);
  241. return count;
  242. }
  243. static ssize_t host_show_firmware_revision(struct device *dev,
  244. struct device_attribute *attr, char *buf)
  245. {
  246. struct ctlr_info *h;
  247. struct Scsi_Host *shost = class_to_shost(dev);
  248. unsigned char *fwrev;
  249. h = shost_to_hba(shost);
  250. if (!h->hba_inquiry_data)
  251. return 0;
  252. fwrev = &h->hba_inquiry_data[32];
  253. return snprintf(buf, 20, "%c%c%c%c\n",
  254. fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
  255. }
  256. static ssize_t host_show_commands_outstanding(struct device *dev,
  257. struct device_attribute *attr, char *buf)
  258. {
  259. struct Scsi_Host *shost = class_to_shost(dev);
  260. struct ctlr_info *h = shost_to_hba(shost);
  261. return snprintf(buf, 20, "%d\n", h->commands_outstanding);
  262. }
  263. static ssize_t host_show_transport_mode(struct device *dev,
  264. struct device_attribute *attr, char *buf)
  265. {
  266. struct ctlr_info *h;
  267. struct Scsi_Host *shost = class_to_shost(dev);
  268. h = shost_to_hba(shost);
  269. return snprintf(buf, 20, "%s\n",
  270. h->transMethod & CFGTBL_Trans_Performant ?
  271. "performant" : "simple");
  272. }
  273. /* List of controllers which cannot be hard reset on kexec with reset_devices */
  274. static u32 unresettable_controller[] = {
  275. 0x324a103C, /* Smart Array P712m */
  276. 0x324b103C, /* SmartArray P711m */
  277. 0x3223103C, /* Smart Array P800 */
  278. 0x3234103C, /* Smart Array P400 */
  279. 0x3235103C, /* Smart Array P400i */
  280. 0x3211103C, /* Smart Array E200i */
  281. 0x3212103C, /* Smart Array E200 */
  282. 0x3213103C, /* Smart Array E200i */
  283. 0x3214103C, /* Smart Array E200i */
  284. 0x3215103C, /* Smart Array E200i */
  285. 0x3237103C, /* Smart Array E500 */
  286. 0x323D103C, /* Smart Array P700m */
  287. 0x40800E11, /* Smart Array 5i */
  288. 0x409C0E11, /* Smart Array 6400 */
  289. 0x409D0E11, /* Smart Array 6400 EM */
  290. 0x40700E11, /* Smart Array 5300 */
  291. 0x40820E11, /* Smart Array 532 */
  292. 0x40830E11, /* Smart Array 5312 */
  293. 0x409A0E11, /* Smart Array 641 */
  294. 0x409B0E11, /* Smart Array 642 */
  295. 0x40910E11, /* Smart Array 6i */
  296. };
  297. /* List of controllers which cannot even be soft reset */
  298. static u32 soft_unresettable_controller[] = {
  299. 0x40800E11, /* Smart Array 5i */
  300. 0x40700E11, /* Smart Array 5300 */
  301. 0x40820E11, /* Smart Array 532 */
  302. 0x40830E11, /* Smart Array 5312 */
  303. 0x409A0E11, /* Smart Array 641 */
  304. 0x409B0E11, /* Smart Array 642 */
  305. 0x40910E11, /* Smart Array 6i */
  306. /* Exclude 640x boards. These are two pci devices in one slot
  307. * which share a battery backed cache module. One controls the
  308. * cache, the other accesses the cache through the one that controls
  309. * it. If we reset the one controlling the cache, the other will
  310. * likely not be happy. Just forbid resetting this conjoined mess.
  311. * The 640x isn't really supported by hpsa anyway.
  312. */
  313. 0x409C0E11, /* Smart Array 6400 */
  314. 0x409D0E11, /* Smart Array 6400 EM */
  315. };
  316. static int ctlr_is_hard_resettable(u32 board_id)
  317. {
  318. int i;
  319. for (i = 0; i < ARRAY_SIZE(unresettable_controller); i++)
  320. if (unresettable_controller[i] == board_id)
  321. return 0;
  322. return 1;
  323. }
  324. static int ctlr_is_soft_resettable(u32 board_id)
  325. {
  326. int i;
  327. for (i = 0; i < ARRAY_SIZE(soft_unresettable_controller); i++)
  328. if (soft_unresettable_controller[i] == board_id)
  329. return 0;
  330. return 1;
  331. }
  332. static int ctlr_is_resettable(u32 board_id)
  333. {
  334. return ctlr_is_hard_resettable(board_id) ||
  335. ctlr_is_soft_resettable(board_id);
  336. }
  337. static ssize_t host_show_resettable(struct device *dev,
  338. struct device_attribute *attr, char *buf)
  339. {
  340. struct ctlr_info *h;
  341. struct Scsi_Host *shost = class_to_shost(dev);
  342. h = shost_to_hba(shost);
  343. return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
  344. }
  345. static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
  346. {
  347. return (scsi3addr[3] & 0xC0) == 0x40;
  348. }
  349. static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
  350. "UNKNOWN"
  351. };
  352. #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 1)
  353. static ssize_t raid_level_show(struct device *dev,
  354. struct device_attribute *attr, char *buf)
  355. {
  356. ssize_t l = 0;
  357. unsigned char rlevel;
  358. struct ctlr_info *h;
  359. struct scsi_device *sdev;
  360. struct hpsa_scsi_dev_t *hdev;
  361. unsigned long flags;
  362. sdev = to_scsi_device(dev);
  363. h = sdev_to_hba(sdev);
  364. spin_lock_irqsave(&h->lock, flags);
  365. hdev = sdev->hostdata;
  366. if (!hdev) {
  367. spin_unlock_irqrestore(&h->lock, flags);
  368. return -ENODEV;
  369. }
  370. /* Is this even a logical drive? */
  371. if (!is_logical_dev_addr_mode(hdev->scsi3addr)) {
  372. spin_unlock_irqrestore(&h->lock, flags);
  373. l = snprintf(buf, PAGE_SIZE, "N/A\n");
  374. return l;
  375. }
  376. rlevel = hdev->raid_level;
  377. spin_unlock_irqrestore(&h->lock, flags);
  378. if (rlevel > RAID_UNKNOWN)
  379. rlevel = RAID_UNKNOWN;
  380. l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
  381. return l;
  382. }
  383. static ssize_t lunid_show(struct device *dev,
  384. struct device_attribute *attr, char *buf)
  385. {
  386. struct ctlr_info *h;
  387. struct scsi_device *sdev;
  388. struct hpsa_scsi_dev_t *hdev;
  389. unsigned long flags;
  390. unsigned char lunid[8];
  391. sdev = to_scsi_device(dev);
  392. h = sdev_to_hba(sdev);
  393. spin_lock_irqsave(&h->lock, flags);
  394. hdev = sdev->hostdata;
  395. if (!hdev) {
  396. spin_unlock_irqrestore(&h->lock, flags);
  397. return -ENODEV;
  398. }
  399. memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
  400. spin_unlock_irqrestore(&h->lock, flags);
  401. return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
  402. lunid[0], lunid[1], lunid[2], lunid[3],
  403. lunid[4], lunid[5], lunid[6], lunid[7]);
  404. }
  405. static ssize_t unique_id_show(struct device *dev,
  406. struct device_attribute *attr, char *buf)
  407. {
  408. struct ctlr_info *h;
  409. struct scsi_device *sdev;
  410. struct hpsa_scsi_dev_t *hdev;
  411. unsigned long flags;
  412. unsigned char sn[16];
  413. sdev = to_scsi_device(dev);
  414. h = sdev_to_hba(sdev);
  415. spin_lock_irqsave(&h->lock, flags);
  416. hdev = sdev->hostdata;
  417. if (!hdev) {
  418. spin_unlock_irqrestore(&h->lock, flags);
  419. return -ENODEV;
  420. }
  421. memcpy(sn, hdev->device_id, sizeof(sn));
  422. spin_unlock_irqrestore(&h->lock, flags);
  423. return snprintf(buf, 16 * 2 + 2,
  424. "%02X%02X%02X%02X%02X%02X%02X%02X"
  425. "%02X%02X%02X%02X%02X%02X%02X%02X\n",
  426. sn[0], sn[1], sn[2], sn[3],
  427. sn[4], sn[5], sn[6], sn[7],
  428. sn[8], sn[9], sn[10], sn[11],
  429. sn[12], sn[13], sn[14], sn[15]);
  430. }
  431. static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL);
  432. static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL);
  433. static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL);
  434. static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
  435. static DEVICE_ATTR(firmware_revision, S_IRUGO,
  436. host_show_firmware_revision, NULL);
  437. static DEVICE_ATTR(commands_outstanding, S_IRUGO,
  438. host_show_commands_outstanding, NULL);
  439. static DEVICE_ATTR(transport_mode, S_IRUGO,
  440. host_show_transport_mode, NULL);
  441. static DEVICE_ATTR(resettable, S_IRUGO,
  442. host_show_resettable, NULL);
  443. static struct device_attribute *hpsa_sdev_attrs[] = {
  444. &dev_attr_raid_level,
  445. &dev_attr_lunid,
  446. &dev_attr_unique_id,
  447. NULL,
  448. };
  449. static struct device_attribute *hpsa_shost_attrs[] = {
  450. &dev_attr_rescan,
  451. &dev_attr_firmware_revision,
  452. &dev_attr_commands_outstanding,
  453. &dev_attr_transport_mode,
  454. &dev_attr_resettable,
  455. NULL,
  456. };
  457. static struct scsi_host_template hpsa_driver_template = {
  458. .module = THIS_MODULE,
  459. .name = HPSA,
  460. .proc_name = HPSA,
  461. .queuecommand = hpsa_scsi_queue_command,
  462. .scan_start = hpsa_scan_start,
  463. .scan_finished = hpsa_scan_finished,
  464. .change_queue_depth = hpsa_change_queue_depth,
  465. .this_id = -1,
  466. .use_clustering = ENABLE_CLUSTERING,
  467. .eh_device_reset_handler = hpsa_eh_device_reset_handler,
  468. .ioctl = hpsa_ioctl,
  469. .slave_alloc = hpsa_slave_alloc,
  470. .slave_destroy = hpsa_slave_destroy,
  471. #ifdef CONFIG_COMPAT
  472. .compat_ioctl = hpsa_compat_ioctl,
  473. #endif
  474. .sdev_attrs = hpsa_sdev_attrs,
  475. .shost_attrs = hpsa_shost_attrs,
  476. .max_sectors = 8192,
  477. };
  478. /* Enqueuing and dequeuing functions for cmdlists. */
  479. static inline void addQ(struct list_head *list, struct CommandList *c)
  480. {
  481. list_add_tail(&c->list, list);
  482. }
  483. static inline u32 next_command(struct ctlr_info *h)
  484. {
  485. u32 a;
  486. if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
  487. return h->access.command_completed(h);
  488. if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) {
  489. a = *(h->reply_pool_head); /* Next cmd in ring buffer */
  490. (h->reply_pool_head)++;
  491. h->commands_outstanding--;
  492. } else {
  493. a = FIFO_EMPTY;
  494. }
  495. /* Check for wraparound */
  496. if (h->reply_pool_head == (h->reply_pool + h->max_commands)) {
  497. h->reply_pool_head = h->reply_pool;
  498. h->reply_pool_wraparound ^= 1;
  499. }
  500. return a;
  501. }
  502. /* set_performant_mode: Modify the tag for cciss performant
  503. * set bit 0 for pull model, bits 3-1 for block fetch
  504. * register number
  505. */
  506. static void set_performant_mode(struct ctlr_info *h, struct CommandList *c)
  507. {
  508. if (likely(h->transMethod & CFGTBL_Trans_Performant))
  509. c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
  510. }
  511. static int is_firmware_flash_cmd(u8 *cdb)
  512. {
  513. return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE;
  514. }
  515. /*
  516. * During firmware flash, the heartbeat register may not update as frequently
  517. * as it should. So we dial down lockup detection during firmware flash. and
  518. * dial it back up when firmware flash completes.
  519. */
  520. #define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ)
  521. #define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ)
  522. static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h,
  523. struct CommandList *c)
  524. {
  525. if (!is_firmware_flash_cmd(c->Request.CDB))
  526. return;
  527. atomic_inc(&h->firmware_flash_in_progress);
  528. h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH;
  529. }
  530. static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h,
  531. struct CommandList *c)
  532. {
  533. if (is_firmware_flash_cmd(c->Request.CDB) &&
  534. atomic_dec_and_test(&h->firmware_flash_in_progress))
  535. h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
  536. }
  537. static void enqueue_cmd_and_start_io(struct ctlr_info *h,
  538. struct CommandList *c)
  539. {
  540. unsigned long flags;
  541. set_performant_mode(h, c);
  542. dial_down_lockup_detection_during_fw_flash(h, c);
  543. spin_lock_irqsave(&h->lock, flags);
  544. addQ(&h->reqQ, c);
  545. h->Qdepth++;
  546. start_io(h);
  547. spin_unlock_irqrestore(&h->lock, flags);
  548. }
  549. static inline void removeQ(struct CommandList *c)
  550. {
  551. if (WARN_ON(list_empty(&c->list)))
  552. return;
  553. list_del_init(&c->list);
  554. }
  555. static inline int is_hba_lunid(unsigned char scsi3addr[])
  556. {
  557. return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
  558. }
  559. static inline int is_scsi_rev_5(struct ctlr_info *h)
  560. {
  561. if (!h->hba_inquiry_data)
  562. return 0;
  563. if ((h->hba_inquiry_data[2] & 0x07) == 5)
  564. return 1;
  565. return 0;
  566. }
  567. static int hpsa_find_target_lun(struct ctlr_info *h,
  568. unsigned char scsi3addr[], int bus, int *target, int *lun)
  569. {
  570. /* finds an unused bus, target, lun for a new physical device
  571. * assumes h->devlock is held
  572. */
  573. int i, found = 0;
  574. DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES);
  575. bitmap_zero(lun_taken, HPSA_MAX_DEVICES);
  576. for (i = 0; i < h->ndevices; i++) {
  577. if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
  578. __set_bit(h->dev[i]->target, lun_taken);
  579. }
  580. i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES);
  581. if (i < HPSA_MAX_DEVICES) {
  582. /* *bus = 1; */
  583. *target = i;
  584. *lun = 0;
  585. found = 1;
  586. }
  587. return !found;
  588. }
  589. /* Add an entry into h->dev[] array. */
  590. static int hpsa_scsi_add_entry(struct ctlr_info *h, int hostno,
  591. struct hpsa_scsi_dev_t *device,
  592. struct hpsa_scsi_dev_t *added[], int *nadded)
  593. {
  594. /* assumes h->devlock is held */
  595. int n = h->ndevices;
  596. int i;
  597. unsigned char addr1[8], addr2[8];
  598. struct hpsa_scsi_dev_t *sd;
  599. if (n >= HPSA_MAX_DEVICES) {
  600. dev_err(&h->pdev->dev, "too many devices, some will be "
  601. "inaccessible.\n");
  602. return -1;
  603. }
  604. /* physical devices do not have lun or target assigned until now. */
  605. if (device->lun != -1)
  606. /* Logical device, lun is already assigned. */
  607. goto lun_assigned;
  608. /* If this device a non-zero lun of a multi-lun device
  609. * byte 4 of the 8-byte LUN addr will contain the logical
  610. * unit no, zero otherise.
  611. */
  612. if (device->scsi3addr[4] == 0) {
  613. /* This is not a non-zero lun of a multi-lun device */
  614. if (hpsa_find_target_lun(h, device->scsi3addr,
  615. device->bus, &device->target, &device->lun) != 0)
  616. return -1;
  617. goto lun_assigned;
  618. }
  619. /* This is a non-zero lun of a multi-lun device.
  620. * Search through our list and find the device which
  621. * has the same 8 byte LUN address, excepting byte 4.
  622. * Assign the same bus and target for this new LUN.
  623. * Use the logical unit number from the firmware.
  624. */
  625. memcpy(addr1, device->scsi3addr, 8);
  626. addr1[4] = 0;
  627. for (i = 0; i < n; i++) {
  628. sd = h->dev[i];
  629. memcpy(addr2, sd->scsi3addr, 8);
  630. addr2[4] = 0;
  631. /* differ only in byte 4? */
  632. if (memcmp(addr1, addr2, 8) == 0) {
  633. device->bus = sd->bus;
  634. device->target = sd->target;
  635. device->lun = device->scsi3addr[4];
  636. break;
  637. }
  638. }
  639. if (device->lun == -1) {
  640. dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
  641. " suspect firmware bug or unsupported hardware "
  642. "configuration.\n");
  643. return -1;
  644. }
  645. lun_assigned:
  646. h->dev[n] = device;
  647. h->ndevices++;
  648. added[*nadded] = device;
  649. (*nadded)++;
  650. /* initially, (before registering with scsi layer) we don't
  651. * know our hostno and we don't want to print anything first
  652. * time anyway (the scsi layer's inquiries will show that info)
  653. */
  654. /* if (hostno != -1) */
  655. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d added.\n",
  656. scsi_device_type(device->devtype), hostno,
  657. device->bus, device->target, device->lun);
  658. return 0;
  659. }
  660. /* Update an entry in h->dev[] array. */
  661. static void hpsa_scsi_update_entry(struct ctlr_info *h, int hostno,
  662. int entry, struct hpsa_scsi_dev_t *new_entry)
  663. {
  664. /* assumes h->devlock is held */
  665. BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
  666. /* Raid level changed. */
  667. h->dev[entry]->raid_level = new_entry->raid_level;
  668. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d updated.\n",
  669. scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
  670. new_entry->target, new_entry->lun);
  671. }
  672. /* Replace an entry from h->dev[] array. */
  673. static void hpsa_scsi_replace_entry(struct ctlr_info *h, int hostno,
  674. int entry, struct hpsa_scsi_dev_t *new_entry,
  675. struct hpsa_scsi_dev_t *added[], int *nadded,
  676. struct hpsa_scsi_dev_t *removed[], int *nremoved)
  677. {
  678. /* assumes h->devlock is held */
  679. BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
  680. removed[*nremoved] = h->dev[entry];
  681. (*nremoved)++;
  682. /*
  683. * New physical devices won't have target/lun assigned yet
  684. * so we need to preserve the values in the slot we are replacing.
  685. */
  686. if (new_entry->target == -1) {
  687. new_entry->target = h->dev[entry]->target;
  688. new_entry->lun = h->dev[entry]->lun;
  689. }
  690. h->dev[entry] = new_entry;
  691. added[*nadded] = new_entry;
  692. (*nadded)++;
  693. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d changed.\n",
  694. scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
  695. new_entry->target, new_entry->lun);
  696. }
  697. /* Remove an entry from h->dev[] array. */
  698. static void hpsa_scsi_remove_entry(struct ctlr_info *h, int hostno, int entry,
  699. struct hpsa_scsi_dev_t *removed[], int *nremoved)
  700. {
  701. /* assumes h->devlock is held */
  702. int i;
  703. struct hpsa_scsi_dev_t *sd;
  704. BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
  705. sd = h->dev[entry];
  706. removed[*nremoved] = h->dev[entry];
  707. (*nremoved)++;
  708. for (i = entry; i < h->ndevices-1; i++)
  709. h->dev[i] = h->dev[i+1];
  710. h->ndevices--;
  711. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d removed.\n",
  712. scsi_device_type(sd->devtype), hostno, sd->bus, sd->target,
  713. sd->lun);
  714. }
  715. #define SCSI3ADDR_EQ(a, b) ( \
  716. (a)[7] == (b)[7] && \
  717. (a)[6] == (b)[6] && \
  718. (a)[5] == (b)[5] && \
  719. (a)[4] == (b)[4] && \
  720. (a)[3] == (b)[3] && \
  721. (a)[2] == (b)[2] && \
  722. (a)[1] == (b)[1] && \
  723. (a)[0] == (b)[0])
  724. static void fixup_botched_add(struct ctlr_info *h,
  725. struct hpsa_scsi_dev_t *added)
  726. {
  727. /* called when scsi_add_device fails in order to re-adjust
  728. * h->dev[] to match the mid layer's view.
  729. */
  730. unsigned long flags;
  731. int i, j;
  732. spin_lock_irqsave(&h->lock, flags);
  733. for (i = 0; i < h->ndevices; i++) {
  734. if (h->dev[i] == added) {
  735. for (j = i; j < h->ndevices-1; j++)
  736. h->dev[j] = h->dev[j+1];
  737. h->ndevices--;
  738. break;
  739. }
  740. }
  741. spin_unlock_irqrestore(&h->lock, flags);
  742. kfree(added);
  743. }
  744. static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
  745. struct hpsa_scsi_dev_t *dev2)
  746. {
  747. /* we compare everything except lun and target as these
  748. * are not yet assigned. Compare parts likely
  749. * to differ first
  750. */
  751. if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
  752. sizeof(dev1->scsi3addr)) != 0)
  753. return 0;
  754. if (memcmp(dev1->device_id, dev2->device_id,
  755. sizeof(dev1->device_id)) != 0)
  756. return 0;
  757. if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
  758. return 0;
  759. if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
  760. return 0;
  761. if (dev1->devtype != dev2->devtype)
  762. return 0;
  763. if (dev1->bus != dev2->bus)
  764. return 0;
  765. return 1;
  766. }
  767. static inline int device_updated(struct hpsa_scsi_dev_t *dev1,
  768. struct hpsa_scsi_dev_t *dev2)
  769. {
  770. /* Device attributes that can change, but don't mean
  771. * that the device is a different device, nor that the OS
  772. * needs to be told anything about the change.
  773. */
  774. if (dev1->raid_level != dev2->raid_level)
  775. return 1;
  776. return 0;
  777. }
  778. /* Find needle in haystack. If exact match found, return DEVICE_SAME,
  779. * and return needle location in *index. If scsi3addr matches, but not
  780. * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
  781. * location in *index.
  782. * In the case of a minor device attribute change, such as RAID level, just
  783. * return DEVICE_UPDATED, along with the updated device's location in index.
  784. * If needle not found, return DEVICE_NOT_FOUND.
  785. */
  786. static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
  787. struct hpsa_scsi_dev_t *haystack[], int haystack_size,
  788. int *index)
  789. {
  790. int i;
  791. #define DEVICE_NOT_FOUND 0
  792. #define DEVICE_CHANGED 1
  793. #define DEVICE_SAME 2
  794. #define DEVICE_UPDATED 3
  795. for (i = 0; i < haystack_size; i++) {
  796. if (haystack[i] == NULL) /* previously removed. */
  797. continue;
  798. if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
  799. *index = i;
  800. if (device_is_the_same(needle, haystack[i])) {
  801. if (device_updated(needle, haystack[i]))
  802. return DEVICE_UPDATED;
  803. return DEVICE_SAME;
  804. } else {
  805. return DEVICE_CHANGED;
  806. }
  807. }
  808. }
  809. *index = -1;
  810. return DEVICE_NOT_FOUND;
  811. }
  812. static void adjust_hpsa_scsi_table(struct ctlr_info *h, int hostno,
  813. struct hpsa_scsi_dev_t *sd[], int nsds)
  814. {
  815. /* sd contains scsi3 addresses and devtypes, and inquiry
  816. * data. This function takes what's in sd to be the current
  817. * reality and updates h->dev[] to reflect that reality.
  818. */
  819. int i, entry, device_change, changes = 0;
  820. struct hpsa_scsi_dev_t *csd;
  821. unsigned long flags;
  822. struct hpsa_scsi_dev_t **added, **removed;
  823. int nadded, nremoved;
  824. struct Scsi_Host *sh = NULL;
  825. added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL);
  826. removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL);
  827. if (!added || !removed) {
  828. dev_warn(&h->pdev->dev, "out of memory in "
  829. "adjust_hpsa_scsi_table\n");
  830. goto free_and_out;
  831. }
  832. spin_lock_irqsave(&h->devlock, flags);
  833. /* find any devices in h->dev[] that are not in
  834. * sd[] and remove them from h->dev[], and for any
  835. * devices which have changed, remove the old device
  836. * info and add the new device info.
  837. * If minor device attributes change, just update
  838. * the existing device structure.
  839. */
  840. i = 0;
  841. nremoved = 0;
  842. nadded = 0;
  843. while (i < h->ndevices) {
  844. csd = h->dev[i];
  845. device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
  846. if (device_change == DEVICE_NOT_FOUND) {
  847. changes++;
  848. hpsa_scsi_remove_entry(h, hostno, i,
  849. removed, &nremoved);
  850. continue; /* remove ^^^, hence i not incremented */
  851. } else if (device_change == DEVICE_CHANGED) {
  852. changes++;
  853. hpsa_scsi_replace_entry(h, hostno, i, sd[entry],
  854. added, &nadded, removed, &nremoved);
  855. /* Set it to NULL to prevent it from being freed
  856. * at the bottom of hpsa_update_scsi_devices()
  857. */
  858. sd[entry] = NULL;
  859. } else if (device_change == DEVICE_UPDATED) {
  860. hpsa_scsi_update_entry(h, hostno, i, sd[entry]);
  861. }
  862. i++;
  863. }
  864. /* Now, make sure every device listed in sd[] is also
  865. * listed in h->dev[], adding them if they aren't found
  866. */
  867. for (i = 0; i < nsds; i++) {
  868. if (!sd[i]) /* if already added above. */
  869. continue;
  870. device_change = hpsa_scsi_find_entry(sd[i], h->dev,
  871. h->ndevices, &entry);
  872. if (device_change == DEVICE_NOT_FOUND) {
  873. changes++;
  874. if (hpsa_scsi_add_entry(h, hostno, sd[i],
  875. added, &nadded) != 0)
  876. break;
  877. sd[i] = NULL; /* prevent from being freed later. */
  878. } else if (device_change == DEVICE_CHANGED) {
  879. /* should never happen... */
  880. changes++;
  881. dev_warn(&h->pdev->dev,
  882. "device unexpectedly changed.\n");
  883. /* but if it does happen, we just ignore that device */
  884. }
  885. }
  886. spin_unlock_irqrestore(&h->devlock, flags);
  887. /* Don't notify scsi mid layer of any changes the first time through
  888. * (or if there are no changes) scsi_scan_host will do it later the
  889. * first time through.
  890. */
  891. if (hostno == -1 || !changes)
  892. goto free_and_out;
  893. sh = h->scsi_host;
  894. /* Notify scsi mid layer of any removed devices */
  895. for (i = 0; i < nremoved; i++) {
  896. struct scsi_device *sdev =
  897. scsi_device_lookup(sh, removed[i]->bus,
  898. removed[i]->target, removed[i]->lun);
  899. if (sdev != NULL) {
  900. scsi_remove_device(sdev);
  901. scsi_device_put(sdev);
  902. } else {
  903. /* We don't expect to get here.
  904. * future cmds to this device will get selection
  905. * timeout as if the device was gone.
  906. */
  907. dev_warn(&h->pdev->dev, "didn't find c%db%dt%dl%d "
  908. " for removal.", hostno, removed[i]->bus,
  909. removed[i]->target, removed[i]->lun);
  910. }
  911. kfree(removed[i]);
  912. removed[i] = NULL;
  913. }
  914. /* Notify scsi mid layer of any added devices */
  915. for (i = 0; i < nadded; i++) {
  916. if (scsi_add_device(sh, added[i]->bus,
  917. added[i]->target, added[i]->lun) == 0)
  918. continue;
  919. dev_warn(&h->pdev->dev, "scsi_add_device c%db%dt%dl%d failed, "
  920. "device not added.\n", hostno, added[i]->bus,
  921. added[i]->target, added[i]->lun);
  922. /* now we have to remove it from h->dev,
  923. * since it didn't get added to scsi mid layer
  924. */
  925. fixup_botched_add(h, added[i]);
  926. }
  927. free_and_out:
  928. kfree(added);
  929. kfree(removed);
  930. }
  931. /*
  932. * Lookup bus/target/lun and retrun corresponding struct hpsa_scsi_dev_t *
  933. * Assume's h->devlock is held.
  934. */
  935. static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
  936. int bus, int target, int lun)
  937. {
  938. int i;
  939. struct hpsa_scsi_dev_t *sd;
  940. for (i = 0; i < h->ndevices; i++) {
  941. sd = h->dev[i];
  942. if (sd->bus == bus && sd->target == target && sd->lun == lun)
  943. return sd;
  944. }
  945. return NULL;
  946. }
  947. /* link sdev->hostdata to our per-device structure. */
  948. static int hpsa_slave_alloc(struct scsi_device *sdev)
  949. {
  950. struct hpsa_scsi_dev_t *sd;
  951. unsigned long flags;
  952. struct ctlr_info *h;
  953. h = sdev_to_hba(sdev);
  954. spin_lock_irqsave(&h->devlock, flags);
  955. sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
  956. sdev_id(sdev), sdev->lun);
  957. if (sd != NULL)
  958. sdev->hostdata = sd;
  959. spin_unlock_irqrestore(&h->devlock, flags);
  960. return 0;
  961. }
  962. static void hpsa_slave_destroy(struct scsi_device *sdev)
  963. {
  964. /* nothing to do. */
  965. }
  966. static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
  967. {
  968. int i;
  969. if (!h->cmd_sg_list)
  970. return;
  971. for (i = 0; i < h->nr_cmds; i++) {
  972. kfree(h->cmd_sg_list[i]);
  973. h->cmd_sg_list[i] = NULL;
  974. }
  975. kfree(h->cmd_sg_list);
  976. h->cmd_sg_list = NULL;
  977. }
  978. static int hpsa_allocate_sg_chain_blocks(struct ctlr_info *h)
  979. {
  980. int i;
  981. if (h->chainsize <= 0)
  982. return 0;
  983. h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds,
  984. GFP_KERNEL);
  985. if (!h->cmd_sg_list)
  986. return -ENOMEM;
  987. for (i = 0; i < h->nr_cmds; i++) {
  988. h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) *
  989. h->chainsize, GFP_KERNEL);
  990. if (!h->cmd_sg_list[i])
  991. goto clean;
  992. }
  993. return 0;
  994. clean:
  995. hpsa_free_sg_chain_blocks(h);
  996. return -ENOMEM;
  997. }
  998. static void hpsa_map_sg_chain_block(struct ctlr_info *h,
  999. struct CommandList *c)
  1000. {
  1001. struct SGDescriptor *chain_sg, *chain_block;
  1002. u64 temp64;
  1003. chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
  1004. chain_block = h->cmd_sg_list[c->cmdindex];
  1005. chain_sg->Ext = HPSA_SG_CHAIN;
  1006. chain_sg->Len = sizeof(*chain_sg) *
  1007. (c->Header.SGTotal - h->max_cmd_sg_entries);
  1008. temp64 = pci_map_single(h->pdev, chain_block, chain_sg->Len,
  1009. PCI_DMA_TODEVICE);
  1010. chain_sg->Addr.lower = (u32) (temp64 & 0x0FFFFFFFFULL);
  1011. chain_sg->Addr.upper = (u32) ((temp64 >> 32) & 0x0FFFFFFFFULL);
  1012. }
  1013. static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
  1014. struct CommandList *c)
  1015. {
  1016. struct SGDescriptor *chain_sg;
  1017. union u64bit temp64;
  1018. if (c->Header.SGTotal <= h->max_cmd_sg_entries)
  1019. return;
  1020. chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
  1021. temp64.val32.lower = chain_sg->Addr.lower;
  1022. temp64.val32.upper = chain_sg->Addr.upper;
  1023. pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
  1024. }
  1025. static void complete_scsi_command(struct CommandList *cp)
  1026. {
  1027. struct scsi_cmnd *cmd;
  1028. struct ctlr_info *h;
  1029. struct ErrorInfo *ei;
  1030. unsigned char sense_key;
  1031. unsigned char asc; /* additional sense code */
  1032. unsigned char ascq; /* additional sense code qualifier */
  1033. unsigned long sense_data_size;
  1034. ei = cp->err_info;
  1035. cmd = (struct scsi_cmnd *) cp->scsi_cmd;
  1036. h = cp->h;
  1037. scsi_dma_unmap(cmd); /* undo the DMA mappings */
  1038. if (cp->Header.SGTotal > h->max_cmd_sg_entries)
  1039. hpsa_unmap_sg_chain_block(h, cp);
  1040. cmd->result = (DID_OK << 16); /* host byte */
  1041. cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
  1042. cmd->result |= ei->ScsiStatus;
  1043. /* copy the sense data whether we need to or not. */
  1044. if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo))
  1045. sense_data_size = SCSI_SENSE_BUFFERSIZE;
  1046. else
  1047. sense_data_size = sizeof(ei->SenseInfo);
  1048. if (ei->SenseLen < sense_data_size)
  1049. sense_data_size = ei->SenseLen;
  1050. memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size);
  1051. scsi_set_resid(cmd, ei->ResidualCnt);
  1052. if (ei->CommandStatus == 0) {
  1053. cmd->scsi_done(cmd);
  1054. cmd_free(h, cp);
  1055. return;
  1056. }
  1057. /* an error has occurred */
  1058. switch (ei->CommandStatus) {
  1059. case CMD_TARGET_STATUS:
  1060. if (ei->ScsiStatus) {
  1061. /* Get sense key */
  1062. sense_key = 0xf & ei->SenseInfo[2];
  1063. /* Get additional sense code */
  1064. asc = ei->SenseInfo[12];
  1065. /* Get addition sense code qualifier */
  1066. ascq = ei->SenseInfo[13];
  1067. }
  1068. if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
  1069. if (check_for_unit_attention(h, cp)) {
  1070. cmd->result = DID_SOFT_ERROR << 16;
  1071. break;
  1072. }
  1073. if (sense_key == ILLEGAL_REQUEST) {
  1074. /*
  1075. * SCSI REPORT_LUNS is commonly unsupported on
  1076. * Smart Array. Suppress noisy complaint.
  1077. */
  1078. if (cp->Request.CDB[0] == REPORT_LUNS)
  1079. break;
  1080. /* If ASC/ASCQ indicate Logical Unit
  1081. * Not Supported condition,
  1082. */
  1083. if ((asc == 0x25) && (ascq == 0x0)) {
  1084. dev_warn(&h->pdev->dev, "cp %p "
  1085. "has check condition\n", cp);
  1086. break;
  1087. }
  1088. }
  1089. if (sense_key == NOT_READY) {
  1090. /* If Sense is Not Ready, Logical Unit
  1091. * Not ready, Manual Intervention
  1092. * required
  1093. */
  1094. if ((asc == 0x04) && (ascq == 0x03)) {
  1095. dev_warn(&h->pdev->dev, "cp %p "
  1096. "has check condition: unit "
  1097. "not ready, manual "
  1098. "intervention required\n", cp);
  1099. break;
  1100. }
  1101. }
  1102. if (sense_key == ABORTED_COMMAND) {
  1103. /* Aborted command is retryable */
  1104. dev_warn(&h->pdev->dev, "cp %p "
  1105. "has check condition: aborted command: "
  1106. "ASC: 0x%x, ASCQ: 0x%x\n",
  1107. cp, asc, ascq);
  1108. cmd->result |= DID_SOFT_ERROR << 16;
  1109. break;
  1110. }
  1111. /* Must be some other type of check condition */
  1112. dev_warn(&h->pdev->dev, "cp %p has check condition: "
  1113. "unknown type: "
  1114. "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
  1115. "Returning result: 0x%x, "
  1116. "cmd=[%02x %02x %02x %02x %02x "
  1117. "%02x %02x %02x %02x %02x %02x "
  1118. "%02x %02x %02x %02x %02x]\n",
  1119. cp, sense_key, asc, ascq,
  1120. cmd->result,
  1121. cmd->cmnd[0], cmd->cmnd[1],
  1122. cmd->cmnd[2], cmd->cmnd[3],
  1123. cmd->cmnd[4], cmd->cmnd[5],
  1124. cmd->cmnd[6], cmd->cmnd[7],
  1125. cmd->cmnd[8], cmd->cmnd[9],
  1126. cmd->cmnd[10], cmd->cmnd[11],
  1127. cmd->cmnd[12], cmd->cmnd[13],
  1128. cmd->cmnd[14], cmd->cmnd[15]);
  1129. break;
  1130. }
  1131. /* Problem was not a check condition
  1132. * Pass it up to the upper layers...
  1133. */
  1134. if (ei->ScsiStatus) {
  1135. dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
  1136. "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
  1137. "Returning result: 0x%x\n",
  1138. cp, ei->ScsiStatus,
  1139. sense_key, asc, ascq,
  1140. cmd->result);
  1141. } else { /* scsi status is zero??? How??? */
  1142. dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
  1143. "Returning no connection.\n", cp),
  1144. /* Ordinarily, this case should never happen,
  1145. * but there is a bug in some released firmware
  1146. * revisions that allows it to happen if, for
  1147. * example, a 4100 backplane loses power and
  1148. * the tape drive is in it. We assume that
  1149. * it's a fatal error of some kind because we
  1150. * can't show that it wasn't. We will make it
  1151. * look like selection timeout since that is
  1152. * the most common reason for this to occur,
  1153. * and it's severe enough.
  1154. */
  1155. cmd->result = DID_NO_CONNECT << 16;
  1156. }
  1157. break;
  1158. case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
  1159. break;
  1160. case CMD_DATA_OVERRUN:
  1161. dev_warn(&h->pdev->dev, "cp %p has"
  1162. " completed with data overrun "
  1163. "reported\n", cp);
  1164. break;
  1165. case CMD_INVALID: {
  1166. /* print_bytes(cp, sizeof(*cp), 1, 0);
  1167. print_cmd(cp); */
  1168. /* We get CMD_INVALID if you address a non-existent device
  1169. * instead of a selection timeout (no response). You will
  1170. * see this if you yank out a drive, then try to access it.
  1171. * This is kind of a shame because it means that any other
  1172. * CMD_INVALID (e.g. driver bug) will get interpreted as a
  1173. * missing target. */
  1174. cmd->result = DID_NO_CONNECT << 16;
  1175. }
  1176. break;
  1177. case CMD_PROTOCOL_ERR:
  1178. cmd->result = DID_ERROR << 16;
  1179. dev_warn(&h->pdev->dev, "cp %p has "
  1180. "protocol error\n", cp);
  1181. break;
  1182. case CMD_HARDWARE_ERR:
  1183. cmd->result = DID_ERROR << 16;
  1184. dev_warn(&h->pdev->dev, "cp %p had hardware error\n", cp);
  1185. break;
  1186. case CMD_CONNECTION_LOST:
  1187. cmd->result = DID_ERROR << 16;
  1188. dev_warn(&h->pdev->dev, "cp %p had connection lost\n", cp);
  1189. break;
  1190. case CMD_ABORTED:
  1191. cmd->result = DID_ABORT << 16;
  1192. dev_warn(&h->pdev->dev, "cp %p was aborted with status 0x%x\n",
  1193. cp, ei->ScsiStatus);
  1194. break;
  1195. case CMD_ABORT_FAILED:
  1196. cmd->result = DID_ERROR << 16;
  1197. dev_warn(&h->pdev->dev, "cp %p reports abort failed\n", cp);
  1198. break;
  1199. case CMD_UNSOLICITED_ABORT:
  1200. cmd->result = DID_SOFT_ERROR << 16; /* retry the command */
  1201. dev_warn(&h->pdev->dev, "cp %p aborted due to an unsolicited "
  1202. "abort\n", cp);
  1203. break;
  1204. case CMD_TIMEOUT:
  1205. cmd->result = DID_TIME_OUT << 16;
  1206. dev_warn(&h->pdev->dev, "cp %p timedout\n", cp);
  1207. break;
  1208. case CMD_UNABORTABLE:
  1209. cmd->result = DID_ERROR << 16;
  1210. dev_warn(&h->pdev->dev, "Command unabortable\n");
  1211. break;
  1212. default:
  1213. cmd->result = DID_ERROR << 16;
  1214. dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
  1215. cp, ei->CommandStatus);
  1216. }
  1217. cmd->scsi_done(cmd);
  1218. cmd_free(h, cp);
  1219. }
  1220. static void hpsa_pci_unmap(struct pci_dev *pdev,
  1221. struct CommandList *c, int sg_used, int data_direction)
  1222. {
  1223. int i;
  1224. union u64bit addr64;
  1225. for (i = 0; i < sg_used; i++) {
  1226. addr64.val32.lower = c->SG[i].Addr.lower;
  1227. addr64.val32.upper = c->SG[i].Addr.upper;
  1228. pci_unmap_single(pdev, (dma_addr_t) addr64.val, c->SG[i].Len,
  1229. data_direction);
  1230. }
  1231. }
  1232. static void hpsa_map_one(struct pci_dev *pdev,
  1233. struct CommandList *cp,
  1234. unsigned char *buf,
  1235. size_t buflen,
  1236. int data_direction)
  1237. {
  1238. u64 addr64;
  1239. if (buflen == 0 || data_direction == PCI_DMA_NONE) {
  1240. cp->Header.SGList = 0;
  1241. cp->Header.SGTotal = 0;
  1242. return;
  1243. }
  1244. addr64 = (u64) pci_map_single(pdev, buf, buflen, data_direction);
  1245. cp->SG[0].Addr.lower =
  1246. (u32) (addr64 & (u64) 0x00000000FFFFFFFF);
  1247. cp->SG[0].Addr.upper =
  1248. (u32) ((addr64 >> 32) & (u64) 0x00000000FFFFFFFF);
  1249. cp->SG[0].Len = buflen;
  1250. cp->Header.SGList = (u8) 1; /* no. SGs contig in this cmd */
  1251. cp->Header.SGTotal = (u16) 1; /* total sgs in this cmd list */
  1252. }
  1253. static inline void hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
  1254. struct CommandList *c)
  1255. {
  1256. DECLARE_COMPLETION_ONSTACK(wait);
  1257. c->waiting = &wait;
  1258. enqueue_cmd_and_start_io(h, c);
  1259. wait_for_completion(&wait);
  1260. }
  1261. static void hpsa_scsi_do_simple_cmd_core_if_no_lockup(struct ctlr_info *h,
  1262. struct CommandList *c)
  1263. {
  1264. unsigned long flags;
  1265. /* If controller lockup detected, fake a hardware error. */
  1266. spin_lock_irqsave(&h->lock, flags);
  1267. if (unlikely(h->lockup_detected)) {
  1268. spin_unlock_irqrestore(&h->lock, flags);
  1269. c->err_info->CommandStatus = CMD_HARDWARE_ERR;
  1270. } else {
  1271. spin_unlock_irqrestore(&h->lock, flags);
  1272. hpsa_scsi_do_simple_cmd_core(h, c);
  1273. }
  1274. }
  1275. static void hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
  1276. struct CommandList *c, int data_direction)
  1277. {
  1278. int retry_count = 0;
  1279. do {
  1280. memset(c->err_info, 0, sizeof(*c->err_info));
  1281. hpsa_scsi_do_simple_cmd_core(h, c);
  1282. retry_count++;
  1283. } while (check_for_unit_attention(h, c) && retry_count <= 3);
  1284. hpsa_pci_unmap(h->pdev, c, 1, data_direction);
  1285. }
  1286. static void hpsa_scsi_interpret_error(struct CommandList *cp)
  1287. {
  1288. struct ErrorInfo *ei;
  1289. struct device *d = &cp->h->pdev->dev;
  1290. ei = cp->err_info;
  1291. switch (ei->CommandStatus) {
  1292. case CMD_TARGET_STATUS:
  1293. dev_warn(d, "cmd %p has completed with errors\n", cp);
  1294. dev_warn(d, "cmd %p has SCSI Status = %x\n", cp,
  1295. ei->ScsiStatus);
  1296. if (ei->ScsiStatus == 0)
  1297. dev_warn(d, "SCSI status is abnormally zero. "
  1298. "(probably indicates selection timeout "
  1299. "reported incorrectly due to a known "
  1300. "firmware bug, circa July, 2001.)\n");
  1301. break;
  1302. case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
  1303. dev_info(d, "UNDERRUN\n");
  1304. break;
  1305. case CMD_DATA_OVERRUN:
  1306. dev_warn(d, "cp %p has completed with data overrun\n", cp);
  1307. break;
  1308. case CMD_INVALID: {
  1309. /* controller unfortunately reports SCSI passthru's
  1310. * to non-existent targets as invalid commands.
  1311. */
  1312. dev_warn(d, "cp %p is reported invalid (probably means "
  1313. "target device no longer present)\n", cp);
  1314. /* print_bytes((unsigned char *) cp, sizeof(*cp), 1, 0);
  1315. print_cmd(cp); */
  1316. }
  1317. break;
  1318. case CMD_PROTOCOL_ERR:
  1319. dev_warn(d, "cp %p has protocol error \n", cp);
  1320. break;
  1321. case CMD_HARDWARE_ERR:
  1322. /* cmd->result = DID_ERROR << 16; */
  1323. dev_warn(d, "cp %p had hardware error\n", cp);
  1324. break;
  1325. case CMD_CONNECTION_LOST:
  1326. dev_warn(d, "cp %p had connection lost\n", cp);
  1327. break;
  1328. case CMD_ABORTED:
  1329. dev_warn(d, "cp %p was aborted\n", cp);
  1330. break;
  1331. case CMD_ABORT_FAILED:
  1332. dev_warn(d, "cp %p reports abort failed\n", cp);
  1333. break;
  1334. case CMD_UNSOLICITED_ABORT:
  1335. dev_warn(d, "cp %p aborted due to an unsolicited abort\n", cp);
  1336. break;
  1337. case CMD_TIMEOUT:
  1338. dev_warn(d, "cp %p timed out\n", cp);
  1339. break;
  1340. case CMD_UNABORTABLE:
  1341. dev_warn(d, "Command unabortable\n");
  1342. break;
  1343. default:
  1344. dev_warn(d, "cp %p returned unknown status %x\n", cp,
  1345. ei->CommandStatus);
  1346. }
  1347. }
  1348. static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
  1349. unsigned char page, unsigned char *buf,
  1350. unsigned char bufsize)
  1351. {
  1352. int rc = IO_OK;
  1353. struct CommandList *c;
  1354. struct ErrorInfo *ei;
  1355. c = cmd_special_alloc(h);
  1356. if (c == NULL) { /* trouble... */
  1357. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  1358. return -ENOMEM;
  1359. }
  1360. fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, page, scsi3addr, TYPE_CMD);
  1361. hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
  1362. ei = c->err_info;
  1363. if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
  1364. hpsa_scsi_interpret_error(c);
  1365. rc = -1;
  1366. }
  1367. cmd_special_free(h, c);
  1368. return rc;
  1369. }
  1370. static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr)
  1371. {
  1372. int rc = IO_OK;
  1373. struct CommandList *c;
  1374. struct ErrorInfo *ei;
  1375. c = cmd_special_alloc(h);
  1376. if (c == NULL) { /* trouble... */
  1377. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  1378. return -ENOMEM;
  1379. }
  1380. fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, scsi3addr, TYPE_MSG);
  1381. hpsa_scsi_do_simple_cmd_core(h, c);
  1382. /* no unmap needed here because no data xfer. */
  1383. ei = c->err_info;
  1384. if (ei->CommandStatus != 0) {
  1385. hpsa_scsi_interpret_error(c);
  1386. rc = -1;
  1387. }
  1388. cmd_special_free(h, c);
  1389. return rc;
  1390. }
  1391. static void hpsa_get_raid_level(struct ctlr_info *h,
  1392. unsigned char *scsi3addr, unsigned char *raid_level)
  1393. {
  1394. int rc;
  1395. unsigned char *buf;
  1396. *raid_level = RAID_UNKNOWN;
  1397. buf = kzalloc(64, GFP_KERNEL);
  1398. if (!buf)
  1399. return;
  1400. rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0xC1, buf, 64);
  1401. if (rc == 0)
  1402. *raid_level = buf[8];
  1403. if (*raid_level > RAID_UNKNOWN)
  1404. *raid_level = RAID_UNKNOWN;
  1405. kfree(buf);
  1406. return;
  1407. }
  1408. /* Get the device id from inquiry page 0x83 */
  1409. static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
  1410. unsigned char *device_id, int buflen)
  1411. {
  1412. int rc;
  1413. unsigned char *buf;
  1414. if (buflen > 16)
  1415. buflen = 16;
  1416. buf = kzalloc(64, GFP_KERNEL);
  1417. if (!buf)
  1418. return -1;
  1419. rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0x83, buf, 64);
  1420. if (rc == 0)
  1421. memcpy(device_id, &buf[8], buflen);
  1422. kfree(buf);
  1423. return rc != 0;
  1424. }
  1425. static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
  1426. struct ReportLUNdata *buf, int bufsize,
  1427. int extended_response)
  1428. {
  1429. int rc = IO_OK;
  1430. struct CommandList *c;
  1431. unsigned char scsi3addr[8];
  1432. struct ErrorInfo *ei;
  1433. c = cmd_special_alloc(h);
  1434. if (c == NULL) { /* trouble... */
  1435. dev_err(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  1436. return -1;
  1437. }
  1438. /* address the controller */
  1439. memset(scsi3addr, 0, sizeof(scsi3addr));
  1440. fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
  1441. buf, bufsize, 0, scsi3addr, TYPE_CMD);
  1442. if (extended_response)
  1443. c->Request.CDB[1] = extended_response;
  1444. hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
  1445. ei = c->err_info;
  1446. if (ei->CommandStatus != 0 &&
  1447. ei->CommandStatus != CMD_DATA_UNDERRUN) {
  1448. hpsa_scsi_interpret_error(c);
  1449. rc = -1;
  1450. }
  1451. cmd_special_free(h, c);
  1452. return rc;
  1453. }
  1454. static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
  1455. struct ReportLUNdata *buf,
  1456. int bufsize, int extended_response)
  1457. {
  1458. return hpsa_scsi_do_report_luns(h, 0, buf, bufsize, extended_response);
  1459. }
  1460. static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
  1461. struct ReportLUNdata *buf, int bufsize)
  1462. {
  1463. return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
  1464. }
  1465. static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
  1466. int bus, int target, int lun)
  1467. {
  1468. device->bus = bus;
  1469. device->target = target;
  1470. device->lun = lun;
  1471. }
  1472. static int hpsa_update_device_info(struct ctlr_info *h,
  1473. unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device,
  1474. unsigned char *is_OBDR_device)
  1475. {
  1476. #define OBDR_SIG_OFFSET 43
  1477. #define OBDR_TAPE_SIG "$DR-10"
  1478. #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1)
  1479. #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN)
  1480. unsigned char *inq_buff;
  1481. unsigned char *obdr_sig;
  1482. inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
  1483. if (!inq_buff)
  1484. goto bail_out;
  1485. /* Do an inquiry to the device to see what it is. */
  1486. if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
  1487. (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
  1488. /* Inquiry failed (msg printed already) */
  1489. dev_err(&h->pdev->dev,
  1490. "hpsa_update_device_info: inquiry failed\n");
  1491. goto bail_out;
  1492. }
  1493. this_device->devtype = (inq_buff[0] & 0x1f);
  1494. memcpy(this_device->scsi3addr, scsi3addr, 8);
  1495. memcpy(this_device->vendor, &inq_buff[8],
  1496. sizeof(this_device->vendor));
  1497. memcpy(this_device->model, &inq_buff[16],
  1498. sizeof(this_device->model));
  1499. memset(this_device->device_id, 0,
  1500. sizeof(this_device->device_id));
  1501. hpsa_get_device_id(h, scsi3addr, this_device->device_id,
  1502. sizeof(this_device->device_id));
  1503. if (this_device->devtype == TYPE_DISK &&
  1504. is_logical_dev_addr_mode(scsi3addr))
  1505. hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
  1506. else
  1507. this_device->raid_level = RAID_UNKNOWN;
  1508. if (is_OBDR_device) {
  1509. /* See if this is a One-Button-Disaster-Recovery device
  1510. * by looking for "$DR-10" at offset 43 in inquiry data.
  1511. */
  1512. obdr_sig = &inq_buff[OBDR_SIG_OFFSET];
  1513. *is_OBDR_device = (this_device->devtype == TYPE_ROM &&
  1514. strncmp(obdr_sig, OBDR_TAPE_SIG,
  1515. OBDR_SIG_LEN) == 0);
  1516. }
  1517. kfree(inq_buff);
  1518. return 0;
  1519. bail_out:
  1520. kfree(inq_buff);
  1521. return 1;
  1522. }
  1523. static unsigned char *ext_target_model[] = {
  1524. "MSA2012",
  1525. "MSA2024",
  1526. "MSA2312",
  1527. "MSA2324",
  1528. "P2000 G3 SAS",
  1529. NULL,
  1530. };
  1531. static int is_ext_target(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
  1532. {
  1533. int i;
  1534. for (i = 0; ext_target_model[i]; i++)
  1535. if (strncmp(device->model, ext_target_model[i],
  1536. strlen(ext_target_model[i])) == 0)
  1537. return 1;
  1538. return 0;
  1539. }
  1540. /* Helper function to assign bus, target, lun mapping of devices.
  1541. * Puts non-external target logical volumes on bus 0, external target logical
  1542. * volumes on bus 1, physical devices on bus 2. and the hba on bus 3.
  1543. * Logical drive target and lun are assigned at this time, but
  1544. * physical device lun and target assignment are deferred (assigned
  1545. * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
  1546. */
  1547. static void figure_bus_target_lun(struct ctlr_info *h,
  1548. u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device)
  1549. {
  1550. u32 lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
  1551. if (!is_logical_dev_addr_mode(lunaddrbytes)) {
  1552. /* physical device, target and lun filled in later */
  1553. if (is_hba_lunid(lunaddrbytes))
  1554. hpsa_set_bus_target_lun(device, 3, 0, lunid & 0x3fff);
  1555. else
  1556. /* defer target, lun assignment for physical devices */
  1557. hpsa_set_bus_target_lun(device, 2, -1, -1);
  1558. return;
  1559. }
  1560. /* It's a logical device */
  1561. if (is_ext_target(h, device)) {
  1562. /* external target way, put logicals on bus 1
  1563. * and match target/lun numbers box
  1564. * reports, other smart array, bus 0, target 0, match lunid
  1565. */
  1566. hpsa_set_bus_target_lun(device,
  1567. 1, (lunid >> 16) & 0x3fff, lunid & 0x00ff);
  1568. return;
  1569. }
  1570. hpsa_set_bus_target_lun(device, 0, 0, lunid & 0x3fff);
  1571. }
  1572. /*
  1573. * If there is no lun 0 on a target, linux won't find any devices.
  1574. * For the external targets (arrays), we have to manually detect the enclosure
  1575. * which is at lun zero, as CCISS_REPORT_PHYSICAL_LUNS doesn't report
  1576. * it for some reason. *tmpdevice is the target we're adding,
  1577. * this_device is a pointer into the current element of currentsd[]
  1578. * that we're building up in update_scsi_devices(), below.
  1579. * lunzerobits is a bitmap that tracks which targets already have a
  1580. * lun 0 assigned.
  1581. * Returns 1 if an enclosure was added, 0 if not.
  1582. */
  1583. static int add_ext_target_dev(struct ctlr_info *h,
  1584. struct hpsa_scsi_dev_t *tmpdevice,
  1585. struct hpsa_scsi_dev_t *this_device, u8 *lunaddrbytes,
  1586. unsigned long lunzerobits[], int *n_ext_target_devs)
  1587. {
  1588. unsigned char scsi3addr[8];
  1589. if (test_bit(tmpdevice->target, lunzerobits))
  1590. return 0; /* There is already a lun 0 on this target. */
  1591. if (!is_logical_dev_addr_mode(lunaddrbytes))
  1592. return 0; /* It's the logical targets that may lack lun 0. */
  1593. if (!is_ext_target(h, tmpdevice))
  1594. return 0; /* Only external target devices have this problem. */
  1595. if (tmpdevice->lun == 0) /* if lun is 0, then we have a lun 0. */
  1596. return 0;
  1597. memset(scsi3addr, 0, 8);
  1598. scsi3addr[3] = tmpdevice->target;
  1599. if (is_hba_lunid(scsi3addr))
  1600. return 0; /* Don't add the RAID controller here. */
  1601. if (is_scsi_rev_5(h))
  1602. return 0; /* p1210m doesn't need to do this. */
  1603. if (*n_ext_target_devs >= MAX_EXT_TARGETS) {
  1604. dev_warn(&h->pdev->dev, "Maximum number of external "
  1605. "target devices exceeded. Check your hardware "
  1606. "configuration.");
  1607. return 0;
  1608. }
  1609. if (hpsa_update_device_info(h, scsi3addr, this_device, NULL))
  1610. return 0;
  1611. (*n_ext_target_devs)++;
  1612. hpsa_set_bus_target_lun(this_device,
  1613. tmpdevice->bus, tmpdevice->target, 0);
  1614. set_bit(tmpdevice->target, lunzerobits);
  1615. return 1;
  1616. }
  1617. /*
  1618. * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev,
  1619. * logdev. The number of luns in physdev and logdev are returned in
  1620. * *nphysicals and *nlogicals, respectively.
  1621. * Returns 0 on success, -1 otherwise.
  1622. */
  1623. static int hpsa_gather_lun_info(struct ctlr_info *h,
  1624. int reportlunsize,
  1625. struct ReportLUNdata *physdev, u32 *nphysicals,
  1626. struct ReportLUNdata *logdev, u32 *nlogicals)
  1627. {
  1628. if (hpsa_scsi_do_report_phys_luns(h, physdev, reportlunsize, 0)) {
  1629. dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
  1630. return -1;
  1631. }
  1632. *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 8;
  1633. if (*nphysicals > HPSA_MAX_PHYS_LUN) {
  1634. dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded."
  1635. " %d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
  1636. *nphysicals - HPSA_MAX_PHYS_LUN);
  1637. *nphysicals = HPSA_MAX_PHYS_LUN;
  1638. }
  1639. if (hpsa_scsi_do_report_log_luns(h, logdev, reportlunsize)) {
  1640. dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
  1641. return -1;
  1642. }
  1643. *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
  1644. /* Reject Logicals in excess of our max capability. */
  1645. if (*nlogicals > HPSA_MAX_LUN) {
  1646. dev_warn(&h->pdev->dev,
  1647. "maximum logical LUNs (%d) exceeded. "
  1648. "%d LUNs ignored.\n", HPSA_MAX_LUN,
  1649. *nlogicals - HPSA_MAX_LUN);
  1650. *nlogicals = HPSA_MAX_LUN;
  1651. }
  1652. if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
  1653. dev_warn(&h->pdev->dev,
  1654. "maximum logical + physical LUNs (%d) exceeded. "
  1655. "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
  1656. *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
  1657. *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
  1658. }
  1659. return 0;
  1660. }
  1661. u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, int i,
  1662. int nphysicals, int nlogicals, struct ReportLUNdata *physdev_list,
  1663. struct ReportLUNdata *logdev_list)
  1664. {
  1665. /* Helper function, figure out where the LUN ID info is coming from
  1666. * given index i, lists of physical and logical devices, where in
  1667. * the list the raid controller is supposed to appear (first or last)
  1668. */
  1669. int logicals_start = nphysicals + (raid_ctlr_position == 0);
  1670. int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
  1671. if (i == raid_ctlr_position)
  1672. return RAID_CTLR_LUNID;
  1673. if (i < logicals_start)
  1674. return &physdev_list->LUN[i - (raid_ctlr_position == 0)][0];
  1675. if (i < last_device)
  1676. return &logdev_list->LUN[i - nphysicals -
  1677. (raid_ctlr_position == 0)][0];
  1678. BUG();
  1679. return NULL;
  1680. }
  1681. static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno)
  1682. {
  1683. /* the idea here is we could get notified
  1684. * that some devices have changed, so we do a report
  1685. * physical luns and report logical luns cmd, and adjust
  1686. * our list of devices accordingly.
  1687. *
  1688. * The scsi3addr's of devices won't change so long as the
  1689. * adapter is not reset. That means we can rescan and
  1690. * tell which devices we already know about, vs. new
  1691. * devices, vs. disappearing devices.
  1692. */
  1693. struct ReportLUNdata *physdev_list = NULL;
  1694. struct ReportLUNdata *logdev_list = NULL;
  1695. u32 nphysicals = 0;
  1696. u32 nlogicals = 0;
  1697. u32 ndev_allocated = 0;
  1698. struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
  1699. int ncurrent = 0;
  1700. int reportlunsize = sizeof(*physdev_list) + HPSA_MAX_PHYS_LUN * 8;
  1701. int i, n_ext_target_devs, ndevs_to_allocate;
  1702. int raid_ctlr_position;
  1703. DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS);
  1704. currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL);
  1705. physdev_list = kzalloc(reportlunsize, GFP_KERNEL);
  1706. logdev_list = kzalloc(reportlunsize, GFP_KERNEL);
  1707. tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
  1708. if (!currentsd || !physdev_list || !logdev_list || !tmpdevice) {
  1709. dev_err(&h->pdev->dev, "out of memory\n");
  1710. goto out;
  1711. }
  1712. memset(lunzerobits, 0, sizeof(lunzerobits));
  1713. if (hpsa_gather_lun_info(h, reportlunsize, physdev_list, &nphysicals,
  1714. logdev_list, &nlogicals))
  1715. goto out;
  1716. /* We might see up to the maximum number of logical and physical disks
  1717. * plus external target devices, and a device for the local RAID
  1718. * controller.
  1719. */
  1720. ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1;
  1721. /* Allocate the per device structures */
  1722. for (i = 0; i < ndevs_to_allocate; i++) {
  1723. if (i >= HPSA_MAX_DEVICES) {
  1724. dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded."
  1725. " %d devices ignored.\n", HPSA_MAX_DEVICES,
  1726. ndevs_to_allocate - HPSA_MAX_DEVICES);
  1727. break;
  1728. }
  1729. currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
  1730. if (!currentsd[i]) {
  1731. dev_warn(&h->pdev->dev, "out of memory at %s:%d\n",
  1732. __FILE__, __LINE__);
  1733. goto out;
  1734. }
  1735. ndev_allocated++;
  1736. }
  1737. if (unlikely(is_scsi_rev_5(h)))
  1738. raid_ctlr_position = 0;
  1739. else
  1740. raid_ctlr_position = nphysicals + nlogicals;
  1741. /* adjust our table of devices */
  1742. n_ext_target_devs = 0;
  1743. for (i = 0; i < nphysicals + nlogicals + 1; i++) {
  1744. u8 *lunaddrbytes, is_OBDR = 0;
  1745. /* Figure out where the LUN ID info is coming from */
  1746. lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
  1747. i, nphysicals, nlogicals, physdev_list, logdev_list);
  1748. /* skip masked physical devices. */
  1749. if (lunaddrbytes[3] & 0xC0 &&
  1750. i < nphysicals + (raid_ctlr_position == 0))
  1751. continue;
  1752. /* Get device type, vendor, model, device id */
  1753. if (hpsa_update_device_info(h, lunaddrbytes, tmpdevice,
  1754. &is_OBDR))
  1755. continue; /* skip it if we can't talk to it. */
  1756. figure_bus_target_lun(h, lunaddrbytes, tmpdevice);
  1757. this_device = currentsd[ncurrent];
  1758. /*
  1759. * For external target devices, we have to insert a LUN 0 which
  1760. * doesn't show up in CCISS_REPORT_PHYSICAL data, but there
  1761. * is nonetheless an enclosure device there. We have to
  1762. * present that otherwise linux won't find anything if
  1763. * there is no lun 0.
  1764. */
  1765. if (add_ext_target_dev(h, tmpdevice, this_device,
  1766. lunaddrbytes, lunzerobits,
  1767. &n_ext_target_devs)) {
  1768. ncurrent++;
  1769. this_device = currentsd[ncurrent];
  1770. }
  1771. *this_device = *tmpdevice;
  1772. switch (this_device->devtype) {
  1773. case TYPE_ROM:
  1774. /* We don't *really* support actual CD-ROM devices,
  1775. * just "One Button Disaster Recovery" tape drive
  1776. * which temporarily pretends to be a CD-ROM drive.
  1777. * So we check that the device is really an OBDR tape
  1778. * device by checking for "$DR-10" in bytes 43-48 of
  1779. * the inquiry data.
  1780. */
  1781. if (is_OBDR)
  1782. ncurrent++;
  1783. break;
  1784. case TYPE_DISK:
  1785. if (i < nphysicals)
  1786. break;
  1787. ncurrent++;
  1788. break;
  1789. case TYPE_TAPE:
  1790. case TYPE_MEDIUM_CHANGER:
  1791. ncurrent++;
  1792. break;
  1793. case TYPE_RAID:
  1794. /* Only present the Smartarray HBA as a RAID controller.
  1795. * If it's a RAID controller other than the HBA itself
  1796. * (an external RAID controller, MSA500 or similar)
  1797. * don't present it.
  1798. */
  1799. if (!is_hba_lunid(lunaddrbytes))
  1800. break;
  1801. ncurrent++;
  1802. break;
  1803. default:
  1804. break;
  1805. }
  1806. if (ncurrent >= HPSA_MAX_DEVICES)
  1807. break;
  1808. }
  1809. adjust_hpsa_scsi_table(h, hostno, currentsd, ncurrent);
  1810. out:
  1811. kfree(tmpdevice);
  1812. for (i = 0; i < ndev_allocated; i++)
  1813. kfree(currentsd[i]);
  1814. kfree(currentsd);
  1815. kfree(physdev_list);
  1816. kfree(logdev_list);
  1817. }
  1818. /* hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
  1819. * dma mapping and fills in the scatter gather entries of the
  1820. * hpsa command, cp.
  1821. */
  1822. static int hpsa_scatter_gather(struct ctlr_info *h,
  1823. struct CommandList *cp,
  1824. struct scsi_cmnd *cmd)
  1825. {
  1826. unsigned int len;
  1827. struct scatterlist *sg;
  1828. u64 addr64;
  1829. int use_sg, i, sg_index, chained;
  1830. struct SGDescriptor *curr_sg;
  1831. BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
  1832. use_sg = scsi_dma_map(cmd);
  1833. if (use_sg < 0)
  1834. return use_sg;
  1835. if (!use_sg)
  1836. goto sglist_finished;
  1837. curr_sg = cp->SG;
  1838. chained = 0;
  1839. sg_index = 0;
  1840. scsi_for_each_sg(cmd, sg, use_sg, i) {
  1841. if (i == h->max_cmd_sg_entries - 1 &&
  1842. use_sg > h->max_cmd_sg_entries) {
  1843. chained = 1;
  1844. curr_sg = h->cmd_sg_list[cp->cmdindex];
  1845. sg_index = 0;
  1846. }
  1847. addr64 = (u64) sg_dma_address(sg);
  1848. len = sg_dma_len(sg);
  1849. curr_sg->Addr.lower = (u32) (addr64 & 0x0FFFFFFFFULL);
  1850. curr_sg->Addr.upper = (u32) ((addr64 >> 32) & 0x0FFFFFFFFULL);
  1851. curr_sg->Len = len;
  1852. curr_sg->Ext = 0; /* we are not chaining */
  1853. curr_sg++;
  1854. }
  1855. if (use_sg + chained > h->maxSG)
  1856. h->maxSG = use_sg + chained;
  1857. if (chained) {
  1858. cp->Header.SGList = h->max_cmd_sg_entries;
  1859. cp->Header.SGTotal = (u16) (use_sg + 1);
  1860. hpsa_map_sg_chain_block(h, cp);
  1861. return 0;
  1862. }
  1863. sglist_finished:
  1864. cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */
  1865. cp->Header.SGTotal = (u16) use_sg; /* total sgs in this cmd list */
  1866. return 0;
  1867. }
  1868. static int hpsa_scsi_queue_command_lck(struct scsi_cmnd *cmd,
  1869. void (*done)(struct scsi_cmnd *))
  1870. {
  1871. struct ctlr_info *h;
  1872. struct hpsa_scsi_dev_t *dev;
  1873. unsigned char scsi3addr[8];
  1874. struct CommandList *c;
  1875. unsigned long flags;
  1876. /* Get the ptr to our adapter structure out of cmd->host. */
  1877. h = sdev_to_hba(cmd->device);
  1878. dev = cmd->device->hostdata;
  1879. if (!dev) {
  1880. cmd->result = DID_NO_CONNECT << 16;
  1881. done(cmd);
  1882. return 0;
  1883. }
  1884. memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr));
  1885. spin_lock_irqsave(&h->lock, flags);
  1886. if (unlikely(h->lockup_detected)) {
  1887. spin_unlock_irqrestore(&h->lock, flags);
  1888. cmd->result = DID_ERROR << 16;
  1889. done(cmd);
  1890. return 0;
  1891. }
  1892. /* Need a lock as this is being allocated from the pool */
  1893. c = cmd_alloc(h);
  1894. spin_unlock_irqrestore(&h->lock, flags);
  1895. if (c == NULL) { /* trouble... */
  1896. dev_err(&h->pdev->dev, "cmd_alloc returned NULL!\n");
  1897. return SCSI_MLQUEUE_HOST_BUSY;
  1898. }
  1899. /* Fill in the command list header */
  1900. cmd->scsi_done = done; /* save this for use by completion code */
  1901. /* save c in case we have to abort it */
  1902. cmd->host_scribble = (unsigned char *) c;
  1903. c->cmd_type = CMD_SCSI;
  1904. c->scsi_cmd = cmd;
  1905. c->Header.ReplyQueue = 0; /* unused in simple mode */
  1906. memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
  1907. c->Header.Tag.lower = (c->cmdindex << DIRECT_LOOKUP_SHIFT);
  1908. c->Header.Tag.lower |= DIRECT_LOOKUP_BIT;
  1909. /* Fill in the request block... */
  1910. c->Request.Timeout = 0;
  1911. memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
  1912. BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
  1913. c->Request.CDBLen = cmd->cmd_len;
  1914. memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
  1915. c->Request.Type.Type = TYPE_CMD;
  1916. c->Request.Type.Attribute = ATTR_SIMPLE;
  1917. switch (cmd->sc_data_direction) {
  1918. case DMA_TO_DEVICE:
  1919. c->Request.Type.Direction = XFER_WRITE;
  1920. break;
  1921. case DMA_FROM_DEVICE:
  1922. c->Request.Type.Direction = XFER_READ;
  1923. break;
  1924. case DMA_NONE:
  1925. c->Request.Type.Direction = XFER_NONE;
  1926. break;
  1927. case DMA_BIDIRECTIONAL:
  1928. /* This can happen if a buggy application does a scsi passthru
  1929. * and sets both inlen and outlen to non-zero. ( see
  1930. * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
  1931. */
  1932. c->Request.Type.Direction = XFER_RSVD;
  1933. /* This is technically wrong, and hpsa controllers should
  1934. * reject it with CMD_INVALID, which is the most correct
  1935. * response, but non-fibre backends appear to let it
  1936. * slide by, and give the same results as if this field
  1937. * were set correctly. Either way is acceptable for
  1938. * our purposes here.
  1939. */
  1940. break;
  1941. default:
  1942. dev_err(&h->pdev->dev, "unknown data direction: %d\n",
  1943. cmd->sc_data_direction);
  1944. BUG();
  1945. break;
  1946. }
  1947. if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
  1948. cmd_free(h, c);
  1949. return SCSI_MLQUEUE_HOST_BUSY;
  1950. }
  1951. enqueue_cmd_and_start_io(h, c);
  1952. /* the cmd'll come back via intr handler in complete_scsi_command() */
  1953. return 0;
  1954. }
  1955. static DEF_SCSI_QCMD(hpsa_scsi_queue_command)
  1956. static void hpsa_scan_start(struct Scsi_Host *sh)
  1957. {
  1958. struct ctlr_info *h = shost_to_hba(sh);
  1959. unsigned long flags;
  1960. /* wait until any scan already in progress is finished. */
  1961. while (1) {
  1962. spin_lock_irqsave(&h->scan_lock, flags);
  1963. if (h->scan_finished)
  1964. break;
  1965. spin_unlock_irqrestore(&h->scan_lock, flags);
  1966. wait_event(h->scan_wait_queue, h->scan_finished);
  1967. /* Note: We don't need to worry about a race between this
  1968. * thread and driver unload because the midlayer will
  1969. * have incremented the reference count, so unload won't
  1970. * happen if we're in here.
  1971. */
  1972. }
  1973. h->scan_finished = 0; /* mark scan as in progress */
  1974. spin_unlock_irqrestore(&h->scan_lock, flags);
  1975. hpsa_update_scsi_devices(h, h->scsi_host->host_no);
  1976. spin_lock_irqsave(&h->scan_lock, flags);
  1977. h->scan_finished = 1; /* mark scan as finished. */
  1978. wake_up_all(&h->scan_wait_queue);
  1979. spin_unlock_irqrestore(&h->scan_lock, flags);
  1980. }
  1981. static int hpsa_scan_finished(struct Scsi_Host *sh,
  1982. unsigned long elapsed_time)
  1983. {
  1984. struct ctlr_info *h = shost_to_hba(sh);
  1985. unsigned long flags;
  1986. int finished;
  1987. spin_lock_irqsave(&h->scan_lock, flags);
  1988. finished = h->scan_finished;
  1989. spin_unlock_irqrestore(&h->scan_lock, flags);
  1990. return finished;
  1991. }
  1992. static int hpsa_change_queue_depth(struct scsi_device *sdev,
  1993. int qdepth, int reason)
  1994. {
  1995. struct ctlr_info *h = sdev_to_hba(sdev);
  1996. if (reason != SCSI_QDEPTH_DEFAULT)
  1997. return -ENOTSUPP;
  1998. if (qdepth < 1)
  1999. qdepth = 1;
  2000. else
  2001. if (qdepth > h->nr_cmds)
  2002. qdepth = h->nr_cmds;
  2003. scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
  2004. return sdev->queue_depth;
  2005. }
  2006. static void hpsa_unregister_scsi(struct ctlr_info *h)
  2007. {
  2008. /* we are being forcibly unloaded, and may not refuse. */
  2009. scsi_remove_host(h->scsi_host);
  2010. scsi_host_put(h->scsi_host);
  2011. h->scsi_host = NULL;
  2012. }
  2013. static int hpsa_register_scsi(struct ctlr_info *h)
  2014. {
  2015. struct Scsi_Host *sh;
  2016. int error;
  2017. sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
  2018. if (sh == NULL)
  2019. goto fail;
  2020. sh->io_port = 0;
  2021. sh->n_io_port = 0;
  2022. sh->this_id = -1;
  2023. sh->max_channel = 3;
  2024. sh->max_cmd_len = MAX_COMMAND_SIZE;
  2025. sh->max_lun = HPSA_MAX_LUN;
  2026. sh->max_id = HPSA_MAX_LUN;
  2027. sh->can_queue = h->nr_cmds;
  2028. sh->cmd_per_lun = h->nr_cmds;
  2029. sh->sg_tablesize = h->maxsgentries;
  2030. h->scsi_host = sh;
  2031. sh->hostdata[0] = (unsigned long) h;
  2032. sh->irq = h->intr[h->intr_mode];
  2033. sh->unique_id = sh->irq;
  2034. error = scsi_add_host(sh, &h->pdev->dev);
  2035. if (error)
  2036. goto fail_host_put;
  2037. scsi_scan_host(sh);
  2038. return 0;
  2039. fail_host_put:
  2040. dev_err(&h->pdev->dev, "%s: scsi_add_host"
  2041. " failed for controller %d\n", __func__, h->ctlr);
  2042. scsi_host_put(sh);
  2043. return error;
  2044. fail:
  2045. dev_err(&h->pdev->dev, "%s: scsi_host_alloc"
  2046. " failed for controller %d\n", __func__, h->ctlr);
  2047. return -ENOMEM;
  2048. }
  2049. static int wait_for_device_to_become_ready(struct ctlr_info *h,
  2050. unsigned char lunaddr[])
  2051. {
  2052. int rc = 0;
  2053. int count = 0;
  2054. int waittime = 1; /* seconds */
  2055. struct CommandList *c;
  2056. c = cmd_special_alloc(h);
  2057. if (!c) {
  2058. dev_warn(&h->pdev->dev, "out of memory in "
  2059. "wait_for_device_to_become_ready.\n");
  2060. return IO_ERROR;
  2061. }
  2062. /* Send test unit ready until device ready, or give up. */
  2063. while (count < HPSA_TUR_RETRY_LIMIT) {
  2064. /* Wait for a bit. do this first, because if we send
  2065. * the TUR right away, the reset will just abort it.
  2066. */
  2067. msleep(1000 * waittime);
  2068. count++;
  2069. /* Increase wait time with each try, up to a point. */
  2070. if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
  2071. waittime = waittime * 2;
  2072. /* Send the Test Unit Ready */
  2073. fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, lunaddr, TYPE_CMD);
  2074. hpsa_scsi_do_simple_cmd_core(h, c);
  2075. /* no unmap needed here because no data xfer. */
  2076. if (c->err_info->CommandStatus == CMD_SUCCESS)
  2077. break;
  2078. if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
  2079. c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
  2080. (c->err_info->SenseInfo[2] == NO_SENSE ||
  2081. c->err_info->SenseInfo[2] == UNIT_ATTENTION))
  2082. break;
  2083. dev_warn(&h->pdev->dev, "waiting %d secs "
  2084. "for device to become ready.\n", waittime);
  2085. rc = 1; /* device not ready. */
  2086. }
  2087. if (rc)
  2088. dev_warn(&h->pdev->dev, "giving up on device.\n");
  2089. else
  2090. dev_warn(&h->pdev->dev, "device is ready.\n");
  2091. cmd_special_free(h, c);
  2092. return rc;
  2093. }
  2094. /* Need at least one of these error handlers to keep ../scsi/hosts.c from
  2095. * complaining. Doing a host- or bus-reset can't do anything good here.
  2096. */
  2097. static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
  2098. {
  2099. int rc;
  2100. struct ctlr_info *h;
  2101. struct hpsa_scsi_dev_t *dev;
  2102. /* find the controller to which the command to be aborted was sent */
  2103. h = sdev_to_hba(scsicmd->device);
  2104. if (h == NULL) /* paranoia */
  2105. return FAILED;
  2106. dev = scsicmd->device->hostdata;
  2107. if (!dev) {
  2108. dev_err(&h->pdev->dev, "hpsa_eh_device_reset_handler: "
  2109. "device lookup failed.\n");
  2110. return FAILED;
  2111. }
  2112. dev_warn(&h->pdev->dev, "resetting device %d:%d:%d:%d\n",
  2113. h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
  2114. /* send a reset to the SCSI LUN which the command was sent to */
  2115. rc = hpsa_send_reset(h, dev->scsi3addr);
  2116. if (rc == 0 && wait_for_device_to_become_ready(h, dev->scsi3addr) == 0)
  2117. return SUCCESS;
  2118. dev_warn(&h->pdev->dev, "resetting device failed.\n");
  2119. return FAILED;
  2120. }
  2121. /*
  2122. * For operations that cannot sleep, a command block is allocated at init,
  2123. * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
  2124. * which ones are free or in use. Lock must be held when calling this.
  2125. * cmd_free() is the complement.
  2126. */
  2127. static struct CommandList *cmd_alloc(struct ctlr_info *h)
  2128. {
  2129. struct CommandList *c;
  2130. int i;
  2131. union u64bit temp64;
  2132. dma_addr_t cmd_dma_handle, err_dma_handle;
  2133. do {
  2134. i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
  2135. if (i == h->nr_cmds)
  2136. return NULL;
  2137. } while (test_and_set_bit
  2138. (i & (BITS_PER_LONG - 1),
  2139. h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0);
  2140. c = h->cmd_pool + i;
  2141. memset(c, 0, sizeof(*c));
  2142. cmd_dma_handle = h->cmd_pool_dhandle
  2143. + i * sizeof(*c);
  2144. c->err_info = h->errinfo_pool + i;
  2145. memset(c->err_info, 0, sizeof(*c->err_info));
  2146. err_dma_handle = h->errinfo_pool_dhandle
  2147. + i * sizeof(*c->err_info);
  2148. h->nr_allocs++;
  2149. c->cmdindex = i;
  2150. INIT_LIST_HEAD(&c->list);
  2151. c->busaddr = (u32) cmd_dma_handle;
  2152. temp64.val = (u64) err_dma_handle;
  2153. c->ErrDesc.Addr.lower = temp64.val32.lower;
  2154. c->ErrDesc.Addr.upper = temp64.val32.upper;
  2155. c->ErrDesc.Len = sizeof(*c->err_info);
  2156. c->h = h;
  2157. return c;
  2158. }
  2159. /* For operations that can wait for kmalloc to possibly sleep,
  2160. * this routine can be called. Lock need not be held to call
  2161. * cmd_special_alloc. cmd_special_free() is the complement.
  2162. */
  2163. static struct CommandList *cmd_special_alloc(struct ctlr_info *h)
  2164. {
  2165. struct CommandList *c;
  2166. union u64bit temp64;
  2167. dma_addr_t cmd_dma_handle, err_dma_handle;
  2168. c = pci_alloc_consistent(h->pdev, sizeof(*c), &cmd_dma_handle);
  2169. if (c == NULL)
  2170. return NULL;
  2171. memset(c, 0, sizeof(*c));
  2172. c->cmdindex = -1;
  2173. c->err_info = pci_alloc_consistent(h->pdev, sizeof(*c->err_info),
  2174. &err_dma_handle);
  2175. if (c->err_info == NULL) {
  2176. pci_free_consistent(h->pdev,
  2177. sizeof(*c), c, cmd_dma_handle);
  2178. return NULL;
  2179. }
  2180. memset(c->err_info, 0, sizeof(*c->err_info));
  2181. INIT_LIST_HEAD(&c->list);
  2182. c->busaddr = (u32) cmd_dma_handle;
  2183. temp64.val = (u64) err_dma_handle;
  2184. c->ErrDesc.Addr.lower = temp64.val32.lower;
  2185. c->ErrDesc.Addr.upper = temp64.val32.upper;
  2186. c->ErrDesc.Len = sizeof(*c->err_info);
  2187. c->h = h;
  2188. return c;
  2189. }
  2190. static void cmd_free(struct ctlr_info *h, struct CommandList *c)
  2191. {
  2192. int i;
  2193. i = c - h->cmd_pool;
  2194. clear_bit(i & (BITS_PER_LONG - 1),
  2195. h->cmd_pool_bits + (i / BITS_PER_LONG));
  2196. h->nr_frees++;
  2197. }
  2198. static void cmd_special_free(struct ctlr_info *h, struct CommandList *c)
  2199. {
  2200. union u64bit temp64;
  2201. temp64.val32.lower = c->ErrDesc.Addr.lower;
  2202. temp64.val32.upper = c->ErrDesc.Addr.upper;
  2203. pci_free_consistent(h->pdev, sizeof(*c->err_info),
  2204. c->err_info, (dma_addr_t) temp64.val);
  2205. pci_free_consistent(h->pdev, sizeof(*c),
  2206. c, (dma_addr_t) (c->busaddr & DIRECT_LOOKUP_MASK));
  2207. }
  2208. #ifdef CONFIG_COMPAT
  2209. static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, void *arg)
  2210. {
  2211. IOCTL32_Command_struct __user *arg32 =
  2212. (IOCTL32_Command_struct __user *) arg;
  2213. IOCTL_Command_struct arg64;
  2214. IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
  2215. int err;
  2216. u32 cp;
  2217. memset(&arg64, 0, sizeof(arg64));
  2218. err = 0;
  2219. err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
  2220. sizeof(arg64.LUN_info));
  2221. err |= copy_from_user(&arg64.Request, &arg32->Request,
  2222. sizeof(arg64.Request));
  2223. err |= copy_from_user(&arg64.error_info, &arg32->error_info,
  2224. sizeof(arg64.error_info));
  2225. err |= get_user(arg64.buf_size, &arg32->buf_size);
  2226. err |= get_user(cp, &arg32->buf);
  2227. arg64.buf = compat_ptr(cp);
  2228. err |= copy_to_user(p, &arg64, sizeof(arg64));
  2229. if (err)
  2230. return -EFAULT;
  2231. err = hpsa_ioctl(dev, CCISS_PASSTHRU, (void *)p);
  2232. if (err)
  2233. return err;
  2234. err |= copy_in_user(&arg32->error_info, &p->error_info,
  2235. sizeof(arg32->error_info));
  2236. if (err)
  2237. return -EFAULT;
  2238. return err;
  2239. }
  2240. static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
  2241. int cmd, void *arg)
  2242. {
  2243. BIG_IOCTL32_Command_struct __user *arg32 =
  2244. (BIG_IOCTL32_Command_struct __user *) arg;
  2245. BIG_IOCTL_Command_struct arg64;
  2246. BIG_IOCTL_Command_struct __user *p =
  2247. compat_alloc_user_space(sizeof(arg64));
  2248. int err;
  2249. u32 cp;
  2250. memset(&arg64, 0, sizeof(arg64));
  2251. err = 0;
  2252. err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
  2253. sizeof(arg64.LUN_info));
  2254. err |= copy_from_user(&arg64.Request, &arg32->Request,
  2255. sizeof(arg64.Request));
  2256. err |= copy_from_user(&arg64.error_info, &arg32->error_info,
  2257. sizeof(arg64.error_info));
  2258. err |= get_user(arg64.buf_size, &arg32->buf_size);
  2259. err |= get_user(arg64.malloc_size, &arg32->malloc_size);
  2260. err |= get_user(cp, &arg32->buf);
  2261. arg64.buf = compat_ptr(cp);
  2262. err |= copy_to_user(p, &arg64, sizeof(arg64));
  2263. if (err)
  2264. return -EFAULT;
  2265. err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, (void *)p);
  2266. if (err)
  2267. return err;
  2268. err |= copy_in_user(&arg32->error_info, &p->error_info,
  2269. sizeof(arg32->error_info));
  2270. if (err)
  2271. return -EFAULT;
  2272. return err;
  2273. }
  2274. static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg)
  2275. {
  2276. switch (cmd) {
  2277. case CCISS_GETPCIINFO:
  2278. case CCISS_GETINTINFO:
  2279. case CCISS_SETINTINFO:
  2280. case CCISS_GETNODENAME:
  2281. case CCISS_SETNODENAME:
  2282. case CCISS_GETHEARTBEAT:
  2283. case CCISS_GETBUSTYPES:
  2284. case CCISS_GETFIRMVER:
  2285. case CCISS_GETDRIVVER:
  2286. case CCISS_REVALIDVOLS:
  2287. case CCISS_DEREGDISK:
  2288. case CCISS_REGNEWDISK:
  2289. case CCISS_REGNEWD:
  2290. case CCISS_RESCANDISK:
  2291. case CCISS_GETLUNINFO:
  2292. return hpsa_ioctl(dev, cmd, arg);
  2293. case CCISS_PASSTHRU32:
  2294. return hpsa_ioctl32_passthru(dev, cmd, arg);
  2295. case CCISS_BIG_PASSTHRU32:
  2296. return hpsa_ioctl32_big_passthru(dev, cmd, arg);
  2297. default:
  2298. return -ENOIOCTLCMD;
  2299. }
  2300. }
  2301. #endif
  2302. static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
  2303. {
  2304. struct hpsa_pci_info pciinfo;
  2305. if (!argp)
  2306. return -EINVAL;
  2307. pciinfo.domain = pci_domain_nr(h->pdev->bus);
  2308. pciinfo.bus = h->pdev->bus->number;
  2309. pciinfo.dev_fn = h->pdev->devfn;
  2310. pciinfo.board_id = h->board_id;
  2311. if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
  2312. return -EFAULT;
  2313. return 0;
  2314. }
  2315. static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
  2316. {
  2317. DriverVer_type DriverVer;
  2318. unsigned char vmaj, vmin, vsubmin;
  2319. int rc;
  2320. rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
  2321. &vmaj, &vmin, &vsubmin);
  2322. if (rc != 3) {
  2323. dev_info(&h->pdev->dev, "driver version string '%s' "
  2324. "unrecognized.", HPSA_DRIVER_VERSION);
  2325. vmaj = 0;
  2326. vmin = 0;
  2327. vsubmin = 0;
  2328. }
  2329. DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
  2330. if (!argp)
  2331. return -EINVAL;
  2332. if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
  2333. return -EFAULT;
  2334. return 0;
  2335. }
  2336. static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
  2337. {
  2338. IOCTL_Command_struct iocommand;
  2339. struct CommandList *c;
  2340. char *buff = NULL;
  2341. union u64bit temp64;
  2342. if (!argp)
  2343. return -EINVAL;
  2344. if (!capable(CAP_SYS_RAWIO))
  2345. return -EPERM;
  2346. if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
  2347. return -EFAULT;
  2348. if ((iocommand.buf_size < 1) &&
  2349. (iocommand.Request.Type.Direction != XFER_NONE)) {
  2350. return -EINVAL;
  2351. }
  2352. if (iocommand.buf_size > 0) {
  2353. buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
  2354. if (buff == NULL)
  2355. return -EFAULT;
  2356. if (iocommand.Request.Type.Direction == XFER_WRITE) {
  2357. /* Copy the data into the buffer we created */
  2358. if (copy_from_user(buff, iocommand.buf,
  2359. iocommand.buf_size)) {
  2360. kfree(buff);
  2361. return -EFAULT;
  2362. }
  2363. } else {
  2364. memset(buff, 0, iocommand.buf_size);
  2365. }
  2366. }
  2367. c = cmd_special_alloc(h);
  2368. if (c == NULL) {
  2369. kfree(buff);
  2370. return -ENOMEM;
  2371. }
  2372. /* Fill in the command type */
  2373. c->cmd_type = CMD_IOCTL_PEND;
  2374. /* Fill in Command Header */
  2375. c->Header.ReplyQueue = 0; /* unused in simple mode */
  2376. if (iocommand.buf_size > 0) { /* buffer to fill */
  2377. c->Header.SGList = 1;
  2378. c->Header.SGTotal = 1;
  2379. } else { /* no buffers to fill */
  2380. c->Header.SGList = 0;
  2381. c->Header.SGTotal = 0;
  2382. }
  2383. memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));
  2384. /* use the kernel address the cmd block for tag */
  2385. c->Header.Tag.lower = c->busaddr;
  2386. /* Fill in Request block */
  2387. memcpy(&c->Request, &iocommand.Request,
  2388. sizeof(c->Request));
  2389. /* Fill in the scatter gather information */
  2390. if (iocommand.buf_size > 0) {
  2391. temp64.val = pci_map_single(h->pdev, buff,
  2392. iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
  2393. c->SG[0].Addr.lower = temp64.val32.lower;
  2394. c->SG[0].Addr.upper = temp64.val32.upper;
  2395. c->SG[0].Len = iocommand.buf_size;
  2396. c->SG[0].Ext = 0; /* we are not chaining*/
  2397. }
  2398. hpsa_scsi_do_simple_cmd_core_if_no_lockup(h, c);
  2399. if (iocommand.buf_size > 0)
  2400. hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL);
  2401. check_ioctl_unit_attention(h, c);
  2402. /* Copy the error information out */
  2403. memcpy(&iocommand.error_info, c->err_info,
  2404. sizeof(iocommand.error_info));
  2405. if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
  2406. kfree(buff);
  2407. cmd_special_free(h, c);
  2408. return -EFAULT;
  2409. }
  2410. if (iocommand.Request.Type.Direction == XFER_READ &&
  2411. iocommand.buf_size > 0) {
  2412. /* Copy the data out of the buffer we created */
  2413. if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
  2414. kfree(buff);
  2415. cmd_special_free(h, c);
  2416. return -EFAULT;
  2417. }
  2418. }
  2419. kfree(buff);
  2420. cmd_special_free(h, c);
  2421. return 0;
  2422. }
  2423. static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
  2424. {
  2425. BIG_IOCTL_Command_struct *ioc;
  2426. struct CommandList *c;
  2427. unsigned char **buff = NULL;
  2428. int *buff_size = NULL;
  2429. union u64bit temp64;
  2430. BYTE sg_used = 0;
  2431. int status = 0;
  2432. int i;
  2433. u32 left;
  2434. u32 sz;
  2435. BYTE __user *data_ptr;
  2436. if (!argp)
  2437. return -EINVAL;
  2438. if (!capable(CAP_SYS_RAWIO))
  2439. return -EPERM;
  2440. ioc = (BIG_IOCTL_Command_struct *)
  2441. kmalloc(sizeof(*ioc), GFP_KERNEL);
  2442. if (!ioc) {
  2443. status = -ENOMEM;
  2444. goto cleanup1;
  2445. }
  2446. if (copy_from_user(ioc, argp, sizeof(*ioc))) {
  2447. status = -EFAULT;
  2448. goto cleanup1;
  2449. }
  2450. if ((ioc->buf_size < 1) &&
  2451. (ioc->Request.Type.Direction != XFER_NONE)) {
  2452. status = -EINVAL;
  2453. goto cleanup1;
  2454. }
  2455. /* Check kmalloc limits using all SGs */
  2456. if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
  2457. status = -EINVAL;
  2458. goto cleanup1;
  2459. }
  2460. if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) {
  2461. status = -EINVAL;
  2462. goto cleanup1;
  2463. }
  2464. buff = kzalloc(SG_ENTRIES_IN_CMD * sizeof(char *), GFP_KERNEL);
  2465. if (!buff) {
  2466. status = -ENOMEM;
  2467. goto cleanup1;
  2468. }
  2469. buff_size = kmalloc(SG_ENTRIES_IN_CMD * sizeof(int), GFP_KERNEL);
  2470. if (!buff_size) {
  2471. status = -ENOMEM;
  2472. goto cleanup1;
  2473. }
  2474. left = ioc->buf_size;
  2475. data_ptr = ioc->buf;
  2476. while (left) {
  2477. sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
  2478. buff_size[sg_used] = sz;
  2479. buff[sg_used] = kmalloc(sz, GFP_KERNEL);
  2480. if (buff[sg_used] == NULL) {
  2481. status = -ENOMEM;
  2482. goto cleanup1;
  2483. }
  2484. if (ioc->Request.Type.Direction == XFER_WRITE) {
  2485. if (copy_from_user(buff[sg_used], data_ptr, sz)) {
  2486. status = -ENOMEM;
  2487. goto cleanup1;
  2488. }
  2489. } else
  2490. memset(buff[sg_used], 0, sz);
  2491. left -= sz;
  2492. data_ptr += sz;
  2493. sg_used++;
  2494. }
  2495. c = cmd_special_alloc(h);
  2496. if (c == NULL) {
  2497. status = -ENOMEM;
  2498. goto cleanup1;
  2499. }
  2500. c->cmd_type = CMD_IOCTL_PEND;
  2501. c->Header.ReplyQueue = 0;
  2502. c->Header.SGList = c->Header.SGTotal = sg_used;
  2503. memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
  2504. c->Header.Tag.lower = c->busaddr;
  2505. memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
  2506. if (ioc->buf_size > 0) {
  2507. int i;
  2508. for (i = 0; i < sg_used; i++) {
  2509. temp64.val = pci_map_single(h->pdev, buff[i],
  2510. buff_size[i], PCI_DMA_BIDIRECTIONAL);
  2511. c->SG[i].Addr.lower = temp64.val32.lower;
  2512. c->SG[i].Addr.upper = temp64.val32.upper;
  2513. c->SG[i].Len = buff_size[i];
  2514. /* we are not chaining */
  2515. c->SG[i].Ext = 0;
  2516. }
  2517. }
  2518. hpsa_scsi_do_simple_cmd_core_if_no_lockup(h, c);
  2519. if (sg_used)
  2520. hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL);
  2521. check_ioctl_unit_attention(h, c);
  2522. /* Copy the error information out */
  2523. memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
  2524. if (copy_to_user(argp, ioc, sizeof(*ioc))) {
  2525. cmd_special_free(h, c);
  2526. status = -EFAULT;
  2527. goto cleanup1;
  2528. }
  2529. if (ioc->Request.Type.Direction == XFER_READ && ioc->buf_size > 0) {
  2530. /* Copy the data out of the buffer we created */
  2531. BYTE __user *ptr = ioc->buf;
  2532. for (i = 0; i < sg_used; i++) {
  2533. if (copy_to_user(ptr, buff[i], buff_size[i])) {
  2534. cmd_special_free(h, c);
  2535. status = -EFAULT;
  2536. goto cleanup1;
  2537. }
  2538. ptr += buff_size[i];
  2539. }
  2540. }
  2541. cmd_special_free(h, c);
  2542. status = 0;
  2543. cleanup1:
  2544. if (buff) {
  2545. for (i = 0; i < sg_used; i++)
  2546. kfree(buff[i]);
  2547. kfree(buff);
  2548. }
  2549. kfree(buff_size);
  2550. kfree(ioc);
  2551. return status;
  2552. }
  2553. static void check_ioctl_unit_attention(struct ctlr_info *h,
  2554. struct CommandList *c)
  2555. {
  2556. if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
  2557. c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
  2558. (void) check_for_unit_attention(h, c);
  2559. }
  2560. /*
  2561. * ioctl
  2562. */
  2563. static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg)
  2564. {
  2565. struct ctlr_info *h;
  2566. void __user *argp = (void __user *)arg;
  2567. h = sdev_to_hba(dev);
  2568. switch (cmd) {
  2569. case CCISS_DEREGDISK:
  2570. case CCISS_REGNEWDISK:
  2571. case CCISS_REGNEWD:
  2572. hpsa_scan_start(h->scsi_host);
  2573. return 0;
  2574. case CCISS_GETPCIINFO:
  2575. return hpsa_getpciinfo_ioctl(h, argp);
  2576. case CCISS_GETDRIVVER:
  2577. return hpsa_getdrivver_ioctl(h, argp);
  2578. case CCISS_PASSTHRU:
  2579. return hpsa_passthru_ioctl(h, argp);
  2580. case CCISS_BIG_PASSTHRU:
  2581. return hpsa_big_passthru_ioctl(h, argp);
  2582. default:
  2583. return -ENOTTY;
  2584. }
  2585. }
  2586. static int __devinit hpsa_send_host_reset(struct ctlr_info *h,
  2587. unsigned char *scsi3addr, u8 reset_type)
  2588. {
  2589. struct CommandList *c;
  2590. c = cmd_alloc(h);
  2591. if (!c)
  2592. return -ENOMEM;
  2593. fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
  2594. RAID_CTLR_LUNID, TYPE_MSG);
  2595. c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
  2596. c->waiting = NULL;
  2597. enqueue_cmd_and_start_io(h, c);
  2598. /* Don't wait for completion, the reset won't complete. Don't free
  2599. * the command either. This is the last command we will send before
  2600. * re-initializing everything, so it doesn't matter and won't leak.
  2601. */
  2602. return 0;
  2603. }
  2604. static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
  2605. void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
  2606. int cmd_type)
  2607. {
  2608. int pci_dir = XFER_NONE;
  2609. c->cmd_type = CMD_IOCTL_PEND;
  2610. c->Header.ReplyQueue = 0;
  2611. if (buff != NULL && size > 0) {
  2612. c->Header.SGList = 1;
  2613. c->Header.SGTotal = 1;
  2614. } else {
  2615. c->Header.SGList = 0;
  2616. c->Header.SGTotal = 0;
  2617. }
  2618. c->Header.Tag.lower = c->busaddr;
  2619. memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
  2620. c->Request.Type.Type = cmd_type;
  2621. if (cmd_type == TYPE_CMD) {
  2622. switch (cmd) {
  2623. case HPSA_INQUIRY:
  2624. /* are we trying to read a vital product page */
  2625. if (page_code != 0) {
  2626. c->Request.CDB[1] = 0x01;
  2627. c->Request.CDB[2] = page_code;
  2628. }
  2629. c->Request.CDBLen = 6;
  2630. c->Request.Type.Attribute = ATTR_SIMPLE;
  2631. c->Request.Type.Direction = XFER_READ;
  2632. c->Request.Timeout = 0;
  2633. c->Request.CDB[0] = HPSA_INQUIRY;
  2634. c->Request.CDB[4] = size & 0xFF;
  2635. break;
  2636. case HPSA_REPORT_LOG:
  2637. case HPSA_REPORT_PHYS:
  2638. /* Talking to controller so It's a physical command
  2639. mode = 00 target = 0. Nothing to write.
  2640. */
  2641. c->Request.CDBLen = 12;
  2642. c->Request.Type.Attribute = ATTR_SIMPLE;
  2643. c->Request.Type.Direction = XFER_READ;
  2644. c->Request.Timeout = 0;
  2645. c->Request.CDB[0] = cmd;
  2646. c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
  2647. c->Request.CDB[7] = (size >> 16) & 0xFF;
  2648. c->Request.CDB[8] = (size >> 8) & 0xFF;
  2649. c->Request.CDB[9] = size & 0xFF;
  2650. break;
  2651. case HPSA_CACHE_FLUSH:
  2652. c->Request.CDBLen = 12;
  2653. c->Request.Type.Attribute = ATTR_SIMPLE;
  2654. c->Request.Type.Direction = XFER_WRITE;
  2655. c->Request.Timeout = 0;
  2656. c->Request.CDB[0] = BMIC_WRITE;
  2657. c->Request.CDB[6] = BMIC_CACHE_FLUSH;
  2658. c->Request.CDB[7] = (size >> 8) & 0xFF;
  2659. c->Request.CDB[8] = size & 0xFF;
  2660. break;
  2661. case TEST_UNIT_READY:
  2662. c->Request.CDBLen = 6;
  2663. c->Request.Type.Attribute = ATTR_SIMPLE;
  2664. c->Request.Type.Direction = XFER_NONE;
  2665. c->Request.Timeout = 0;
  2666. break;
  2667. default:
  2668. dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
  2669. BUG();
  2670. return;
  2671. }
  2672. } else if (cmd_type == TYPE_MSG) {
  2673. switch (cmd) {
  2674. case HPSA_DEVICE_RESET_MSG:
  2675. c->Request.CDBLen = 16;
  2676. c->Request.Type.Type = 1; /* It is a MSG not a CMD */
  2677. c->Request.Type.Attribute = ATTR_SIMPLE;
  2678. c->Request.Type.Direction = XFER_NONE;
  2679. c->Request.Timeout = 0; /* Don't time out */
  2680. memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
  2681. c->Request.CDB[0] = cmd;
  2682. c->Request.CDB[1] = HPSA_RESET_TYPE_LUN;
  2683. /* If bytes 4-7 are zero, it means reset the */
  2684. /* LunID device */
  2685. c->Request.CDB[4] = 0x00;
  2686. c->Request.CDB[5] = 0x00;
  2687. c->Request.CDB[6] = 0x00;
  2688. c->Request.CDB[7] = 0x00;
  2689. break;
  2690. default:
  2691. dev_warn(&h->pdev->dev, "unknown message type %d\n",
  2692. cmd);
  2693. BUG();
  2694. }
  2695. } else {
  2696. dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
  2697. BUG();
  2698. }
  2699. switch (c->Request.Type.Direction) {
  2700. case XFER_READ:
  2701. pci_dir = PCI_DMA_FROMDEVICE;
  2702. break;
  2703. case XFER_WRITE:
  2704. pci_dir = PCI_DMA_TODEVICE;
  2705. break;
  2706. case XFER_NONE:
  2707. pci_dir = PCI_DMA_NONE;
  2708. break;
  2709. default:
  2710. pci_dir = PCI_DMA_BIDIRECTIONAL;
  2711. }
  2712. hpsa_map_one(h->pdev, c, buff, size, pci_dir);
  2713. return;
  2714. }
  2715. /*
  2716. * Map (physical) PCI mem into (virtual) kernel space
  2717. */
  2718. static void __iomem *remap_pci_mem(ulong base, ulong size)
  2719. {
  2720. ulong page_base = ((ulong) base) & PAGE_MASK;
  2721. ulong page_offs = ((ulong) base) - page_base;
  2722. void __iomem *page_remapped = ioremap(page_base, page_offs + size);
  2723. return page_remapped ? (page_remapped + page_offs) : NULL;
  2724. }
  2725. /* Takes cmds off the submission queue and sends them to the hardware,
  2726. * then puts them on the queue of cmds waiting for completion.
  2727. */
  2728. static void start_io(struct ctlr_info *h)
  2729. {
  2730. struct CommandList *c;
  2731. while (!list_empty(&h->reqQ)) {
  2732. c = list_entry(h->reqQ.next, struct CommandList, list);
  2733. /* can't do anything if fifo is full */
  2734. if ((h->access.fifo_full(h))) {
  2735. dev_warn(&h->pdev->dev, "fifo full\n");
  2736. break;
  2737. }
  2738. /* Get the first entry from the Request Q */
  2739. removeQ(c);
  2740. h->Qdepth--;
  2741. /* Tell the controller execute command */
  2742. h->access.submit_command(h, c);
  2743. /* Put job onto the completed Q */
  2744. addQ(&h->cmpQ, c);
  2745. }
  2746. }
  2747. static inline unsigned long get_next_completion(struct ctlr_info *h)
  2748. {
  2749. return h->access.command_completed(h);
  2750. }
  2751. static inline bool interrupt_pending(struct ctlr_info *h)
  2752. {
  2753. return h->access.intr_pending(h);
  2754. }
  2755. static inline long interrupt_not_for_us(struct ctlr_info *h)
  2756. {
  2757. return (h->access.intr_pending(h) == 0) ||
  2758. (h->interrupts_enabled == 0);
  2759. }
  2760. static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
  2761. u32 raw_tag)
  2762. {
  2763. if (unlikely(tag_index >= h->nr_cmds)) {
  2764. dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
  2765. return 1;
  2766. }
  2767. return 0;
  2768. }
  2769. static inline void finish_cmd(struct CommandList *c, u32 raw_tag)
  2770. {
  2771. removeQ(c);
  2772. dial_up_lockup_detection_on_fw_flash_complete(c->h, c);
  2773. if (likely(c->cmd_type == CMD_SCSI))
  2774. complete_scsi_command(c);
  2775. else if (c->cmd_type == CMD_IOCTL_PEND)
  2776. complete(c->waiting);
  2777. }
  2778. static inline u32 hpsa_tag_contains_index(u32 tag)
  2779. {
  2780. return tag & DIRECT_LOOKUP_BIT;
  2781. }
  2782. static inline u32 hpsa_tag_to_index(u32 tag)
  2783. {
  2784. return tag >> DIRECT_LOOKUP_SHIFT;
  2785. }
  2786. static inline u32 hpsa_tag_discard_error_bits(struct ctlr_info *h, u32 tag)
  2787. {
  2788. #define HPSA_PERF_ERROR_BITS ((1 << DIRECT_LOOKUP_SHIFT) - 1)
  2789. #define HPSA_SIMPLE_ERROR_BITS 0x03
  2790. if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
  2791. return tag & ~HPSA_SIMPLE_ERROR_BITS;
  2792. return tag & ~HPSA_PERF_ERROR_BITS;
  2793. }
  2794. /* process completion of an indexed ("direct lookup") command */
  2795. static inline u32 process_indexed_cmd(struct ctlr_info *h,
  2796. u32 raw_tag)
  2797. {
  2798. u32 tag_index;
  2799. struct CommandList *c;
  2800. tag_index = hpsa_tag_to_index(raw_tag);
  2801. if (bad_tag(h, tag_index, raw_tag))
  2802. return next_command(h);
  2803. c = h->cmd_pool + tag_index;
  2804. finish_cmd(c, raw_tag);
  2805. return next_command(h);
  2806. }
  2807. /* process completion of a non-indexed command */
  2808. static inline u32 process_nonindexed_cmd(struct ctlr_info *h,
  2809. u32 raw_tag)
  2810. {
  2811. u32 tag;
  2812. struct CommandList *c = NULL;
  2813. tag = hpsa_tag_discard_error_bits(h, raw_tag);
  2814. list_for_each_entry(c, &h->cmpQ, list) {
  2815. if ((c->busaddr & 0xFFFFFFE0) == (tag & 0xFFFFFFE0)) {
  2816. finish_cmd(c, raw_tag);
  2817. return next_command(h);
  2818. }
  2819. }
  2820. bad_tag(h, h->nr_cmds + 1, raw_tag);
  2821. return next_command(h);
  2822. }
  2823. /* Some controllers, like p400, will give us one interrupt
  2824. * after a soft reset, even if we turned interrupts off.
  2825. * Only need to check for this in the hpsa_xxx_discard_completions
  2826. * functions.
  2827. */
  2828. static int ignore_bogus_interrupt(struct ctlr_info *h)
  2829. {
  2830. if (likely(!reset_devices))
  2831. return 0;
  2832. if (likely(h->interrupts_enabled))
  2833. return 0;
  2834. dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
  2835. "(known firmware bug.) Ignoring.\n");
  2836. return 1;
  2837. }
  2838. static irqreturn_t hpsa_intx_discard_completions(int irq, void *dev_id)
  2839. {
  2840. struct ctlr_info *h = dev_id;
  2841. unsigned long flags;
  2842. u32 raw_tag;
  2843. if (ignore_bogus_interrupt(h))
  2844. return IRQ_NONE;
  2845. if (interrupt_not_for_us(h))
  2846. return IRQ_NONE;
  2847. spin_lock_irqsave(&h->lock, flags);
  2848. h->last_intr_timestamp = get_jiffies_64();
  2849. while (interrupt_pending(h)) {
  2850. raw_tag = get_next_completion(h);
  2851. while (raw_tag != FIFO_EMPTY)
  2852. raw_tag = next_command(h);
  2853. }
  2854. spin_unlock_irqrestore(&h->lock, flags);
  2855. return IRQ_HANDLED;
  2856. }
  2857. static irqreturn_t hpsa_msix_discard_completions(int irq, void *dev_id)
  2858. {
  2859. struct ctlr_info *h = dev_id;
  2860. unsigned long flags;
  2861. u32 raw_tag;
  2862. if (ignore_bogus_interrupt(h))
  2863. return IRQ_NONE;
  2864. spin_lock_irqsave(&h->lock, flags);
  2865. h->last_intr_timestamp = get_jiffies_64();
  2866. raw_tag = get_next_completion(h);
  2867. while (raw_tag != FIFO_EMPTY)
  2868. raw_tag = next_command(h);
  2869. spin_unlock_irqrestore(&h->lock, flags);
  2870. return IRQ_HANDLED;
  2871. }
  2872. static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id)
  2873. {
  2874. struct ctlr_info *h = dev_id;
  2875. unsigned long flags;
  2876. u32 raw_tag;
  2877. if (interrupt_not_for_us(h))
  2878. return IRQ_NONE;
  2879. spin_lock_irqsave(&h->lock, flags);
  2880. h->last_intr_timestamp = get_jiffies_64();
  2881. while (interrupt_pending(h)) {
  2882. raw_tag = get_next_completion(h);
  2883. while (raw_tag != FIFO_EMPTY) {
  2884. if (hpsa_tag_contains_index(raw_tag))
  2885. raw_tag = process_indexed_cmd(h, raw_tag);
  2886. else
  2887. raw_tag = process_nonindexed_cmd(h, raw_tag);
  2888. }
  2889. }
  2890. spin_unlock_irqrestore(&h->lock, flags);
  2891. return IRQ_HANDLED;
  2892. }
  2893. static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id)
  2894. {
  2895. struct ctlr_info *h = dev_id;
  2896. unsigned long flags;
  2897. u32 raw_tag;
  2898. spin_lock_irqsave(&h->lock, flags);
  2899. h->last_intr_timestamp = get_jiffies_64();
  2900. raw_tag = get_next_completion(h);
  2901. while (raw_tag != FIFO_EMPTY) {
  2902. if (hpsa_tag_contains_index(raw_tag))
  2903. raw_tag = process_indexed_cmd(h, raw_tag);
  2904. else
  2905. raw_tag = process_nonindexed_cmd(h, raw_tag);
  2906. }
  2907. spin_unlock_irqrestore(&h->lock, flags);
  2908. return IRQ_HANDLED;
  2909. }
  2910. /* Send a message CDB to the firmware. Careful, this only works
  2911. * in simple mode, not performant mode due to the tag lookup.
  2912. * We only ever use this immediately after a controller reset.
  2913. */
  2914. static __devinit int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
  2915. unsigned char type)
  2916. {
  2917. struct Command {
  2918. struct CommandListHeader CommandHeader;
  2919. struct RequestBlock Request;
  2920. struct ErrDescriptor ErrorDescriptor;
  2921. };
  2922. struct Command *cmd;
  2923. static const size_t cmd_sz = sizeof(*cmd) +
  2924. sizeof(cmd->ErrorDescriptor);
  2925. dma_addr_t paddr64;
  2926. uint32_t paddr32, tag;
  2927. void __iomem *vaddr;
  2928. int i, err;
  2929. vaddr = pci_ioremap_bar(pdev, 0);
  2930. if (vaddr == NULL)
  2931. return -ENOMEM;
  2932. /* The Inbound Post Queue only accepts 32-bit physical addresses for the
  2933. * CCISS commands, so they must be allocated from the lower 4GiB of
  2934. * memory.
  2935. */
  2936. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  2937. if (err) {
  2938. iounmap(vaddr);
  2939. return -ENOMEM;
  2940. }
  2941. cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
  2942. if (cmd == NULL) {
  2943. iounmap(vaddr);
  2944. return -ENOMEM;
  2945. }
  2946. /* This must fit, because of the 32-bit consistent DMA mask. Also,
  2947. * although there's no guarantee, we assume that the address is at
  2948. * least 4-byte aligned (most likely, it's page-aligned).
  2949. */
  2950. paddr32 = paddr64;
  2951. cmd->CommandHeader.ReplyQueue = 0;
  2952. cmd->CommandHeader.SGList = 0;
  2953. cmd->CommandHeader.SGTotal = 0;
  2954. cmd->CommandHeader.Tag.lower = paddr32;
  2955. cmd->CommandHeader.Tag.upper = 0;
  2956. memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
  2957. cmd->Request.CDBLen = 16;
  2958. cmd->Request.Type.Type = TYPE_MSG;
  2959. cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
  2960. cmd->Request.Type.Direction = XFER_NONE;
  2961. cmd->Request.Timeout = 0; /* Don't time out */
  2962. cmd->Request.CDB[0] = opcode;
  2963. cmd->Request.CDB[1] = type;
  2964. memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
  2965. cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(*cmd);
  2966. cmd->ErrorDescriptor.Addr.upper = 0;
  2967. cmd->ErrorDescriptor.Len = sizeof(struct ErrorInfo);
  2968. writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
  2969. for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
  2970. tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
  2971. if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr32)
  2972. break;
  2973. msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
  2974. }
  2975. iounmap(vaddr);
  2976. /* we leak the DMA buffer here ... no choice since the controller could
  2977. * still complete the command.
  2978. */
  2979. if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
  2980. dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
  2981. opcode, type);
  2982. return -ETIMEDOUT;
  2983. }
  2984. pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
  2985. if (tag & HPSA_ERROR_BIT) {
  2986. dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
  2987. opcode, type);
  2988. return -EIO;
  2989. }
  2990. dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
  2991. opcode, type);
  2992. return 0;
  2993. }
  2994. #define hpsa_noop(p) hpsa_message(p, 3, 0)
  2995. static int hpsa_controller_hard_reset(struct pci_dev *pdev,
  2996. void * __iomem vaddr, u32 use_doorbell)
  2997. {
  2998. u16 pmcsr;
  2999. int pos;
  3000. if (use_doorbell) {
  3001. /* For everything after the P600, the PCI power state method
  3002. * of resetting the controller doesn't work, so we have this
  3003. * other way using the doorbell register.
  3004. */
  3005. dev_info(&pdev->dev, "using doorbell to reset controller\n");
  3006. writel(use_doorbell, vaddr + SA5_DOORBELL);
  3007. } else { /* Try to do it the PCI power state way */
  3008. /* Quoting from the Open CISS Specification: "The Power
  3009. * Management Control/Status Register (CSR) controls the power
  3010. * state of the device. The normal operating state is D0,
  3011. * CSR=00h. The software off state is D3, CSR=03h. To reset
  3012. * the controller, place the interface device in D3 then to D0,
  3013. * this causes a secondary PCI reset which will reset the
  3014. * controller." */
  3015. pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
  3016. if (pos == 0) {
  3017. dev_err(&pdev->dev,
  3018. "hpsa_reset_controller: "
  3019. "PCI PM not supported\n");
  3020. return -ENODEV;
  3021. }
  3022. dev_info(&pdev->dev, "using PCI PM to reset controller\n");
  3023. /* enter the D3hot power management state */
  3024. pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
  3025. pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
  3026. pmcsr |= PCI_D3hot;
  3027. pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
  3028. msleep(500);
  3029. /* enter the D0 power management state */
  3030. pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
  3031. pmcsr |= PCI_D0;
  3032. pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
  3033. /*
  3034. * The P600 requires a small delay when changing states.
  3035. * Otherwise we may think the board did not reset and we bail.
  3036. * This for kdump only and is particular to the P600.
  3037. */
  3038. msleep(500);
  3039. }
  3040. return 0;
  3041. }
  3042. static __devinit void init_driver_version(char *driver_version, int len)
  3043. {
  3044. memset(driver_version, 0, len);
  3045. strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1);
  3046. }
  3047. static __devinit int write_driver_ver_to_cfgtable(
  3048. struct CfgTable __iomem *cfgtable)
  3049. {
  3050. char *driver_version;
  3051. int i, size = sizeof(cfgtable->driver_version);
  3052. driver_version = kmalloc(size, GFP_KERNEL);
  3053. if (!driver_version)
  3054. return -ENOMEM;
  3055. init_driver_version(driver_version, size);
  3056. for (i = 0; i < size; i++)
  3057. writeb(driver_version[i], &cfgtable->driver_version[i]);
  3058. kfree(driver_version);
  3059. return 0;
  3060. }
  3061. static __devinit void read_driver_ver_from_cfgtable(
  3062. struct CfgTable __iomem *cfgtable, unsigned char *driver_ver)
  3063. {
  3064. int i;
  3065. for (i = 0; i < sizeof(cfgtable->driver_version); i++)
  3066. driver_ver[i] = readb(&cfgtable->driver_version[i]);
  3067. }
  3068. static __devinit int controller_reset_failed(
  3069. struct CfgTable __iomem *cfgtable)
  3070. {
  3071. char *driver_ver, *old_driver_ver;
  3072. int rc, size = sizeof(cfgtable->driver_version);
  3073. old_driver_ver = kmalloc(2 * size, GFP_KERNEL);
  3074. if (!old_driver_ver)
  3075. return -ENOMEM;
  3076. driver_ver = old_driver_ver + size;
  3077. /* After a reset, the 32 bytes of "driver version" in the cfgtable
  3078. * should have been changed, otherwise we know the reset failed.
  3079. */
  3080. init_driver_version(old_driver_ver, size);
  3081. read_driver_ver_from_cfgtable(cfgtable, driver_ver);
  3082. rc = !memcmp(driver_ver, old_driver_ver, size);
  3083. kfree(old_driver_ver);
  3084. return rc;
  3085. }
  3086. /* This does a hard reset of the controller using PCI power management
  3087. * states or the using the doorbell register.
  3088. */
  3089. static __devinit int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev)
  3090. {
  3091. u64 cfg_offset;
  3092. u32 cfg_base_addr;
  3093. u64 cfg_base_addr_index;
  3094. void __iomem *vaddr;
  3095. unsigned long paddr;
  3096. u32 misc_fw_support;
  3097. int rc;
  3098. struct CfgTable __iomem *cfgtable;
  3099. u32 use_doorbell;
  3100. u32 board_id;
  3101. u16 command_register;
  3102. /* For controllers as old as the P600, this is very nearly
  3103. * the same thing as
  3104. *
  3105. * pci_save_state(pci_dev);
  3106. * pci_set_power_state(pci_dev, PCI_D3hot);
  3107. * pci_set_power_state(pci_dev, PCI_D0);
  3108. * pci_restore_state(pci_dev);
  3109. *
  3110. * For controllers newer than the P600, the pci power state
  3111. * method of resetting doesn't work so we have another way
  3112. * using the doorbell register.
  3113. */
  3114. rc = hpsa_lookup_board_id(pdev, &board_id);
  3115. if (rc < 0 || !ctlr_is_resettable(board_id)) {
  3116. dev_warn(&pdev->dev, "Not resetting device.\n");
  3117. return -ENODEV;
  3118. }
  3119. /* if controller is soft- but not hard resettable... */
  3120. if (!ctlr_is_hard_resettable(board_id))
  3121. return -ENOTSUPP; /* try soft reset later. */
  3122. /* Save the PCI command register */
  3123. pci_read_config_word(pdev, 4, &command_register);
  3124. pci_save_state(pdev);
  3125. /* find the first memory BAR, so we can find the cfg table */
  3126. rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
  3127. if (rc)
  3128. return rc;
  3129. vaddr = remap_pci_mem(paddr, 0x250);
  3130. if (!vaddr)
  3131. return -ENOMEM;
  3132. /* find cfgtable in order to check if reset via doorbell is supported */
  3133. rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
  3134. &cfg_base_addr_index, &cfg_offset);
  3135. if (rc)
  3136. goto unmap_vaddr;
  3137. cfgtable = remap_pci_mem(pci_resource_start(pdev,
  3138. cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
  3139. if (!cfgtable) {
  3140. rc = -ENOMEM;
  3141. goto unmap_vaddr;
  3142. }
  3143. rc = write_driver_ver_to_cfgtable(cfgtable);
  3144. if (rc)
  3145. goto unmap_cfgtable;
  3146. /* If reset via doorbell register is supported, use that.
  3147. * There are two such methods. Favor the newest method.
  3148. */
  3149. misc_fw_support = readl(&cfgtable->misc_fw_support);
  3150. use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
  3151. if (use_doorbell) {
  3152. use_doorbell = DOORBELL_CTLR_RESET2;
  3153. } else {
  3154. use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
  3155. if (use_doorbell) {
  3156. dev_warn(&pdev->dev, "Soft reset not supported. "
  3157. "Firmware update is required.\n");
  3158. rc = -ENOTSUPP; /* try soft reset */
  3159. goto unmap_cfgtable;
  3160. }
  3161. }
  3162. rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
  3163. if (rc)
  3164. goto unmap_cfgtable;
  3165. pci_restore_state(pdev);
  3166. pci_write_config_word(pdev, 4, command_register);
  3167. /* Some devices (notably the HP Smart Array 5i Controller)
  3168. need a little pause here */
  3169. msleep(HPSA_POST_RESET_PAUSE_MSECS);
  3170. /* Wait for board to become not ready, then ready. */
  3171. dev_info(&pdev->dev, "Waiting for board to reset.\n");
  3172. rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_NOT_READY);
  3173. if (rc) {
  3174. dev_warn(&pdev->dev,
  3175. "failed waiting for board to reset."
  3176. " Will try soft reset.\n");
  3177. rc = -ENOTSUPP; /* Not expected, but try soft reset later */
  3178. goto unmap_cfgtable;
  3179. }
  3180. rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY);
  3181. if (rc) {
  3182. dev_warn(&pdev->dev,
  3183. "failed waiting for board to become ready "
  3184. "after hard reset\n");
  3185. goto unmap_cfgtable;
  3186. }
  3187. rc = controller_reset_failed(vaddr);
  3188. if (rc < 0)
  3189. goto unmap_cfgtable;
  3190. if (rc) {
  3191. dev_warn(&pdev->dev, "Unable to successfully reset "
  3192. "controller. Will try soft reset.\n");
  3193. rc = -ENOTSUPP;
  3194. } else {
  3195. dev_info(&pdev->dev, "board ready after hard reset.\n");
  3196. }
  3197. unmap_cfgtable:
  3198. iounmap(cfgtable);
  3199. unmap_vaddr:
  3200. iounmap(vaddr);
  3201. return rc;
  3202. }
  3203. /*
  3204. * We cannot read the structure directly, for portability we must use
  3205. * the io functions.
  3206. * This is for debug only.
  3207. */
  3208. static void print_cfg_table(struct device *dev, struct CfgTable *tb)
  3209. {
  3210. #ifdef HPSA_DEBUG
  3211. int i;
  3212. char temp_name[17];
  3213. dev_info(dev, "Controller Configuration information\n");
  3214. dev_info(dev, "------------------------------------\n");
  3215. for (i = 0; i < 4; i++)
  3216. temp_name[i] = readb(&(tb->Signature[i]));
  3217. temp_name[4] = '\0';
  3218. dev_info(dev, " Signature = %s\n", temp_name);
  3219. dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence)));
  3220. dev_info(dev, " Transport methods supported = 0x%x\n",
  3221. readl(&(tb->TransportSupport)));
  3222. dev_info(dev, " Transport methods active = 0x%x\n",
  3223. readl(&(tb->TransportActive)));
  3224. dev_info(dev, " Requested transport Method = 0x%x\n",
  3225. readl(&(tb->HostWrite.TransportRequest)));
  3226. dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n",
  3227. readl(&(tb->HostWrite.CoalIntDelay)));
  3228. dev_info(dev, " Coalesce Interrupt Count = 0x%x\n",
  3229. readl(&(tb->HostWrite.CoalIntCount)));
  3230. dev_info(dev, " Max outstanding commands = 0x%d\n",
  3231. readl(&(tb->CmdsOutMax)));
  3232. dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
  3233. for (i = 0; i < 16; i++)
  3234. temp_name[i] = readb(&(tb->ServerName[i]));
  3235. temp_name[16] = '\0';
  3236. dev_info(dev, " Server Name = %s\n", temp_name);
  3237. dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n",
  3238. readl(&(tb->HeartBeat)));
  3239. #endif /* HPSA_DEBUG */
  3240. }
  3241. static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
  3242. {
  3243. int i, offset, mem_type, bar_type;
  3244. if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
  3245. return 0;
  3246. offset = 0;
  3247. for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
  3248. bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
  3249. if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
  3250. offset += 4;
  3251. else {
  3252. mem_type = pci_resource_flags(pdev, i) &
  3253. PCI_BASE_ADDRESS_MEM_TYPE_MASK;
  3254. switch (mem_type) {
  3255. case PCI_BASE_ADDRESS_MEM_TYPE_32:
  3256. case PCI_BASE_ADDRESS_MEM_TYPE_1M:
  3257. offset += 4; /* 32 bit */
  3258. break;
  3259. case PCI_BASE_ADDRESS_MEM_TYPE_64:
  3260. offset += 8;
  3261. break;
  3262. default: /* reserved in PCI 2.2 */
  3263. dev_warn(&pdev->dev,
  3264. "base address is invalid\n");
  3265. return -1;
  3266. break;
  3267. }
  3268. }
  3269. if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
  3270. return i + 1;
  3271. }
  3272. return -1;
  3273. }
  3274. /* If MSI/MSI-X is supported by the kernel we will try to enable it on
  3275. * controllers that are capable. If not, we use IO-APIC mode.
  3276. */
  3277. static void __devinit hpsa_interrupt_mode(struct ctlr_info *h)
  3278. {
  3279. #ifdef CONFIG_PCI_MSI
  3280. int err;
  3281. struct msix_entry hpsa_msix_entries[4] = { {0, 0}, {0, 1},
  3282. {0, 2}, {0, 3}
  3283. };
  3284. /* Some boards advertise MSI but don't really support it */
  3285. if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
  3286. (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
  3287. goto default_int_mode;
  3288. if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
  3289. dev_info(&h->pdev->dev, "MSIX\n");
  3290. err = pci_enable_msix(h->pdev, hpsa_msix_entries, 4);
  3291. if (!err) {
  3292. h->intr[0] = hpsa_msix_entries[0].vector;
  3293. h->intr[1] = hpsa_msix_entries[1].vector;
  3294. h->intr[2] = hpsa_msix_entries[2].vector;
  3295. h->intr[3] = hpsa_msix_entries[3].vector;
  3296. h->msix_vector = 1;
  3297. return;
  3298. }
  3299. if (err > 0) {
  3300. dev_warn(&h->pdev->dev, "only %d MSI-X vectors "
  3301. "available\n", err);
  3302. goto default_int_mode;
  3303. } else {
  3304. dev_warn(&h->pdev->dev, "MSI-X init failed %d\n",
  3305. err);
  3306. goto default_int_mode;
  3307. }
  3308. }
  3309. if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
  3310. dev_info(&h->pdev->dev, "MSI\n");
  3311. if (!pci_enable_msi(h->pdev))
  3312. h->msi_vector = 1;
  3313. else
  3314. dev_warn(&h->pdev->dev, "MSI init failed\n");
  3315. }
  3316. default_int_mode:
  3317. #endif /* CONFIG_PCI_MSI */
  3318. /* if we get here we're going to use the default interrupt mode */
  3319. h->intr[h->intr_mode] = h->pdev->irq;
  3320. }
  3321. static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
  3322. {
  3323. int i;
  3324. u32 subsystem_vendor_id, subsystem_device_id;
  3325. subsystem_vendor_id = pdev->subsystem_vendor;
  3326. subsystem_device_id = pdev->subsystem_device;
  3327. *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
  3328. subsystem_vendor_id;
  3329. for (i = 0; i < ARRAY_SIZE(products); i++)
  3330. if (*board_id == products[i].board_id)
  3331. return i;
  3332. if ((subsystem_vendor_id != PCI_VENDOR_ID_HP &&
  3333. subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) ||
  3334. !hpsa_allow_any) {
  3335. dev_warn(&pdev->dev, "unrecognized board ID: "
  3336. "0x%08x, ignoring.\n", *board_id);
  3337. return -ENODEV;
  3338. }
  3339. return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
  3340. }
  3341. static inline bool hpsa_board_disabled(struct pci_dev *pdev)
  3342. {
  3343. u16 command;
  3344. (void) pci_read_config_word(pdev, PCI_COMMAND, &command);
  3345. return ((command & PCI_COMMAND_MEMORY) == 0);
  3346. }
  3347. static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
  3348. unsigned long *memory_bar)
  3349. {
  3350. int i;
  3351. for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
  3352. if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
  3353. /* addressing mode bits already removed */
  3354. *memory_bar = pci_resource_start(pdev, i);
  3355. dev_dbg(&pdev->dev, "memory BAR = %lx\n",
  3356. *memory_bar);
  3357. return 0;
  3358. }
  3359. dev_warn(&pdev->dev, "no memory BAR found\n");
  3360. return -ENODEV;
  3361. }
  3362. static int __devinit hpsa_wait_for_board_state(struct pci_dev *pdev,
  3363. void __iomem *vaddr, int wait_for_ready)
  3364. {
  3365. int i, iterations;
  3366. u32 scratchpad;
  3367. if (wait_for_ready)
  3368. iterations = HPSA_BOARD_READY_ITERATIONS;
  3369. else
  3370. iterations = HPSA_BOARD_NOT_READY_ITERATIONS;
  3371. for (i = 0; i < iterations; i++) {
  3372. scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
  3373. if (wait_for_ready) {
  3374. if (scratchpad == HPSA_FIRMWARE_READY)
  3375. return 0;
  3376. } else {
  3377. if (scratchpad != HPSA_FIRMWARE_READY)
  3378. return 0;
  3379. }
  3380. msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
  3381. }
  3382. dev_warn(&pdev->dev, "board not ready, timed out.\n");
  3383. return -ENODEV;
  3384. }
  3385. static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev,
  3386. void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
  3387. u64 *cfg_offset)
  3388. {
  3389. *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
  3390. *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
  3391. *cfg_base_addr &= (u32) 0x0000ffff;
  3392. *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
  3393. if (*cfg_base_addr_index == -1) {
  3394. dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
  3395. return -ENODEV;
  3396. }
  3397. return 0;
  3398. }
  3399. static int __devinit hpsa_find_cfgtables(struct ctlr_info *h)
  3400. {
  3401. u64 cfg_offset;
  3402. u32 cfg_base_addr;
  3403. u64 cfg_base_addr_index;
  3404. u32 trans_offset;
  3405. int rc;
  3406. rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
  3407. &cfg_base_addr_index, &cfg_offset);
  3408. if (rc)
  3409. return rc;
  3410. h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
  3411. cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
  3412. if (!h->cfgtable)
  3413. return -ENOMEM;
  3414. rc = write_driver_ver_to_cfgtable(h->cfgtable);
  3415. if (rc)
  3416. return rc;
  3417. /* Find performant mode table. */
  3418. trans_offset = readl(&h->cfgtable->TransMethodOffset);
  3419. h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
  3420. cfg_base_addr_index)+cfg_offset+trans_offset,
  3421. sizeof(*h->transtable));
  3422. if (!h->transtable)
  3423. return -ENOMEM;
  3424. return 0;
  3425. }
  3426. static void __devinit hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
  3427. {
  3428. h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
  3429. /* Limit commands in memory limited kdump scenario. */
  3430. if (reset_devices && h->max_commands > 32)
  3431. h->max_commands = 32;
  3432. if (h->max_commands < 16) {
  3433. dev_warn(&h->pdev->dev, "Controller reports "
  3434. "max supported commands of %d, an obvious lie. "
  3435. "Using 16. Ensure that firmware is up to date.\n",
  3436. h->max_commands);
  3437. h->max_commands = 16;
  3438. }
  3439. }
  3440. /* Interrogate the hardware for some limits:
  3441. * max commands, max SG elements without chaining, and with chaining,
  3442. * SG chain block size, etc.
  3443. */
  3444. static void __devinit hpsa_find_board_params(struct ctlr_info *h)
  3445. {
  3446. hpsa_get_max_perf_mode_cmds(h);
  3447. h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */
  3448. h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
  3449. /*
  3450. * Limit in-command s/g elements to 32 save dma'able memory.
  3451. * Howvever spec says if 0, use 31
  3452. */
  3453. h->max_cmd_sg_entries = 31;
  3454. if (h->maxsgentries > 512) {
  3455. h->max_cmd_sg_entries = 32;
  3456. h->chainsize = h->maxsgentries - h->max_cmd_sg_entries + 1;
  3457. h->maxsgentries--; /* save one for chain pointer */
  3458. } else {
  3459. h->maxsgentries = 31; /* default to traditional values */
  3460. h->chainsize = 0;
  3461. }
  3462. }
  3463. static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
  3464. {
  3465. if ((readb(&h->cfgtable->Signature[0]) != 'C') ||
  3466. (readb(&h->cfgtable->Signature[1]) != 'I') ||
  3467. (readb(&h->cfgtable->Signature[2]) != 'S') ||
  3468. (readb(&h->cfgtable->Signature[3]) != 'S')) {
  3469. dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
  3470. return false;
  3471. }
  3472. return true;
  3473. }
  3474. /* Need to enable prefetch in the SCSI core for 6400 in x86 */
  3475. static inline void hpsa_enable_scsi_prefetch(struct ctlr_info *h)
  3476. {
  3477. #ifdef CONFIG_X86
  3478. u32 prefetch;
  3479. prefetch = readl(&(h->cfgtable->SCSI_Prefetch));
  3480. prefetch |= 0x100;
  3481. writel(prefetch, &(h->cfgtable->SCSI_Prefetch));
  3482. #endif
  3483. }
  3484. /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
  3485. * in a prefetch beyond physical memory.
  3486. */
  3487. static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
  3488. {
  3489. u32 dma_prefetch;
  3490. if (h->board_id != 0x3225103C)
  3491. return;
  3492. dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
  3493. dma_prefetch |= 0x8000;
  3494. writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
  3495. }
  3496. static void __devinit hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
  3497. {
  3498. int i;
  3499. u32 doorbell_value;
  3500. unsigned long flags;
  3501. /* under certain very rare conditions, this can take awhile.
  3502. * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
  3503. * as we enter this code.)
  3504. */
  3505. for (i = 0; i < MAX_CONFIG_WAIT; i++) {
  3506. spin_lock_irqsave(&h->lock, flags);
  3507. doorbell_value = readl(h->vaddr + SA5_DOORBELL);
  3508. spin_unlock_irqrestore(&h->lock, flags);
  3509. if (!(doorbell_value & CFGTBL_ChangeReq))
  3510. break;
  3511. /* delay and try again */
  3512. usleep_range(10000, 20000);
  3513. }
  3514. }
  3515. static int __devinit hpsa_enter_simple_mode(struct ctlr_info *h)
  3516. {
  3517. u32 trans_support;
  3518. trans_support = readl(&(h->cfgtable->TransportSupport));
  3519. if (!(trans_support & SIMPLE_MODE))
  3520. return -ENOTSUPP;
  3521. h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
  3522. /* Update the field, and then ring the doorbell */
  3523. writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
  3524. writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
  3525. hpsa_wait_for_mode_change_ack(h);
  3526. print_cfg_table(&h->pdev->dev, h->cfgtable);
  3527. if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) {
  3528. dev_warn(&h->pdev->dev,
  3529. "unable to get board into simple mode\n");
  3530. return -ENODEV;
  3531. }
  3532. h->transMethod = CFGTBL_Trans_Simple;
  3533. return 0;
  3534. }
  3535. static int __devinit hpsa_pci_init(struct ctlr_info *h)
  3536. {
  3537. int prod_index, err;
  3538. prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id);
  3539. if (prod_index < 0)
  3540. return -ENODEV;
  3541. h->product_name = products[prod_index].product_name;
  3542. h->access = *(products[prod_index].access);
  3543. if (hpsa_board_disabled(h->pdev)) {
  3544. dev_warn(&h->pdev->dev, "controller appears to be disabled\n");
  3545. return -ENODEV;
  3546. }
  3547. pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S |
  3548. PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM);
  3549. err = pci_enable_device(h->pdev);
  3550. if (err) {
  3551. dev_warn(&h->pdev->dev, "unable to enable PCI device\n");
  3552. return err;
  3553. }
  3554. err = pci_request_regions(h->pdev, HPSA);
  3555. if (err) {
  3556. dev_err(&h->pdev->dev,
  3557. "cannot obtain PCI resources, aborting\n");
  3558. return err;
  3559. }
  3560. hpsa_interrupt_mode(h);
  3561. err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
  3562. if (err)
  3563. goto err_out_free_res;
  3564. h->vaddr = remap_pci_mem(h->paddr, 0x250);
  3565. if (!h->vaddr) {
  3566. err = -ENOMEM;
  3567. goto err_out_free_res;
  3568. }
  3569. err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
  3570. if (err)
  3571. goto err_out_free_res;
  3572. err = hpsa_find_cfgtables(h);
  3573. if (err)
  3574. goto err_out_free_res;
  3575. hpsa_find_board_params(h);
  3576. if (!hpsa_CISS_signature_present(h)) {
  3577. err = -ENODEV;
  3578. goto err_out_free_res;
  3579. }
  3580. hpsa_enable_scsi_prefetch(h);
  3581. hpsa_p600_dma_prefetch_quirk(h);
  3582. err = hpsa_enter_simple_mode(h);
  3583. if (err)
  3584. goto err_out_free_res;
  3585. return 0;
  3586. err_out_free_res:
  3587. if (h->transtable)
  3588. iounmap(h->transtable);
  3589. if (h->cfgtable)
  3590. iounmap(h->cfgtable);
  3591. if (h->vaddr)
  3592. iounmap(h->vaddr);
  3593. /*
  3594. * Deliberately omit pci_disable_device(): it does something nasty to
  3595. * Smart Array controllers that pci_enable_device does not undo
  3596. */
  3597. pci_release_regions(h->pdev);
  3598. return err;
  3599. }
  3600. static void __devinit hpsa_hba_inquiry(struct ctlr_info *h)
  3601. {
  3602. int rc;
  3603. #define HBA_INQUIRY_BYTE_COUNT 64
  3604. h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
  3605. if (!h->hba_inquiry_data)
  3606. return;
  3607. rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
  3608. h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
  3609. if (rc != 0) {
  3610. kfree(h->hba_inquiry_data);
  3611. h->hba_inquiry_data = NULL;
  3612. }
  3613. }
  3614. static __devinit int hpsa_init_reset_devices(struct pci_dev *pdev)
  3615. {
  3616. int rc, i;
  3617. void __iomem *vaddr;
  3618. if (!reset_devices)
  3619. return 0;
  3620. /* kdump kernel is loading, we don't know in which state is
  3621. * the pci interface. The dev->enable_cnt is equal zero
  3622. * so we call enable+disable, wait a while and switch it on.
  3623. */
  3624. rc = pci_enable_device(pdev);
  3625. if (rc) {
  3626. dev_warn(&pdev->dev, "Failed to enable PCI device\n");
  3627. return -ENODEV;
  3628. }
  3629. pci_disable_device(pdev);
  3630. msleep(260); /* a randomly chosen number */
  3631. rc = pci_enable_device(pdev);
  3632. if (rc) {
  3633. dev_warn(&pdev->dev, "failed to enable device.\n");
  3634. return -ENODEV;
  3635. }
  3636. pci_set_master(pdev);
  3637. vaddr = pci_ioremap_bar(pdev, 0);
  3638. if (vaddr == NULL) {
  3639. rc = -ENOMEM;
  3640. goto out_disable;
  3641. }
  3642. writel(SA5_INTR_OFF, vaddr + SA5_REPLY_INTR_MASK_OFFSET);
  3643. iounmap(vaddr);
  3644. /* Reset the controller with a PCI power-cycle or via doorbell */
  3645. rc = hpsa_kdump_hard_reset_controller(pdev);
  3646. /* -ENOTSUPP here means we cannot reset the controller
  3647. * but it's already (and still) up and running in
  3648. * "performant mode". Or, it might be 640x, which can't reset
  3649. * due to concerns about shared bbwc between 6402/6404 pair.
  3650. */
  3651. if (rc) {
  3652. if (rc != -ENOTSUPP) /* just try to do the kdump anyhow. */
  3653. rc = -ENODEV;
  3654. goto out_disable;
  3655. }
  3656. /* Now try to get the controller to respond to a no-op */
  3657. dev_warn(&pdev->dev, "Waiting for controller to respond to no-op\n");
  3658. for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
  3659. if (hpsa_noop(pdev) == 0)
  3660. break;
  3661. else
  3662. dev_warn(&pdev->dev, "no-op failed%s\n",
  3663. (i < 11 ? "; re-trying" : ""));
  3664. }
  3665. out_disable:
  3666. pci_disable_device(pdev);
  3667. return rc;
  3668. }
  3669. static __devinit int hpsa_allocate_cmd_pool(struct ctlr_info *h)
  3670. {
  3671. h->cmd_pool_bits = kzalloc(
  3672. DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) *
  3673. sizeof(unsigned long), GFP_KERNEL);
  3674. h->cmd_pool = pci_alloc_consistent(h->pdev,
  3675. h->nr_cmds * sizeof(*h->cmd_pool),
  3676. &(h->cmd_pool_dhandle));
  3677. h->errinfo_pool = pci_alloc_consistent(h->pdev,
  3678. h->nr_cmds * sizeof(*h->errinfo_pool),
  3679. &(h->errinfo_pool_dhandle));
  3680. if ((h->cmd_pool_bits == NULL)
  3681. || (h->cmd_pool == NULL)
  3682. || (h->errinfo_pool == NULL)) {
  3683. dev_err(&h->pdev->dev, "out of memory in %s", __func__);
  3684. return -ENOMEM;
  3685. }
  3686. return 0;
  3687. }
  3688. static void hpsa_free_cmd_pool(struct ctlr_info *h)
  3689. {
  3690. kfree(h->cmd_pool_bits);
  3691. if (h->cmd_pool)
  3692. pci_free_consistent(h->pdev,
  3693. h->nr_cmds * sizeof(struct CommandList),
  3694. h->cmd_pool, h->cmd_pool_dhandle);
  3695. if (h->errinfo_pool)
  3696. pci_free_consistent(h->pdev,
  3697. h->nr_cmds * sizeof(struct ErrorInfo),
  3698. h->errinfo_pool,
  3699. h->errinfo_pool_dhandle);
  3700. }
  3701. static int hpsa_request_irq(struct ctlr_info *h,
  3702. irqreturn_t (*msixhandler)(int, void *),
  3703. irqreturn_t (*intxhandler)(int, void *))
  3704. {
  3705. int rc;
  3706. if (h->msix_vector || h->msi_vector)
  3707. rc = request_irq(h->intr[h->intr_mode], msixhandler,
  3708. 0, h->devname, h);
  3709. else
  3710. rc = request_irq(h->intr[h->intr_mode], intxhandler,
  3711. IRQF_SHARED, h->devname, h);
  3712. if (rc) {
  3713. dev_err(&h->pdev->dev, "unable to get irq %d for %s\n",
  3714. h->intr[h->intr_mode], h->devname);
  3715. return -ENODEV;
  3716. }
  3717. return 0;
  3718. }
  3719. static int __devinit hpsa_kdump_soft_reset(struct ctlr_info *h)
  3720. {
  3721. if (hpsa_send_host_reset(h, RAID_CTLR_LUNID,
  3722. HPSA_RESET_TYPE_CONTROLLER)) {
  3723. dev_warn(&h->pdev->dev, "Resetting array controller failed.\n");
  3724. return -EIO;
  3725. }
  3726. dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
  3727. if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY)) {
  3728. dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
  3729. return -1;
  3730. }
  3731. dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
  3732. if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY)) {
  3733. dev_warn(&h->pdev->dev, "Board failed to become ready "
  3734. "after soft reset.\n");
  3735. return -1;
  3736. }
  3737. return 0;
  3738. }
  3739. static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h)
  3740. {
  3741. free_irq(h->intr[h->intr_mode], h);
  3742. #ifdef CONFIG_PCI_MSI
  3743. if (h->msix_vector)
  3744. pci_disable_msix(h->pdev);
  3745. else if (h->msi_vector)
  3746. pci_disable_msi(h->pdev);
  3747. #endif /* CONFIG_PCI_MSI */
  3748. hpsa_free_sg_chain_blocks(h);
  3749. hpsa_free_cmd_pool(h);
  3750. kfree(h->blockFetchTable);
  3751. pci_free_consistent(h->pdev, h->reply_pool_size,
  3752. h->reply_pool, h->reply_pool_dhandle);
  3753. if (h->vaddr)
  3754. iounmap(h->vaddr);
  3755. if (h->transtable)
  3756. iounmap(h->transtable);
  3757. if (h->cfgtable)
  3758. iounmap(h->cfgtable);
  3759. pci_disable_device(h->pdev);
  3760. pci_release_regions(h->pdev);
  3761. kfree(h);
  3762. }
  3763. static void remove_ctlr_from_lockup_detector_list(struct ctlr_info *h)
  3764. {
  3765. assert_spin_locked(&lockup_detector_lock);
  3766. if (!hpsa_lockup_detector)
  3767. return;
  3768. if (h->lockup_detected)
  3769. return; /* already stopped the lockup detector */
  3770. list_del(&h->lockup_list);
  3771. }
  3772. /* Called when controller lockup detected. */
  3773. static void fail_all_cmds_on_list(struct ctlr_info *h, struct list_head *list)
  3774. {
  3775. struct CommandList *c = NULL;
  3776. assert_spin_locked(&h->lock);
  3777. /* Mark all outstanding commands as failed and complete them. */
  3778. while (!list_empty(list)) {
  3779. c = list_entry(list->next, struct CommandList, list);
  3780. c->err_info->CommandStatus = CMD_HARDWARE_ERR;
  3781. finish_cmd(c, c->Header.Tag.lower);
  3782. }
  3783. }
  3784. static void controller_lockup_detected(struct ctlr_info *h)
  3785. {
  3786. unsigned long flags;
  3787. assert_spin_locked(&lockup_detector_lock);
  3788. remove_ctlr_from_lockup_detector_list(h);
  3789. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  3790. spin_lock_irqsave(&h->lock, flags);
  3791. h->lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
  3792. spin_unlock_irqrestore(&h->lock, flags);
  3793. dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x\n",
  3794. h->lockup_detected);
  3795. pci_disable_device(h->pdev);
  3796. spin_lock_irqsave(&h->lock, flags);
  3797. fail_all_cmds_on_list(h, &h->cmpQ);
  3798. fail_all_cmds_on_list(h, &h->reqQ);
  3799. spin_unlock_irqrestore(&h->lock, flags);
  3800. }
  3801. static void detect_controller_lockup(struct ctlr_info *h)
  3802. {
  3803. u64 now;
  3804. u32 heartbeat;
  3805. unsigned long flags;
  3806. assert_spin_locked(&lockup_detector_lock);
  3807. now = get_jiffies_64();
  3808. /* If we've received an interrupt recently, we're ok. */
  3809. if (time_after64(h->last_intr_timestamp +
  3810. (h->heartbeat_sample_interval), now))
  3811. return;
  3812. /*
  3813. * If we've already checked the heartbeat recently, we're ok.
  3814. * This could happen if someone sends us a signal. We
  3815. * otherwise don't care about signals in this thread.
  3816. */
  3817. if (time_after64(h->last_heartbeat_timestamp +
  3818. (h->heartbeat_sample_interval), now))
  3819. return;
  3820. /* If heartbeat has not changed since we last looked, we're not ok. */
  3821. spin_lock_irqsave(&h->lock, flags);
  3822. heartbeat = readl(&h->cfgtable->HeartBeat);
  3823. spin_unlock_irqrestore(&h->lock, flags);
  3824. if (h->last_heartbeat == heartbeat) {
  3825. controller_lockup_detected(h);
  3826. return;
  3827. }
  3828. /* We're ok. */
  3829. h->last_heartbeat = heartbeat;
  3830. h->last_heartbeat_timestamp = now;
  3831. }
  3832. static int detect_controller_lockup_thread(void *notused)
  3833. {
  3834. struct ctlr_info *h;
  3835. unsigned long flags;
  3836. while (1) {
  3837. struct list_head *this, *tmp;
  3838. schedule_timeout_interruptible(HEARTBEAT_SAMPLE_INTERVAL);
  3839. if (kthread_should_stop())
  3840. break;
  3841. spin_lock_irqsave(&lockup_detector_lock, flags);
  3842. list_for_each_safe(this, tmp, &hpsa_ctlr_list) {
  3843. h = list_entry(this, struct ctlr_info, lockup_list);
  3844. detect_controller_lockup(h);
  3845. }
  3846. spin_unlock_irqrestore(&lockup_detector_lock, flags);
  3847. }
  3848. return 0;
  3849. }
  3850. static void add_ctlr_to_lockup_detector_list(struct ctlr_info *h)
  3851. {
  3852. unsigned long flags;
  3853. h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
  3854. spin_lock_irqsave(&lockup_detector_lock, flags);
  3855. list_add_tail(&h->lockup_list, &hpsa_ctlr_list);
  3856. spin_unlock_irqrestore(&lockup_detector_lock, flags);
  3857. }
  3858. static void start_controller_lockup_detector(struct ctlr_info *h)
  3859. {
  3860. /* Start the lockup detector thread if not already started */
  3861. if (!hpsa_lockup_detector) {
  3862. spin_lock_init(&lockup_detector_lock);
  3863. hpsa_lockup_detector =
  3864. kthread_run(detect_controller_lockup_thread,
  3865. NULL, HPSA);
  3866. }
  3867. if (!hpsa_lockup_detector) {
  3868. dev_warn(&h->pdev->dev,
  3869. "Could not start lockup detector thread\n");
  3870. return;
  3871. }
  3872. add_ctlr_to_lockup_detector_list(h);
  3873. }
  3874. static void stop_controller_lockup_detector(struct ctlr_info *h)
  3875. {
  3876. unsigned long flags;
  3877. spin_lock_irqsave(&lockup_detector_lock, flags);
  3878. remove_ctlr_from_lockup_detector_list(h);
  3879. /* If the list of ctlr's to monitor is empty, stop the thread */
  3880. if (list_empty(&hpsa_ctlr_list)) {
  3881. spin_unlock_irqrestore(&lockup_detector_lock, flags);
  3882. kthread_stop(hpsa_lockup_detector);
  3883. spin_lock_irqsave(&lockup_detector_lock, flags);
  3884. hpsa_lockup_detector = NULL;
  3885. }
  3886. spin_unlock_irqrestore(&lockup_detector_lock, flags);
  3887. }
  3888. static int __devinit hpsa_init_one(struct pci_dev *pdev,
  3889. const struct pci_device_id *ent)
  3890. {
  3891. int dac, rc;
  3892. struct ctlr_info *h;
  3893. int try_soft_reset = 0;
  3894. unsigned long flags;
  3895. if (number_of_controllers == 0)
  3896. printk(KERN_INFO DRIVER_NAME "\n");
  3897. rc = hpsa_init_reset_devices(pdev);
  3898. if (rc) {
  3899. if (rc != -ENOTSUPP)
  3900. return rc;
  3901. /* If the reset fails in a particular way (it has no way to do
  3902. * a proper hard reset, so returns -ENOTSUPP) we can try to do
  3903. * a soft reset once we get the controller configured up to the
  3904. * point that it can accept a command.
  3905. */
  3906. try_soft_reset = 1;
  3907. rc = 0;
  3908. }
  3909. reinit_after_soft_reset:
  3910. /* Command structures must be aligned on a 32-byte boundary because
  3911. * the 5 lower bits of the address are used by the hardware. and by
  3912. * the driver. See comments in hpsa.h for more info.
  3913. */
  3914. #define COMMANDLIST_ALIGNMENT 32
  3915. BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
  3916. h = kzalloc(sizeof(*h), GFP_KERNEL);
  3917. if (!h)
  3918. return -ENOMEM;
  3919. h->pdev = pdev;
  3920. h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
  3921. INIT_LIST_HEAD(&h->cmpQ);
  3922. INIT_LIST_HEAD(&h->reqQ);
  3923. spin_lock_init(&h->lock);
  3924. spin_lock_init(&h->scan_lock);
  3925. rc = hpsa_pci_init(h);
  3926. if (rc != 0)
  3927. goto clean1;
  3928. sprintf(h->devname, HPSA "%d", number_of_controllers);
  3929. h->ctlr = number_of_controllers;
  3930. number_of_controllers++;
  3931. /* configure PCI DMA stuff */
  3932. rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
  3933. if (rc == 0) {
  3934. dac = 1;
  3935. } else {
  3936. rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  3937. if (rc == 0) {
  3938. dac = 0;
  3939. } else {
  3940. dev_err(&pdev->dev, "no suitable DMA available\n");
  3941. goto clean1;
  3942. }
  3943. }
  3944. /* make sure the board interrupts are off */
  3945. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  3946. if (hpsa_request_irq(h, do_hpsa_intr_msi, do_hpsa_intr_intx))
  3947. goto clean2;
  3948. dev_info(&pdev->dev, "%s: <0x%x> at IRQ %d%s using DAC\n",
  3949. h->devname, pdev->device,
  3950. h->intr[h->intr_mode], dac ? "" : " not");
  3951. if (hpsa_allocate_cmd_pool(h))
  3952. goto clean4;
  3953. if (hpsa_allocate_sg_chain_blocks(h))
  3954. goto clean4;
  3955. init_waitqueue_head(&h->scan_wait_queue);
  3956. h->scan_finished = 1; /* no scan currently in progress */
  3957. pci_set_drvdata(pdev, h);
  3958. h->ndevices = 0;
  3959. h->scsi_host = NULL;
  3960. spin_lock_init(&h->devlock);
  3961. hpsa_put_ctlr_into_performant_mode(h);
  3962. /* At this point, the controller is ready to take commands.
  3963. * Now, if reset_devices and the hard reset didn't work, try
  3964. * the soft reset and see if that works.
  3965. */
  3966. if (try_soft_reset) {
  3967. /* This is kind of gross. We may or may not get a completion
  3968. * from the soft reset command, and if we do, then the value
  3969. * from the fifo may or may not be valid. So, we wait 10 secs
  3970. * after the reset throwing away any completions we get during
  3971. * that time. Unregister the interrupt handler and register
  3972. * fake ones to scoop up any residual completions.
  3973. */
  3974. spin_lock_irqsave(&h->lock, flags);
  3975. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  3976. spin_unlock_irqrestore(&h->lock, flags);
  3977. free_irq(h->intr[h->intr_mode], h);
  3978. rc = hpsa_request_irq(h, hpsa_msix_discard_completions,
  3979. hpsa_intx_discard_completions);
  3980. if (rc) {
  3981. dev_warn(&h->pdev->dev, "Failed to request_irq after "
  3982. "soft reset.\n");
  3983. goto clean4;
  3984. }
  3985. rc = hpsa_kdump_soft_reset(h);
  3986. if (rc)
  3987. /* Neither hard nor soft reset worked, we're hosed. */
  3988. goto clean4;
  3989. dev_info(&h->pdev->dev, "Board READY.\n");
  3990. dev_info(&h->pdev->dev,
  3991. "Waiting for stale completions to drain.\n");
  3992. h->access.set_intr_mask(h, HPSA_INTR_ON);
  3993. msleep(10000);
  3994. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  3995. rc = controller_reset_failed(h->cfgtable);
  3996. if (rc)
  3997. dev_info(&h->pdev->dev,
  3998. "Soft reset appears to have failed.\n");
  3999. /* since the controller's reset, we have to go back and re-init
  4000. * everything. Easiest to just forget what we've done and do it
  4001. * all over again.
  4002. */
  4003. hpsa_undo_allocations_after_kdump_soft_reset(h);
  4004. try_soft_reset = 0;
  4005. if (rc)
  4006. /* don't go to clean4, we already unallocated */
  4007. return -ENODEV;
  4008. goto reinit_after_soft_reset;
  4009. }
  4010. /* Turn the interrupts on so we can service requests */
  4011. h->access.set_intr_mask(h, HPSA_INTR_ON);
  4012. hpsa_hba_inquiry(h);
  4013. hpsa_register_scsi(h); /* hook ourselves into SCSI subsystem */
  4014. start_controller_lockup_detector(h);
  4015. return 0;
  4016. clean4:
  4017. hpsa_free_sg_chain_blocks(h);
  4018. hpsa_free_cmd_pool(h);
  4019. free_irq(h->intr[h->intr_mode], h);
  4020. clean2:
  4021. clean1:
  4022. kfree(h);
  4023. return rc;
  4024. }
  4025. static void hpsa_flush_cache(struct ctlr_info *h)
  4026. {
  4027. char *flush_buf;
  4028. struct CommandList *c;
  4029. flush_buf = kzalloc(4, GFP_KERNEL);
  4030. if (!flush_buf)
  4031. return;
  4032. c = cmd_special_alloc(h);
  4033. if (!c) {
  4034. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  4035. goto out_of_memory;
  4036. }
  4037. fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
  4038. RAID_CTLR_LUNID, TYPE_CMD);
  4039. hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_TODEVICE);
  4040. if (c->err_info->CommandStatus != 0)
  4041. dev_warn(&h->pdev->dev,
  4042. "error flushing cache on controller\n");
  4043. cmd_special_free(h, c);
  4044. out_of_memory:
  4045. kfree(flush_buf);
  4046. }
  4047. static void hpsa_shutdown(struct pci_dev *pdev)
  4048. {
  4049. struct ctlr_info *h;
  4050. h = pci_get_drvdata(pdev);
  4051. /* Turn board interrupts off and send the flush cache command
  4052. * sendcmd will turn off interrupt, and send the flush...
  4053. * To write all data in the battery backed cache to disks
  4054. */
  4055. hpsa_flush_cache(h);
  4056. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  4057. free_irq(h->intr[h->intr_mode], h);
  4058. #ifdef CONFIG_PCI_MSI
  4059. if (h->msix_vector)
  4060. pci_disable_msix(h->pdev);
  4061. else if (h->msi_vector)
  4062. pci_disable_msi(h->pdev);
  4063. #endif /* CONFIG_PCI_MSI */
  4064. }
  4065. static void __devexit hpsa_free_device_info(struct ctlr_info *h)
  4066. {
  4067. int i;
  4068. for (i = 0; i < h->ndevices; i++)
  4069. kfree(h->dev[i]);
  4070. }
  4071. static void __devexit hpsa_remove_one(struct pci_dev *pdev)
  4072. {
  4073. struct ctlr_info *h;
  4074. if (pci_get_drvdata(pdev) == NULL) {
  4075. dev_err(&pdev->dev, "unable to remove device\n");
  4076. return;
  4077. }
  4078. h = pci_get_drvdata(pdev);
  4079. stop_controller_lockup_detector(h);
  4080. hpsa_unregister_scsi(h); /* unhook from SCSI subsystem */
  4081. hpsa_shutdown(pdev);
  4082. iounmap(h->vaddr);
  4083. iounmap(h->transtable);
  4084. iounmap(h->cfgtable);
  4085. hpsa_free_device_info(h);
  4086. hpsa_free_sg_chain_blocks(h);
  4087. pci_free_consistent(h->pdev,
  4088. h->nr_cmds * sizeof(struct CommandList),
  4089. h->cmd_pool, h->cmd_pool_dhandle);
  4090. pci_free_consistent(h->pdev,
  4091. h->nr_cmds * sizeof(struct ErrorInfo),
  4092. h->errinfo_pool, h->errinfo_pool_dhandle);
  4093. pci_free_consistent(h->pdev, h->reply_pool_size,
  4094. h->reply_pool, h->reply_pool_dhandle);
  4095. kfree(h->cmd_pool_bits);
  4096. kfree(h->blockFetchTable);
  4097. kfree(h->hba_inquiry_data);
  4098. /*
  4099. * Deliberately omit pci_disable_device(): it does something nasty to
  4100. * Smart Array controllers that pci_enable_device does not undo
  4101. */
  4102. pci_release_regions(pdev);
  4103. pci_set_drvdata(pdev, NULL);
  4104. kfree(h);
  4105. }
  4106. static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
  4107. __attribute__((unused)) pm_message_t state)
  4108. {
  4109. return -ENOSYS;
  4110. }
  4111. static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
  4112. {
  4113. return -ENOSYS;
  4114. }
  4115. static struct pci_driver hpsa_pci_driver = {
  4116. .name = HPSA,
  4117. .probe = hpsa_init_one,
  4118. .remove = __devexit_p(hpsa_remove_one),
  4119. .id_table = hpsa_pci_device_id, /* id_table */
  4120. .shutdown = hpsa_shutdown,
  4121. .suspend = hpsa_suspend,
  4122. .resume = hpsa_resume,
  4123. };
  4124. /* Fill in bucket_map[], given nsgs (the max number of
  4125. * scatter gather elements supported) and bucket[],
  4126. * which is an array of 8 integers. The bucket[] array
  4127. * contains 8 different DMA transfer sizes (in 16
  4128. * byte increments) which the controller uses to fetch
  4129. * commands. This function fills in bucket_map[], which
  4130. * maps a given number of scatter gather elements to one of
  4131. * the 8 DMA transfer sizes. The point of it is to allow the
  4132. * controller to only do as much DMA as needed to fetch the
  4133. * command, with the DMA transfer size encoded in the lower
  4134. * bits of the command address.
  4135. */
  4136. static void calc_bucket_map(int bucket[], int num_buckets,
  4137. int nsgs, int *bucket_map)
  4138. {
  4139. int i, j, b, size;
  4140. /* even a command with 0 SGs requires 4 blocks */
  4141. #define MINIMUM_TRANSFER_BLOCKS 4
  4142. #define NUM_BUCKETS 8
  4143. /* Note, bucket_map must have nsgs+1 entries. */
  4144. for (i = 0; i <= nsgs; i++) {
  4145. /* Compute size of a command with i SG entries */
  4146. size = i + MINIMUM_TRANSFER_BLOCKS;
  4147. b = num_buckets; /* Assume the biggest bucket */
  4148. /* Find the bucket that is just big enough */
  4149. for (j = 0; j < 8; j++) {
  4150. if (bucket[j] >= size) {
  4151. b = j;
  4152. break;
  4153. }
  4154. }
  4155. /* for a command with i SG entries, use bucket b. */
  4156. bucket_map[i] = b;
  4157. }
  4158. }
  4159. static __devinit void hpsa_enter_performant_mode(struct ctlr_info *h,
  4160. u32 use_short_tags)
  4161. {
  4162. int i;
  4163. unsigned long register_value;
  4164. /* This is a bit complicated. There are 8 registers on
  4165. * the controller which we write to to tell it 8 different
  4166. * sizes of commands which there may be. It's a way of
  4167. * reducing the DMA done to fetch each command. Encoded into
  4168. * each command's tag are 3 bits which communicate to the controller
  4169. * which of the eight sizes that command fits within. The size of
  4170. * each command depends on how many scatter gather entries there are.
  4171. * Each SG entry requires 16 bytes. The eight registers are programmed
  4172. * with the number of 16-byte blocks a command of that size requires.
  4173. * The smallest command possible requires 5 such 16 byte blocks.
  4174. * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte
  4175. * blocks. Note, this only extends to the SG entries contained
  4176. * within the command block, and does not extend to chained blocks
  4177. * of SG elements. bft[] contains the eight values we write to
  4178. * the registers. They are not evenly distributed, but have more
  4179. * sizes for small commands, and fewer sizes for larger commands.
  4180. */
  4181. int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4};
  4182. BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4);
  4183. /* 5 = 1 s/g entry or 4k
  4184. * 6 = 2 s/g entry or 8k
  4185. * 8 = 4 s/g entry or 16k
  4186. * 10 = 6 s/g entry or 24k
  4187. */
  4188. h->reply_pool_wraparound = 1; /* spec: init to 1 */
  4189. /* Controller spec: zero out this buffer. */
  4190. memset(h->reply_pool, 0, h->reply_pool_size);
  4191. h->reply_pool_head = h->reply_pool;
  4192. bft[7] = SG_ENTRIES_IN_CMD + 4;
  4193. calc_bucket_map(bft, ARRAY_SIZE(bft),
  4194. SG_ENTRIES_IN_CMD, h->blockFetchTable);
  4195. for (i = 0; i < 8; i++)
  4196. writel(bft[i], &h->transtable->BlockFetch[i]);
  4197. /* size of controller ring buffer */
  4198. writel(h->max_commands, &h->transtable->RepQSize);
  4199. writel(1, &h->transtable->RepQCount);
  4200. writel(0, &h->transtable->RepQCtrAddrLow32);
  4201. writel(0, &h->transtable->RepQCtrAddrHigh32);
  4202. writel(h->reply_pool_dhandle, &h->transtable->RepQAddr0Low32);
  4203. writel(0, &h->transtable->RepQAddr0High32);
  4204. writel(CFGTBL_Trans_Performant | use_short_tags,
  4205. &(h->cfgtable->HostWrite.TransportRequest));
  4206. writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
  4207. hpsa_wait_for_mode_change_ack(h);
  4208. register_value = readl(&(h->cfgtable->TransportActive));
  4209. if (!(register_value & CFGTBL_Trans_Performant)) {
  4210. dev_warn(&h->pdev->dev, "unable to get board into"
  4211. " performant mode\n");
  4212. return;
  4213. }
  4214. /* Change the access methods to the performant access methods */
  4215. h->access = SA5_performant_access;
  4216. h->transMethod = CFGTBL_Trans_Performant;
  4217. }
  4218. static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
  4219. {
  4220. u32 trans_support;
  4221. if (hpsa_simple_mode)
  4222. return;
  4223. trans_support = readl(&(h->cfgtable->TransportSupport));
  4224. if (!(trans_support & PERFORMANT_MODE))
  4225. return;
  4226. hpsa_get_max_perf_mode_cmds(h);
  4227. /* Performant mode ring buffer and supporting data structures */
  4228. h->reply_pool_size = h->max_commands * sizeof(u64);
  4229. h->reply_pool = pci_alloc_consistent(h->pdev, h->reply_pool_size,
  4230. &(h->reply_pool_dhandle));
  4231. /* Need a block fetch table for performant mode */
  4232. h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) *
  4233. sizeof(u32)), GFP_KERNEL);
  4234. if ((h->reply_pool == NULL)
  4235. || (h->blockFetchTable == NULL))
  4236. goto clean_up;
  4237. hpsa_enter_performant_mode(h,
  4238. trans_support & CFGTBL_Trans_use_short_tags);
  4239. return;
  4240. clean_up:
  4241. if (h->reply_pool)
  4242. pci_free_consistent(h->pdev, h->reply_pool_size,
  4243. h->reply_pool, h->reply_pool_dhandle);
  4244. kfree(h->blockFetchTable);
  4245. }
  4246. /*
  4247. * This is it. Register the PCI driver information for the cards we control
  4248. * the OS will call our registered routines when it finds one of our cards.
  4249. */
  4250. static int __init hpsa_init(void)
  4251. {
  4252. return pci_register_driver(&hpsa_pci_driver);
  4253. }
  4254. static void __exit hpsa_cleanup(void)
  4255. {
  4256. pci_unregister_driver(&hpsa_pci_driver);
  4257. }
  4258. module_init(hpsa_init);
  4259. module_exit(hpsa_cleanup);