gpmi-nand.h 10 KB

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  1. /*
  2. * Freescale GPMI NAND Flash Driver
  3. *
  4. * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
  5. * Copyright (C) 2008 Embedded Alley Solutions, Inc.
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. */
  17. #ifndef __DRIVERS_MTD_NAND_GPMI_NAND_H
  18. #define __DRIVERS_MTD_NAND_GPMI_NAND_H
  19. #include <linux/mtd/nand.h>
  20. #include <linux/platform_device.h>
  21. #include <linux/dma-mapping.h>
  22. #include <linux/fsl/mxs-dma.h>
  23. struct resources {
  24. void *gpmi_regs;
  25. void *bch_regs;
  26. unsigned int bch_low_interrupt;
  27. unsigned int bch_high_interrupt;
  28. unsigned int dma_low_channel;
  29. unsigned int dma_high_channel;
  30. struct clk *clock;
  31. };
  32. /**
  33. * struct bch_geometry - BCH geometry description.
  34. * @gf_len: The length of Galois Field. (e.g., 13 or 14)
  35. * @ecc_strength: A number that describes the strength of the ECC
  36. * algorithm.
  37. * @page_size: The size, in bytes, of a physical page, including
  38. * both data and OOB.
  39. * @metadata_size: The size, in bytes, of the metadata.
  40. * @ecc_chunk_size: The size, in bytes, of a single ECC chunk. Note
  41. * the first chunk in the page includes both data and
  42. * metadata, so it's a bit larger than this value.
  43. * @ecc_chunk_count: The number of ECC chunks in the page,
  44. * @payload_size: The size, in bytes, of the payload buffer.
  45. * @auxiliary_size: The size, in bytes, of the auxiliary buffer.
  46. * @auxiliary_status_offset: The offset into the auxiliary buffer at which
  47. * the ECC status appears.
  48. * @block_mark_byte_offset: The byte offset in the ECC-based page view at
  49. * which the underlying physical block mark appears.
  50. * @block_mark_bit_offset: The bit offset into the ECC-based page view at
  51. * which the underlying physical block mark appears.
  52. */
  53. struct bch_geometry {
  54. unsigned int gf_len;
  55. unsigned int ecc_strength;
  56. unsigned int page_size;
  57. unsigned int metadata_size;
  58. unsigned int ecc_chunk_size;
  59. unsigned int ecc_chunk_count;
  60. unsigned int payload_size;
  61. unsigned int auxiliary_size;
  62. unsigned int auxiliary_status_offset;
  63. unsigned int block_mark_byte_offset;
  64. unsigned int block_mark_bit_offset;
  65. };
  66. /**
  67. * struct boot_rom_geometry - Boot ROM geometry description.
  68. * @stride_size_in_pages: The size of a boot block stride, in pages.
  69. * @search_area_stride_exponent: The logarithm to base 2 of the size of a
  70. * search area in boot block strides.
  71. */
  72. struct boot_rom_geometry {
  73. unsigned int stride_size_in_pages;
  74. unsigned int search_area_stride_exponent;
  75. };
  76. /* DMA operations types */
  77. enum dma_ops_type {
  78. DMA_FOR_COMMAND = 1,
  79. DMA_FOR_READ_DATA,
  80. DMA_FOR_WRITE_DATA,
  81. DMA_FOR_READ_ECC_PAGE,
  82. DMA_FOR_WRITE_ECC_PAGE
  83. };
  84. /**
  85. * struct nand_timing - Fundamental timing attributes for NAND.
  86. * @data_setup_in_ns: The data setup time, in nanoseconds. Usually the
  87. * maximum of tDS and tWP. A negative value
  88. * indicates this characteristic isn't known.
  89. * @data_hold_in_ns: The data hold time, in nanoseconds. Usually the
  90. * maximum of tDH, tWH and tREH. A negative value
  91. * indicates this characteristic isn't known.
  92. * @address_setup_in_ns: The address setup time, in nanoseconds. Usually
  93. * the maximum of tCLS, tCS and tALS. A negative
  94. * value indicates this characteristic isn't known.
  95. * @gpmi_sample_delay_in_ns: A GPMI-specific timing parameter. A negative value
  96. * indicates this characteristic isn't known.
  97. * @tREA_in_ns: tREA, in nanoseconds, from the data sheet. A
  98. * negative value indicates this characteristic isn't
  99. * known.
  100. * @tRLOH_in_ns: tRLOH, in nanoseconds, from the data sheet. A
  101. * negative value indicates this characteristic isn't
  102. * known.
  103. * @tRHOH_in_ns: tRHOH, in nanoseconds, from the data sheet. A
  104. * negative value indicates this characteristic isn't
  105. * known.
  106. */
  107. struct nand_timing {
  108. int8_t data_setup_in_ns;
  109. int8_t data_hold_in_ns;
  110. int8_t address_setup_in_ns;
  111. int8_t gpmi_sample_delay_in_ns;
  112. int8_t tREA_in_ns;
  113. int8_t tRLOH_in_ns;
  114. int8_t tRHOH_in_ns;
  115. };
  116. struct gpmi_nand_data {
  117. /* System Interface */
  118. struct device *dev;
  119. struct platform_device *pdev;
  120. struct gpmi_nand_platform_data *pdata;
  121. /* Resources */
  122. struct resources resources;
  123. /* Flash Hardware */
  124. struct nand_timing timing;
  125. /* BCH */
  126. struct bch_geometry bch_geometry;
  127. struct completion bch_done;
  128. /* NAND Boot issue */
  129. bool swap_block_mark;
  130. struct boot_rom_geometry rom_geometry;
  131. /* MTD / NAND */
  132. struct nand_chip nand;
  133. struct mtd_info mtd;
  134. /* General-use Variables */
  135. int current_chip;
  136. unsigned int command_length;
  137. /* passed from upper layer */
  138. uint8_t *upper_buf;
  139. int upper_len;
  140. /* for DMA operations */
  141. bool direct_dma_map_ok;
  142. struct scatterlist cmd_sgl;
  143. char *cmd_buffer;
  144. struct scatterlist data_sgl;
  145. char *data_buffer_dma;
  146. void *page_buffer_virt;
  147. dma_addr_t page_buffer_phys;
  148. unsigned int page_buffer_size;
  149. void *payload_virt;
  150. dma_addr_t payload_phys;
  151. void *auxiliary_virt;
  152. dma_addr_t auxiliary_phys;
  153. /* DMA channels */
  154. #define DMA_CHANS 8
  155. struct dma_chan *dma_chans[DMA_CHANS];
  156. struct mxs_dma_data dma_data;
  157. enum dma_ops_type last_dma_type;
  158. enum dma_ops_type dma_type;
  159. struct completion dma_done;
  160. /* private */
  161. void *private;
  162. };
  163. /**
  164. * struct gpmi_nfc_hardware_timing - GPMI hardware timing parameters.
  165. * @data_setup_in_cycles: The data setup time, in cycles.
  166. * @data_hold_in_cycles: The data hold time, in cycles.
  167. * @address_setup_in_cycles: The address setup time, in cycles.
  168. * @use_half_periods: Indicates the clock is running slowly, so the
  169. * NFC DLL should use half-periods.
  170. * @sample_delay_factor: The sample delay factor.
  171. */
  172. struct gpmi_nfc_hardware_timing {
  173. uint8_t data_setup_in_cycles;
  174. uint8_t data_hold_in_cycles;
  175. uint8_t address_setup_in_cycles;
  176. bool use_half_periods;
  177. uint8_t sample_delay_factor;
  178. };
  179. /**
  180. * struct timing_threshod - Timing threshold
  181. * @max_data_setup_cycles: The maximum number of data setup cycles that
  182. * can be expressed in the hardware.
  183. * @internal_data_setup_in_ns: The time, in ns, that the NFC hardware requires
  184. * for data read internal setup. In the Reference
  185. * Manual, see the chapter "High-Speed NAND
  186. * Timing" for more details.
  187. * @max_sample_delay_factor: The maximum sample delay factor that can be
  188. * expressed in the hardware.
  189. * @max_dll_clock_period_in_ns: The maximum period of the GPMI clock that the
  190. * sample delay DLL hardware can possibly work
  191. * with (the DLL is unusable with longer periods).
  192. * If the full-cycle period is greater than HALF
  193. * this value, the DLL must be configured to use
  194. * half-periods.
  195. * @max_dll_delay_in_ns: The maximum amount of delay, in ns, that the
  196. * DLL can implement.
  197. * @clock_frequency_in_hz: The clock frequency, in Hz, during the current
  198. * I/O transaction. If no I/O transaction is in
  199. * progress, this is the clock frequency during
  200. * the most recent I/O transaction.
  201. */
  202. struct timing_threshod {
  203. const unsigned int max_chip_count;
  204. const unsigned int max_data_setup_cycles;
  205. const unsigned int internal_data_setup_in_ns;
  206. const unsigned int max_sample_delay_factor;
  207. const unsigned int max_dll_clock_period_in_ns;
  208. const unsigned int max_dll_delay_in_ns;
  209. unsigned long clock_frequency_in_hz;
  210. };
  211. /* Common Services */
  212. extern int common_nfc_set_geometry(struct gpmi_nand_data *);
  213. extern struct dma_chan *get_dma_chan(struct gpmi_nand_data *);
  214. extern void prepare_data_dma(struct gpmi_nand_data *,
  215. enum dma_data_direction dr);
  216. extern int start_dma_without_bch_irq(struct gpmi_nand_data *,
  217. struct dma_async_tx_descriptor *);
  218. extern int start_dma_with_bch_irq(struct gpmi_nand_data *,
  219. struct dma_async_tx_descriptor *);
  220. /* GPMI-NAND helper function library */
  221. extern int gpmi_init(struct gpmi_nand_data *);
  222. extern void gpmi_clear_bch(struct gpmi_nand_data *);
  223. extern void gpmi_dump_info(struct gpmi_nand_data *);
  224. extern int bch_set_geometry(struct gpmi_nand_data *);
  225. extern int gpmi_is_ready(struct gpmi_nand_data *, unsigned chip);
  226. extern int gpmi_send_command(struct gpmi_nand_data *);
  227. extern void gpmi_begin(struct gpmi_nand_data *);
  228. extern void gpmi_end(struct gpmi_nand_data *);
  229. extern int gpmi_read_data(struct gpmi_nand_data *);
  230. extern int gpmi_send_data(struct gpmi_nand_data *);
  231. extern int gpmi_send_page(struct gpmi_nand_data *,
  232. dma_addr_t payload, dma_addr_t auxiliary);
  233. extern int gpmi_read_page(struct gpmi_nand_data *,
  234. dma_addr_t payload, dma_addr_t auxiliary);
  235. /* BCH : Status Block Completion Codes */
  236. #define STATUS_GOOD 0x00
  237. #define STATUS_ERASED 0xff
  238. #define STATUS_UNCORRECTABLE 0xfe
  239. /* Use the platform_id to distinguish different Archs. */
  240. #define IS_MX23 0x1
  241. #define IS_MX28 0x2
  242. #define GPMI_IS_MX23(x) ((x)->pdev->id_entry->driver_data == IS_MX23)
  243. #define GPMI_IS_MX28(x) ((x)->pdev->id_entry->driver_data == IS_MX28)
  244. #endif