rmi_fw_update.c 34 KB

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  1. /* Synaptics Register Mapped Interface (RMI4) I2C Physical Layer Driver.
  2. * Copyright (c) 2007-2012, Synaptics Incorporated
  3. *
  4. * This software is licensed under the terms of the GNU General Public
  5. * License version 2, as published by the Free Software Foundation, and
  6. * may be copied, distributed, and modified under those terms.
  7. *
  8. * This program is distributed in the hope that it will be useful,
  9. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. * GNU General Public License for more details.
  12. *
  13. */
  14. #include <linux/kernel.h>
  15. #include <linux/module.h>
  16. #include <asm/unaligned.h>
  17. #include <mach/cpufreq.h>
  18. #include <linux/slab.h>
  19. #include <linux/i2c.h>
  20. #include <linux/interrupt.h>
  21. #include <linux/delay.h>
  22. #include <linux/input.h>
  23. #include <linux/firmware.h>
  24. #include "synaptics_i2c_rmi.h"
  25. #define F01_DEVICE_STATUS 0X0004
  26. #define CHECKSUM_OFFSET 0x00
  27. #define BOOTLOADER_VERSION_OFFSET 0x07
  28. #define IMAGE_SIZE_OFFSET 0x08
  29. #define CONFIG_SIZE_OFFSET 0x0C
  30. #define PRODUCT_ID_OFFSET 0x10
  31. #define PRODUCT_INFO_OFFSET 0x1E
  32. #define FW_IMAGE_OFFSET 0x100
  33. #define PRODUCT_ID_SIZE 10
  34. #define BOOTLOADER_ID_OFFSET 0
  35. #define FLASH_PROPERTIES_OFFSET 1
  36. #define BLOCK_SIZE_OFFSET 2
  37. #define BLOCK_COUNT_OFFSET 3
  38. #define REG_MAP (1 << 0)
  39. #define UNLOCKED (1 << 1)
  40. #define HAS_CONFIG_ID (1 << 2)
  41. #define HAS_PERM_CONFIG (1 << 3)
  42. #define HAS_BL_CONFIG (1 << 4)
  43. #define HAS_DISP_CONFIG (1 << 5)
  44. #define HAS_CTRL1 (1 << 6)
  45. #define BLOCK_NUMBER_OFFSET 0
  46. #define BLOCK_DATA_OFFSET 1
  47. #define FLASH_COMMAND_OFFSET 2
  48. #define FLASH_STATUS_OFFSET 3
  49. #define UI_CONFIG_AREA 0x00
  50. #define PERM_CONFIG_AREA 0x01
  51. #define BL_CONFIG_AREA 0x02
  52. #define DISP_CONFIG_AREA 0x03
  53. #define CMD_WRITE_FW_BLOCK 0x2
  54. #define CMD_ERASE_ALL 0x3
  55. #define CMD_READ_CONFIG_BLOCK 0x5
  56. #define CMD_WRITE_CONFIG_BLOCK 0x6
  57. #define CMD_ERASE_CONFIG 0x7
  58. #define CMD_ERASE_BL_CONFIG 0x9
  59. #define CMD_ERASE_DISP_CONFIG 0xa
  60. #define CMD_ENABLE_FLASH_PROG 0xf
  61. #define SLEEP_MODE_NORMAL (0x00)
  62. #define SLEEP_MODE_SENSOR_SLEEP (0x01)
  63. #define SLEEP_MODE_RESERVED0 (0x02)
  64. #define SLEEP_MODE_RESERVED1 (0x03)
  65. #define ENABLE_WAIT_MS (1 * 1000)
  66. #define WRITE_WAIT_MS (3 * 1000)
  67. #define ERASE_WAIT_MS (5 * 1000)
  68. #define MIN_SLEEP_TIME_US 50
  69. #define MAX_SLEEP_TIME_US 100
  70. static ssize_t fwu_sysfs_show_image(struct file *data_file,
  71. struct kobject *kobj, struct bin_attribute *attributes,
  72. char *buf, loff_t pos, size_t count);
  73. static ssize_t fwu_sysfs_store_image(struct file *data_file,
  74. struct kobject *kobj, struct bin_attribute *attributes,
  75. char *buf, loff_t pos, size_t count);
  76. static ssize_t fwu_sysfs_do_reflash_store(struct device *dev,
  77. struct device_attribute *attr, const char *buf, size_t count);
  78. static ssize_t fwu_sysfs_write_config_store(struct device *dev,
  79. struct device_attribute *attr, const char *buf, size_t count);
  80. static ssize_t fwu_sysfs_read_config_store(struct device *dev,
  81. struct device_attribute *attr, const char *buf, size_t count);
  82. static ssize_t fwu_sysfs_config_area_store(struct device *dev,
  83. struct device_attribute *attr, const char *buf, size_t count);
  84. static ssize_t fwu_sysfs_image_size_store(struct device *dev,
  85. struct device_attribute *attr, const char *buf, size_t count);
  86. static ssize_t fwu_sysfs_block_size_show(struct device *dev,
  87. struct device_attribute *attr, char *buf);
  88. static ssize_t fwu_sysfs_firmware_block_count_show(struct device *dev,
  89. struct device_attribute *attr, char *buf);
  90. static ssize_t fwu_sysfs_configuration_block_count_show(struct device *dev,
  91. struct device_attribute *attr, char *buf);
  92. static ssize_t fwu_sysfs_perm_config_block_count_show(struct device *dev,
  93. struct device_attribute *attr, char *buf);
  94. static ssize_t fwu_sysfs_bl_config_block_count_show(struct device *dev,
  95. struct device_attribute *attr, char *buf);
  96. static ssize_t fwu_sysfs_disp_config_block_count_show(struct device *dev,
  97. struct device_attribute *attr, char *buf);
  98. struct image_header {
  99. unsigned int checksum;
  100. unsigned int image_size;
  101. unsigned int config_size;
  102. unsigned char options;
  103. unsigned char bootloader_version;
  104. unsigned char product_id[SYNAPTICS_RMI4_PRODUCT_ID_SIZE + 1];
  105. unsigned char product_info[SYNAPTICS_RMI4_PRODUCT_INFO_SIZE];
  106. };
  107. struct pdt_properties {
  108. union {
  109. struct {
  110. unsigned char reserved_1:6;
  111. unsigned char has_bsr:1;
  112. unsigned char reserved_2:1;
  113. } __packed;
  114. unsigned char data[1];
  115. };
  116. };
  117. struct f01_device_status {
  118. union {
  119. struct {
  120. unsigned char status_code:4;
  121. unsigned char reserved:2;
  122. unsigned char flash_prog:1;
  123. unsigned char unconfigured:1;
  124. } __packed;
  125. unsigned char data[1];
  126. };
  127. };
  128. struct f01_device_control {
  129. union {
  130. struct {
  131. unsigned char sleep_mode:2;
  132. unsigned char nosleep:1;
  133. unsigned char reserved:2;
  134. unsigned char charger_connected:1;
  135. unsigned char report_rate:1;
  136. unsigned char configured:1;
  137. } __packed;
  138. unsigned char data[1];
  139. };
  140. };
  141. struct f34_flash_status {
  142. union {
  143. struct {
  144. unsigned char status:6;
  145. unsigned char reserved:1;
  146. unsigned char program_enabled:1;
  147. } __packed;
  148. unsigned char data[1];
  149. };
  150. };
  151. struct synaptics_rmi4_fwu_handle {
  152. bool initialized;
  153. bool has_perm_config;
  154. bool has_bl_config;
  155. bool has_disp_config;
  156. unsigned int image_size;
  157. unsigned int data_pos;
  158. unsigned char *ext_data_source;
  159. unsigned char *read_config_buf;
  160. unsigned char intr_mask;
  161. unsigned char command;
  162. unsigned char bootloader_id[2];
  163. unsigned char flash_properties;
  164. unsigned char productinfo1;
  165. unsigned char productinfo2;
  166. unsigned short block_size;
  167. unsigned short fw_block_count;
  168. unsigned short config_block_count;
  169. unsigned short perm_config_block_count;
  170. unsigned short bl_config_block_count;
  171. unsigned short disp_config_block_count;
  172. unsigned short config_size;
  173. unsigned short config_area;
  174. char product_id[SYNAPTICS_RMI4_PRODUCT_ID_SIZE + 1];
  175. const unsigned char *firmware_data;
  176. const unsigned char *config_data;
  177. struct f34_flash_status flash_status;
  178. struct synaptics_rmi4_fn_desc f01_fd;
  179. struct synaptics_rmi4_fn_desc f34_fd;
  180. struct synaptics_rmi4_exp_fn_ptr *fn_ptr;
  181. struct synaptics_rmi4_data *rmi4_data;
  182. };
  183. static struct bin_attribute dev_attr_data = {
  184. .attr = {
  185. .name = "data",
  186. .mode = (S_IRUGO | S_IWUSR | S_IWGRP),
  187. },
  188. .size = 0,
  189. .read = fwu_sysfs_show_image,
  190. .write = fwu_sysfs_store_image,
  191. };
  192. static struct device_attribute attrs[] = {
  193. __ATTR(doreflash, S_IWUSR | S_IWGRP,
  194. synaptics_rmi4_show_error,
  195. fwu_sysfs_do_reflash_store),
  196. __ATTR(writeconfig, S_IWUSR | S_IWGRP,
  197. synaptics_rmi4_show_error,
  198. fwu_sysfs_write_config_store),
  199. __ATTR(readconfig, S_IWUSR | S_IWGRP,
  200. synaptics_rmi4_show_error,
  201. fwu_sysfs_read_config_store),
  202. __ATTR(configarea, S_IWUSR | S_IWGRP,
  203. synaptics_rmi4_show_error,
  204. fwu_sysfs_config_area_store),
  205. __ATTR(imagesize, S_IWUSR | S_IWGRP,
  206. synaptics_rmi4_show_error,
  207. fwu_sysfs_image_size_store),
  208. __ATTR(blocksize, S_IRUGO,
  209. fwu_sysfs_block_size_show,
  210. synaptics_rmi4_store_error),
  211. __ATTR(fwblockcount, S_IRUGO,
  212. fwu_sysfs_firmware_block_count_show,
  213. synaptics_rmi4_store_error),
  214. __ATTR(configblockcount, S_IRUGO,
  215. fwu_sysfs_configuration_block_count_show,
  216. synaptics_rmi4_store_error),
  217. __ATTR(permconfigblockcount, S_IRUGO,
  218. fwu_sysfs_perm_config_block_count_show,
  219. synaptics_rmi4_store_error),
  220. __ATTR(blconfigblockcount, S_IRUGO,
  221. fwu_sysfs_bl_config_block_count_show,
  222. synaptics_rmi4_store_error),
  223. __ATTR(dispconfigblockcount, S_IRUGO,
  224. fwu_sysfs_disp_config_block_count_show,
  225. synaptics_rmi4_store_error),
  226. };
  227. static struct synaptics_rmi4_fwu_handle *fwu;
  228. static unsigned int extract_uint(const unsigned char *ptr)
  229. {
  230. return (unsigned int)ptr[0] +
  231. (unsigned int)ptr[1] * 0x100 +
  232. (unsigned int)ptr[2] * 0x10000 +
  233. (unsigned int)ptr[3] * 0x1000000;
  234. }
  235. static void parse_header(struct image_header *header,
  236. const unsigned char *fw_image)
  237. {
  238. header->checksum = extract_uint(&fw_image[CHECKSUM_OFFSET]);
  239. header->bootloader_version = fw_image[BOOTLOADER_VERSION_OFFSET];
  240. header->image_size = extract_uint(&fw_image[IMAGE_SIZE_OFFSET]);
  241. header->config_size = extract_uint(&fw_image[CONFIG_SIZE_OFFSET]);
  242. memcpy(header->product_id, &fw_image[PRODUCT_ID_OFFSET],
  243. SYNAPTICS_RMI4_PRODUCT_ID_SIZE);
  244. header->product_id[SYNAPTICS_RMI4_PRODUCT_ID_SIZE] = 0;
  245. memcpy(header->product_info, &fw_image[PRODUCT_INFO_OFFSET],
  246. SYNAPTICS_RMI4_PRODUCT_INFO_SIZE);
  247. return;
  248. }
  249. static int fwu_read_f01_device_status(struct f01_device_status *status)
  250. {
  251. int retval;
  252. retval = fwu->fn_ptr->read(fwu->rmi4_data,
  253. fwu->f01_fd.data_base_addr,
  254. status->data,
  255. sizeof(status->data));
  256. if (retval < 0) {
  257. dev_err(&fwu->rmi4_data->i2c_client->dev,
  258. "%s: Failed to read F01 device status\n",
  259. __func__);
  260. return retval;
  261. }
  262. return 0;
  263. }
  264. static int fwu_read_f34_queries(void)
  265. {
  266. int retval;
  267. unsigned char count;
  268. unsigned char buf[10];
  269. retval = fwu->fn_ptr->read(fwu->rmi4_data,
  270. fwu->f34_fd.query_base_addr + BOOTLOADER_ID_OFFSET,
  271. fwu->bootloader_id,
  272. sizeof(fwu->bootloader_id));
  273. if (retval < 0) {
  274. dev_err(&fwu->rmi4_data->i2c_client->dev,
  275. "%s: Failed to read bootloader ID\n",
  276. __func__);
  277. return retval;
  278. }
  279. retval = fwu->fn_ptr->read(fwu->rmi4_data,
  280. fwu->f34_fd.query_base_addr + FLASH_PROPERTIES_OFFSET,
  281. &fwu->flash_properties,
  282. sizeof(fwu->flash_properties));
  283. if (retval < 0) {
  284. dev_err(&fwu->rmi4_data->i2c_client->dev,
  285. "%s: Failed to read flash properties\n",
  286. __func__);
  287. return retval;
  288. }
  289. count = 4;
  290. if (fwu->flash_properties & HAS_PERM_CONFIG) {
  291. fwu->has_perm_config = 1;
  292. count += 2;
  293. }
  294. if (fwu->flash_properties & HAS_BL_CONFIG) {
  295. fwu->has_bl_config = 1;
  296. count += 2;
  297. }
  298. if (fwu->flash_properties & HAS_DISP_CONFIG) {
  299. fwu->has_disp_config = 1;
  300. count += 2;
  301. }
  302. retval = fwu->fn_ptr->read(fwu->rmi4_data,
  303. fwu->f34_fd.query_base_addr + BLOCK_SIZE_OFFSET,
  304. buf,
  305. 2);
  306. if (retval < 0) {
  307. dev_err(&fwu->rmi4_data->i2c_client->dev,
  308. "%s: Failed to read block size info\n",
  309. __func__);
  310. return retval;
  311. }
  312. batohs(&fwu->block_size, &(buf[0]));
  313. retval = fwu->fn_ptr->read(fwu->rmi4_data,
  314. fwu->f34_fd.query_base_addr + BLOCK_COUNT_OFFSET,
  315. buf,
  316. count);
  317. if (retval < 0) {
  318. dev_err(&fwu->rmi4_data->i2c_client->dev,
  319. "%s: Failed to read block count info\n",
  320. __func__);
  321. return retval;
  322. }
  323. batohs(&fwu->fw_block_count, &(buf[0]));
  324. batohs(&fwu->config_block_count, &(buf[2]));
  325. count = 4;
  326. if (fwu->has_perm_config) {
  327. batohs(&fwu->perm_config_block_count, &(buf[count]));
  328. count += 2;
  329. }
  330. if (fwu->has_bl_config) {
  331. batohs(&fwu->bl_config_block_count, &(buf[count]));
  332. count += 2;
  333. }
  334. if (fwu->has_disp_config)
  335. batohs(&fwu->disp_config_block_count, &(buf[count]));
  336. return 0;
  337. }
  338. static int fwu_read_f34_flash_status(void)
  339. {
  340. int retval;
  341. unsigned char status;
  342. unsigned char command;
  343. retval = fwu->fn_ptr->read(fwu->rmi4_data,
  344. fwu->f34_fd.data_base_addr + FLASH_STATUS_OFFSET,
  345. &status,
  346. sizeof(status));
  347. if (retval < 0) {
  348. dev_err(&fwu->rmi4_data->i2c_client->dev,
  349. "%s: Failed to read flash status\n",
  350. __func__);
  351. return retval;
  352. }
  353. /* Program enabled bit not available - force bit to be set */
  354. fwu->flash_status.program_enabled = 1;
  355. fwu->flash_status.status = status & MASK_3BIT;
  356. retval = fwu->fn_ptr->read(fwu->rmi4_data,
  357. fwu->f34_fd.data_base_addr + FLASH_COMMAND_OFFSET,
  358. &command,
  359. sizeof(command));
  360. if (retval < 0) {
  361. dev_err(&fwu->rmi4_data->i2c_client->dev,
  362. "%s: Failed to read flash command\n",
  363. __func__);
  364. return retval;
  365. }
  366. fwu->command = command & MASK_4BIT;
  367. return 0;
  368. }
  369. static int fwu_write_f34_command(unsigned char cmd)
  370. {
  371. int retval;
  372. unsigned char command = cmd;
  373. retval = fwu->fn_ptr->write(fwu->rmi4_data,
  374. fwu->f34_fd.data_base_addr + FLASH_COMMAND_OFFSET,
  375. &command,
  376. sizeof(command));
  377. if (retval < 0) {
  378. dev_err(&fwu->rmi4_data->i2c_client->dev,
  379. "%s: Failed to write command 0x%02x\n",
  380. __func__, command);
  381. return retval;
  382. }
  383. fwu->command = cmd;
  384. return 0;
  385. }
  386. static int fwu_wait_for_idle(int timeout_ms)
  387. {
  388. int count = 0;
  389. int timeout_count = ((timeout_ms * 1000) / MAX_SLEEP_TIME_US) + 1;
  390. do {
  391. usleep_range(MIN_SLEEP_TIME_US, MAX_SLEEP_TIME_US);
  392. count++;
  393. if (count == timeout_count)
  394. fwu_read_f34_flash_status();
  395. if ((fwu->command == 0x00) &&
  396. (fwu->flash_status.status == 0x00))
  397. return 0;
  398. } while (count < timeout_count);
  399. dev_err(&fwu->rmi4_data->i2c_client->dev,
  400. "%s: Timed out waiting for idle status\n",
  401. __func__);
  402. return -ETIMEDOUT;
  403. }
  404. static int fwu_scan_pdt(void)
  405. {
  406. int retval;
  407. unsigned char ii;
  408. unsigned char intr_count = 0;
  409. unsigned char intr_off;
  410. unsigned char intr_src;
  411. unsigned short addr;
  412. bool f01found = false;
  413. bool f34found = false;
  414. struct synaptics_rmi4_fn_desc rmi_fd;
  415. for (addr = PDT_START; addr > PDT_END; addr -= PDT_ENTRY_SIZE) {
  416. retval = fwu->fn_ptr->read(fwu->rmi4_data,
  417. addr,
  418. (unsigned char *)&rmi_fd,
  419. sizeof(rmi_fd));
  420. if (retval < 0)
  421. return retval;
  422. if (rmi_fd.fn_number) {
  423. dev_dbg(&fwu->rmi4_data->i2c_client->dev,
  424. "%s: Found F%02x\n",
  425. __func__, rmi_fd.fn_number);
  426. switch (rmi_fd.fn_number) {
  427. case SYNAPTICS_RMI4_F01:
  428. f01found = true;
  429. fwu->f01_fd.query_base_addr =
  430. rmi_fd.query_base_addr;
  431. fwu->f01_fd.ctrl_base_addr =
  432. rmi_fd.ctrl_base_addr;
  433. fwu->f01_fd.data_base_addr =
  434. rmi_fd.data_base_addr;
  435. fwu->f01_fd.cmd_base_addr =
  436. rmi_fd.cmd_base_addr;
  437. break;
  438. case SYNAPTICS_RMI4_F34:
  439. f34found = true;
  440. fwu->f34_fd.query_base_addr =
  441. rmi_fd.query_base_addr;
  442. fwu->f34_fd.ctrl_base_addr =
  443. rmi_fd.ctrl_base_addr;
  444. fwu->f34_fd.data_base_addr =
  445. rmi_fd.data_base_addr;
  446. fwu->intr_mask = 0;
  447. intr_src = rmi_fd.intr_src_count;
  448. intr_off = intr_count % 8;
  449. for (ii = intr_off;
  450. ii < ((intr_src & MASK_3BIT) +
  451. intr_off);
  452. ii++) {
  453. fwu->intr_mask |= 1 << ii;
  454. }
  455. break;
  456. }
  457. } else {
  458. break;
  459. }
  460. intr_count += (rmi_fd.intr_src_count & MASK_3BIT);
  461. }
  462. if (!f01found || !f34found) {
  463. dev_err(&fwu->rmi4_data->i2c_client->dev,
  464. "%s: Failed to find both F01 and F34\n",
  465. __func__);
  466. return -EINVAL;
  467. }
  468. return 0;
  469. }
  470. static int fwu_write_blocks(unsigned char *block_ptr, unsigned short block_cnt,
  471. unsigned char command)
  472. {
  473. int retval;
  474. unsigned char block_offset[] = {0, 0};
  475. unsigned short block_num;
  476. block_offset[1] |= (fwu->config_area << 5);
  477. retval = fwu->fn_ptr->write(fwu->rmi4_data,
  478. fwu->f34_fd.data_base_addr + BLOCK_NUMBER_OFFSET,
  479. block_offset,
  480. sizeof(block_offset));
  481. if (retval < 0) {
  482. dev_err(&fwu->rmi4_data->i2c_client->dev,
  483. "%s: Failed to write to block number registers\n",
  484. __func__);
  485. return retval;
  486. }
  487. for (block_num = 0; block_num < block_cnt; block_num++) {
  488. retval = fwu->fn_ptr->write(fwu->rmi4_data,
  489. fwu->f34_fd.data_base_addr + BLOCK_DATA_OFFSET,
  490. block_ptr,
  491. fwu->block_size);
  492. if (retval < 0) {
  493. dev_err(&fwu->rmi4_data->i2c_client->dev,
  494. "%s: Failed to write block data (block %d)\n",
  495. __func__, block_num);
  496. return retval;
  497. }
  498. retval = fwu_write_f34_command(command);
  499. if (retval < 0) {
  500. dev_err(&fwu->rmi4_data->i2c_client->dev,
  501. "%s: Failed to write command for block %d\n",
  502. __func__, block_num);
  503. return retval;
  504. }
  505. retval = fwu_wait_for_idle(WRITE_WAIT_MS);
  506. if (retval < 0) {
  507. dev_err(&fwu->rmi4_data->i2c_client->dev,
  508. "%s: Failed to wait for idle status (block %d)\n",
  509. __func__, block_num);
  510. return retval;
  511. }
  512. block_ptr += fwu->block_size;
  513. }
  514. return 0;
  515. }
  516. static int fwu_write_firmware(void)
  517. {
  518. return fwu_write_blocks((unsigned char *)fwu->firmware_data,
  519. fwu->fw_block_count, CMD_WRITE_FW_BLOCK);
  520. }
  521. static int fwu_write_configuration(void)
  522. {
  523. return fwu_write_blocks((unsigned char *)fwu->config_data,
  524. fwu->config_block_count, CMD_WRITE_CONFIG_BLOCK);
  525. }
  526. static int fwu_write_bootloader_id(void)
  527. {
  528. int retval;
  529. retval = fwu->fn_ptr->write(fwu->rmi4_data,
  530. fwu->f34_fd.data_base_addr + BLOCK_DATA_OFFSET,
  531. fwu->bootloader_id,
  532. sizeof(fwu->bootloader_id));
  533. if (retval < 0) {
  534. dev_err(&fwu->rmi4_data->i2c_client->dev,
  535. "%s: Failed to write bootloader ID\n",
  536. __func__);
  537. return retval;
  538. }
  539. return 0;
  540. }
  541. static int fwu_enter_flash_prog(void)
  542. {
  543. int retval;
  544. struct f01_device_status f01_device_status;
  545. struct f01_device_control f01_device_control;
  546. retval = fwu_write_bootloader_id();
  547. if (retval < 0)
  548. return retval;
  549. retval = fwu_write_f34_command(CMD_ENABLE_FLASH_PROG);
  550. if (retval < 0)
  551. return retval;
  552. retval = fwu_wait_for_idle(ENABLE_WAIT_MS);
  553. if (retval < 0)
  554. return retval;
  555. if (!fwu->flash_status.program_enabled) {
  556. dev_err(&fwu->rmi4_data->i2c_client->dev,
  557. "%s: Program enabled bit not set\n",
  558. __func__);
  559. return -EINVAL;
  560. }
  561. retval = fwu_scan_pdt();
  562. if (retval < 0)
  563. return retval;
  564. retval = fwu_read_f01_device_status(&f01_device_status);
  565. if (retval < 0)
  566. return retval;
  567. if (!f01_device_status.flash_prog) {
  568. dev_err(&fwu->rmi4_data->i2c_client->dev,
  569. "%s: Not in flash prog mode\n",
  570. __func__);
  571. return -EINVAL;
  572. }
  573. retval = fwu_read_f34_queries();
  574. if (retval < 0)
  575. return retval;
  576. retval = fwu->fn_ptr->read(fwu->rmi4_data,
  577. fwu->f01_fd.ctrl_base_addr,
  578. f01_device_control.data,
  579. sizeof(f01_device_control.data));
  580. if (retval < 0) {
  581. dev_err(&fwu->rmi4_data->i2c_client->dev,
  582. "%s: Failed to read F01 device control\n",
  583. __func__);
  584. return retval;
  585. }
  586. f01_device_control.nosleep = true;
  587. f01_device_control.sleep_mode = SLEEP_MODE_NORMAL;
  588. retval = fwu->fn_ptr->write(fwu->rmi4_data,
  589. fwu->f01_fd.ctrl_base_addr,
  590. f01_device_control.data,
  591. sizeof(f01_device_control.data));
  592. if (retval < 0) {
  593. dev_err(&fwu->rmi4_data->i2c_client->dev,
  594. "%s: Failed to write F01 device control\n",
  595. __func__);
  596. return retval;
  597. }
  598. return retval;
  599. }
  600. static int fwu_do_reflash(void)
  601. {
  602. int retval;
  603. #ifdef CONFIG_MACH_JS01LTEDCM
  604. retval = set_freq_limit(DVFS_TOUCH_ID,MIN_TOUCH_LIMIT);
  605. if (retval < 0)
  606. return retval;
  607. #endif
  608. retval = fwu_enter_flash_prog();
  609. if (retval < 0)
  610. return retval;
  611. dev_info(&fwu->rmi4_data->i2c_client->dev,
  612. "%s: Entered flash prog mode\n",
  613. __func__);
  614. retval = fwu_write_bootloader_id();
  615. if (retval < 0)
  616. return retval;
  617. dev_info(&fwu->rmi4_data->i2c_client->dev,
  618. "%s: Bootloader ID written\n",
  619. __func__);
  620. retval = fwu_write_f34_command(CMD_ERASE_ALL);
  621. if (retval < 0)
  622. return retval;
  623. dev_info(&fwu->rmi4_data->i2c_client->dev,
  624. "%s: Erase all command written\n",
  625. __func__);
  626. retval = fwu_wait_for_idle(ERASE_WAIT_MS);
  627. if (retval < 0)
  628. return retval;
  629. dev_info(&fwu->rmi4_data->i2c_client->dev,
  630. "%s: Idle status detected\n",
  631. __func__);
  632. if (fwu->firmware_data) {
  633. retval = fwu_write_firmware();
  634. if (retval < 0)
  635. return retval;
  636. dev_info(&fwu->rmi4_data->i2c_client->dev, "%s: Firmware programmed\n",
  637. __func__);
  638. }
  639. if (fwu->config_data) {
  640. retval = fwu_write_configuration();
  641. if (retval < 0)
  642. return retval;
  643. dev_info(&fwu->rmi4_data->i2c_client->dev, "%s: Configuration programmed\n",
  644. __func__);
  645. }
  646. return retval;
  647. }
  648. static int fwu_start_reflash(void)
  649. {
  650. int retval = 0, retry = 3;
  651. #ifdef CONFIG_MACH_JS01LTEDCM
  652. int ret = 0;
  653. #endif
  654. unsigned char device_status;
  655. struct image_header header;
  656. const unsigned char *fw_image;
  657. if (fwu->rmi4_data->sensor_sleep || fwu->rmi4_data->touch_stopped) {
  658. dev_err(&fwu->rmi4_data->i2c_client->dev,
  659. "%s: Sensor sleeping or stopped\n",
  660. __func__);
  661. return -ENODEV;
  662. }
  663. fwu->rmi4_data->stay_awake = true;
  664. if (!fwu->ext_data_source) {
  665. dev_err(&fwu->rmi4_data->i2c_client->dev,
  666. "%s: Firmware data is NULL\n", __func__);
  667. return -ENODEV;
  668. }
  669. fw_image = fwu->ext_data_source;
  670. parse_header(&header, fw_image);
  671. if (header.image_size)
  672. fwu->firmware_data = fw_image + FW_IMAGE_OFFSET;
  673. if (header.config_size) {
  674. fwu->config_data = fw_image + FW_IMAGE_OFFSET +
  675. header.image_size;
  676. }
  677. while (retry--) {
  678. mutex_lock(&(fwu->rmi4_data->rmi4_reflash_mutex));
  679. fwu->rmi4_data->doing_reflash = true;
  680. retval = fwu_do_reflash();
  681. if (retval < 0) {
  682. dev_err(&fwu->rmi4_data->i2c_client->dev,
  683. "%s: Failed to do reflash\n",
  684. __func__);
  685. }
  686. fwu->rmi4_data->reset_device(fwu->rmi4_data);
  687. fwu->rmi4_data->doing_reflash = false;
  688. mutex_unlock(&(fwu->rmi4_data->rmi4_reflash_mutex));
  689. fwu->fn_ptr->read(fwu->rmi4_data,
  690. F01_DEVICE_STATUS,
  691. &device_status,
  692. sizeof(device_status));
  693. if (!(device_status & (1 << 6)))
  694. break;
  695. else
  696. dev_info(&fwu->rmi4_data->i2c_client->dev,
  697. "%s: flash prog bit = %x, retry = %d\n",
  698. __func__, device_status & (1 << 6), retry);
  699. }
  700. #ifdef CONFIG_MACH_JS01LTEDCM
  701. ret = set_freq_limit(DVFS_TOUCH_ID, -1);
  702. if (ret < 0)
  703. dev_err(&fwu->rmi4_data->i2c_client->dev,
  704. "%s: in fw update, failed booster stop.\n",
  705. __func__);
  706. #endif
  707. dev_dbg(&fwu->rmi4_data->i2c_client->dev, "%s: End of reflash process\n",
  708. __func__);
  709. fwu->rmi4_data->stay_awake = false;
  710. return retval;
  711. }
  712. static int fwu_do_write_config(void)
  713. {
  714. int retval;
  715. retval = fwu_enter_flash_prog();
  716. if (retval < 0)
  717. return retval;
  718. dev_dbg(&fwu->rmi4_data->i2c_client->dev,
  719. "%s: Entered flash prog mode\n",
  720. __func__);
  721. if (fwu->config_area == PERM_CONFIG_AREA) {
  722. fwu->config_block_count = fwu->perm_config_block_count;
  723. goto write_config;
  724. }
  725. retval = fwu_write_bootloader_id();
  726. if (retval < 0)
  727. return retval;
  728. dev_dbg(&fwu->rmi4_data->i2c_client->dev,
  729. "%s: Bootloader ID written\n",
  730. __func__);
  731. switch (fwu->config_area) {
  732. case UI_CONFIG_AREA:
  733. retval = fwu_write_f34_command(CMD_ERASE_CONFIG);
  734. break;
  735. case BL_CONFIG_AREA:
  736. retval = fwu_write_f34_command(CMD_ERASE_BL_CONFIG);
  737. fwu->config_block_count = fwu->bl_config_block_count;
  738. break;
  739. case DISP_CONFIG_AREA:
  740. retval = fwu_write_f34_command(CMD_ERASE_DISP_CONFIG);
  741. fwu->config_block_count = fwu->disp_config_block_count;
  742. break;
  743. }
  744. if (retval < 0)
  745. return retval;
  746. dev_dbg(&fwu->rmi4_data->i2c_client->dev,
  747. "%s: Erase command written\n",
  748. __func__);
  749. retval = fwu_wait_for_idle(ERASE_WAIT_MS);
  750. if (retval < 0)
  751. return retval;
  752. dev_dbg(&fwu->rmi4_data->i2c_client->dev,
  753. "%s: Idle status detected\n",
  754. __func__);
  755. write_config:
  756. retval = fwu_write_configuration();
  757. if (retval < 0)
  758. return retval;
  759. dev_info(&fwu->rmi4_data->i2c_client->dev, "%s: Config written\n",
  760. __func__);
  761. return retval;
  762. }
  763. static int fwu_start_write_config(void)
  764. {
  765. int retval;
  766. struct image_header header;
  767. switch (fwu->config_area) {
  768. case UI_CONFIG_AREA:
  769. break;
  770. case PERM_CONFIG_AREA:
  771. if (!fwu->has_perm_config)
  772. return -EINVAL;
  773. break;
  774. case BL_CONFIG_AREA:
  775. if (!fwu->has_bl_config)
  776. return -EINVAL;
  777. break;
  778. case DISP_CONFIG_AREA:
  779. if (!fwu->has_disp_config)
  780. return -EINVAL;
  781. break;
  782. default:
  783. return -EINVAL;
  784. }
  785. if (fwu->ext_data_source)
  786. fwu->config_data = fwu->ext_data_source;
  787. else
  788. return -EINVAL;
  789. if (fwu->config_area == UI_CONFIG_AREA) {
  790. parse_header(&header, fwu->ext_data_source);
  791. if (header.config_size) {
  792. fwu->config_data = fwu->ext_data_source +
  793. FW_IMAGE_OFFSET +
  794. header.image_size;
  795. } else {
  796. return -EINVAL;
  797. }
  798. }
  799. dev_info(&fwu->rmi4_data->i2c_client->dev, "%s: Start of write config process\n",
  800. __func__);
  801. fwu->rmi4_data->doing_reflash = true;
  802. retval = fwu_do_write_config();
  803. if (retval < 0) {
  804. dev_err(&fwu->rmi4_data->i2c_client->dev,
  805. "%s: Failed to write config\n",
  806. __func__);
  807. }
  808. fwu->rmi4_data->reset_device(fwu->rmi4_data);
  809. fwu->rmi4_data->doing_reflash = false;
  810. dev_info(&fwu->rmi4_data->i2c_client->dev, "%s: End of write config process\n",
  811. __func__);
  812. return retval;
  813. }
  814. static int fwu_do_read_config(void)
  815. {
  816. int retval;
  817. unsigned char block_offset[] = {0, 0};
  818. unsigned short block_num;
  819. unsigned short block_count;
  820. unsigned short index = 0;
  821. retval = fwu_enter_flash_prog();
  822. if (retval < 0)
  823. goto exit;
  824. dev_dbg(&fwu->rmi4_data->i2c_client->dev,
  825. "%s: Entered flash prog mode\n",
  826. __func__);
  827. switch (fwu->config_area) {
  828. case UI_CONFIG_AREA:
  829. block_count = fwu->config_block_count;
  830. break;
  831. case PERM_CONFIG_AREA:
  832. if (!fwu->has_perm_config) {
  833. retval = -EINVAL;
  834. goto exit;
  835. }
  836. block_count = fwu->perm_config_block_count;
  837. break;
  838. case BL_CONFIG_AREA:
  839. if (!fwu->has_bl_config) {
  840. retval = -EINVAL;
  841. goto exit;
  842. }
  843. block_count = fwu->bl_config_block_count;
  844. break;
  845. case DISP_CONFIG_AREA:
  846. if (!fwu->has_disp_config) {
  847. retval = -EINVAL;
  848. goto exit;
  849. }
  850. block_count = fwu->disp_config_block_count;
  851. break;
  852. default:
  853. retval = -EINVAL;
  854. goto exit;
  855. }
  856. fwu->config_size = fwu->block_size * block_count;
  857. kfree(fwu->read_config_buf);
  858. fwu->read_config_buf = kzalloc(fwu->config_size, GFP_KERNEL);
  859. block_offset[1] |= (fwu->config_area << 5);
  860. retval = fwu->fn_ptr->write(fwu->rmi4_data,
  861. fwu->f34_fd.data_base_addr + BLOCK_NUMBER_OFFSET,
  862. block_offset,
  863. sizeof(block_offset));
  864. if (retval < 0) {
  865. dev_err(&fwu->rmi4_data->i2c_client->dev,
  866. "%s: Failed to write to block number registers\n",
  867. __func__);
  868. goto exit;
  869. }
  870. for (block_num = 0; block_num < block_count; block_num++) {
  871. retval = fwu_write_f34_command(CMD_READ_CONFIG_BLOCK);
  872. if (retval < 0) {
  873. dev_err(&fwu->rmi4_data->i2c_client->dev,
  874. "%s: Failed to write read config command\n",
  875. __func__);
  876. goto exit;
  877. }
  878. retval = fwu_wait_for_idle(WRITE_WAIT_MS);
  879. if (retval < 0) {
  880. dev_err(&fwu->rmi4_data->i2c_client->dev,
  881. "%s: Failed to wait for idle status\n",
  882. __func__);
  883. goto exit;
  884. }
  885. retval = fwu->fn_ptr->read(fwu->rmi4_data,
  886. fwu->f34_fd.data_base_addr + BLOCK_DATA_OFFSET,
  887. &fwu->read_config_buf[index],
  888. fwu->block_size);
  889. if (retval < 0) {
  890. dev_err(&fwu->rmi4_data->i2c_client->dev,
  891. "%s: Failed to read block data (block %d)\n",
  892. __func__, block_num);
  893. goto exit;
  894. }
  895. index += fwu->block_size;
  896. }
  897. exit:
  898. fwu->rmi4_data->reset_device(fwu->rmi4_data);
  899. return retval;
  900. }
  901. int synaptics_fw_updater(unsigned char *fw_data)
  902. {
  903. int retval;
  904. if (!fwu)
  905. return -ENODEV;
  906. if (!fwu->initialized)
  907. return -ENODEV;
  908. if (!fw_data) {
  909. dev_err(&fwu->rmi4_data->i2c_client->dev,
  910. "%s: Firmware data is NULL\n", __func__);
  911. return -ENODEV;
  912. }
  913. fwu->ext_data_source = fw_data;
  914. fwu->config_area = UI_CONFIG_AREA;
  915. retval = fwu_start_reflash();
  916. return retval;
  917. }
  918. EXPORT_SYMBOL(synaptics_fw_updater);
  919. static ssize_t fwu_sysfs_show_image(struct file *data_file,
  920. struct kobject *kobj, struct bin_attribute *attributes,
  921. char *buf, loff_t pos, size_t count)
  922. {
  923. struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
  924. if (count < fwu->config_size) {
  925. dev_err(&rmi4_data->i2c_client->dev,
  926. "%s: Not enough space (%d bytes) in buffer\n",
  927. __func__, count);
  928. return -EINVAL;
  929. }
  930. memcpy(buf, fwu->read_config_buf, fwu->config_size);
  931. return fwu->config_size;
  932. }
  933. static ssize_t fwu_sysfs_store_image(struct file *data_file,
  934. struct kobject *kobj, struct bin_attribute *attributes,
  935. char *buf, loff_t pos, size_t count)
  936. {
  937. memcpy((void *)(&fwu->ext_data_source[fwu->data_pos]),
  938. (const void *)buf,
  939. count);
  940. fwu->data_pos += count;
  941. return count;
  942. }
  943. static ssize_t fwu_sysfs_do_reflash_store(struct device *dev,
  944. struct device_attribute *attr, const char *buf, size_t count)
  945. {
  946. int retval;
  947. unsigned int input;
  948. struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
  949. if (sscanf(buf, "%u", &input) != 1) {
  950. retval = -EINVAL;
  951. goto exit;
  952. }
  953. if (input != 1) {
  954. retval = -EINVAL;
  955. goto exit;
  956. }
  957. retval = synaptics_fw_updater(fwu->ext_data_source);
  958. if (retval < 0) {
  959. dev_err(&rmi4_data->i2c_client->dev,
  960. "%s: Failed to do reflash\n",
  961. __func__);
  962. goto exit;
  963. }
  964. retval = count;
  965. exit:
  966. kfree(fwu->ext_data_source);
  967. fwu->ext_data_source = NULL;
  968. return retval;
  969. }
  970. static ssize_t fwu_sysfs_write_config_store(struct device *dev,
  971. struct device_attribute *attr, const char *buf, size_t count)
  972. {
  973. int retval;
  974. unsigned int input;
  975. struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
  976. if (sscanf(buf, "%u", &input) != 1) {
  977. retval = -EINVAL;
  978. goto exit;
  979. }
  980. if (input != 1) {
  981. retval = -EINVAL;
  982. goto exit;
  983. }
  984. retval = fwu_start_write_config();
  985. if (retval < 0) {
  986. dev_err(&rmi4_data->i2c_client->dev,
  987. "%s: Failed to write config\n",
  988. __func__);
  989. goto exit;
  990. }
  991. retval = count;
  992. exit:
  993. kfree(fwu->ext_data_source);
  994. fwu->ext_data_source = NULL;
  995. return retval;
  996. }
  997. static ssize_t fwu_sysfs_read_config_store(struct device *dev,
  998. struct device_attribute *attr, const char *buf, size_t count)
  999. {
  1000. int retval;
  1001. unsigned int input;
  1002. struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
  1003. if (sscanf(buf, "%u", &input) != 1)
  1004. return -EINVAL;
  1005. if (input != 1)
  1006. return -EINVAL;
  1007. retval = fwu_do_read_config();
  1008. if (retval < 0) {
  1009. dev_err(&rmi4_data->i2c_client->dev,
  1010. "%s: Failed to read config\n",
  1011. __func__);
  1012. return retval;
  1013. }
  1014. return count;
  1015. }
  1016. static ssize_t fwu_sysfs_config_area_store(struct device *dev,
  1017. struct device_attribute *attr, const char *buf, size_t count)
  1018. {
  1019. int retval;
  1020. unsigned long config_area;
  1021. retval = kstrtoul(buf, 10, &config_area);
  1022. if (retval)
  1023. return retval;
  1024. fwu->config_area = config_area;
  1025. return count;
  1026. }
  1027. static ssize_t fwu_sysfs_image_size_store(struct device *dev,
  1028. struct device_attribute *attr, const char *buf, size_t count)
  1029. {
  1030. int retval;
  1031. unsigned long size;
  1032. struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
  1033. retval = kstrtoul(buf, 10, &size);
  1034. if (retval)
  1035. return retval;
  1036. fwu->image_size = size;
  1037. fwu->data_pos = 0;
  1038. kfree(fwu->ext_data_source);
  1039. fwu->ext_data_source = kzalloc(fwu->image_size, GFP_KERNEL);
  1040. if (!fwu->ext_data_source) {
  1041. dev_err(&rmi4_data->i2c_client->dev,
  1042. "%s: Failed to alloc mem for image data\n",
  1043. __func__);
  1044. return -ENOMEM;
  1045. }
  1046. return count;
  1047. }
  1048. static ssize_t fwu_sysfs_block_size_show(struct device *dev,
  1049. struct device_attribute *attr, char *buf)
  1050. {
  1051. return snprintf(buf, PAGE_SIZE, "%u\n", fwu->block_size);
  1052. }
  1053. static ssize_t fwu_sysfs_firmware_block_count_show(struct device *dev,
  1054. struct device_attribute *attr, char *buf)
  1055. {
  1056. return snprintf(buf, PAGE_SIZE, "%u\n", fwu->fw_block_count);
  1057. }
  1058. static ssize_t fwu_sysfs_configuration_block_count_show(struct device *dev,
  1059. struct device_attribute *attr, char *buf)
  1060. {
  1061. return snprintf(buf, PAGE_SIZE, "%u\n", fwu->config_block_count);
  1062. }
  1063. static ssize_t fwu_sysfs_perm_config_block_count_show(struct device *dev,
  1064. struct device_attribute *attr, char *buf)
  1065. {
  1066. return snprintf(buf, PAGE_SIZE, "%u\n", fwu->perm_config_block_count);
  1067. }
  1068. static ssize_t fwu_sysfs_bl_config_block_count_show(struct device *dev,
  1069. struct device_attribute *attr, char *buf)
  1070. {
  1071. return snprintf(buf, PAGE_SIZE, "%u\n", fwu->bl_config_block_count);
  1072. }
  1073. static ssize_t fwu_sysfs_disp_config_block_count_show(struct device *dev,
  1074. struct device_attribute *attr, char *buf)
  1075. {
  1076. return snprintf(buf, PAGE_SIZE, "%u\n", fwu->disp_config_block_count);
  1077. }
  1078. static void synaptics_rmi4_fwu_attn(struct synaptics_rmi4_data *rmi4_data,
  1079. unsigned char intr_mask)
  1080. {
  1081. if (fwu->intr_mask & intr_mask)
  1082. fwu_read_f34_flash_status();
  1083. return;
  1084. }
  1085. static int synaptics_rmi4_fwu_init(struct synaptics_rmi4_data *rmi4_data)
  1086. {
  1087. int retval;
  1088. unsigned char attr_count;
  1089. int attr_count_num;
  1090. struct pdt_properties pdt_props;
  1091. fwu = kzalloc(sizeof(*fwu), GFP_KERNEL);
  1092. if (!fwu) {
  1093. dev_err(&rmi4_data->i2c_client->dev,
  1094. "%s: Failed to alloc mem for fwu\n",
  1095. __func__);
  1096. goto exit;
  1097. }
  1098. fwu->fn_ptr = kzalloc(sizeof(*(fwu->fn_ptr)), GFP_KERNEL);
  1099. if (!fwu->fn_ptr) {
  1100. dev_err(&rmi4_data->i2c_client->dev,
  1101. "%s: Failed to alloc mem for fn_ptr\n",
  1102. __func__);
  1103. retval = -ENOMEM;
  1104. goto exit_free_fwu;
  1105. }
  1106. fwu->rmi4_data = rmi4_data;
  1107. fwu->fn_ptr->read = rmi4_data->i2c_read;
  1108. fwu->fn_ptr->write = rmi4_data->i2c_write;
  1109. fwu->fn_ptr->enable = rmi4_data->irq_enable;
  1110. retval = fwu->fn_ptr->read(rmi4_data,
  1111. PDT_PROPS,
  1112. pdt_props.data,
  1113. sizeof(pdt_props.data));
  1114. if (retval < 0) {
  1115. dev_info(&rmi4_data->i2c_client->dev,
  1116. "%s: Failed to read PDT properties, assuming 0x00\n",
  1117. __func__);
  1118. } else if (pdt_props.has_bsr) {
  1119. dev_err(&rmi4_data->i2c_client->dev,
  1120. "%s: Reflash for LTS not currently supported\n",
  1121. __func__);
  1122. goto exit_free_mem;
  1123. }
  1124. retval = fwu_scan_pdt();
  1125. if (retval < 0)
  1126. goto exit_free_mem;
  1127. fwu->productinfo1 = rmi4_data->rmi4_mod_info.product_info[0];
  1128. fwu->productinfo2 = rmi4_data->rmi4_mod_info.product_info[1];
  1129. memcpy(fwu->product_id, rmi4_data->rmi4_mod_info.product_id_string,
  1130. SYNAPTICS_RMI4_PRODUCT_ID_SIZE);
  1131. fwu->product_id[SYNAPTICS_RMI4_PRODUCT_ID_SIZE] = 0;
  1132. #if defined(CONFIG_MACH_JACTIVESKT)
  1133. /* Fortius Use only B Type. So read and use ic_revision_of_ic from IC */
  1134. #else
  1135. /* Check the IC revision from product ID value
  1136. * we can check the ic revision with f34_ctrl_3 but to read production
  1137. * ID is more safity. because it is non-user writerble area.
  1138. */
  1139. if (rmi4_data->ic_revision_of_ic < 0xB0) {
  1140. if ((strncmp(fwu->product_id,
  1141. SYNAPTICS_PRODUCT_ID_B0, 5) == 0)
  1142. || (strncmp(fwu->product_id,
  1143. SYNAPTICS_PRODUCT_ID_B0_SPAIR, 6) == 0)) {
  1144. rmi4_data->ic_revision_of_ic = 0xB0;
  1145. } else
  1146. rmi4_data->ic_revision_of_ic = 0xA1;
  1147. }
  1148. #endif
  1149. dev_info(&rmi4_data->i2c_client->dev, "%s: [IC] [F01 product info, ID(revision)] [0x%04X 0x%04X, %s(0X%X)]\n",
  1150. __func__, fwu->productinfo1,
  1151. fwu->productinfo2, fwu->product_id,
  1152. rmi4_data->ic_revision_of_ic);
  1153. retval = fwu_read_f34_queries();
  1154. if (retval < 0)
  1155. goto exit_free_mem;
  1156. fwu->initialized = true;
  1157. retval = sysfs_create_bin_file(&rmi4_data->input_dev->dev.kobj,
  1158. &dev_attr_data);
  1159. if (retval < 0) {
  1160. dev_err(&rmi4_data->i2c_client->dev,
  1161. "%s: Failed to create sysfs bin file\n",
  1162. __func__);
  1163. goto exit_free_mem;
  1164. }
  1165. for (attr_count = 0; attr_count < ARRAY_SIZE(attrs); attr_count++) {
  1166. retval = sysfs_create_file(&rmi4_data->input_dev->dev.kobj,
  1167. &attrs[attr_count].attr);
  1168. if (retval < 0) {
  1169. dev_err(&rmi4_data->i2c_client->dev,
  1170. "%s: Failed to create sysfs attributes\n",
  1171. __func__);
  1172. retval = -ENODEV;
  1173. goto exit_remove_attrs;
  1174. }
  1175. }
  1176. return 0;
  1177. exit_remove_attrs:
  1178. attr_count_num = (int)attr_count;
  1179. for (attr_count_num--; attr_count_num >= 0; attr_count_num--) {
  1180. sysfs_remove_file(&rmi4_data->input_dev->dev.kobj,
  1181. &attrs[attr_count].attr);
  1182. }
  1183. sysfs_remove_bin_file(&rmi4_data->input_dev->dev.kobj, &dev_attr_data);
  1184. exit_free_mem:
  1185. kfree(fwu->fn_ptr);
  1186. exit_free_fwu:
  1187. kfree(fwu);
  1188. exit:
  1189. return 0;
  1190. }
  1191. static void synaptics_rmi4_fwu_remove(struct synaptics_rmi4_data *rmi4_data)
  1192. {
  1193. unsigned char attr_count;
  1194. sysfs_remove_bin_file(&rmi4_data->input_dev->dev.kobj, &dev_attr_data);
  1195. for (attr_count = 0; attr_count < ARRAY_SIZE(attrs); attr_count++) {
  1196. sysfs_remove_file(&rmi4_data->input_dev->dev.kobj,
  1197. &attrs[attr_count].attr);
  1198. }
  1199. kfree(fwu->fn_ptr);
  1200. kfree(fwu);
  1201. return;
  1202. }
  1203. int rmi4_fw_update_module_register(void)
  1204. {
  1205. int retval;
  1206. retval = synaptics_rmi4_new_function(RMI_FW_UPDATER,
  1207. synaptics_rmi4_fwu_init,
  1208. synaptics_rmi4_fwu_remove,
  1209. synaptics_rmi4_fwu_attn);
  1210. return retval;
  1211. }