issp_directives.h 6.1 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195
  1. /* filename: ISSP_Directives.h */
  2. #include "issp_revision.h"
  3. #ifdef PROJECT_REV_304
  4. /*
  5. * Copyright 2006-2007, Cypress Semiconductor Corporation.
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License
  8. * as published by the Free Software Foundation; either version 2
  9. * of the License, or (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
  19. * MA 02110-1301, USA.
  20. */
  21. /*--------------------- Compiler Directives ----------------------------------
  22. */
  23. #ifndef INC_ISSP_DIRECTIVES
  24. #define INC_ISSP_DIRECTIVES
  25. /*
  26. This directive will enable a Genral Purpose test-point on P1.7
  27. It can be toggled as needed to measure timing, execution, etc...
  28. A "Test Point" sets a GPIO pin of the host processor high or low. This GPIO
  29. pin can be observed with an oscilloscope to verify the timing of key
  30. programming steps. TPs have been added in main() that set Port 0, pin 1
  31. high during bulk erase, during each block write and during security write.
  32. The timing of these programming steps should be verified as correct as part
  33. of the validation process of the final program.
  34. ****************************************************************************
  35. ************* USER ATTENTION REQUIRED: TARGET SUPPLY VOLTAGE ***************
  36. ****************************************************************************
  37. This directive causes the proper Initialization vector #3 to be sent
  38. to the Target, based on what the Target Vdd programming voltage will
  39. be. Either 5V (if #define enabled) or 3.3V (if #define disabled).
  40. */
  41. /*
  42. #define TARGET_VOLTAGE_IS_5V
  43. */
  44. /*
  45. ****************************************************************************
  46. **************** USER ATTENTION REQUIRED: PROGRAMMING MODE *****************
  47. ****************************************************************************
  48. This directive selects whether code that uses reset programming mode or code
  49. that uses power cycle programming is use. Reset programming mode uses the
  50. external reset pin (XRES) to enter programming mode. Power cycle programming
  51. mode uses the power-on reset to enter programming mode.
  52. Applying signals to various pins on the target device must be done in a
  53. deliberate order when using power cycle mode. Otherwise, high signals to GPIO
  54. pins on the target will power the PSoC through the protection diodes.
  55. */
  56. #define CY8C20236
  57. /*
  58. #define RESET_MODE
  59. */
  60. /*
  61. #define TX_ON
  62. #define CY8C20236
  63. */
  64. /*
  65. #define LCD_ON
  66. */
  67. /*****************************************************************************
  68. ****************** USER ATTENTION REQUIRED: TARGET PSOC ********************
  69. ****************************************************************************
  70. The directives below enable support for various PSoC devices. The root part
  71. number to be programmed should be un-commented so that its value becomes
  72. defined. All other devices should be commented out.
  73. Select one device to be supported below:
  74. **** CY821x34 devices ****
  75. */
  76. /*
  77. #define CY8C21234
  78. #define CY8C21334
  79. #define CY8C21434
  80. #define CY8C21534
  81. */
  82. #define CY8C20x66
  83. /* Quark */
  84. /*-----------------------------------------------------------------------------
  85. The directives below are used for Krypton.
  86. See the Krypton programming spec 001-15870 rev *A for more details. (The
  87. spec uses "mnemonics" instead of "directives"
  88. -----------------------------------------------------------------------------*/
  89. #ifdef CY8C20x66
  90. #define TSYNC
  91. #define ID_SETUP_1/*PTJ: ID_SETUP_1 is similar to init1_v*/
  92. #define ID_SETUP_2/*PTJ: ID_SETUP_2 is similar to init2_v*/
  93. #define SET_BLOCK_NUM
  94. #define CHECKSUM_SETUP/*PTJ: CHECKSUM_SETUP_20x66 is
  95. the same as CHECKSUM-SETUP in 001-15870*/
  96. #define READ_CHECKSUM
  97. #define PROGRAM_AND_VERIFY/*PTJ: PROGRAM_BLOCK_20x66 is the
  98. same as PROGRAM-AND-VERIFY in 001-15870*/
  99. #define ERASE
  100. #define SECURE
  101. #define READ_SECURITY
  102. #define READ_WRITE_SETUP
  103. #define WRITE_BYTE
  104. #define VERIFY_SETUP
  105. #define READ_STATUS
  106. #define READ_BYTE
  107. /*READ_ID_WORD PTJ: 3rd Party Progrmmer will have to write
  108. code to handle this directive, we do it out own way in this
  109. code, see read_id_v*/
  110. #endif
  111. /*-----------------------------------------------------------------------------
  112. //-----------------------------------------------------------------------------
  113. // The directives below are used to define various sets of vectors that differ
  114. // for more than one set of PSoC parts.
  115. //-----------------------------------------------------------------------------
  116. // **** Select a Checksum Setup Vector ****/
  117. #ifdef CY8C21x23
  118. #define CHECKSUM_SETUP_21_27
  119. #endif
  120. #ifdef CY8C21x34
  121. #define CHECKSUM_SETUP_21_27
  122. #endif
  123. #ifdef CY8C24x23A
  124. #define CHECKSUM_SETUP_24_24A
  125. #endif
  126. #ifdef CY8C24x94
  127. #define CHECKSUM_SETUP_24_29
  128. #endif
  129. #ifdef CY8C27x43
  130. #define CHECKSUM_SETUP_21_27
  131. #endif
  132. #ifdef CY8C29x66
  133. #define CHECKSUM_SETUP_24_29
  134. #endif
  135. /*** Select a Program Block Vector ****/
  136. #ifdef CY8C21x23
  137. #define PROGRAM_BLOCK_21_24_29
  138. #endif
  139. #ifdef CY8C21x34
  140. #define PROGRAM_BLOCK_21_24_29
  141. #endif
  142. #ifdef CY8C24x23A
  143. #define PROGRAM_BLOCK_21_24_29
  144. #endif
  145. #ifdef CY8C24x94
  146. #define PROGRAM_BLOCK_21_24_29
  147. #endif
  148. #ifdef CY8C27x43
  149. #define PROGRAM_BLOCK_27
  150. #endif
  151. #ifdef CY8C29x66
  152. #define PROGRAM_BLOCK_21_24_29
  153. #endif
  154. /*-----------------------------------------------------------------------------
  155. // The directives below are used to control switching banks if the device is
  156. // has multiple banks of Flash.
  157. //-----------------------------------------------------------------------------
  158. // **** Select a Checksum Setup Vector ****/
  159. #ifdef CY8C24x94
  160. #define MULTI_BANK
  161. #endif
  162. #ifdef CY8C29x66
  163. #define MULTI_BANK
  164. #endif
  165. #endif /*(INC_ISSP_DIRECTIVES)*/
  166. #endif /*(PROJECT_REV_) */
  167. /* end of file ISSP_Directives.h */