msm_isp.h 16 KB

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  1. #ifndef __MSM_ISP_H__
  2. #define __MSM_ISP_H__
  3. #define BIT(nr) (1UL << (nr))
  4. /* ISP message IDs */
  5. #define MSG_ID_RESET_ACK 0
  6. #define MSG_ID_START_ACK 1
  7. #define MSG_ID_STOP_ACK 2
  8. #define MSG_ID_UPDATE_ACK 3
  9. #define MSG_ID_OUTPUT_P 4
  10. #define MSG_ID_OUTPUT_T 5
  11. #define MSG_ID_OUTPUT_S 6
  12. #define MSG_ID_OUTPUT_V 7
  13. #define MSG_ID_SNAPSHOT_DONE 8
  14. #define MSG_ID_STATS_AEC 9
  15. #define MSG_ID_STATS_AF 10
  16. #define MSG_ID_STATS_AWB 11
  17. #define MSG_ID_STATS_RS 12
  18. #define MSG_ID_STATS_CS 13
  19. #define MSG_ID_STATS_IHIST 14
  20. #define MSG_ID_STATS_SKIN 15
  21. #define MSG_ID_EPOCH1 16
  22. #define MSG_ID_EPOCH2 17
  23. #define MSG_ID_SYNC_TIMER0_DONE 18
  24. #define MSG_ID_SYNC_TIMER1_DONE 19
  25. #define MSG_ID_SYNC_TIMER2_DONE 20
  26. #define MSG_ID_ASYNC_TIMER0_DONE 21
  27. #define MSG_ID_ASYNC_TIMER1_DONE 22
  28. #define MSG_ID_ASYNC_TIMER2_DONE 23
  29. #define MSG_ID_ASYNC_TIMER3_DONE 24
  30. #define MSG_ID_AE_OVERFLOW 25
  31. #define MSG_ID_AF_OVERFLOW 26
  32. #define MSG_ID_AWB_OVERFLOW 27
  33. #define MSG_ID_RS_OVERFLOW 28
  34. #define MSG_ID_CS_OVERFLOW 29
  35. #define MSG_ID_IHIST_OVERFLOW 30
  36. #define MSG_ID_SKIN_OVERFLOW 31
  37. #define MSG_ID_AXI_ERROR 32
  38. #define MSG_ID_CAMIF_OVERFLOW 33
  39. #define MSG_ID_VIOLATION 34
  40. #define MSG_ID_CAMIF_ERROR 35
  41. #define MSG_ID_BUS_OVERFLOW 36
  42. #define MSG_ID_SOF_ACK 37
  43. #define MSG_ID_STOP_REC_ACK 38
  44. #define MSG_ID_STATS_AWB_AEC 39
  45. #define MSG_ID_OUTPUT_PRIMARY 40
  46. #define MSG_ID_OUTPUT_SECONDARY 41
  47. #define MSG_ID_STATS_COMPOSITE 42
  48. #define MSG_ID_OUTPUT_TERTIARY1 43
  49. #define MSG_ID_STOP_LS_ACK 44
  50. #define MSG_ID_OUTPUT_TERTIARY2 45
  51. #define MSG_ID_STATS_BG 46
  52. #define MSG_ID_STATS_BF 47
  53. #define MSG_ID_STATS_BHIST 48
  54. #define MSG_ID_RDI0_UPDATE_ACK 49
  55. #define MSG_ID_RDI1_UPDATE_ACK 50
  56. #define MSG_ID_RDI2_UPDATE_ACK 51
  57. #define MSG_ID_PIX0_UPDATE_ACK 52
  58. #define MSG_ID_PREV_STOP_ACK 53
  59. #define MSG_ID_STATS_BE 54
  60. /* ISP command IDs */
  61. #define VFE_CMD_DUMMY_0 0
  62. #define VFE_CMD_SET_CLK 1
  63. #define VFE_CMD_RESET 2
  64. #define VFE_CMD_START 3
  65. #define VFE_CMD_TEST_GEN_START 4
  66. #define VFE_CMD_OPERATION_CFG 5
  67. #define VFE_CMD_AXI_OUT_CFG 6
  68. #define VFE_CMD_CAMIF_CFG 7
  69. #define VFE_CMD_AXI_INPUT_CFG 8
  70. #define VFE_CMD_BLACK_LEVEL_CFG 9
  71. #define VFE_CMD_MESH_ROLL_OFF_CFG 10
  72. #define VFE_CMD_DEMUX_CFG 11
  73. #define VFE_CMD_FOV_CFG 12
  74. #define VFE_CMD_MAIN_SCALER_CFG 13
  75. #define VFE_CMD_WB_CFG 14
  76. #define VFE_CMD_COLOR_COR_CFG 15
  77. #define VFE_CMD_RGB_G_CFG 16
  78. #define VFE_CMD_LA_CFG 17
  79. #define VFE_CMD_CHROMA_EN_CFG 18
  80. #define VFE_CMD_CHROMA_SUP_CFG 19
  81. #define VFE_CMD_MCE_CFG 20
  82. #define VFE_CMD_SK_ENHAN_CFG 21
  83. #define VFE_CMD_ASF_CFG 22
  84. #define VFE_CMD_S2Y_CFG 23
  85. #define VFE_CMD_S2CbCr_CFG 24
  86. #define VFE_CMD_CHROMA_SUBS_CFG 25
  87. #define VFE_CMD_OUT_CLAMP_CFG 26
  88. #define VFE_CMD_FRAME_SKIP_CFG 27
  89. #define VFE_CMD_DUMMY_1 28
  90. #define VFE_CMD_DUMMY_2 29
  91. #define VFE_CMD_DUMMY_3 30
  92. #define VFE_CMD_UPDATE 31
  93. #define VFE_CMD_BL_LVL_UPDATE 32
  94. #define VFE_CMD_DEMUX_UPDATE 33
  95. #define VFE_CMD_FOV_UPDATE 34
  96. #define VFE_CMD_MAIN_SCALER_UPDATE 35
  97. #define VFE_CMD_WB_UPDATE 36
  98. #define VFE_CMD_COLOR_COR_UPDATE 37
  99. #define VFE_CMD_RGB_G_UPDATE 38
  100. #define VFE_CMD_LA_UPDATE 39
  101. #define VFE_CMD_CHROMA_EN_UPDATE 40
  102. #define VFE_CMD_CHROMA_SUP_UPDATE 41
  103. #define VFE_CMD_MCE_UPDATE 42
  104. #define VFE_CMD_SK_ENHAN_UPDATE 43
  105. #define VFE_CMD_S2CbCr_UPDATE 44
  106. #define VFE_CMD_S2Y_UPDATE 45
  107. #define VFE_CMD_ASF_UPDATE 46
  108. #define VFE_CMD_FRAME_SKIP_UPDATE 47
  109. #define VFE_CMD_CAMIF_FRAME_UPDATE 48
  110. #define VFE_CMD_STATS_AF_UPDATE 49
  111. #define VFE_CMD_STATS_AE_UPDATE 50
  112. #define VFE_CMD_STATS_AWB_UPDATE 51
  113. #define VFE_CMD_STATS_RS_UPDATE 52
  114. #define VFE_CMD_STATS_CS_UPDATE 53
  115. #define VFE_CMD_STATS_SKIN_UPDATE 54
  116. #define VFE_CMD_STATS_IHIST_UPDATE 55
  117. #define VFE_CMD_DUMMY_4 56
  118. #define VFE_CMD_EPOCH1_ACK 57
  119. #define VFE_CMD_EPOCH2_ACK 58
  120. #define VFE_CMD_START_RECORDING 59
  121. #define VFE_CMD_STOP_RECORDING 60
  122. #define VFE_CMD_DUMMY_5 61
  123. #define VFE_CMD_DUMMY_6 62
  124. #define VFE_CMD_CAPTURE 63
  125. #define VFE_CMD_DUMMY_7 64
  126. #define VFE_CMD_STOP 65
  127. #define VFE_CMD_GET_HW_VERSION 66
  128. #define VFE_CMD_GET_FRAME_SKIP_COUNTS 67
  129. #define VFE_CMD_OUTPUT1_BUFFER_ENQ 68
  130. #define VFE_CMD_OUTPUT2_BUFFER_ENQ 69
  131. #define VFE_CMD_OUTPUT3_BUFFER_ENQ 70
  132. #define VFE_CMD_JPEG_OUT_BUF_ENQ 71
  133. #define VFE_CMD_RAW_OUT_BUF_ENQ 72
  134. #define VFE_CMD_RAW_IN_BUF_ENQ 73
  135. #define VFE_CMD_STATS_AF_ENQ 74
  136. #define VFE_CMD_STATS_AE_ENQ 75
  137. #define VFE_CMD_STATS_AWB_ENQ 76
  138. #define VFE_CMD_STATS_RS_ENQ 77
  139. #define VFE_CMD_STATS_CS_ENQ 78
  140. #define VFE_CMD_STATS_SKIN_ENQ 79
  141. #define VFE_CMD_STATS_IHIST_ENQ 80
  142. #define VFE_CMD_DUMMY_8 81
  143. #define VFE_CMD_JPEG_ENC_CFG 82
  144. #define VFE_CMD_DUMMY_9 83
  145. #define VFE_CMD_STATS_AF_START 84
  146. #define VFE_CMD_STATS_AF_STOP 85
  147. #define VFE_CMD_STATS_AE_START 86
  148. #define VFE_CMD_STATS_AE_STOP 87
  149. #define VFE_CMD_STATS_AWB_START 88
  150. #define VFE_CMD_STATS_AWB_STOP 89
  151. #define VFE_CMD_STATS_RS_START 90
  152. #define VFE_CMD_STATS_RS_STOP 91
  153. #define VFE_CMD_STATS_CS_START 92
  154. #define VFE_CMD_STATS_CS_STOP 93
  155. #define VFE_CMD_STATS_SKIN_START 94
  156. #define VFE_CMD_STATS_SKIN_STOP 95
  157. #define VFE_CMD_STATS_IHIST_START 96
  158. #define VFE_CMD_STATS_IHIST_STOP 97
  159. #define VFE_CMD_DUMMY_10 98
  160. #define VFE_CMD_SYNC_TIMER_SETTING 99
  161. #define VFE_CMD_ASYNC_TIMER_SETTING 100
  162. #define VFE_CMD_LIVESHOT 101
  163. #define VFE_CMD_LA_SETUP 102
  164. #define VFE_CMD_LINEARIZATION_CFG 103
  165. #define VFE_CMD_DEMOSAICV3 104
  166. #define VFE_CMD_DEMOSAICV3_ABCC_CFG 105
  167. #define VFE_CMD_DEMOSAICV3_DBCC_CFG 106
  168. #define VFE_CMD_DEMOSAICV3_DBPC_CFG 107
  169. #define VFE_CMD_DEMOSAICV3_ABF_CFG 108
  170. #define VFE_CMD_DEMOSAICV3_ABCC_UPDATE 109
  171. #define VFE_CMD_DEMOSAICV3_DBCC_UPDATE 110
  172. #define VFE_CMD_DEMOSAICV3_DBPC_UPDATE 111
  173. #define VFE_CMD_XBAR_CFG 112
  174. #define VFE_CMD_MODULE_CFG 113
  175. #define VFE_CMD_ZSL 114
  176. #define VFE_CMD_LINEARIZATION_UPDATE 115
  177. #define VFE_CMD_DEMOSAICV3_ABF_UPDATE 116
  178. #define VFE_CMD_CLF_CFG 117
  179. #define VFE_CMD_CLF_LUMA_UPDATE 118
  180. #define VFE_CMD_CLF_CHROMA_UPDATE 119
  181. #define VFE_CMD_PCA_ROLL_OFF_CFG 120
  182. #define VFE_CMD_PCA_ROLL_OFF_UPDATE 121
  183. #define VFE_CMD_GET_REG_DUMP 122
  184. #define VFE_CMD_GET_LINEARIZATON_TABLE 123
  185. #define VFE_CMD_GET_MESH_ROLLOFF_TABLE 124
  186. #define VFE_CMD_GET_PCA_ROLLOFF_TABLE 125
  187. #define VFE_CMD_GET_RGB_G_TABLE 126
  188. #define VFE_CMD_GET_LA_TABLE 127
  189. #define VFE_CMD_DEMOSAICV3_UPDATE 128
  190. #define VFE_CMD_ACTIVE_REGION_CFG 129
  191. #define VFE_CMD_COLOR_PROCESSING_CONFIG 130
  192. #define VFE_CMD_STATS_WB_AEC_CONFIG 131
  193. #define VFE_CMD_STATS_WB_AEC_UPDATE 132
  194. #define VFE_CMD_Y_GAMMA_CONFIG 133
  195. #define VFE_CMD_SCALE_OUTPUT1_CONFIG 134
  196. #define VFE_CMD_SCALE_OUTPUT2_CONFIG 135
  197. #define VFE_CMD_CAPTURE_RAW 136
  198. #define VFE_CMD_STOP_LIVESHOT 137
  199. #define VFE_CMD_RECONFIG_VFE 138
  200. #define VFE_CMD_STATS_REQBUF 139
  201. #define VFE_CMD_STATS_ENQUEUEBUF 140
  202. #define VFE_CMD_STATS_FLUSH_BUFQ 141
  203. #define VFE_CMD_STATS_UNREGBUF 142
  204. #define VFE_CMD_STATS_BG_START 143
  205. #define VFE_CMD_STATS_BG_STOP 144
  206. #define VFE_CMD_STATS_BF_START 145
  207. #define VFE_CMD_STATS_BF_STOP 146
  208. #define VFE_CMD_STATS_BHIST_START 147
  209. #define VFE_CMD_STATS_BHIST_STOP 148
  210. #define VFE_CMD_RESET_2 149
  211. #define VFE_CMD_FOV_ENC_CFG 150
  212. #define VFE_CMD_FOV_VIEW_CFG 151
  213. #define VFE_CMD_FOV_ENC_UPDATE 152
  214. #define VFE_CMD_FOV_VIEW_UPDATE 153
  215. #define VFE_CMD_SCALER_ENC_CFG 154
  216. #define VFE_CMD_SCALER_VIEW_CFG 155
  217. #define VFE_CMD_SCALER_ENC_UPDATE 156
  218. #define VFE_CMD_SCALER_VIEW_UPDATE 157
  219. #define VFE_CMD_COLORXFORM_ENC_CFG 158
  220. #define VFE_CMD_COLORXFORM_VIEW_CFG 159
  221. #define VFE_CMD_COLORXFORM_ENC_UPDATE 160
  222. #define VFE_CMD_COLORXFORM_VIEW_UPDATE 161
  223. #define VFE_CMD_TEST_GEN_CFG 162
  224. #define VFE_CMD_STATS_BE_START 163
  225. #define VFE_CMD_STATS_BE_STOP 164
  226. struct msm_isp_cmd {
  227. int32_t id;
  228. uint16_t length;
  229. void *value;
  230. };
  231. #define VPE_CMD_DUMMY_0 0
  232. #define VPE_CMD_INIT 1
  233. #define VPE_CMD_DEINIT 2
  234. #define VPE_CMD_ENABLE 3
  235. #define VPE_CMD_DISABLE 4
  236. #define VPE_CMD_RESET 5
  237. #define VPE_CMD_FLUSH 6
  238. #define VPE_CMD_OPERATION_MODE_CFG 7
  239. #define VPE_CMD_INPUT_PLANE_CFG 8
  240. #define VPE_CMD_OUTPUT_PLANE_CFG 9
  241. #define VPE_CMD_INPUT_PLANE_UPDATE 10
  242. #define VPE_CMD_SCALE_CFG_TYPE 11
  243. #define VPE_CMD_ZOOM 13
  244. #define VPE_CMD_MAX 14
  245. #define MSM_PP_CMD_TYPE_NOT_USED 0 /* not used */
  246. #define MSM_PP_CMD_TYPE_VPE 1 /* VPE cmd */
  247. #define MSM_PP_CMD_TYPE_MCTL 2 /* MCTL cmd */
  248. #define MCTL_CMD_DUMMY_0 0 /* not used */
  249. #define MCTL_CMD_GET_FRAME_BUFFER 1 /* reserve a free frame buffer */
  250. #define MCTL_CMD_PUT_FRAME_BUFFER 2 /* return the free frame buffer */
  251. #define MCTL_CMD_DIVERT_FRAME_PP_PATH 3 /* divert frame for pp */
  252. /* event typese sending to MCTL PP module */
  253. #define MCTL_PP_EVENT_NOTUSED 0
  254. #define MCTL_PP_EVENT_CMD_ACK 1
  255. #define VPE_OPERATION_MODE_CFG_LEN 4
  256. #define VPE_INPUT_PLANE_CFG_LEN 24
  257. #define VPE_OUTPUT_PLANE_CFG_LEN 20
  258. #define VPE_INPUT_PLANE_UPDATE_LEN 12
  259. #define VPE_SCALER_CONFIG_LEN 260
  260. #define VPE_DIS_OFFSET_CFG_LEN 12
  261. #define CAPTURE_WIDTH 1280
  262. #define IMEM_Y_SIZE (CAPTURE_WIDTH*16)
  263. #define IMEM_CBCR_SIZE (CAPTURE_WIDTH*8)
  264. #define IMEM_Y_PING_OFFSET 0x2E000000
  265. #define IMEM_CBCR_PING_OFFSET (IMEM_Y_PING_OFFSET + IMEM_Y_SIZE)
  266. #define IMEM_Y_PONG_OFFSET (IMEM_CBCR_PING_OFFSET + IMEM_CBCR_SIZE)
  267. #define IMEM_CBCR_PONG_OFFSET (IMEM_Y_PONG_OFFSET + IMEM_Y_SIZE)
  268. struct msm_vpe_op_mode_cfg {
  269. uint8_t op_mode_cfg[VPE_OPERATION_MODE_CFG_LEN];
  270. };
  271. struct msm_vpe_input_plane_cfg {
  272. uint8_t input_plane_cfg[VPE_INPUT_PLANE_CFG_LEN];
  273. };
  274. struct msm_vpe_output_plane_cfg {
  275. uint8_t output_plane_cfg[VPE_OUTPUT_PLANE_CFG_LEN];
  276. };
  277. struct msm_vpe_input_plane_update_cfg {
  278. uint8_t input_plane_update_cfg[VPE_INPUT_PLANE_UPDATE_LEN];
  279. };
  280. struct msm_vpe_scaler_cfg {
  281. uint8_t scaler_cfg[VPE_SCALER_CONFIG_LEN];
  282. };
  283. struct msm_vpe_flush_frame_buffer {
  284. uint32_t src_buf_handle;
  285. uint32_t dest_buf_handle;
  286. int path;
  287. };
  288. struct msm_mctl_pp_frame_buffer {
  289. uint32_t buf_handle;
  290. int path;
  291. };
  292. struct msm_mctl_pp_divert_pp {
  293. int path;
  294. int enable;
  295. };
  296. struct msm_vpe_clock_rate {
  297. uint32_t rate;
  298. };
  299. #define MSM_MCTL_PP_VPE_FRAME_ACK (1<<0)
  300. #define MSM_MCTL_PP_VPE_FRAME_TO_APP (1<<1)
  301. #define VFE_OUTPUTS_MAIN_AND_PREVIEW BIT(0)
  302. #define VFE_OUTPUTS_MAIN_AND_VIDEO BIT(1)
  303. #define VFE_OUTPUTS_MAIN_AND_THUMB BIT(2)
  304. #define VFE_OUTPUTS_THUMB_AND_MAIN BIT(3)
  305. #define VFE_OUTPUTS_PREVIEW_AND_VIDEO BIT(4)
  306. #define VFE_OUTPUTS_VIDEO_AND_PREVIEW BIT(5)
  307. #define VFE_OUTPUTS_PREVIEW BIT(6)
  308. #define VFE_OUTPUTS_VIDEO BIT(7)
  309. #define VFE_OUTPUTS_RAW BIT(8)
  310. #define VFE_OUTPUTS_JPEG_AND_THUMB BIT(9)
  311. #define VFE_OUTPUTS_THUMB_AND_JPEG BIT(10)
  312. #define VFE_OUTPUTS_RDI0 BIT(11)
  313. #define VFE_OUTPUTS_RDI1 BIT(12)
  314. struct msm_frame_info {
  315. uint32_t inst_handle;
  316. uint32_t path;
  317. };
  318. #endif /*__MSM_ISP_H__*/