vmwgfx_drm.h 22 KB

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  1. /**************************************************************************
  2. *
  3. * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
  4. * All Rights Reserved.
  5. *
  6. * Permission is hereby granted, free of charge, to any person obtaining a
  7. * copy of this software and associated documentation files (the
  8. * "Software"), to deal in the Software without restriction, including
  9. * without limitation the rights to use, copy, modify, merge, publish,
  10. * distribute, sub license, and/or sell copies of the Software, and to
  11. * permit persons to whom the Software is furnished to do so, subject to
  12. * the following conditions:
  13. *
  14. * The above copyright notice and this permission notice (including the
  15. * next paragraph) shall be included in all copies or substantial portions
  16. * of the Software.
  17. *
  18. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20. * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  21. * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  22. * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  23. * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  24. * USE OR OTHER DEALINGS IN THE SOFTWARE.
  25. *
  26. **************************************************************************/
  27. #ifndef __VMWGFX_DRM_H__
  28. #define __VMWGFX_DRM_H__
  29. #define DRM_VMW_MAX_SURFACE_FACES 6
  30. #define DRM_VMW_MAX_MIP_LEVELS 24
  31. #define DRM_VMW_GET_PARAM 0
  32. #define DRM_VMW_ALLOC_DMABUF 1
  33. #define DRM_VMW_UNREF_DMABUF 2
  34. #define DRM_VMW_CURSOR_BYPASS 3
  35. /* guarded by DRM_VMW_PARAM_NUM_STREAMS != 0*/
  36. #define DRM_VMW_CONTROL_STREAM 4
  37. #define DRM_VMW_CLAIM_STREAM 5
  38. #define DRM_VMW_UNREF_STREAM 6
  39. /* guarded by DRM_VMW_PARAM_3D == 1 */
  40. #define DRM_VMW_CREATE_CONTEXT 7
  41. #define DRM_VMW_UNREF_CONTEXT 8
  42. #define DRM_VMW_CREATE_SURFACE 9
  43. #define DRM_VMW_UNREF_SURFACE 10
  44. #define DRM_VMW_REF_SURFACE 11
  45. #define DRM_VMW_EXECBUF 12
  46. #define DRM_VMW_GET_3D_CAP 13
  47. #define DRM_VMW_FENCE_WAIT 14
  48. #define DRM_VMW_FENCE_SIGNALED 15
  49. #define DRM_VMW_FENCE_UNREF 16
  50. #define DRM_VMW_FENCE_EVENT 17
  51. #define DRM_VMW_PRESENT 18
  52. #define DRM_VMW_PRESENT_READBACK 19
  53. #define DRM_VMW_UPDATE_LAYOUT 20
  54. /*************************************************************************/
  55. /**
  56. * DRM_VMW_GET_PARAM - get device information.
  57. *
  58. * DRM_VMW_PARAM_FIFO_OFFSET:
  59. * Offset to use to map the first page of the FIFO read-only.
  60. * The fifo is mapped using the mmap() system call on the drm device.
  61. *
  62. * DRM_VMW_PARAM_OVERLAY_IOCTL:
  63. * Does the driver support the overlay ioctl.
  64. */
  65. #define DRM_VMW_PARAM_NUM_STREAMS 0
  66. #define DRM_VMW_PARAM_NUM_FREE_STREAMS 1
  67. #define DRM_VMW_PARAM_3D 2
  68. #define DRM_VMW_PARAM_HW_CAPS 3
  69. #define DRM_VMW_PARAM_FIFO_CAPS 4
  70. #define DRM_VMW_PARAM_MAX_FB_SIZE 5
  71. #define DRM_VMW_PARAM_FIFO_HW_VERSION 6
  72. /**
  73. * struct drm_vmw_getparam_arg
  74. *
  75. * @value: Returned value. //Out
  76. * @param: Parameter to query. //In.
  77. *
  78. * Argument to the DRM_VMW_GET_PARAM Ioctl.
  79. */
  80. struct drm_vmw_getparam_arg {
  81. uint64_t value;
  82. uint32_t param;
  83. uint32_t pad64;
  84. };
  85. /*************************************************************************/
  86. /**
  87. * DRM_VMW_CREATE_CONTEXT - Create a host context.
  88. *
  89. * Allocates a device unique context id, and queues a create context command
  90. * for the host. Does not wait for host completion.
  91. */
  92. /**
  93. * struct drm_vmw_context_arg
  94. *
  95. * @cid: Device unique context ID.
  96. *
  97. * Output argument to the DRM_VMW_CREATE_CONTEXT Ioctl.
  98. * Input argument to the DRM_VMW_UNREF_CONTEXT Ioctl.
  99. */
  100. struct drm_vmw_context_arg {
  101. int32_t cid;
  102. uint32_t pad64;
  103. };
  104. /*************************************************************************/
  105. /**
  106. * DRM_VMW_UNREF_CONTEXT - Create a host context.
  107. *
  108. * Frees a global context id, and queues a destroy host command for the host.
  109. * Does not wait for host completion. The context ID can be used directly
  110. * in the command stream and shows up as the same context ID on the host.
  111. */
  112. /*************************************************************************/
  113. /**
  114. * DRM_VMW_CREATE_SURFACE - Create a host suface.
  115. *
  116. * Allocates a device unique surface id, and queues a create surface command
  117. * for the host. Does not wait for host completion. The surface ID can be
  118. * used directly in the command stream and shows up as the same surface
  119. * ID on the host.
  120. */
  121. /**
  122. * struct drm_wmv_surface_create_req
  123. *
  124. * @flags: Surface flags as understood by the host.
  125. * @format: Surface format as understood by the host.
  126. * @mip_levels: Number of mip levels for each face.
  127. * An unused face should have 0 encoded.
  128. * @size_addr: Address of a user-space array of sruct drm_vmw_size
  129. * cast to an uint64_t for 32-64 bit compatibility.
  130. * The size of the array should equal the total number of mipmap levels.
  131. * @shareable: Boolean whether other clients (as identified by file descriptors)
  132. * may reference this surface.
  133. * @scanout: Boolean whether the surface is intended to be used as a
  134. * scanout.
  135. *
  136. * Input data to the DRM_VMW_CREATE_SURFACE Ioctl.
  137. * Output data from the DRM_VMW_REF_SURFACE Ioctl.
  138. */
  139. struct drm_vmw_surface_create_req {
  140. uint32_t flags;
  141. uint32_t format;
  142. uint32_t mip_levels[DRM_VMW_MAX_SURFACE_FACES];
  143. uint64_t size_addr;
  144. int32_t shareable;
  145. int32_t scanout;
  146. };
  147. /**
  148. * struct drm_wmv_surface_arg
  149. *
  150. * @sid: Surface id of created surface or surface to destroy or reference.
  151. *
  152. * Output data from the DRM_VMW_CREATE_SURFACE Ioctl.
  153. * Input argument to the DRM_VMW_UNREF_SURFACE Ioctl.
  154. * Input argument to the DRM_VMW_REF_SURFACE Ioctl.
  155. */
  156. struct drm_vmw_surface_arg {
  157. int32_t sid;
  158. uint32_t pad64;
  159. };
  160. /**
  161. * struct drm_vmw_size ioctl.
  162. *
  163. * @width - mip level width
  164. * @height - mip level height
  165. * @depth - mip level depth
  166. *
  167. * Description of a mip level.
  168. * Input data to the DRM_WMW_CREATE_SURFACE Ioctl.
  169. */
  170. struct drm_vmw_size {
  171. uint32_t width;
  172. uint32_t height;
  173. uint32_t depth;
  174. uint32_t pad64;
  175. };
  176. /**
  177. * union drm_vmw_surface_create_arg
  178. *
  179. * @rep: Output data as described above.
  180. * @req: Input data as described above.
  181. *
  182. * Argument to the DRM_VMW_CREATE_SURFACE Ioctl.
  183. */
  184. union drm_vmw_surface_create_arg {
  185. struct drm_vmw_surface_arg rep;
  186. struct drm_vmw_surface_create_req req;
  187. };
  188. /*************************************************************************/
  189. /**
  190. * DRM_VMW_REF_SURFACE - Reference a host surface.
  191. *
  192. * Puts a reference on a host surface with a give sid, as previously
  193. * returned by the DRM_VMW_CREATE_SURFACE ioctl.
  194. * A reference will make sure the surface isn't destroyed while we hold
  195. * it and will allow the calling client to use the surface ID in the command
  196. * stream.
  197. *
  198. * On successful return, the Ioctl returns the surface information given
  199. * in the DRM_VMW_CREATE_SURFACE ioctl.
  200. */
  201. /**
  202. * union drm_vmw_surface_reference_arg
  203. *
  204. * @rep: Output data as described above.
  205. * @req: Input data as described above.
  206. *
  207. * Argument to the DRM_VMW_REF_SURFACE Ioctl.
  208. */
  209. union drm_vmw_surface_reference_arg {
  210. struct drm_vmw_surface_create_req rep;
  211. struct drm_vmw_surface_arg req;
  212. };
  213. /*************************************************************************/
  214. /**
  215. * DRM_VMW_UNREF_SURFACE - Unreference a host surface.
  216. *
  217. * Clear a reference previously put on a host surface.
  218. * When all references are gone, including the one implicitly placed
  219. * on creation,
  220. * a destroy surface command will be queued for the host.
  221. * Does not wait for completion.
  222. */
  223. /*************************************************************************/
  224. /**
  225. * DRM_VMW_EXECBUF
  226. *
  227. * Submit a command buffer for execution on the host, and return a
  228. * fence seqno that when signaled, indicates that the command buffer has
  229. * executed.
  230. */
  231. /**
  232. * struct drm_vmw_execbuf_arg
  233. *
  234. * @commands: User-space address of a command buffer cast to an uint64_t.
  235. * @command-size: Size in bytes of the command buffer.
  236. * @throttle-us: Sleep until software is less than @throttle_us
  237. * microseconds ahead of hardware. The driver may round this value
  238. * to the nearest kernel tick.
  239. * @fence_rep: User-space address of a struct drm_vmw_fence_rep cast to an
  240. * uint64_t.
  241. * @version: Allows expanding the execbuf ioctl parameters without breaking
  242. * backwards compatibility, since user-space will always tell the kernel
  243. * which version it uses.
  244. * @flags: Execbuf flags. None currently.
  245. *
  246. * Argument to the DRM_VMW_EXECBUF Ioctl.
  247. */
  248. #define DRM_VMW_EXECBUF_VERSION 1
  249. struct drm_vmw_execbuf_arg {
  250. uint64_t commands;
  251. uint32_t command_size;
  252. uint32_t throttle_us;
  253. uint64_t fence_rep;
  254. uint32_t version;
  255. uint32_t flags;
  256. };
  257. /**
  258. * struct drm_vmw_fence_rep
  259. *
  260. * @handle: Fence object handle for fence associated with a command submission.
  261. * @mask: Fence flags relevant for this fence object.
  262. * @seqno: Fence sequence number in fifo. A fence object with a lower
  263. * seqno will signal the EXEC flag before a fence object with a higher
  264. * seqno. This can be used by user-space to avoid kernel calls to determine
  265. * whether a fence has signaled the EXEC flag. Note that @seqno will
  266. * wrap at 32-bit.
  267. * @passed_seqno: The highest seqno number processed by the hardware
  268. * so far. This can be used to mark user-space fence objects as signaled, and
  269. * to determine whether a fence seqno might be stale.
  270. * @error: This member should've been set to -EFAULT on submission.
  271. * The following actions should be take on completion:
  272. * error == -EFAULT: Fence communication failed. The host is synchronized.
  273. * Use the last fence id read from the FIFO fence register.
  274. * error != 0 && error != -EFAULT:
  275. * Fence submission failed. The host is synchronized. Use the fence_seq member.
  276. * error == 0: All is OK, The host may not be synchronized.
  277. * Use the fence_seq member.
  278. *
  279. * Input / Output data to the DRM_VMW_EXECBUF Ioctl.
  280. */
  281. struct drm_vmw_fence_rep {
  282. uint32_t handle;
  283. uint32_t mask;
  284. uint32_t seqno;
  285. uint32_t passed_seqno;
  286. uint32_t pad64;
  287. int32_t error;
  288. };
  289. /*************************************************************************/
  290. /**
  291. * DRM_VMW_ALLOC_DMABUF
  292. *
  293. * Allocate a DMA buffer that is visible also to the host.
  294. * NOTE: The buffer is
  295. * identified by a handle and an offset, which are private to the guest, but
  296. * useable in the command stream. The guest kernel may translate these
  297. * and patch up the command stream accordingly. In the future, the offset may
  298. * be zero at all times, or it may disappear from the interface before it is
  299. * fixed.
  300. *
  301. * The DMA buffer may stay user-space mapped in the guest at all times,
  302. * and is thus suitable for sub-allocation.
  303. *
  304. * DMA buffers are mapped using the mmap() syscall on the drm device.
  305. */
  306. /**
  307. * struct drm_vmw_alloc_dmabuf_req
  308. *
  309. * @size: Required minimum size of the buffer.
  310. *
  311. * Input data to the DRM_VMW_ALLOC_DMABUF Ioctl.
  312. */
  313. struct drm_vmw_alloc_dmabuf_req {
  314. uint32_t size;
  315. uint32_t pad64;
  316. };
  317. /**
  318. * struct drm_vmw_dmabuf_rep
  319. *
  320. * @map_handle: Offset to use in the mmap() call used to map the buffer.
  321. * @handle: Handle unique to this buffer. Used for unreferencing.
  322. * @cur_gmr_id: GMR id to use in the command stream when this buffer is
  323. * referenced. See not above.
  324. * @cur_gmr_offset: Offset to use in the command stream when this buffer is
  325. * referenced. See note above.
  326. *
  327. * Output data from the DRM_VMW_ALLOC_DMABUF Ioctl.
  328. */
  329. struct drm_vmw_dmabuf_rep {
  330. uint64_t map_handle;
  331. uint32_t handle;
  332. uint32_t cur_gmr_id;
  333. uint32_t cur_gmr_offset;
  334. uint32_t pad64;
  335. };
  336. /**
  337. * union drm_vmw_dmabuf_arg
  338. *
  339. * @req: Input data as described above.
  340. * @rep: Output data as described above.
  341. *
  342. * Argument to the DRM_VMW_ALLOC_DMABUF Ioctl.
  343. */
  344. union drm_vmw_alloc_dmabuf_arg {
  345. struct drm_vmw_alloc_dmabuf_req req;
  346. struct drm_vmw_dmabuf_rep rep;
  347. };
  348. /*************************************************************************/
  349. /**
  350. * DRM_VMW_UNREF_DMABUF - Free a DMA buffer.
  351. *
  352. */
  353. /**
  354. * struct drm_vmw_unref_dmabuf_arg
  355. *
  356. * @handle: Handle indicating what buffer to free. Obtained from the
  357. * DRM_VMW_ALLOC_DMABUF Ioctl.
  358. *
  359. * Argument to the DRM_VMW_UNREF_DMABUF Ioctl.
  360. */
  361. struct drm_vmw_unref_dmabuf_arg {
  362. uint32_t handle;
  363. uint32_t pad64;
  364. };
  365. /*************************************************************************/
  366. /**
  367. * DRM_VMW_CONTROL_STREAM - Control overlays, aka streams.
  368. *
  369. * This IOCTL controls the overlay units of the svga device.
  370. * The SVGA overlay units does not work like regular hardware units in
  371. * that they do not automaticaly read back the contents of the given dma
  372. * buffer. But instead only read back for each call to this ioctl, and
  373. * at any point between this call being made and a following call that
  374. * either changes the buffer or disables the stream.
  375. */
  376. /**
  377. * struct drm_vmw_rect
  378. *
  379. * Defines a rectangle. Used in the overlay ioctl to define
  380. * source and destination rectangle.
  381. */
  382. struct drm_vmw_rect {
  383. int32_t x;
  384. int32_t y;
  385. uint32_t w;
  386. uint32_t h;
  387. };
  388. /**
  389. * struct drm_vmw_control_stream_arg
  390. *
  391. * @stream_id: Stearm to control
  392. * @enabled: If false all following arguments are ignored.
  393. * @handle: Handle to buffer for getting data from.
  394. * @format: Format of the overlay as understood by the host.
  395. * @width: Width of the overlay.
  396. * @height: Height of the overlay.
  397. * @size: Size of the overlay in bytes.
  398. * @pitch: Array of pitches, the two last are only used for YUV12 formats.
  399. * @offset: Offset from start of dma buffer to overlay.
  400. * @src: Source rect, must be within the defined area above.
  401. * @dst: Destination rect, x and y may be negative.
  402. *
  403. * Argument to the DRM_VMW_CONTROL_STREAM Ioctl.
  404. */
  405. struct drm_vmw_control_stream_arg {
  406. uint32_t stream_id;
  407. uint32_t enabled;
  408. uint32_t flags;
  409. uint32_t color_key;
  410. uint32_t handle;
  411. uint32_t offset;
  412. int32_t format;
  413. uint32_t size;
  414. uint32_t width;
  415. uint32_t height;
  416. uint32_t pitch[3];
  417. uint32_t pad64;
  418. struct drm_vmw_rect src;
  419. struct drm_vmw_rect dst;
  420. };
  421. /*************************************************************************/
  422. /**
  423. * DRM_VMW_CURSOR_BYPASS - Give extra information about cursor bypass.
  424. *
  425. */
  426. #define DRM_VMW_CURSOR_BYPASS_ALL (1 << 0)
  427. #define DRM_VMW_CURSOR_BYPASS_FLAGS (1)
  428. /**
  429. * struct drm_vmw_cursor_bypass_arg
  430. *
  431. * @flags: Flags.
  432. * @crtc_id: Crtc id, only used if DMR_CURSOR_BYPASS_ALL isn't passed.
  433. * @xpos: X position of cursor.
  434. * @ypos: Y position of cursor.
  435. * @xhot: X hotspot.
  436. * @yhot: Y hotspot.
  437. *
  438. * Argument to the DRM_VMW_CURSOR_BYPASS Ioctl.
  439. */
  440. struct drm_vmw_cursor_bypass_arg {
  441. uint32_t flags;
  442. uint32_t crtc_id;
  443. int32_t xpos;
  444. int32_t ypos;
  445. int32_t xhot;
  446. int32_t yhot;
  447. };
  448. /*************************************************************************/
  449. /**
  450. * DRM_VMW_CLAIM_STREAM - Claim a single stream.
  451. */
  452. /**
  453. * struct drm_vmw_context_arg
  454. *
  455. * @stream_id: Device unique context ID.
  456. *
  457. * Output argument to the DRM_VMW_CREATE_CONTEXT Ioctl.
  458. * Input argument to the DRM_VMW_UNREF_CONTEXT Ioctl.
  459. */
  460. struct drm_vmw_stream_arg {
  461. uint32_t stream_id;
  462. uint32_t pad64;
  463. };
  464. /*************************************************************************/
  465. /**
  466. * DRM_VMW_UNREF_STREAM - Unclaim a stream.
  467. *
  468. * Return a single stream that was claimed by this process. Also makes
  469. * sure that the stream has been stopped.
  470. */
  471. /*************************************************************************/
  472. /**
  473. * DRM_VMW_GET_3D_CAP
  474. *
  475. * Read 3D capabilities from the FIFO
  476. *
  477. */
  478. /**
  479. * struct drm_vmw_get_3d_cap_arg
  480. *
  481. * @buffer: Pointer to a buffer for capability data, cast to an uint64_t
  482. * @size: Max size to copy
  483. *
  484. * Input argument to the DRM_VMW_GET_3D_CAP_IOCTL
  485. * ioctls.
  486. */
  487. struct drm_vmw_get_3d_cap_arg {
  488. uint64_t buffer;
  489. uint32_t max_size;
  490. uint32_t pad64;
  491. };
  492. /*************************************************************************/
  493. /**
  494. * DRM_VMW_FENCE_WAIT
  495. *
  496. * Waits for a fence object to signal. The wait is interruptible, so that
  497. * signals may be delivered during the interrupt. The wait may timeout,
  498. * in which case the calls returns -EBUSY. If the wait is restarted,
  499. * that is restarting without resetting @cookie_valid to zero,
  500. * the timeout is computed from the first call.
  501. *
  502. * The flags argument to the DRM_VMW_FENCE_WAIT ioctl indicates what to wait
  503. * on:
  504. * DRM_VMW_FENCE_FLAG_EXEC: All commands ahead of the fence in the command
  505. * stream
  506. * have executed.
  507. * DRM_VMW_FENCE_FLAG_QUERY: All query results resulting from query finish
  508. * commands
  509. * in the buffer given to the EXECBUF ioctl returning the fence object handle
  510. * are available to user-space.
  511. *
  512. * DRM_VMW_WAIT_OPTION_UNREF: If this wait option is given, and the
  513. * fenc wait ioctl returns 0, the fence object has been unreferenced after
  514. * the wait.
  515. */
  516. #define DRM_VMW_FENCE_FLAG_EXEC (1 << 0)
  517. #define DRM_VMW_FENCE_FLAG_QUERY (1 << 1)
  518. #define DRM_VMW_WAIT_OPTION_UNREF (1 << 0)
  519. /**
  520. * struct drm_vmw_fence_wait_arg
  521. *
  522. * @handle: Fence object handle as returned by the DRM_VMW_EXECBUF ioctl.
  523. * @cookie_valid: Must be reset to 0 on first call. Left alone on restart.
  524. * @kernel_cookie: Set to 0 on first call. Left alone on restart.
  525. * @timeout_us: Wait timeout in microseconds. 0 for indefinite timeout.
  526. * @lazy: Set to 1 if timing is not critical. Allow more than a kernel tick
  527. * before returning.
  528. * @flags: Fence flags to wait on.
  529. * @wait_options: Options that control the behaviour of the wait ioctl.
  530. *
  531. * Input argument to the DRM_VMW_FENCE_WAIT ioctl.
  532. */
  533. struct drm_vmw_fence_wait_arg {
  534. uint32_t handle;
  535. int32_t cookie_valid;
  536. uint64_t kernel_cookie;
  537. uint64_t timeout_us;
  538. int32_t lazy;
  539. int32_t flags;
  540. int32_t wait_options;
  541. int32_t pad64;
  542. };
  543. /*************************************************************************/
  544. /**
  545. * DRM_VMW_FENCE_SIGNALED
  546. *
  547. * Checks if a fence object is signaled..
  548. */
  549. /**
  550. * struct drm_vmw_fence_signaled_arg
  551. *
  552. * @handle: Fence object handle as returned by the DRM_VMW_EXECBUF ioctl.
  553. * @flags: Fence object flags input to DRM_VMW_FENCE_SIGNALED ioctl
  554. * @signaled: Out: Flags signaled.
  555. * @sequence: Out: Highest sequence passed so far. Can be used to signal the
  556. * EXEC flag of user-space fence objects.
  557. *
  558. * Input/Output argument to the DRM_VMW_FENCE_SIGNALED and DRM_VMW_FENCE_UNREF
  559. * ioctls.
  560. */
  561. struct drm_vmw_fence_signaled_arg {
  562. uint32_t handle;
  563. uint32_t flags;
  564. int32_t signaled;
  565. uint32_t passed_seqno;
  566. uint32_t signaled_flags;
  567. uint32_t pad64;
  568. };
  569. /*************************************************************************/
  570. /**
  571. * DRM_VMW_FENCE_UNREF
  572. *
  573. * Unreferences a fence object, and causes it to be destroyed if there are no
  574. * other references to it.
  575. *
  576. */
  577. /**
  578. * struct drm_vmw_fence_arg
  579. *
  580. * @handle: Fence object handle as returned by the DRM_VMW_EXECBUF ioctl.
  581. *
  582. * Input/Output argument to the DRM_VMW_FENCE_UNREF ioctl..
  583. */
  584. struct drm_vmw_fence_arg {
  585. uint32_t handle;
  586. uint32_t pad64;
  587. };
  588. /*************************************************************************/
  589. /**
  590. * DRM_VMW_FENCE_EVENT
  591. *
  592. * Queues an event on a fence to be delivered on the drm character device
  593. * when the fence has signaled the DRM_VMW_FENCE_FLAG_EXEC flag.
  594. * Optionally the approximate time when the fence signaled is
  595. * given by the event.
  596. */
  597. /*
  598. * The event type
  599. */
  600. #define DRM_VMW_EVENT_FENCE_SIGNALED 0x80000000
  601. struct drm_vmw_event_fence {
  602. struct drm_event base;
  603. uint64_t user_data;
  604. uint32_t tv_sec;
  605. uint32_t tv_usec;
  606. };
  607. /*
  608. * Flags that may be given to the command.
  609. */
  610. /* Request fence signaled time on the event. */
  611. #define DRM_VMW_FE_FLAG_REQ_TIME (1 << 0)
  612. /**
  613. * struct drm_vmw_fence_event_arg
  614. *
  615. * @fence_rep: Pointer to fence_rep structure cast to uint64_t or 0 if
  616. * the fence is not supposed to be referenced by user-space.
  617. * @user_info: Info to be delivered with the event.
  618. * @handle: Attach the event to this fence only.
  619. * @flags: A set of flags as defined above.
  620. */
  621. struct drm_vmw_fence_event_arg {
  622. uint64_t fence_rep;
  623. uint64_t user_data;
  624. uint32_t handle;
  625. uint32_t flags;
  626. };
  627. /*************************************************************************/
  628. /**
  629. * DRM_VMW_PRESENT
  630. *
  631. * Executes an SVGA present on a given fb for a given surface. The surface
  632. * is placed on the framebuffer. Cliprects are given relative to the given
  633. * point (the point disignated by dest_{x|y}).
  634. *
  635. */
  636. /**
  637. * struct drm_vmw_present_arg
  638. * @fb_id: framebuffer id to present / read back from.
  639. * @sid: Surface id to present from.
  640. * @dest_x: X placement coordinate for surface.
  641. * @dest_y: Y placement coordinate for surface.
  642. * @clips_ptr: Pointer to an array of clip rects cast to an uint64_t.
  643. * @num_clips: Number of cliprects given relative to the framebuffer origin,
  644. * in the same coordinate space as the frame buffer.
  645. * @pad64: Unused 64-bit padding.
  646. *
  647. * Input argument to the DRM_VMW_PRESENT ioctl.
  648. */
  649. struct drm_vmw_present_arg {
  650. uint32_t fb_id;
  651. uint32_t sid;
  652. int32_t dest_x;
  653. int32_t dest_y;
  654. uint64_t clips_ptr;
  655. uint32_t num_clips;
  656. uint32_t pad64;
  657. };
  658. /*************************************************************************/
  659. /**
  660. * DRM_VMW_PRESENT_READBACK
  661. *
  662. * Executes an SVGA present readback from a given fb to the dma buffer
  663. * currently bound as the fb. If there is no dma buffer bound to the fb,
  664. * an error will be returned.
  665. *
  666. */
  667. /**
  668. * struct drm_vmw_present_arg
  669. * @fb_id: fb_id to present / read back from.
  670. * @num_clips: Number of cliprects.
  671. * @clips_ptr: Pointer to an array of clip rects cast to an uint64_t.
  672. * @fence_rep: Pointer to a struct drm_vmw_fence_rep, cast to an uint64_t.
  673. * If this member is NULL, then the ioctl should not return a fence.
  674. */
  675. struct drm_vmw_present_readback_arg {
  676. uint32_t fb_id;
  677. uint32_t num_clips;
  678. uint64_t clips_ptr;
  679. uint64_t fence_rep;
  680. };
  681. /*************************************************************************/
  682. /**
  683. * DRM_VMW_UPDATE_LAYOUT - Update layout
  684. *
  685. * Updates the preferred modes and connection status for connectors. The
  686. * command consists of one drm_vmw_update_layout_arg pointing to an array
  687. * of num_outputs drm_vmw_rect's.
  688. */
  689. /**
  690. * struct drm_vmw_update_layout_arg
  691. *
  692. * @num_outputs: number of active connectors
  693. * @rects: pointer to array of drm_vmw_rect cast to an uint64_t
  694. *
  695. * Input argument to the DRM_VMW_UPDATE_LAYOUT Ioctl.
  696. */
  697. struct drm_vmw_update_layout_arg {
  698. uint32_t num_outputs;
  699. uint32_t pad64;
  700. uint64_t rects;
  701. };
  702. #endif