mipi_toshiba_video_wvga_pt.c 3.2 KB

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  1. /* Copyright (c) 2009-2011, The Linux Foundation. All rights reserved.
  2. *
  3. * This program is free software; you can redistribute it and/or modify
  4. * it under the terms of the GNU General Public License version 2 and
  5. * only version 2 as published by the Free Software Foundation.
  6. *
  7. * This program is distributed in the hope that it will be useful,
  8. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  10. * GNU General Public License for more details.
  11. *
  12. */
  13. #include "msm_fb.h"
  14. #include "mipi_dsi.h"
  15. #include "mipi_toshiba.h"
  16. static struct msm_panel_info pinfo;
  17. static struct mipi_dsi_phy_ctrl dsi_video_mode_phy_db = {
  18. /* 480*854, RGB888, 2 Lane 60 fps video mode */
  19. {0x03, 0x01, 0x01, 0x00}, /* regulator */
  20. /* timing */
  21. {0x6a, 0x22, 0x0f, 0x00, 0x30, 0x38, 0x13, 0x26,
  22. 0x1b, 0x03, 0x04},
  23. {0x7f, 0x00, 0x00, 0x00}, /* phy ctrl */
  24. {0xee, 0x03, 0x86, 0x03}, /* strength */
  25. /* pll control */
  26. #define DSI_BIT_CLK_380MHZ
  27. #if defined(DSI_BIT_CLK_366MHZ)
  28. {0x41, 0xdb, 0xb2, 0xf5, 0x00, 0x50, 0x48, 0x63,
  29. 0x31, 0x0f, 0x07,
  30. 0x05, 0x14, 0x03, 0x03, 0x03, 0x54, 0x06, 0x10, 0x04, 0x03 },
  31. #elif defined(DSI_BIT_CLK_380MHZ)
  32. {0x41, 0xf7, 0xb2, 0xf5, 0x00, 0x50, 0x48, 0x63,
  33. 0x31, 0x0f, 0x07,
  34. 0x05, 0x14, 0x03, 0x03, 0x03, 0x54, 0x06, 0x10, 0x04, 0x03 },
  35. #elif defined(DSI_BIT_CLK_400MHZ)
  36. {0x41, 0x8f, 0xb1, 0xda, 0x00, 0x50, 0x48, 0x63,
  37. 0x31, 0x0f, 0x07,
  38. 0x05, 0x14, 0x03, 0x03, 0x03, 0x54, 0x06, 0x10, 0x04, 0x03 },
  39. #else /* 200 mhz */
  40. {0x41, 0x8f, 0xb1, 0xda, 0x00, 0x50, 0x48, 0x63,
  41. 0x33, 0x1f, 0x0f,
  42. 0x05, 0x14, 0x03, 0x03, 0x03, 0x54, 0x06, 0x10, 0x04, 0x03 },
  43. #endif
  44. };
  45. static int __init mipi_video_toshiba_wvga_pt_init(void)
  46. {
  47. int ret;
  48. if (msm_fb_detect_client("mipi_video_toshiba_wvga"))
  49. return 0;
  50. pinfo.xres = 480;
  51. pinfo.yres = 864; /* 856 for V1 surf */
  52. pinfo.type = MIPI_VIDEO_PANEL;
  53. pinfo.pdest = DISPLAY_1;
  54. pinfo.wait_cycle = 0;
  55. pinfo.bpp = 24;
  56. pinfo.lcdc.h_back_porch = 64;
  57. pinfo.lcdc.h_front_porch = 64;
  58. pinfo.lcdc.h_pulse_width = 16;
  59. pinfo.lcdc.v_back_porch = 8;
  60. pinfo.lcdc.v_front_porch = 4;
  61. pinfo.lcdc.v_pulse_width = 1;
  62. pinfo.lcdc.border_clr = 0; /* blk */
  63. pinfo.lcdc.underflow_clr = 0xff; /* blue */
  64. pinfo.lcdc.hsync_skew = 0;
  65. pinfo.bl_max = 15;
  66. pinfo.bl_min = 1;
  67. pinfo.fb_num = 2;
  68. pinfo.mipi.mode = DSI_VIDEO_MODE;
  69. pinfo.mipi.pulse_mode_hsa_he = TRUE;
  70. pinfo.mipi.hfp_power_stop = FALSE;
  71. pinfo.mipi.hbp_power_stop = FALSE;
  72. pinfo.mipi.hsa_power_stop = FALSE;
  73. pinfo.mipi.eof_bllp_power_stop = TRUE;
  74. pinfo.mipi.bllp_power_stop = TRUE;
  75. pinfo.mipi.traffic_mode = DSI_NON_BURST_SYNCH_PULSE;
  76. pinfo.mipi.dst_format = DSI_VIDEO_DST_FORMAT_RGB888;
  77. pinfo.mipi.vc = 0;
  78. pinfo.mipi.rgb_swap = DSI_RGB_SWAP_BGR;
  79. pinfo.mipi.data_lane0 = TRUE;
  80. pinfo.mipi.data_lane1 = TRUE;
  81. pinfo.mipi.t_clk_post = 0x04;
  82. pinfo.mipi.t_clk_pre = 0x17;
  83. pinfo.mipi.stream = 0; /* dma_p */
  84. pinfo.mipi.mdp_trigger = DSI_CMD_TRIGGER_SW;
  85. pinfo.mipi.dma_trigger = DSI_CMD_TRIGGER_SW;
  86. pinfo.mipi.frame_rate = 60;
  87. pinfo.mipi.dsi_phy_db = &dsi_video_mode_phy_db;
  88. ret = mipi_toshiba_device_register(&pinfo, MIPI_DSI_PRIM,
  89. MIPI_DSI_PANEL_WVGA_PT);
  90. if (ret)
  91. printk(KERN_ERR "%s: failed to register device!\n", __func__);
  92. return ret;
  93. }
  94. module_init(mipi_video_toshiba_wvga_pt_init);