mdss_qpic.h 2.7 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596
  1. /* Copyright (c) 2013, The Linux Foundation. All rights reserved.
  2. *
  3. * This program is free software; you can redistribute it and/or modify
  4. * it under the terms of the GNU General Public License version 2 and
  5. * only version 2 as published by the Free Software Foundation.
  6. *
  7. * This program is distributed in the hope that it will be useful,
  8. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  10. * GNU General Public License for more details.
  11. *
  12. */
  13. #ifndef MDSS_QPIC_H
  14. #define MDSS_QPIC_H
  15. #include <linux/list.h>
  16. #include <mach/scm-io.h>
  17. #include <mach/sps.h>
  18. #include "mdss_panel.h"
  19. #define QPIC_REG_QPIC_LCDC_CTRL 0x22000
  20. #define QPIC_REG_LCDC_VERSION 0x22004
  21. #define QPIC_REG_QPIC_LCDC_IRQ_EN 0x22008
  22. #define QPIC_REG_QPIC_LCDC_IRQ_STTS 0x2200C
  23. #define QPIC_REG_QPIC_LCDC_IRQ_CLR 0x22010
  24. #define QPIC_REG_QPIC_LCDC_STTS 0x22014
  25. #define QPIC_REG_QPIC_LCDC_CMD_DATA_CYCLE_CNT 0x22018
  26. #define QPIC_REG_QPIC_LCDC_CFG0 0x22020
  27. #define QPIC_REG_QPIC_LCDC_CFG1 0x22024
  28. #define QPIC_REG_QPIC_LCDC_CFG2 0x22028
  29. #define QPIC_REG_QPIC_LCDC_RESET 0x2202C
  30. #define QPIC_REG_QPIC_LCDC_FIFO_SOF 0x22100
  31. #define QPIC_REG_LCD_DEVICE_CMD0 0x23000
  32. #define QPIC_REG_QPIC_LCDC_FIFO_DATA_PORT0 0x22140
  33. #define QPIC_REG_QPIC_LCDC_FIFO_EOF 0x22180
  34. #define QPIC_OUTP(off, data) \
  35. writel_relaxed((data), qpic_res->qpic_base + (off))
  36. #define QPIC_OUTPW(off, data) \
  37. writew_relaxed((data), qpic_res->qpic_base + (off))
  38. #define QPIC_INP(off) \
  39. readl_relaxed(qpic_res->qpic_base + (off))
  40. #define QPIC_MAX_VSYNC_WAIT_TIME 500
  41. #define QPIC_MAX_CMD_BUF_SIZE 512
  42. int mdss_qpic_init(void);
  43. int qpic_flush_buffer(u32 cmd, u32 len, u32 *param, u32 is_cmd);
  44. u32 msm_qpic_get_bam_hdl(struct sps_bam_props *bam);
  45. int mdss_qpic_panel_on(struct mdss_panel_data *pdata);
  46. int mdss_qpic_panel_off(struct mdss_panel_data *pdata);
  47. int qpic_register_panel(struct mdss_panel_data *pdata);
  48. int ili9341_on(void);
  49. /* Structure that defines an SPS end point for a BAM pipe. */
  50. struct qpic_sps_endpt {
  51. struct sps_pipe *handle;
  52. struct sps_connect config;
  53. struct sps_register_event bam_event;
  54. struct completion completion;
  55. };
  56. struct qpic_data_type {
  57. u32 rev;
  58. struct platform_device *pdev;
  59. size_t qpic_reg_size;
  60. u32 qpic_phys;
  61. char __iomem *qpic_base;
  62. u32 irq;
  63. u32 irq_ena;
  64. u32 res_init;
  65. void *fb_virt;
  66. u32 fb_phys;
  67. void *cmd_buf_virt;
  68. u32 cmd_buf_phys;
  69. struct qpic_sps_endpt qpic_endpt;
  70. u32 sps_init;
  71. u32 irq_requested;
  72. struct mdss_panel_data *panel_data;
  73. };
  74. u32 qpic_send_frame(
  75. u32 x_start,
  76. u32 y_start,
  77. u32 x_end,
  78. u32 y_end,
  79. u32 *data,
  80. u32 total_bytes);
  81. u32 qpic_panel_get_framerate(void);
  82. #endif /* MDSS_QPIC_H */