mdss_mdp_overlay.c 93 KB

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  1. /* Copyright (c) 2012-2015, The Linux Foundation. All rights reserved.
  2. *
  3. * This program is free software; you can redistribute it and/or modify
  4. * it under the terms of the GNU General Public License version 2 and
  5. * only version 2 as published by the Free Software Foundation.
  6. *
  7. * This program is distributed in the hope that it will be useful,
  8. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  10. * GNU General Public License for more details.
  11. *
  12. */
  13. #define pr_fmt(fmt) "%s: " fmt, __func__
  14. #include <linux/dma-buf.h>
  15. #include <linux/dma-mapping.h>
  16. #include <linux/errno.h>
  17. #include <linux/kernel.h>
  18. #include <linux/major.h>
  19. #include <linux/module.h>
  20. #include <linux/pm_runtime.h>
  21. #include <linux/uaccess.h>
  22. #include <linux/delay.h>
  23. #include <linux/msm_mdp.h>
  24. #include <linux/memblock.h>
  25. #include <linux/sw_sync.h>
  26. #include <mach/iommu_domains.h>
  27. #include <mach/event_timer.h>
  28. #include <mach/msm_bus.h>
  29. #include <mach/scm.h>
  30. #include "mdss.h"
  31. #include "mdss_debug.h"
  32. #include "mdss_fb.h"
  33. #include "mdss_mdp.h"
  34. #include "mdss_mdp_rotator.h"
  35. #define VSYNC_PERIOD 16
  36. #define BORDERFILL_NDX 0x0BF000BF
  37. #define CHECK_BOUNDS(offset, size, max_size) \
  38. (((size) > (max_size)) || ((offset) > ((max_size) - (size))))
  39. #define IS_RIGHT_MIXER_OV(flags, dst_x, left_lm_w) \
  40. ((flags & MDSS_MDP_RIGHT_MIXER) || (dst_x >= left_lm_w))
  41. #define PP_CLK_CFG_OFF 0
  42. #define PP_CLK_CFG_ON 1
  43. #ifdef __MDSS_DEBUG__
  44. #define ID_PRINTK(mdss_id, fmt, args...) if(mfd->index == mdss_id) printk(fmt, ##args);
  45. #else
  46. #define ID_PRINTK(mdss_id, fmt, args...)
  47. #endif
  48. enum mdss_id_state {
  49. ID_LCD = 0,
  50. ID_HDMI = 1
  51. };
  52. int get_lcd_attached(void);
  53. #define OVERLAY_MAX 10
  54. #if defined (CONFIG_FB_MSM_MDSS_DBG_SEQ_TICK)
  55. static struct mdss_tick_debug mdss_dbg_tick;
  56. #endif
  57. struct list_head *pipes_used_dbg;
  58. DEFINE_MUTEX(free_list_purge_mutex);
  59. static atomic_t ov_active_panels = ATOMIC_INIT(0);
  60. static int mdss_mdp_overlay_free_fb_pipe(struct msm_fb_data_type *mfd);
  61. static int mdss_mdp_overlay_fb_parse_dt(struct msm_fb_data_type *mfd);
  62. static int mdss_mdp_overlay_off(struct msm_fb_data_type *mfd);
  63. static void __overlay_kickoff_requeue(struct msm_fb_data_type *mfd);
  64. static void __vsync_retire_signal(struct msm_fb_data_type *mfd, int val);
  65. #if defined(CONFIG_FB_MSM_MDSS_S6E8AA0A_HD_PANEL)
  66. extern int err_fg_working;
  67. extern int lcd_connected_status;
  68. #endif
  69. static inline u32 left_lm_w_from_mfd(struct msm_fb_data_type *mfd)
  70. {
  71. struct mdss_mdp_ctl *ctl = mfd_to_ctl(mfd);
  72. return ctl->mixer_left->width;
  73. }
  74. static int mdss_mdp_overlay_get(struct msm_fb_data_type *mfd,
  75. struct mdp_overlay *req)
  76. {
  77. struct mdss_mdp_pipe *pipe;
  78. struct mdss_data_type *mdata = mfd_to_mdata(mfd);
  79. pipe = mdss_mdp_pipe_get(mdata, req->id);
  80. if (IS_ERR_OR_NULL(pipe)) {
  81. pr_err("invalid pipe ndx=%x\n", req->id);
  82. return pipe ? PTR_ERR(pipe) : -ENODEV;
  83. }
  84. *req = pipe->req_data;
  85. mdss_mdp_pipe_unmap(pipe);
  86. return 0;
  87. }
  88. /*
  89. * This function is modified from mainline version. Source-split
  90. * change is too large to port over onto certain code bases.
  91. * Source-split patch added a new way to determine if layer
  92. * is intended for right panel, by using x offset >= left LM
  93. * This function corrects the x offset.
  94. * Additionally, patches that fix other issues assumes that checks
  95. * and corrections in this function are in place.
  96. */
  97. static int mdss_mdp_ov_xres_check(struct msm_fb_data_type *mfd,
  98. struct mdp_overlay *req)
  99. {
  100. u32 xres = 0;
  101. u32 left_lm_w = left_lm_w_from_mfd(mfd);
  102. struct mdss_mdp_ctl *ctl = mfd_to_ctl(mfd);
  103. if (IS_RIGHT_MIXER_OV(req->flags, req->dst_rect.x, left_lm_w)) {
  104. if (req->dst_rect.x >= left_lm_w) {
  105. /*
  106. * this is a step towards removing a reliance on
  107. * MDSS_MDP_RIGHT_MIXER flags. With the new src split
  108. * code, some clients of non-src-split chipsets have
  109. * stopped sending MDSS_MDP_RIGHT_MIXER flag and
  110. * modified their xres relative to full panel
  111. * dimensions. In such cases, we need to deduct left
  112. * layer mixer width before we programm this HW.
  113. */
  114. req->dst_rect.x -= left_lm_w;
  115. req->flags |= MDSS_MDP_RIGHT_MIXER;
  116. }
  117. if (ctl->mixer_right) {
  118. xres += ctl->mixer_right->width;
  119. } else {
  120. pr_err("ov cannot be placed on right mixer\n");
  121. return -EPERM;
  122. }
  123. } else {
  124. if (ctl->mixer_left) {
  125. xres = ctl->mixer_left->width;
  126. } else {
  127. pr_err("ov cannot be placed on left mixer\n");
  128. return -EPERM;
  129. }
  130. }
  131. if (CHECK_BOUNDS(req->dst_rect.x, req->dst_rect.w, xres)) {
  132. pr_err("dst_xres is invalid. dst_x:%d, dst_w:%d, xres:%d\n",
  133. req->dst_rect.x, req->dst_rect.w, xres);
  134. return -EOVERFLOW;
  135. }
  136. return 0;
  137. }
  138. int mdss_mdp_overlay_req_check(struct msm_fb_data_type *mfd,
  139. struct mdp_overlay *req,
  140. struct mdss_mdp_format_params *fmt)
  141. {
  142. u32 yres;
  143. u32 min_src_size, min_dst_size;
  144. int content_secure;
  145. struct mdss_data_type *mdata = mfd_to_mdata(mfd);
  146. struct mdss_mdp_ctl *ctl = mfd_to_ctl(mfd);
  147. yres = mfd->fbi->var.yres;
  148. content_secure = (req->flags & MDP_SECURE_OVERLAY_SESSION);
  149. if (!ctl->is_secure && content_secure &&
  150. (mfd->panel.type == WRITEBACK_PANEL)) {
  151. pr_debug("return due to security concerns\n");
  152. return -EPERM;
  153. }
  154. if (mdata->mdp_rev >= MDSS_MDP_HW_REV_102) {
  155. min_src_size = fmt->is_yuv ? 2 : 1;
  156. min_dst_size = 1;
  157. } else {
  158. min_src_size = fmt->is_yuv ? 10 : 5;
  159. min_dst_size = 2;
  160. }
  161. if (req->z_order >= MDSS_MDP_MAX_STAGE) {
  162. pr_err("zorder %d out of range\n", req->z_order);
  163. return -ERANGE;
  164. }
  165. if (req->src.width > MAX_IMG_WIDTH ||
  166. req->src.height > MAX_IMG_HEIGHT ||
  167. req->src_rect.w < min_src_size || req->src_rect.h < min_src_size ||
  168. CHECK_BOUNDS(req->src_rect.x, req->src_rect.w, req->src.width) ||
  169. CHECK_BOUNDS(req->src_rect.y, req->src_rect.h, req->src.height)) {
  170. pr_err("invalid source image img wh=%dx%d rect=%d,%d,%d,%d\n",
  171. req->src.width, req->src.height,
  172. req->src_rect.x, req->src_rect.y,
  173. req->src_rect.w, req->src_rect.h);
  174. return -EOVERFLOW;
  175. }
  176. if (req->dst_rect.w < min_dst_size || req->dst_rect.h < min_dst_size) {
  177. pr_err("invalid destination resolution (%dx%d)",
  178. req->dst_rect.w, req->dst_rect.h);
  179. return -EOVERFLOW;
  180. }
  181. if (req->horz_deci || req->vert_deci) {
  182. if (!mdata->has_decimation) {
  183. pr_err("No Decimation in MDP V=%x\n", mdata->mdp_rev);
  184. return -EINVAL;
  185. } else if ((req->horz_deci > MAX_DECIMATION) ||
  186. (req->vert_deci > MAX_DECIMATION)) {
  187. pr_err("Invalid decimation factors horz=%d vert=%d\n",
  188. req->horz_deci, req->vert_deci);
  189. return -EINVAL;
  190. } else if (req->flags & MDP_BWC_EN) {
  191. pr_err("Decimation can't be enabled with BWC\n");
  192. return -EINVAL;
  193. } else if (fmt->tile) {
  194. pr_err("Decimation can't be enabled with MacroTile format\n");
  195. return -EINVAL;
  196. }
  197. }
  198. if (!(req->flags & MDSS_MDP_ROT_ONLY)) {
  199. u32 src_w, src_h, dst_w, dst_h;
  200. if (CHECK_BOUNDS(req->dst_rect.y, req->dst_rect.h, yres)) {
  201. pr_err("invalid destination rect=%d,%d,%d,%d\n",
  202. req->dst_rect.x, req->dst_rect.y,
  203. req->dst_rect.w, req->dst_rect.h);
  204. return -EOVERFLOW;
  205. }
  206. if (req->flags & MDP_ROT_90) {
  207. dst_h = req->dst_rect.w;
  208. dst_w = req->dst_rect.h;
  209. } else {
  210. dst_w = req->dst_rect.w;
  211. dst_h = req->dst_rect.h;
  212. }
  213. src_w = DECIMATED_DIMENSION(req->src_rect.w, req->horz_deci);
  214. src_h = DECIMATED_DIMENSION(req->src_rect.h, req->vert_deci);
  215. if (src_w > MAX_MIXER_WIDTH) {
  216. pr_err("invalid source width=%d HDec=%d\n",
  217. req->src_rect.w, req->horz_deci);
  218. return -EINVAL;
  219. }
  220. if ((src_w * MAX_UPSCALE_RATIO) < dst_w) {
  221. pr_err("too much upscaling Width %d->%d\n",
  222. req->src_rect.w, req->dst_rect.w);
  223. return -EINVAL;
  224. }
  225. if ((src_h * MAX_UPSCALE_RATIO) < dst_h) {
  226. pr_err("too much upscaling. Height %d->%d\n",
  227. req->src_rect.h, req->dst_rect.h);
  228. return -EINVAL;
  229. }
  230. if (src_w > (dst_w * MAX_DOWNSCALE_RATIO)) {
  231. pr_err("too much downscaling. Width %d->%d H Dec=%d\n",
  232. src_w, req->dst_rect.w, req->horz_deci);
  233. return -EINVAL;
  234. }
  235. if (src_h > (dst_h * MAX_DOWNSCALE_RATIO)) {
  236. pr_err("too much downscaling. Height %d->%d V Dec=%d\n",
  237. src_h, req->dst_rect.h, req->vert_deci);
  238. return -EINVAL;
  239. }
  240. if (req->flags & MDP_BWC_EN) {
  241. if ((req->src.width != req->src_rect.w) ||
  242. (req->src.height != req->src_rect.h)) {
  243. pr_err("BWC: unequal src img and rect w,h\n");
  244. return -EINVAL;
  245. }
  246. if (req->flags & MDP_DECIMATION_EN) {
  247. pr_err("Can't enable BWC decode && decimate\n");
  248. return -EINVAL;
  249. }
  250. }
  251. if ((req->flags & MDP_DEINTERLACE) &&
  252. !req->scale.enable_pxl_ext) {
  253. if (req->flags & MDP_SOURCE_ROTATED_90) {
  254. if ((req->src_rect.w % 4) != 0) {
  255. pr_err("interlaced rect not h/4\n");
  256. return -EINVAL;
  257. }
  258. } else if ((req->src_rect.h % 4) != 0) {
  259. pr_err("interlaced rect not h/4\n");
  260. return -EINVAL;
  261. }
  262. }
  263. } else {
  264. if (req->flags & MDP_DEINTERLACE) {
  265. if ((req->src_rect.h % 4) != 0) {
  266. pr_err("interlaced rect h not multiple of 4\n");
  267. return -EINVAL;
  268. }
  269. }
  270. }
  271. if (fmt->is_yuv) {
  272. if ((req->src_rect.x & 0x1) || (req->src_rect.y & 0x1) ||
  273. (req->src_rect.w & 0x1) || (req->src_rect.h & 0x1)) {
  274. pr_err("invalid odd src resolution or coordinates\n");
  275. return -EINVAL;
  276. }
  277. }
  278. return 0;
  279. }
  280. static int __mdp_pipe_tune_perf(struct mdss_mdp_pipe *pipe)
  281. {
  282. struct mdss_data_type *mdata = pipe->mixer->ctl->mdata;
  283. struct mdss_mdp_perf_params perf;
  284. int rc;
  285. for (;;) {
  286. rc = mdss_mdp_perf_calc_pipe(pipe, &perf, NULL, true);
  287. if (!rc && (perf.mdp_clk_rate <= mdata->max_mdp_clk_rate))
  288. break;
  289. /*
  290. * if decimation is available try to reduce minimum clock rate
  291. * requirement by applying vertical decimation and reduce
  292. * mdp clock requirement
  293. */
  294. if (mdata->has_decimation && (pipe->vert_deci < MAX_DECIMATION)
  295. && !pipe->bwc_mode && !pipe->src_fmt->tile &&
  296. !pipe->scale.enable_pxl_ext)
  297. pipe->vert_deci++;
  298. else
  299. return -EPERM;
  300. }
  301. return 0;
  302. }
  303. static int __mdss_mdp_validate_pxl_extn(struct mdss_mdp_pipe *pipe)
  304. {
  305. int plane;
  306. for (plane = 0; plane < MAX_PLANES; plane++) {
  307. u32 hor_req_pixels, hor_fetch_pixels;
  308. u32 hor_ov_fetch, vert_ov_fetch;
  309. u32 vert_req_pixels, vert_fetch_pixels;
  310. u32 src_w = DECIMATED_DIMENSION(pipe->src.w, pipe->horz_deci);
  311. u32 src_h = DECIMATED_DIMENSION(pipe->src.h, pipe->vert_deci);
  312. /*
  313. * plane 1 and 2 are for chroma and are same. While configuring
  314. * HW, programming only one of the chroma components is
  315. * sufficient.
  316. */
  317. if (plane == 2)
  318. continue;
  319. /*
  320. * For chroma plane, width is half for the following sub sampled
  321. * formats. Except in case of decimation, where hardware avoids
  322. * 1 line of decimation instead of downsampling.
  323. */
  324. if (plane == 1 && !pipe->horz_deci &&
  325. ((pipe->src_fmt->chroma_sample == MDSS_MDP_CHROMA_420) ||
  326. (pipe->src_fmt->chroma_sample == MDSS_MDP_CHROMA_H2V1))) {
  327. src_w >>= 1;
  328. }
  329. if (plane == 1 && !pipe->vert_deci &&
  330. ((pipe->src_fmt->chroma_sample == MDSS_MDP_CHROMA_420) ||
  331. (pipe->src_fmt->chroma_sample == MDSS_MDP_CHROMA_H1V2)))
  332. src_h >>= 1;
  333. hor_req_pixels = pipe->scale.roi_w[plane] +
  334. pipe->scale.num_ext_pxls_left[plane] +
  335. pipe->scale.num_ext_pxls_right[plane];
  336. hor_fetch_pixels = src_w +
  337. (pipe->scale.left_ftch[plane] >> pipe->horz_deci) +
  338. pipe->scale.left_rpt[plane] +
  339. (pipe->scale.right_ftch[plane] >> pipe->horz_deci) +
  340. pipe->scale.right_rpt[plane];
  341. hor_ov_fetch = src_w +
  342. (pipe->scale.left_ftch[plane] >> pipe->horz_deci)+
  343. (pipe->scale.right_ftch[plane] >> pipe->horz_deci);
  344. vert_req_pixels = pipe->scale.num_ext_pxls_top[plane] +
  345. pipe->scale.num_ext_pxls_btm[plane];
  346. vert_fetch_pixels =
  347. (pipe->scale.top_ftch[plane] >> pipe->vert_deci) +
  348. pipe->scale.top_rpt[plane] +
  349. (pipe->scale.btm_ftch[plane] >> pipe->vert_deci)+
  350. pipe->scale.btm_rpt[plane];
  351. vert_ov_fetch = src_h +
  352. (pipe->scale.top_ftch[plane] >> pipe->vert_deci)+
  353. (pipe->scale.btm_ftch[plane] >> pipe->vert_deci);
  354. if ((hor_req_pixels != hor_fetch_pixels) ||
  355. (hor_ov_fetch > pipe->img_width) ||
  356. (vert_req_pixels != vert_fetch_pixels) ||
  357. (vert_ov_fetch > pipe->img_height)) {
  358. pr_err("err: plane=%d h_req:%d h_fetch:%d v_req:%d v_fetch:%d\n",
  359. plane,
  360. hor_req_pixels, hor_fetch_pixels,
  361. vert_req_pixels, vert_fetch_pixels);
  362. pr_err("roi_w[%d]=%d, src_img:[%d, %d]\n",
  363. plane, pipe->scale.roi_w[plane],
  364. pipe->img_width, pipe->img_height);
  365. pipe->scale.enable_pxl_ext = 0;
  366. return -EINVAL;
  367. }
  368. }
  369. return 0;
  370. }
  371. static int __mdss_mdp_overlay_setup_scaling(struct mdss_mdp_pipe *pipe)
  372. {
  373. u32 src;
  374. int rc;
  375. src = DECIMATED_DIMENSION(pipe->src.w, pipe->horz_deci);
  376. if (pipe->scale.enable_pxl_ext) {
  377. rc = __mdss_mdp_validate_pxl_extn(pipe);
  378. return rc;
  379. }
  380. memset(&pipe->scale, 0, sizeof(struct mdp_scale_data));
  381. rc = mdss_mdp_calc_phase_step(src, pipe->dst.w,
  382. &pipe->scale.phase_step_x[0]);
  383. if (rc == -EOVERFLOW) {
  384. /* overflow on horizontal direction is acceptable */
  385. rc = 0;
  386. } else if (rc) {
  387. pr_err("Horizontal scaling calculation failed=%d! %d->%d\n",
  388. rc, src, pipe->dst.w);
  389. return rc;
  390. }
  391. src = DECIMATED_DIMENSION(pipe->src.h, pipe->vert_deci);
  392. rc = mdss_mdp_calc_phase_step(src, pipe->dst.h,
  393. &pipe->scale.phase_step_y[0]);
  394. if ((rc == -EOVERFLOW) && (pipe->type == MDSS_MDP_PIPE_TYPE_VIG)) {
  395. /* overflow on Qseed2 scaler is acceptable */
  396. rc = 0;
  397. } else if (rc) {
  398. pr_err("Vertical scaling calculation failed=%d! %d->%d\n",
  399. rc, src, pipe->dst.h);
  400. return rc;
  401. }
  402. return rc;
  403. }
  404. static inline void __mdss_mdp_overlay_set_chroma_sample(
  405. struct mdss_mdp_pipe *pipe)
  406. {
  407. pipe->chroma_sample_v = pipe->chroma_sample_h = 0;
  408. switch (pipe->src_fmt->chroma_sample) {
  409. case MDSS_MDP_CHROMA_H1V2:
  410. pipe->chroma_sample_v = 1;
  411. break;
  412. case MDSS_MDP_CHROMA_H2V1:
  413. pipe->chroma_sample_h = 1;
  414. break;
  415. case MDSS_MDP_CHROMA_420:
  416. pipe->chroma_sample_v = 1;
  417. pipe->chroma_sample_h = 1;
  418. break;
  419. }
  420. if (pipe->horz_deci)
  421. pipe->chroma_sample_h = 0;
  422. if (pipe->vert_deci)
  423. pipe->chroma_sample_v = 0;
  424. }
  425. int mdss_mdp_overlay_pipe_setup(struct msm_fb_data_type *mfd,
  426. struct mdp_overlay *req,
  427. struct mdss_mdp_pipe **ppipe)
  428. {
  429. struct mdss_mdp_format_params *fmt;
  430. struct mdss_mdp_pipe *pipe;
  431. struct mdss_mdp_mixer *mixer = NULL;
  432. u32 pipe_type, mixer_mux, len;
  433. struct mdss_overlay_private *mdp5_data = mfd_to_mdp5_data(mfd);
  434. struct mdp_histogram_start_req hist;
  435. int ret;
  436. u32 bwc_enabled;
  437. u32 left_lm_w = left_lm_w_from_mfd(mfd);
  438. if (mdp5_data->ctl == NULL)
  439. return -ENODEV;
  440. if (req->flags & MDP_ROT_90) {
  441. pr_err("unsupported inline rotation\n");
  442. return -EOPNOTSUPP;
  443. }
  444. #if defined(CONFIG_MDSS_UD_FLIP)
  445. if (req->flags & MDP_FLIP_UD)
  446. req->flags &= ~MDP_FLIP_UD;
  447. else
  448. req->flags |= MDP_FLIP_UD;
  449. #endif
  450. if ((req->dst_rect.w > MAX_DST_W) || (req->dst_rect.h > MAX_DST_H)) {
  451. pr_err("exceeded max mixer supported resolution %dx%d\n",
  452. req->dst_rect.w, req->dst_rect.h);
  453. return -EOVERFLOW;
  454. }
  455. if (IS_RIGHT_MIXER_OV(req->flags, req->dst_rect.x, left_lm_w))
  456. mixer_mux = MDSS_MDP_MIXER_MUX_RIGHT;
  457. else
  458. mixer_mux = MDSS_MDP_MIXER_MUX_LEFT;
  459. pr_debug("pipe ctl=%u req id=%x mux=%d\n", mdp5_data->ctl->num, req->id,
  460. mixer_mux);
  461. if (req->flags & (MDP_SOURCE_ROTATED_90 | MDP_BWC_EN))
  462. req->src.format =
  463. mdss_mdp_get_rotator_dst_format(req->src.format, 1);
  464. fmt = mdss_mdp_get_format_params(req->src.format);
  465. if (!fmt) {
  466. pr_err("invalid pipe format %d\n", req->src.format);
  467. return -EINVAL;
  468. }
  469. ret = mdss_mdp_ov_xres_check(mfd, req);
  470. if (ret)
  471. return ret;
  472. ret = mdss_mdp_overlay_req_check(mfd, req, fmt);
  473. if (ret)
  474. return ret;
  475. pipe = mdss_mdp_mixer_stage_pipe(mdp5_data->ctl, mixer_mux,
  476. req->z_order);
  477. if (pipe && pipe->ndx != req->id) {
  478. pr_debug("replacing pnum=%d at stage=%d mux=%d\n",
  479. pipe->num, req->z_order, mixer_mux);
  480. mdss_mdp_mixer_pipe_unstage(pipe);
  481. }
  482. mixer = mdss_mdp_mixer_get(mdp5_data->ctl, mixer_mux);
  483. if (!mixer) {
  484. pr_err("unable to get mixer\n");
  485. return -ENODEV;
  486. }
  487. if (req->id == MSMFB_NEW_REQUEST) {
  488. switch (req->pipe_type) {
  489. case PIPE_TYPE_VIG:
  490. pipe_type = MDSS_MDP_PIPE_TYPE_VIG;
  491. break;
  492. case PIPE_TYPE_RGB:
  493. pipe_type = MDSS_MDP_PIPE_TYPE_RGB;
  494. break;
  495. case PIPE_TYPE_DMA:
  496. pipe_type = MDSS_MDP_PIPE_TYPE_DMA;
  497. break;
  498. case PIPE_TYPE_AUTO:
  499. default:
  500. if (req->flags & MDP_OV_PIPE_FORCE_DMA)
  501. pipe_type = MDSS_MDP_PIPE_TYPE_DMA;
  502. else if (fmt->is_yuv ||
  503. (req->flags & MDP_OV_PIPE_SHARE))
  504. pipe_type = MDSS_MDP_PIPE_TYPE_VIG;
  505. else
  506. pipe_type = MDSS_MDP_PIPE_TYPE_RGB;
  507. break;
  508. }
  509. pipe = mdss_mdp_pipe_alloc(mixer, pipe_type);
  510. /* VIG pipes can also support RGB format */
  511. if ((req->pipe_type == PIPE_TYPE_AUTO) && !pipe &&
  512. (pipe_type == MDSS_MDP_PIPE_TYPE_RGB)) {
  513. pipe_type = MDSS_MDP_PIPE_TYPE_VIG;
  514. pipe = mdss_mdp_pipe_alloc(mixer, pipe_type);
  515. }
  516. if (pipe == NULL) {
  517. pr_err("error allocating pipe\n");
  518. return -ENODEV;
  519. }
  520. ret = mdss_mdp_pipe_map(pipe);
  521. if (ret) {
  522. pr_err("unable to map pipe=%d\n", pipe->num);
  523. return ret;
  524. }
  525. mutex_lock(&mdp5_data->list_lock);
  526. list_add(&pipe->list, &mdp5_data->pipes_used);
  527. mutex_unlock(&mdp5_data->list_lock);
  528. pipe->mixer = mixer;
  529. pipe->mfd = mfd;
  530. pipe->pid = current->tgid;
  531. pipe->play_cnt = 0;
  532. } else {
  533. pipe = mdss_mdp_pipe_get(mdp5_data->mdata, req->id);
  534. if (IS_ERR_OR_NULL(pipe)) {
  535. pr_err("invalid pipe ndx=%x\n", req->id);
  536. return pipe ? PTR_ERR(pipe) : -ENODEV;
  537. }
  538. if (pipe->mixer != mixer) {
  539. if (!mixer->ctl || (mixer->ctl->mfd != mfd)) {
  540. pr_err("Can't switch mixer %d->%d pnum %d!\n",
  541. pipe->mixer->num, mixer->num,
  542. pipe->num);
  543. ret = -EINVAL;
  544. goto exit_fail;
  545. }
  546. pr_debug("switching pipe mixer %d->%d pnum %d\n",
  547. pipe->mixer->num, mixer->num,
  548. pipe->num);
  549. mdss_mdp_mixer_pipe_unstage(pipe);
  550. pipe->mixer = mixer;
  551. }
  552. }
  553. pipe->flags = req->flags;
  554. bwc_enabled = req->flags & MDP_BWC_EN;
  555. if (bwc_enabled && !mdp5_data->mdata->has_bwc) {
  556. pr_err("BWC is not supported in MDP version %x\n",
  557. mdp5_data->mdata->mdp_rev);
  558. pipe->bwc_mode = 0;
  559. } else {
  560. pipe->bwc_mode = pipe->mixer->rotator_mode ?
  561. 0 : (bwc_enabled ? 1 : 0) ;
  562. }
  563. pipe->img_width = req->src.width & 0x3fff;
  564. pipe->img_height = req->src.height & 0x3fff;
  565. pipe->src.x = req->src_rect.x;
  566. pipe->src.y = req->src_rect.y;
  567. pipe->src.w = req->src_rect.w;
  568. pipe->src.h = req->src_rect.h;
  569. pipe->dst.x = req->dst_rect.x;
  570. pipe->dst.y = req->dst_rect.y;
  571. pipe->dst.w = req->dst_rect.w;
  572. pipe->dst.h = req->dst_rect.h;
  573. pipe->horz_deci = req->horz_deci;
  574. pipe->vert_deci = req->vert_deci;
  575. memcpy(&pipe->scale, &req->scale, sizeof(struct mdp_scale_data));
  576. pipe->src_fmt = fmt;
  577. __mdss_mdp_overlay_set_chroma_sample(pipe);
  578. pipe->mixer_stage = req->z_order;
  579. pipe->is_fg = req->is_fg;
  580. pipe->alpha = req->alpha;
  581. pipe->transp = req->transp_mask;
  582. pipe->blend_op = req->blend_op;
  583. if (pipe->blend_op == BLEND_OP_NOT_DEFINED)
  584. pipe->blend_op = fmt->alpha_enable ?
  585. BLEND_OP_PREMULTIPLIED :
  586. BLEND_OP_OPAQUE;
  587. if (!fmt->alpha_enable && (pipe->blend_op != BLEND_OP_OPAQUE))
  588. pr_debug("Unintended blend_op %d on layer with no alpha plane\n",
  589. pipe->blend_op);
  590. if (fmt->is_yuv && !(pipe->flags & MDP_SOURCE_ROTATED_90) &&
  591. !pipe->scale.enable_pxl_ext) {
  592. pipe->overfetch_disable = OVERFETCH_DISABLE_BOTTOM;
  593. if (!(pipe->flags & MDSS_MDP_DUAL_PIPE) ||
  594. IS_RIGHT_MIXER_OV(req->flags,
  595. req->dst_rect.x, left_lm_w))
  596. pipe->overfetch_disable |= OVERFETCH_DISABLE_RIGHT;
  597. pr_debug("overfetch flags=%x\n", pipe->overfetch_disable);
  598. } else {
  599. pipe->overfetch_disable = 0;
  600. }
  601. pipe->bg_color = req->bg_color;
  602. req->id = pipe->ndx;
  603. pipe->req_data = *req;
  604. if (pipe->flags & MDP_OVERLAY_PP_CFG_EN) {
  605. memcpy(&pipe->pp_cfg, &req->overlay_pp_cfg,
  606. sizeof(struct mdp_overlay_pp_params));
  607. len = pipe->pp_cfg.igc_cfg.len;
  608. if ((pipe->pp_cfg.config_ops & MDP_OVERLAY_PP_IGC_CFG) &&
  609. (len == IGC_LUT_ENTRIES)) {
  610. ret = copy_from_user(pipe->pp_res.igc_c0_c1,
  611. pipe->pp_cfg.igc_cfg.c0_c1_data,
  612. sizeof(uint32_t) * len);
  613. if (ret) {
  614. pr_err("pp_cfg1 get from user was NULL \n");
  615. ret = -ENOMEM;
  616. goto exit_fail;
  617. }
  618. ret = copy_from_user(pipe->pp_res.igc_c2,
  619. pipe->pp_cfg.igc_cfg.c2_data,
  620. sizeof(uint32_t) * len);
  621. if (ret) {
  622. pr_err("pp_cfg2 get from user was NULL \n");
  623. ret = -ENOMEM;
  624. goto exit_fail;
  625. }
  626. pipe->pp_cfg.igc_cfg.c0_c1_data =
  627. pipe->pp_res.igc_c0_c1;
  628. pipe->pp_cfg.igc_cfg.c2_data = pipe->pp_res.igc_c2;
  629. }
  630. if (pipe->pp_cfg.config_ops & MDP_OVERLAY_PP_HIST_CFG) {
  631. if (pipe->pp_cfg.hist_cfg.ops & MDP_PP_OPS_ENABLE) {
  632. hist.block = pipe->pp_cfg.hist_cfg.block;
  633. hist.frame_cnt =
  634. pipe->pp_cfg.hist_cfg.frame_cnt;
  635. hist.bit_mask = pipe->pp_cfg.hist_cfg.bit_mask;
  636. hist.num_bins = pipe->pp_cfg.hist_cfg.num_bins;
  637. mdss_mdp_hist_start(&hist);
  638. } else if (pipe->pp_cfg.hist_cfg.ops &
  639. MDP_PP_OPS_DISABLE) {
  640. mdss_mdp_hist_stop(pipe->pp_cfg.hist_cfg.block);
  641. }
  642. }
  643. len = pipe->pp_cfg.hist_lut_cfg.len;
  644. if ((pipe->pp_cfg.config_ops & MDP_OVERLAY_PP_HIST_LUT_CFG) &&
  645. (len == ENHIST_LUT_ENTRIES)) {
  646. ret = copy_from_user(pipe->pp_res.hist_lut,
  647. pipe->pp_cfg.hist_lut_cfg.data,
  648. sizeof(uint32_t) * len);
  649. if (ret) {
  650. pr_err("lut get from user was NULL \n");
  651. ret = -ENOMEM;
  652. goto exit_fail;
  653. }
  654. pipe->pp_cfg.hist_lut_cfg.data = pipe->pp_res.hist_lut;
  655. }
  656. }
  657. /*
  658. * When scaling is enabled src crop and image
  659. * width and height is modified by user
  660. */
  661. if ((pipe->flags & MDP_DEINTERLACE) && !pipe->scale.enable_pxl_ext) {
  662. if (pipe->flags & MDP_SOURCE_ROTATED_90) {
  663. pipe->src.x = DIV_ROUND_UP(pipe->src.x, 2);
  664. pipe->src.x &= ~1;
  665. pipe->src.w /= 2;
  666. pipe->img_width /= 2;
  667. } else {
  668. pipe->src.h /= 2;
  669. pipe->src.y = DIV_ROUND_UP(pipe->src.y, 2);
  670. pipe->src.y &= ~1;
  671. }
  672. }
  673. ret = __mdp_pipe_tune_perf(pipe);
  674. if (ret) {
  675. pr_debug("unable to satisfy performance. ret=%d\n", ret);
  676. goto exit_fail;
  677. }
  678. ret = __mdss_mdp_overlay_setup_scaling(pipe);
  679. if (ret)
  680. goto exit_fail;
  681. if ((mixer->type == MDSS_MDP_MIXER_TYPE_WRITEBACK) &&
  682. !mdp5_data->mdata->has_wfd_blk)
  683. mdss_mdp_smp_release(pipe);
  684. ret = mdss_mdp_smp_reserve(pipe);
  685. if (ret) {
  686. pr_debug("mdss_mdp_smp_reserve failed. ret=%d\n", ret);
  687. goto exit_fail;
  688. }
  689. pipe->params_changed++;
  690. req->vert_deci = pipe->vert_deci;
  691. *ppipe = pipe;
  692. mdss_mdp_pipe_unmap(pipe);
  693. return ret;
  694. exit_fail:
  695. mdss_mdp_pipe_unmap(pipe);
  696. mutex_lock(&mdp5_data->list_lock);
  697. if (pipe->play_cnt == 0) {
  698. pr_debug("failed for pipe %d\n", pipe->num);
  699. if (!list_empty(&pipe->list))
  700. list_del_init(&pipe->list);
  701. mdss_mdp_pipe_destroy(pipe);
  702. }
  703. /* invalidate any overlays in this framebuffer after failure */
  704. list_for_each_entry(pipe, &mdp5_data->pipes_used, list) {
  705. pr_debug("freeing allocations for pipe %d\n", pipe->num);
  706. mdss_mdp_smp_unreserve(pipe);
  707. pipe->params_changed = 0;
  708. }
  709. mutex_unlock(&mdp5_data->list_lock);
  710. return ret;
  711. }
  712. static int mdss_mdp_overlay_set(struct msm_fb_data_type *mfd,
  713. struct mdp_overlay *req)
  714. {
  715. struct mdss_overlay_private *mdp5_data = mfd_to_mdp5_data(mfd);
  716. int ret;
  717. ret = mutex_lock_interruptible(&mdp5_data->ov_lock);
  718. if (ret)
  719. return ret;
  720. if (!mfd->panel_power_on) {
  721. mutex_unlock(&mdp5_data->ov_lock);
  722. return -EPERM;
  723. }
  724. if (req->flags & MDSS_MDP_ROT_ONLY) {
  725. #if defined(CONFIG_MDSS_UD_FLIP)
  726. if (req->flags & MDP_BWC_EN) {
  727. if (req->flags & MDP_FLIP_LR)
  728. req->flags &= ~MDP_FLIP_LR;
  729. else
  730. req->flags |= MDP_FLIP_LR;
  731. }
  732. #endif
  733. ret = mdss_mdp_rotator_setup(mfd, req);
  734. } else if (req->src.format == MDP_RGB_BORDERFILL) {
  735. req->id = BORDERFILL_NDX;
  736. } else {
  737. struct mdss_mdp_pipe *pipe;
  738. /* userspace zorder start with stage 0 */
  739. req->z_order += MDSS_MDP_STAGE_0;
  740. ret = mdss_mdp_overlay_pipe_setup(mfd, req, &pipe);
  741. req->z_order -= MDSS_MDP_STAGE_0;
  742. }
  743. mutex_unlock(&mdp5_data->ov_lock);
  744. return ret;
  745. }
  746. int mdss_mdp_overlay_get_buf(struct msm_fb_data_type *mfd,
  747. struct mdss_mdp_data *data,
  748. struct msmfb_data *planes,
  749. int num_planes,
  750. u32 flags)
  751. {
  752. int i, rc = 0;
  753. if ((num_planes <= 0) || (num_planes > MAX_PLANES))
  754. return -EINVAL;
  755. rc = mdss_iommu_ctrl(1);
  756. if (IS_ERR_VALUE(rc)) {
  757. pr_err("Iommu attach failed");
  758. goto end;
  759. }
  760. memset(data, 0, sizeof(*data));
  761. for (i = 0; i < num_planes; i++) {
  762. data->p[i].flags = flags;
  763. rc = mdss_mdp_get_img(&planes[i], &data->p[i]);
  764. if (rc) {
  765. pr_err("failed to map buf p=%d flags=%x\n", i, flags);
  766. while (i > 0) {
  767. i--;
  768. mdss_mdp_put_img(&data->p[i]);
  769. }
  770. break;
  771. }
  772. }
  773. mdss_iommu_ctrl(0);
  774. data->num_planes = i;
  775. end:
  776. return rc;
  777. }
  778. int mdss_mdp_overlay_free_buf(struct mdss_mdp_data *data)
  779. {
  780. int i, rc;
  781. rc = mdss_iommu_ctrl(1);
  782. if (IS_ERR_VALUE(rc)) {
  783. pr_err("Iommu attach failed");
  784. return rc;
  785. }
  786. for (i = 0; i < data->num_planes && data->p[i].len; i++)
  787. mdss_mdp_put_img(&data->p[i]);
  788. mdss_iommu_ctrl(0);
  789. data->num_planes = 0;
  790. return 0;
  791. }
  792. /**
  793. * __mdss_mdp_overlay_free_list_purge() - clear free list of buffers
  794. * @mfd: Msm frame buffer data structure for the associated fb
  795. *
  796. * Frees memory and clears current list of buffers which are pending free
  797. */
  798. static void __mdss_mdp_overlay_free_list_purge(struct msm_fb_data_type *mfd)
  799. {
  800. struct mdss_overlay_private *mdp5_data = mfd_to_mdp5_data(mfd);
  801. int i;
  802. mutex_lock(&free_list_purge_mutex);
  803. pr_debug("purging fb%d free list\n", mfd->index);
  804. for (i = 0; i < mdp5_data->free_list_size; i++)
  805. mdss_mdp_overlay_free_buf(&mdp5_data->free_list[i]);
  806. mdp5_data->free_list_size = 0;
  807. mutex_unlock(&free_list_purge_mutex);
  808. }
  809. /**
  810. * __mdss_mdp_overlay_free_list_add() - add a buffer to free list
  811. * @mfd: Msm frame buffer data structure for the associated fb
  812. */
  813. static void __mdss_mdp_overlay_free_list_add(struct msm_fb_data_type *mfd,
  814. struct mdss_mdp_data *buf)
  815. {
  816. struct mdss_overlay_private *mdp5_data = mfd_to_mdp5_data(mfd);
  817. int i;
  818. /* if holding too many buffers free current list */
  819. if (mdp5_data->free_list_size >= MAX_FREE_LIST_SIZE) {
  820. pr_warn("max free list size for fb%d, purging\n", mfd->index);
  821. __mdss_mdp_overlay_free_list_purge(mfd);
  822. }
  823. BUG_ON(mdp5_data->free_list_size >= MAX_FREE_LIST_SIZE);
  824. i = mdp5_data->free_list_size++;
  825. mdp5_data->free_list[i] = *buf;
  826. memset(buf, 0, sizeof(*buf));
  827. }
  828. /**
  829. * mdss_mdp_overlay_cleanup() - handles cleanup after frame commit
  830. * @mfd: Msm frame buffer data structure for the associated fb
  831. * @destroy_pipes: list of pipes that should be destroyed as part of cleanup
  832. *
  833. * Goes through destroy_pipes list and ensures they are ready to be destroyed
  834. * and cleaned up. Also cleanup of any pipe buffers after flip.
  835. */
  836. static void mdss_mdp_overlay_cleanup(struct msm_fb_data_type *mfd,
  837. struct list_head *destroy_pipes)
  838. {
  839. struct mdss_mdp_pipe *pipe, *tmp;
  840. struct mdss_overlay_private *mdp5_data = mfd_to_mdp5_data(mfd);
  841. struct mdss_mdp_ctl *ctl = mfd_to_ctl(mfd);
  842. bool recovery_mode = false;
  843. mutex_lock(&mdp5_data->list_lock);
  844. list_for_each_entry(pipe, destroy_pipes, list) {
  845. /* make sure pipe fetch has been halted before freeing buffer */
  846. if (mdss_mdp_pipe_fetch_halt(pipe)) {
  847. /*
  848. * if pipe is not able to halt. Enter recovery mode,
  849. * by un-staging any pipes that are attached to mixer
  850. * so that any freed pipes that are not able to halt
  851. * can be staged in solid fill mode and be reset
  852. * with next vsync
  853. */
  854. if (!recovery_mode) {
  855. recovery_mode = true;
  856. mdss_mdp_mixer_unstage_all(ctl->mixer_left);
  857. mdss_mdp_mixer_unstage_all(ctl->mixer_right);
  858. }
  859. pipe->params_changed++;
  860. mdss_mdp_pipe_queue_data(pipe, NULL);
  861. }
  862. }
  863. if (recovery_mode) {
  864. pr_warn("performing recovery sequence for fb%d\n", mfd->index);
  865. __overlay_kickoff_requeue(mfd);
  866. }
  867. __mdss_mdp_overlay_free_list_purge(mfd);
  868. list_for_each_entry(pipe, &mdp5_data->pipes_used, list) {
  869. if (pipe->back_buf.num_planes) {
  870. /* make back buffer active */
  871. __mdss_mdp_overlay_free_list_add(mfd, &pipe->front_buf);
  872. swap(pipe->back_buf, pipe->front_buf);
  873. }
  874. }
  875. list_for_each_entry_safe(pipe, tmp, destroy_pipes, list) {
  876. /*
  877. * in case of secure UI, the buffer needs to be released as
  878. * soon as session is closed.
  879. */
  880. if (pipe->flags & MDP_SECURE_DISPLAY_OVERLAY_SESSION)
  881. mdss_mdp_overlay_free_buf(&pipe->front_buf);
  882. else
  883. __mdss_mdp_overlay_free_list_add(mfd, &pipe->front_buf);
  884. mdss_mdp_overlay_free_buf(&pipe->back_buf);
  885. list_del_init(&pipe->list);
  886. mdss_mdp_pipe_destroy(pipe);
  887. }
  888. mutex_unlock(&mdp5_data->list_lock);
  889. }
  890. void mdss_mdp_handoff_cleanup_pipes(struct msm_fb_data_type *mfd,
  891. u32 type)
  892. {
  893. u32 i, npipes;
  894. struct mdss_mdp_pipe *pipes;
  895. struct mdss_mdp_pipe *pipe;
  896. struct mdss_overlay_private *mdp5_data = mfd_to_mdp5_data(mfd);
  897. struct mdss_data_type *mdata = mfd_to_mdata(mfd);
  898. switch (type) {
  899. case MDSS_MDP_PIPE_TYPE_VIG:
  900. pipes = mdata->vig_pipes;
  901. npipes = mdata->nvig_pipes;
  902. break;
  903. case MDSS_MDP_PIPE_TYPE_RGB:
  904. pipes = mdata->rgb_pipes;
  905. npipes = mdata->nrgb_pipes;
  906. break;
  907. case MDSS_MDP_PIPE_TYPE_DMA:
  908. pipes = mdata->dma_pipes;
  909. npipes = mdata->ndma_pipes;
  910. break;
  911. default:
  912. return;
  913. }
  914. for (i = 0; i < npipes; i++) {
  915. pipe = &pipes[i];
  916. if (pipe->is_handed_off) {
  917. pr_debug("Unmapping handed off pipe %d\n", pipe->num);
  918. list_add(&pipe->list, &mdp5_data->pipes_cleanup);
  919. mdss_mdp_mixer_pipe_unstage(pipe);
  920. pipe->is_handed_off = false;
  921. }
  922. }
  923. }
  924. /**
  925. * mdss_mdp_overlay_start() - Programs the MDP control data path to hardware
  926. * @mfd: Msm frame buffer structure associated with fb device.
  927. *
  928. * Program the MDP hardware with the control settings for the framebuffer
  929. * device. In addition to this, this function also handles the transition
  930. * from the the splash screen to the android boot animation when the
  931. * continuous splash screen feature is enabled.
  932. */
  933. int mdss_mdp_overlay_start(struct msm_fb_data_type *mfd)
  934. {
  935. int rc;
  936. struct mdss_overlay_private *mdp5_data = mfd_to_mdp5_data(mfd);
  937. struct mdss_mdp_ctl *ctl = mdp5_data->ctl;
  938. if (!ctl) {
  939. pr_err("%s unable to access ctrl\n", __func__);
  940. return -ENODEV;
  941. }
  942. if (ctl->power_on) {
  943. if (mdp5_data->mdata->idle_pc) {
  944. rc = mdss_mdp_footswitch_ctrl_idle_pc(1,
  945. &mfd->pdev->dev);
  946. if (rc) {
  947. pr_err("footswtich control power on failed rc=%d\n",
  948. rc);
  949. goto end;
  950. }
  951. mdss_mdp_ctl_restore(ctl);
  952. }
  953. if (!mdp5_data->mdata->batfet)
  954. mdss_mdp_batfet_ctrl(mdp5_data->mdata, true);
  955. mdss_mdp_release_splash_pipe(mfd);
  956. return 0;
  957. }
  958. pr_debug("starting fb%d overlay\n", mfd->index);
  959. rc = pm_runtime_get_sync(&mfd->pdev->dev);
  960. if (IS_ERR_VALUE(rc)) {
  961. pr_err("unable to resume with pm_runtime_get_sync rc=%d\n", rc);
  962. goto end;
  963. }
  964. /*
  965. * We need to do hw init before any hw programming.
  966. * Also, hw init involves programming the VBIF registers which
  967. * should be done only after attaching IOMMU which in turn would call
  968. * in to TZ to restore security configs on the VBIF registers.
  969. * This is not needed when continuous splash screen is enabled since
  970. * we would have called in to TZ to restore security configs from LK.
  971. */
  972. if (!is_mdss_iommu_attached()) {
  973. if (!mfd->panel_info->cont_splash_enabled) {
  974. rc = mdss_iommu_ctrl(1);
  975. if (IS_ERR_VALUE(rc)) {
  976. pr_err("iommu attach failed rc=%d\n", rc);
  977. goto pm_error;
  978. }
  979. mdss_hw_init(mdss_res);
  980. mdss_iommu_ctrl(0);
  981. }
  982. }
  983. rc = mdss_mdp_ctl_start(ctl, false);
  984. if (rc == 0) {
  985. atomic_inc(&ov_active_panels);
  986. mdss_mdp_ctl_notifier_register(mdp5_data->ctl,
  987. &mfd->mdp_sync_pt_data.notifier);
  988. } else {
  989. pr_err("mdp ctl start failed.\n");
  990. goto ctl_error;
  991. }
  992. rc = mdss_mdp_splash_cleanup(mfd, true);
  993. if (!rc)
  994. goto end;
  995. ctl_error:
  996. mdss_mdp_ctl_destroy(ctl);
  997. mdp5_data->ctl = NULL;
  998. pm_error:
  999. pm_runtime_put(&mfd->pdev->dev);
  1000. end:
  1001. return rc;
  1002. }
  1003. static void mdss_mdp_overlay_update_pm(struct mdss_overlay_private *mdp5_data)
  1004. {
  1005. ktime_t wakeup_time;
  1006. if (!mdp5_data->cpu_pm_hdl)
  1007. return;
  1008. if (mdss_mdp_display_wakeup_time(mdp5_data->ctl, &wakeup_time))
  1009. return;
  1010. activate_event_timer(mdp5_data->cpu_pm_hdl, wakeup_time);
  1011. }
  1012. static int __overlay_queue_pipes(struct msm_fb_data_type *mfd)
  1013. {
  1014. struct mdss_overlay_private *mdp5_data = mfd_to_mdp5_data(mfd);
  1015. struct mdss_mdp_pipe *pipe;
  1016. struct mdss_mdp_ctl *ctl = mfd_to_ctl(mfd);
  1017. struct mdss_mdp_ctl *tmp;
  1018. int ret = 0;
  1019. /*
  1020. * Setup pipe in solid fill before unstaging,
  1021. * to ensure no fetches are happening after dettach or reattach.
  1022. */
  1023. list_for_each_entry(pipe, &mdp5_data->pipes_cleanup, list) {
  1024. mdss_mdp_pipe_queue_data(pipe, NULL);
  1025. mdss_mdp_mixer_pipe_unstage(pipe);
  1026. }
  1027. list_for_each_entry(pipe, &mdp5_data->pipes_used, list) {
  1028. struct mdss_mdp_data *buf;
  1029. /*
  1030. * When secure display is enabled, if there is a non secure
  1031. * display pipe, skip that
  1032. */
  1033. if (mdss_get_sd_client_cnt() &&
  1034. !(pipe->flags & MDP_SECURE_DISPLAY_OVERLAY_SESSION)) {
  1035. pr_warn("Non secure pipe during secure display: %u: %08X, skip\n",
  1036. pipe->num, pipe->flags);
  1037. continue;
  1038. }
  1039. /*
  1040. * When external is connected and no dedicated wfd is present,
  1041. * reprogram DMA pipe before kickoff to clear out any previous
  1042. * block mode configuration.
  1043. */
  1044. if ((pipe->type == MDSS_MDP_PIPE_TYPE_DMA) &&
  1045. (ctl->shared_lock && !ctl->mdata->has_wfd_blk)) {
  1046. if (ctl->mdata->mixer_switched) {
  1047. ret = mdss_mdp_overlay_pipe_setup(mfd,
  1048. &pipe->req_data, &pipe);
  1049. pr_debug("reseting DMA pipe for ctl=%d",
  1050. ctl->num);
  1051. }
  1052. if (ret) {
  1053. pr_err("can't reset DMA pipe ret=%d ctl=%d\n",
  1054. ret, ctl->num);
  1055. return ret;
  1056. }
  1057. tmp = mdss_mdp_ctl_mixer_switch(ctl,
  1058. MDSS_MDP_WB_CTL_TYPE_LINE);
  1059. if (!tmp)
  1060. return -EINVAL;
  1061. pipe->mixer = mdss_mdp_mixer_get(tmp,
  1062. MDSS_MDP_MIXER_MUX_DEFAULT);
  1063. }
  1064. /* ensure pipes are always reconfigured after power off/on */
  1065. if (ctl->play_cnt == 0)
  1066. pipe->params_changed++;
  1067. if (pipe->back_buf.num_planes) {
  1068. buf = &pipe->back_buf;
  1069. } else if (!pipe->params_changed) {
  1070. continue;
  1071. } else if (pipe->front_buf.num_planes) {
  1072. buf = &pipe->front_buf;
  1073. } else {
  1074. pr_debug("no buf detected pnum=%d use solid fill\n",
  1075. pipe->num);
  1076. buf = NULL;
  1077. }
  1078. ret = mdss_mdp_pipe_queue_data(pipe, buf);
  1079. if (IS_ERR_VALUE(ret)) {
  1080. pr_warn("Unable to queue data for pnum=%d\n",
  1081. pipe->num);
  1082. mdss_mdp_mixer_pipe_unstage(pipe);
  1083. }
  1084. }
  1085. return 0;
  1086. }
  1087. static void __overlay_kickoff_requeue(struct msm_fb_data_type *mfd)
  1088. {
  1089. struct mdss_mdp_ctl *ctl = mfd_to_ctl(mfd);
  1090. mdss_mdp_display_commit(ctl, NULL);
  1091. mdss_mdp_display_wait4comp(ctl);
  1092. ATRACE_BEGIN("sspp_programming");
  1093. __overlay_queue_pipes(mfd);
  1094. ATRACE_END("sspp_programming");
  1095. mdss_mdp_display_commit(ctl, NULL);
  1096. mdss_mdp_display_wait4comp(ctl);
  1097. }
  1098. #if defined(CONFIG_MDNIE_LITE_TUNING)
  1099. #if defined(CONFIG_FB_MSM_MIPI_SAMSUNG_OCTA_CMD_FULL_HD_PT_PANEL)
  1100. static bool mdss_first_init = true;
  1101. #endif
  1102. #endif
  1103. #if defined(CONFIG_FB_MSM_MIPI_SAMSUNG_OCTA_CMD_WQHD_PT_PANEL)
  1104. int get_lcd_ldi_info(void);
  1105. #endif
  1106. int mdss_mdp_overlay_kickoff(struct msm_fb_data_type *mfd,
  1107. struct mdp_display_commit *data)
  1108. {
  1109. struct mdss_overlay_private *mdp5_data = mfd_to_mdp5_data(mfd);
  1110. struct mdss_mdp_pipe *pipe, *tmp;
  1111. struct mdss_mdp_ctl *ctl = mfd_to_ctl(mfd);
  1112. int ret = 0;
  1113. int sd_in_pipe = 0;
  1114. bool need_cleanup = false;
  1115. LIST_HEAD(destroy_pipes);
  1116. #if defined(CONFIG_FB_MSM_MIPI_SAMSUNG_OCTA_CMD_WQHD_PT_PANEL)
  1117. int te_ret = 0;
  1118. #endif
  1119. ATRACE_BEGIN(__func__);
  1120. if (ctl->shared_lock) {
  1121. mdss_mdp_ctl_notify(ctl, MDP_NOTIFY_FRAME_BEGIN);
  1122. mdss_mdp_ctl_notify(ctl, MDP_NOTIFY_FRAME_READY);
  1123. mutex_lock(ctl->shared_lock);
  1124. mutex_lock(ctl->wb_lock);
  1125. }
  1126. mutex_lock(&mdp5_data->ov_lock);
  1127. ctl->bw_pending = 0;
  1128. if (mfd->panel_info->type == DTV_PANEL) {
  1129. ret = mdss_mdp_overlay_start(mfd);
  1130. if (ret) {
  1131. pr_err("unable to start overlay %d (%d)\n",
  1132. mfd->index, ret);
  1133. mutex_unlock(&mdp5_data->ov_lock);
  1134. if (ctl->shared_lock)
  1135. mutex_unlock(ctl->shared_lock);
  1136. return ret;
  1137. }
  1138. }
  1139. mutex_lock(&mdp5_data->list_lock);
  1140. /*
  1141. * check if there is a secure display session
  1142. */
  1143. list_for_each_entry(pipe, &mdp5_data->pipes_used, list) {
  1144. if (pipe->flags & MDP_SECURE_DISPLAY_OVERLAY_SESSION) {
  1145. sd_in_pipe = 1;
  1146. pr_debug("Secure pipe: %u : %08X\n",
  1147. pipe->num, pipe->flags);
  1148. }
  1149. }
  1150. /*
  1151. * If there is no secure display session and sd_enabled, disable the
  1152. * secure display session
  1153. */
  1154. if (!sd_in_pipe && mdp5_data->sd_enabled) {
  1155. /* disable the secure display on last client */
  1156. if (mdss_get_sd_client_cnt() == 1)
  1157. ret = mdss_mdp_secure_display_ctrl(0);
  1158. if (!ret) {
  1159. mdss_update_sd_client(mdp5_data->mdata, false);
  1160. mdp5_data->sd_enabled = 0;
  1161. }
  1162. }
  1163. if (!ctl->shared_lock)
  1164. mdss_mdp_ctl_notify(ctl, MDP_NOTIFY_FRAME_BEGIN);
  1165. mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_ON, false);
  1166. if (data)
  1167. mdss_mdp_set_roi(ctl, data);
  1168. /*
  1169. * Setup pipe in solid fill before unstaging,
  1170. * to ensure no fetches are happening after dettach or reattach.
  1171. */
  1172. list_for_each_entry_safe(pipe, tmp, &mdp5_data->pipes_cleanup, list) {
  1173. mdss_mdp_pipe_queue_data(pipe, NULL);
  1174. mdss_mdp_mixer_pipe_unstage(pipe);
  1175. list_move(&pipe->list, &destroy_pipes);
  1176. need_cleanup = true;
  1177. }
  1178. ATRACE_BEGIN("sspp_programming");
  1179. ret = __overlay_queue_pipes(mfd);
  1180. ATRACE_END("sspp_programming");
  1181. mutex_unlock(&mdp5_data->list_lock);
  1182. if (mfd->panel.type == WRITEBACK_PANEL) {
  1183. ATRACE_BEGIN("wb_kickoff");
  1184. ret = mdss_mdp_wb_kickoff(mfd);
  1185. ATRACE_END("wb_kickoff");
  1186. } else {
  1187. ret = mdss_mdp_display_commit(mdp5_data->ctl, NULL);
  1188. }
  1189. if (!need_cleanup) {
  1190. atomic_set(&mfd->kickoff_pending, 0);
  1191. wake_up_all(&mfd->kickoff_wait_q);
  1192. }
  1193. if (IS_ERR_VALUE(ret))
  1194. goto commit_fail;
  1195. mutex_unlock(&mdp5_data->ov_lock);
  1196. mdss_mdp_overlay_update_pm(mdp5_data);
  1197. ATRACE_BEGIN("display_wait4comp");
  1198. ret = mdss_mdp_display_wait4comp(mdp5_data->ctl);
  1199. ATRACE_END("display_wait4comp");
  1200. mutex_lock(&mdp5_data->ov_lock);
  1201. if (ret == 0) {
  1202. if (!mdp5_data->sd_enabled && sd_in_pipe) {
  1203. if (!mdss_get_sd_client_cnt())
  1204. ret = mdss_mdp_secure_display_ctrl(1);
  1205. if (!ret) {
  1206. mdp5_data->sd_enabled = 1;
  1207. mdss_update_sd_client(mdp5_data->mdata, true);
  1208. }
  1209. }
  1210. }
  1211. mdss_fb_update_notify_update(mfd);
  1212. #if defined(CONFIG_MDNIE_LITE_TUNING)
  1213. #if defined(CONFIG_FB_MSM_MIPI_SAMSUNG_OCTA_CMD_FULL_HD_PT_PANEL) \
  1214. || defined(CONFIG_FB_MSM_MIPI_SAMSUNG_YOUM_CMD_FULL_HD_PT_PANEL)
  1215. if(mdss_first_init)
  1216. {
  1217. mdss_mdp_ctl_intf_event(mdp5_data->ctl, MDSS_EVENT_MDNIE_DEFAULT_UPDATE, NULL);
  1218. mdss_first_init = false;
  1219. }
  1220. #endif
  1221. #endif
  1222. #if defined(CONFIG_FB_MSM_MIPI_SAMSUNG_OCTA_CMD_WQHD_PT_PANEL)
  1223. if (get_lcd_ldi_info()) {
  1224. te_ret = mdss_mdp_ctl_intf_event(mdp5_data->ctl, MDSS_EVENT_TE_UPDATE, NULL);
  1225. if (te_ret < 0) {
  1226. mdss_mdp_ctl_intf_event(mdp5_data->ctl, MDSS_EVENT_TE_RESTORE, NULL);
  1227. }
  1228. }
  1229. #endif
  1230. #if defined(CONFIG_FB_MSM_MIPI_SAMSUNG_OCTA_CMD_FULL_HD_PT_PANEL) || defined (CONFIG_FB_MSM_MIPI_SAMSUNG_OCTA_CMD_WQHD_PT_PANEL)\
  1231. || defined(CONFIG_FB_MSM_MIPI_SAMSUNG_YOUM_CMD_FULL_HD_PT_PANEL) || defined(CONFIG_FB_MSM_MIPI_JDI_TFT_VIDEO_FULL_HD_PT_PANEL)\
  1232. || defined (CONFIG_FB_MSM_MIPI_MAGNA_OCTA_CMD_HD_PT_PANEL) \
  1233. || defined (CONFIG_FB_MSM_MIPI_SAMSUNG_OCTA_CMD_WQXGA_S6TNMR7_PT_PANEL) \
  1234. || defined (CONFIG_FB_MSM_MIPI_SAMSUNG_OCTA_CMD_WQXGA_S6E3HA1_PT_PANEL)
  1235. mdss_mdp_ctl_intf_event(mdp5_data->ctl, MDSS_EVENT_FRAME_UPDATE, NULL);
  1236. #endif
  1237. #if defined(CONFIG_FB_MSM_MDSS_SDC_WXGA_PANEL)
  1238. mdss_mdp_ctl_intf_event(mdp5_data->ctl, MDSS_EVENT_BACKLIGHT_LATE_ON, NULL);
  1239. #endif
  1240. commit_fail:
  1241. ATRACE_BEGIN("overlay_cleanup");
  1242. mdss_mdp_overlay_cleanup(mfd, &destroy_pipes);
  1243. ATRACE_END("overlay_cleanup");
  1244. mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_OFF, false);
  1245. mdss_mdp_ctl_notify(ctl, MDP_NOTIFY_FRAME_FLUSHED);
  1246. if (need_cleanup) {
  1247. atomic_set(&mfd->kickoff_pending, 0);
  1248. wake_up_all(&mfd->kickoff_wait_q);
  1249. }
  1250. mutex_unlock(&mdp5_data->ov_lock);
  1251. if (ctl->shared_lock) {
  1252. mutex_unlock(ctl->wb_lock);
  1253. mutex_unlock(ctl->shared_lock);
  1254. }
  1255. ATRACE_END(__func__);
  1256. return ret;
  1257. }
  1258. int mdss_mdp_overlay_release(struct msm_fb_data_type *mfd, int ndx)
  1259. {
  1260. struct mdss_mdp_pipe *pipe, *tmp;
  1261. struct mdss_overlay_private *mdp5_data = mfd_to_mdp5_data(mfd);
  1262. u32 unset_ndx = 0;
  1263. int destroy_pipe;
  1264. mutex_lock(&mdp5_data->list_lock);
  1265. list_for_each_entry_safe(pipe, tmp, &mdp5_data->pipes_used, list) {
  1266. if (pipe->ndx & ndx) {
  1267. if (mdss_mdp_pipe_map(pipe)) {
  1268. pr_err("Unable to map used pipe%d ndx=%x\n",
  1269. pipe->num, pipe->ndx);
  1270. continue;
  1271. }
  1272. unset_ndx |= pipe->ndx;
  1273. pipe->pid = 0;
  1274. destroy_pipe = pipe->play_cnt == 0;
  1275. if (destroy_pipe)
  1276. list_del_init(&pipe->list);
  1277. else
  1278. list_move(&pipe->list,
  1279. &mdp5_data->pipes_cleanup);
  1280. mdss_mdp_pipe_unmap(pipe);
  1281. if (destroy_pipe)
  1282. mdss_mdp_pipe_destroy(pipe);
  1283. if (unset_ndx == ndx)
  1284. break;
  1285. }
  1286. }
  1287. mutex_unlock(&mdp5_data->list_lock);
  1288. if (unset_ndx != ndx) {
  1289. pr_warn("Unable to unset pipe(s) ndx=0x%x unset=0x%x\n",
  1290. ndx, unset_ndx);
  1291. return -ENOENT;
  1292. }
  1293. return 0;
  1294. }
  1295. static int mdss_mdp_overlay_unset(struct msm_fb_data_type *mfd, int ndx)
  1296. {
  1297. int ret = 0;
  1298. struct mdss_overlay_private *mdp5_data;
  1299. if (!mfd)
  1300. return -ENODEV;
  1301. mdp5_data = mfd_to_mdp5_data(mfd);
  1302. if (!mdp5_data || !mdp5_data->ctl)
  1303. return -ENODEV;
  1304. ret = mutex_lock_interruptible(&mdp5_data->ov_lock);
  1305. if (ret)
  1306. return ret;
  1307. if (ndx == BORDERFILL_NDX) {
  1308. pr_debug("borderfill disable\n");
  1309. mdp5_data->borderfill_enable = false;
  1310. ret = 0;
  1311. goto done;
  1312. }
  1313. #if defined(CONFIG_FB_MSM_MDSS_S6E8AA0A_HD_PANEL)
  1314. if(lcd_connected_status == 1){
  1315. if (!mfd->panel_power_on && !err_fg_working) {
  1316. ret = -EPERM;
  1317. goto done;
  1318. }
  1319. }
  1320. #else
  1321. if (!mfd->panel_power_on) {
  1322. ret = -EPERM;
  1323. goto done;
  1324. }
  1325. #endif
  1326. pr_debug("unset ndx=%x\n", ndx);
  1327. if (ndx & MDSS_MDP_ROT_SESSION_MASK) {
  1328. ret = mdss_mdp_rotator_unset(ndx);
  1329. } else {
  1330. ret = mdss_mdp_overlay_release(mfd, ndx);
  1331. }
  1332. done:
  1333. mutex_unlock(&mdp5_data->ov_lock);
  1334. return ret;
  1335. }
  1336. /**
  1337. * mdss_mdp_overlay_release_all() - release any overlays associated with fb dev
  1338. * @mfd: Msm frame buffer structure associated with fb device
  1339. * @release_all: ignore pid and release all the pipes
  1340. *
  1341. * Release any resources allocated by calling process, this can be called
  1342. * on fb_release to release any overlays/rotator sessions left open.
  1343. */
  1344. static int __mdss_mdp_overlay_release_all(struct msm_fb_data_type *mfd,
  1345. bool release_all)
  1346. {
  1347. struct mdss_mdp_pipe *pipe;
  1348. struct mdss_mdp_rotator_session *rot, *tmp;
  1349. struct mdss_overlay_private *mdp5_data = mfd_to_mdp5_data(mfd);
  1350. u32 unset_ndx = 0;
  1351. int cnt = 0;
  1352. int pid = current->tgid;
  1353. pr_debug("releasing all resources for fb%d pid=%d\n", mfd->index, pid);
  1354. mutex_lock(&mdp5_data->ov_lock);
  1355. mutex_lock(&mdp5_data->list_lock);
  1356. list_for_each_entry(pipe, &mdp5_data->pipes_used, list) {
  1357. if (release_all || (pipe->pid == pid)) {
  1358. unset_ndx |= pipe->ndx;
  1359. cnt++;
  1360. }
  1361. }
  1362. if (!mfd->ref_cnt && !list_empty(&mdp5_data->pipes_cleanup)) {
  1363. pr_debug("fb%d:: free pipes present in cleanup list",
  1364. mfd->index);
  1365. cnt++;
  1366. }
  1367. pr_debug("release_all=%d mfd->ref_cnt=%d unset_ndx=0x%x cnt=%d\n",
  1368. release_all, mfd->ref_cnt, unset_ndx, cnt);
  1369. mutex_unlock(&mdp5_data->list_lock);
  1370. if (unset_ndx) {
  1371. pr_debug("%d pipes need cleanup (%x)\n", cnt, unset_ndx);
  1372. mdss_mdp_overlay_release(mfd, unset_ndx);
  1373. }
  1374. mutex_unlock(&mdp5_data->ov_lock);
  1375. if (cnt)
  1376. mfd->mdp.kickoff_fnc(mfd, NULL);
  1377. list_for_each_entry_safe(rot, tmp, &mdp5_data->rot_proc_list, list) {
  1378. if (rot->pid == pid) {
  1379. if (!list_empty(&rot->list))
  1380. list_del_init(&rot->list);
  1381. mdss_mdp_rotator_release(rot);
  1382. }
  1383. }
  1384. return 0;
  1385. }
  1386. static int mdss_mdp_overlay_play_wait(struct msm_fb_data_type *mfd,
  1387. struct msmfb_overlay_data *req)
  1388. {
  1389. int ret = 0;
  1390. if (!mfd)
  1391. return -ENODEV;
  1392. ret = mfd->mdp.kickoff_fnc(mfd, NULL);
  1393. if (!ret)
  1394. pr_err("error displaying\n");
  1395. return ret;
  1396. }
  1397. static int mdss_mdp_overlay_queue(struct msm_fb_data_type *mfd,
  1398. struct msmfb_overlay_data *req)
  1399. {
  1400. struct mdss_mdp_pipe *pipe;
  1401. struct mdss_mdp_data *src_data;
  1402. int ret;
  1403. u32 flags;
  1404. struct mdss_data_type *mdata = mfd_to_mdata(mfd);
  1405. pipe = mdss_mdp_pipe_get(mdata, req->id);
  1406. if (IS_ERR_OR_NULL(pipe)) {
  1407. pr_err("pipe ndx=%x doesn't exist\n", req->id);
  1408. return pipe ? PTR_ERR(pipe) : -ENODEV;
  1409. }
  1410. pr_debug("ov queue pnum=%d\n", pipe->num);
  1411. if (pipe->flags & MDP_SOLID_FILL)
  1412. pr_warn("Unexpected buffer queue to a solid fill pipe\n");
  1413. flags = (pipe->flags & MDP_SECURE_OVERLAY_SESSION);
  1414. flags |= (pipe->flags & MDP_SECURE_DISPLAY_OVERLAY_SESSION);
  1415. src_data = &pipe->back_buf;
  1416. if (src_data->num_planes) {
  1417. pr_warn("dropped buffer pnum=%d play=%d addr=0x%x\n",
  1418. pipe->num, pipe->play_cnt, src_data->p[0].addr);
  1419. mdss_mdp_overlay_free_buf(src_data);
  1420. }
  1421. ret = mdss_mdp_overlay_get_buf(mfd, src_data, &req->data, 1, flags);
  1422. if (IS_ERR_VALUE(ret)) {
  1423. pr_err("src_data pmem error\n");
  1424. }
  1425. mdss_mdp_pipe_unmap(pipe);
  1426. return ret;
  1427. }
  1428. static int mdss_mdp_overlay_play(struct msm_fb_data_type *mfd,
  1429. struct msmfb_overlay_data *req)
  1430. {
  1431. struct mdss_overlay_private *mdp5_data = mfd_to_mdp5_data(mfd);
  1432. int ret = 0;
  1433. pr_debug("play req id=%x\n", req->id);
  1434. ret = mutex_lock_interruptible(&mdp5_data->ov_lock);
  1435. if (ret)
  1436. return ret;
  1437. if (!mfd->panel_power_on) {
  1438. ret = -EPERM;
  1439. goto done;
  1440. }
  1441. ret = mdss_mdp_overlay_start(mfd);
  1442. if (ret) {
  1443. pr_err("unable to start overlay %d (%d)\n", mfd->index, ret);
  1444. goto done;
  1445. }
  1446. if (req->id & MDSS_MDP_ROT_SESSION_MASK) {
  1447. ret = mdss_mdp_rotator_play(mfd, req);
  1448. } else if (req->id == BORDERFILL_NDX) {
  1449. pr_debug("borderfill enable\n");
  1450. mdp5_data->borderfill_enable = true;
  1451. ret = mdss_mdp_overlay_free_fb_pipe(mfd);
  1452. } else {
  1453. ret = mdss_mdp_overlay_queue(mfd, req);
  1454. }
  1455. done:
  1456. mutex_unlock(&mdp5_data->ov_lock);
  1457. return ret;
  1458. }
  1459. static int mdss_mdp_overlay_free_fb_pipe(struct msm_fb_data_type *mfd)
  1460. {
  1461. struct mdss_mdp_pipe *pipe;
  1462. u32 fb_ndx = 0;
  1463. struct mdss_overlay_private *mdp5_data = mfd_to_mdp5_data(mfd);
  1464. pipe = mdss_mdp_mixer_stage_pipe(mdp5_data->ctl,
  1465. MDSS_MDP_MIXER_MUX_LEFT,
  1466. MDSS_MDP_STAGE_BASE);
  1467. if (pipe)
  1468. fb_ndx |= pipe->ndx;
  1469. pipe = mdss_mdp_mixer_stage_pipe(mdp5_data->ctl,
  1470. MDSS_MDP_MIXER_MUX_RIGHT,
  1471. MDSS_MDP_STAGE_BASE);
  1472. if (pipe)
  1473. fb_ndx |= pipe->ndx;
  1474. if (fb_ndx) {
  1475. pr_debug("unstaging framebuffer pipes %x\n", fb_ndx);
  1476. mdss_mdp_overlay_release(mfd, fb_ndx);
  1477. }
  1478. return 0;
  1479. }
  1480. static int mdss_mdp_overlay_get_fb_pipe(struct msm_fb_data_type *mfd,
  1481. struct mdss_mdp_pipe **ppipe,
  1482. int mixer_mux)
  1483. {
  1484. struct mdss_overlay_private *mdp5_data = mfd_to_mdp5_data(mfd);
  1485. struct mdss_mdp_pipe *pipe;
  1486. int ret;
  1487. pipe = mdss_mdp_mixer_stage_pipe(mdp5_data->ctl, mixer_mux,
  1488. MDSS_MDP_STAGE_BASE);
  1489. if (pipe == NULL) {
  1490. struct mdp_overlay req;
  1491. struct fb_info *fbi = mfd->fbi;
  1492. struct mdss_mdp_mixer *mixer;
  1493. int bpp;
  1494. mixer = mdss_mdp_mixer_get(mdp5_data->ctl,
  1495. MDSS_MDP_MIXER_MUX_LEFT);
  1496. if (!mixer) {
  1497. pr_err("unable to retrieve mixer\n");
  1498. return -ENODEV;
  1499. }
  1500. memset(&req, 0, sizeof(req));
  1501. bpp = fbi->var.bits_per_pixel / 8;
  1502. req.id = MSMFB_NEW_REQUEST;
  1503. req.src.format = mfd->fb_imgType;
  1504. req.src.height = fbi->var.yres;
  1505. req.src.width = fbi->fix.line_length / bpp;
  1506. if (mixer_mux == MDSS_MDP_MIXER_MUX_RIGHT) {
  1507. if (req.src.width <= mixer->width) {
  1508. pr_warn("right fb pipe not needed\n");
  1509. return -EINVAL;
  1510. }
  1511. req.flags = req.flags | MDSS_MDP_RIGHT_MIXER;
  1512. req.src_rect.x = mixer->width;
  1513. req.src_rect.w = fbi->var.xres - mixer->width;
  1514. } else {
  1515. req.src_rect.x = 0;
  1516. req.src_rect.w = MIN(fbi->var.xres,
  1517. mixer->width);
  1518. }
  1519. req.src_rect.y = 0;
  1520. req.src_rect.h = req.src.height;
  1521. req.dst_rect.w = req.src_rect.w;
  1522. req.dst_rect.h = req.src_rect.h;
  1523. req.z_order = MDSS_MDP_STAGE_BASE;
  1524. pr_debug("allocating base pipe mux=%d\n", mixer_mux);
  1525. ret = mdss_mdp_overlay_pipe_setup(mfd, &req, &pipe);
  1526. if (ret)
  1527. return ret;
  1528. }
  1529. pr_debug("ctl=%d pnum=%d\n", mdp5_data->ctl->num, pipe->num);
  1530. *ppipe = pipe;
  1531. return 0;
  1532. }
  1533. static void mdss_mdp_overlay_pan_display(struct msm_fb_data_type *mfd)
  1534. {
  1535. struct mdss_mdp_data *buf;
  1536. struct mdss_mdp_pipe *pipe;
  1537. struct fb_info *fbi;
  1538. struct mdss_overlay_private *mdp5_data;
  1539. u32 offset;
  1540. int bpp, ret;
  1541. if (!mfd)
  1542. return;
  1543. fbi = mfd->fbi;
  1544. mdp5_data = mfd_to_mdp5_data(mfd);
  1545. if (!mdp5_data || !mdp5_data->ctl)
  1546. return;
  1547. if (!fbi->fix.smem_start || fbi->fix.smem_len == 0 ||
  1548. mdp5_data->borderfill_enable) {
  1549. mfd->mdp.kickoff_fnc(mfd, NULL);
  1550. return;
  1551. }
  1552. if (mutex_lock_interruptible(&mdp5_data->ov_lock))
  1553. return;
  1554. if ((!mfd->panel_power_on) && !((mfd->dcm_state == DCM_ENTER) &&
  1555. (mfd->panel.type == MIPI_CMD_PANEL))) {
  1556. mutex_unlock(&mdp5_data->ov_lock);
  1557. return;
  1558. }
  1559. mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_ON, false);
  1560. bpp = fbi->var.bits_per_pixel / 8;
  1561. offset = fbi->var.xoffset * bpp +
  1562. fbi->var.yoffset * fbi->fix.line_length;
  1563. if (offset > fbi->fix.smem_len) {
  1564. pr_err("invalid fb offset=%u total length=%u\n",
  1565. offset, fbi->fix.smem_len);
  1566. goto pan_display_error;
  1567. }
  1568. ret = mdss_mdp_overlay_start(mfd);
  1569. if (ret) {
  1570. pr_err("unable to start overlay %d (%d)\n", mfd->index, ret);
  1571. goto pan_display_error;
  1572. }
  1573. ret = mdss_iommu_ctrl(1);
  1574. if (IS_ERR_VALUE(ret)) {
  1575. pr_err("IOMMU attach failed\n");
  1576. goto pan_display_error;
  1577. }
  1578. ret = mdss_mdp_overlay_get_fb_pipe(mfd, &pipe,
  1579. MDSS_MDP_MIXER_MUX_LEFT);
  1580. if (ret) {
  1581. pr_err("unable to allocate base pipe\n");
  1582. goto pan_display_error;
  1583. }
  1584. if (mdss_mdp_pipe_map(pipe)) {
  1585. pr_err("unable to map base pipe\n");
  1586. goto pan_display_error;
  1587. }
  1588. buf = &pipe->back_buf;
  1589. if (is_mdss_iommu_attached()) {
  1590. if (!mfd->iova) {
  1591. pr_err("mfd iova is zero\n");
  1592. mdss_mdp_pipe_unmap(pipe);
  1593. goto pan_display_error;
  1594. }
  1595. buf->p[0].addr = mfd->iova;
  1596. } else {
  1597. buf->p[0].addr = fbi->fix.smem_start;
  1598. }
  1599. buf->p[0].addr += offset;
  1600. buf->p[0].len = fbi->fix.smem_len - offset;
  1601. buf->num_planes = 1;
  1602. mdss_mdp_pipe_unmap(pipe);
  1603. if (fbi->var.xres > MAX_MIXER_WIDTH || mfd->split_display) {
  1604. ret = mdss_mdp_overlay_get_fb_pipe(mfd, &pipe,
  1605. MDSS_MDP_MIXER_MUX_RIGHT);
  1606. if (ret) {
  1607. pr_err("unable to allocate right base pipe\n");
  1608. goto pan_display_error;
  1609. }
  1610. if (mdss_mdp_pipe_map(pipe)) {
  1611. pr_err("unable to map right base pipe\n");
  1612. goto pan_display_error;
  1613. }
  1614. pipe->back_buf = *buf;
  1615. mdss_mdp_pipe_unmap(pipe);
  1616. }
  1617. mutex_unlock(&mdp5_data->ov_lock);
  1618. if ((fbi->var.activate & FB_ACTIVATE_VBL) ||
  1619. (fbi->var.activate & FB_ACTIVATE_FORCE))
  1620. mfd->mdp.kickoff_fnc(mfd, NULL);
  1621. mdss_iommu_ctrl(0);
  1622. mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_OFF, false);
  1623. return;
  1624. pan_display_error:
  1625. mdss_iommu_ctrl(0);
  1626. mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_OFF, false);
  1627. mutex_unlock(&mdp5_data->ov_lock);
  1628. }
  1629. static void remove_underrun_vsync_handler(struct work_struct *work)
  1630. {
  1631. int rc;
  1632. struct mdss_mdp_ctl *ctl =
  1633. container_of(work, typeof(*ctl), remove_underrun_handler);
  1634. if (!ctl || !ctl->remove_vsync_handler) {
  1635. pr_err("ctl or vsync handler is NULL\n");
  1636. return;
  1637. }
  1638. mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_ON, false);
  1639. rc = ctl->remove_vsync_handler(ctl,
  1640. &ctl->recover_underrun_handler);
  1641. mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_OFF, false);
  1642. }
  1643. static void mdss_mdp_recover_underrun_handler(struct mdss_mdp_ctl *ctl,
  1644. ktime_t t)
  1645. {
  1646. if (!ctl) {
  1647. pr_err("ctl is NULL\n");
  1648. return;
  1649. }
  1650. mdss_mdp_ctl_reset(ctl);
  1651. schedule_work(&ctl->remove_underrun_handler);
  1652. }
  1653. /* function is called in irq context should have minimum processing */
  1654. static void mdss_mdp_overlay_handle_vsync(struct mdss_mdp_ctl *ctl,
  1655. ktime_t t)
  1656. {
  1657. struct msm_fb_data_type *mfd = NULL;
  1658. struct mdss_overlay_private *mdp5_data = NULL;
  1659. if (!ctl) {
  1660. pr_err("ctl is NULL\n");
  1661. return;
  1662. }
  1663. mfd = ctl->mfd;
  1664. if (!mfd || !mfd->mdp.private1) {
  1665. pr_warn("Invalid handle for vsync\n");
  1666. return;
  1667. }
  1668. mdp5_data = mfd_to_mdp5_data(mfd);
  1669. if (!mdp5_data) {
  1670. pr_err("mdp5_data is NULL\n");
  1671. return;
  1672. }
  1673. pr_debug("vsync on fb%d play_cnt=%d\n", mfd->index, ctl->play_cnt);
  1674. mdp5_data->vsync_time = t;
  1675. sysfs_notify_dirent(mdp5_data->vsync_event_sd);
  1676. }
  1677. int mdss_mdp_overlay_vsync_ctrl(struct msm_fb_data_type *mfd, int en)
  1678. {
  1679. struct mdss_mdp_ctl *ctl = mfd_to_ctl(mfd);
  1680. int rc;
  1681. if (!ctl)
  1682. return -ENODEV;
  1683. if (!ctl->add_vsync_handler || !ctl->remove_vsync_handler)
  1684. return -EOPNOTSUPP;
  1685. if (!ctl->panel_data->panel_info.cont_splash_enabled
  1686. && !ctl->power_on) {
  1687. pr_debug("fb%d vsync pending first update en=%d\n",
  1688. mfd->index, en);
  1689. return -EPERM;
  1690. }
  1691. pr_debug("fb%d vsync en=%d\n", mfd->index, en);
  1692. mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_ON, false);
  1693. if (en)
  1694. rc = ctl->add_vsync_handler(ctl, &ctl->vsync_handler);
  1695. else
  1696. rc = ctl->remove_vsync_handler(ctl, &ctl->vsync_handler);
  1697. mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_OFF, false);
  1698. return rc;
  1699. }
  1700. static ssize_t dynamic_fps_sysfs_rda_dfps(struct device *dev,
  1701. struct device_attribute *attr, char *buf)
  1702. {
  1703. ssize_t ret;
  1704. struct mdss_panel_data *pdata;
  1705. struct fb_info *fbi = dev_get_drvdata(dev);
  1706. struct msm_fb_data_type *mfd = (struct msm_fb_data_type *)fbi->par;
  1707. struct mdss_overlay_private *mdp5_data = mfd_to_mdp5_data(mfd);
  1708. if (!mdp5_data->ctl || !mdp5_data->ctl->power_on)
  1709. return 0;
  1710. pdata = dev_get_platdata(&mfd->pdev->dev);
  1711. if (!pdata) {
  1712. pr_err("no panel connected for fb%d\n", mfd->index);
  1713. return -ENODEV;
  1714. }
  1715. mutex_lock(&mdp5_data->dfps_lock);
  1716. ret = snprintf(buf, PAGE_SIZE, "%d\n",
  1717. pdata->panel_info.mipi.frame_rate);
  1718. pr_debug("%s: '%d'\n", __func__,
  1719. pdata->panel_info.mipi.frame_rate);
  1720. mutex_unlock(&mdp5_data->dfps_lock);
  1721. return ret;
  1722. } /* dynamic_fps_sysfs_rda_dfps */
  1723. static ssize_t dynamic_fps_sysfs_wta_dfps(struct device *dev,
  1724. struct device_attribute *attr, const char *buf, size_t count)
  1725. {
  1726. int dfps, rc = 0;
  1727. struct mdss_panel_data *pdata;
  1728. struct fb_info *fbi = dev_get_drvdata(dev);
  1729. struct msm_fb_data_type *mfd = (struct msm_fb_data_type *)fbi->par;
  1730. struct mdss_overlay_private *mdp5_data = mfd_to_mdp5_data(mfd);
  1731. rc = kstrtoint(buf, 10, &dfps);
  1732. if (rc) {
  1733. pr_err("%s: kstrtoint failed. rc=%d\n", __func__, rc);
  1734. return rc;
  1735. }
  1736. if (!mdp5_data->ctl || !mdp5_data->ctl->power_on)
  1737. return 0;
  1738. pdata = dev_get_platdata(&mfd->pdev->dev);
  1739. if (!pdata) {
  1740. pr_err("no panel connected for fb%d\n", mfd->index);
  1741. return -ENODEV;
  1742. }
  1743. if (dfps == pdata->panel_info.mipi.frame_rate) {
  1744. pr_debug("%s: FPS is already %d\n",
  1745. __func__, dfps);
  1746. return count;
  1747. }
  1748. mutex_lock(&mdp5_data->dfps_lock);
  1749. if (dfps < pdata->panel_info.min_fps) {
  1750. pr_err("Unsupported FPS. min_fps = %d\n",
  1751. pdata->panel_info.min_fps);
  1752. mutex_unlock(&mdp5_data->dfps_lock);
  1753. return -EINVAL;
  1754. } else if (dfps > pdata->panel_info.max_fps) {
  1755. pr_warn("Unsupported FPS. Configuring to max_fps = %d\n",
  1756. pdata->panel_info.max_fps);
  1757. dfps = pdata->panel_info.max_fps;
  1758. rc = mdss_mdp_ctl_update_fps(mdp5_data->ctl, dfps);
  1759. } else {
  1760. rc = mdss_mdp_ctl_update_fps(mdp5_data->ctl, dfps);
  1761. }
  1762. if (!rc) {
  1763. pr_info("%s: configured to '%d' FPS\n", __func__, dfps);
  1764. } else {
  1765. pr_err("Failed to configure '%d' FPS. rc = %d\n",
  1766. dfps, rc);
  1767. mutex_unlock(&mdp5_data->dfps_lock);
  1768. return rc;
  1769. }
  1770. pdata->panel_info.new_fps = dfps;
  1771. mutex_unlock(&mdp5_data->dfps_lock);
  1772. return count;
  1773. } /* dynamic_fps_sysfs_wta_dfps */
  1774. static DEVICE_ATTR(dynamic_fps, S_IRUGO | S_IWUSR, dynamic_fps_sysfs_rda_dfps,
  1775. dynamic_fps_sysfs_wta_dfps);
  1776. static struct attribute *dynamic_fps_fs_attrs[] = {
  1777. &dev_attr_dynamic_fps.attr,
  1778. NULL,
  1779. };
  1780. static struct attribute_group dynamic_fps_fs_attrs_group = {
  1781. .attrs = dynamic_fps_fs_attrs,
  1782. };
  1783. static ssize_t mdss_mdp_vsync_show_event(struct device *dev,
  1784. struct device_attribute *attr, char *buf)
  1785. {
  1786. struct fb_info *fbi = dev_get_drvdata(dev);
  1787. struct msm_fb_data_type *mfd = (struct msm_fb_data_type *)fbi->par;
  1788. struct mdss_overlay_private *mdp5_data = mfd_to_mdp5_data(mfd);
  1789. u64 vsync_ticks;
  1790. int ret;
  1791. if (!mdp5_data->ctl ||
  1792. (!mdp5_data->ctl->panel_data->panel_info.cont_splash_enabled
  1793. && !mdp5_data->ctl->power_on))
  1794. return -EAGAIN;
  1795. vsync_ticks = ktime_to_ns(mdp5_data->vsync_time);
  1796. pr_debug("fb%d vsync=%llu", mfd->index, vsync_ticks);
  1797. ret = scnprintf(buf, PAGE_SIZE, "VSYNC=%llu\n", vsync_ticks);
  1798. return ret;
  1799. }
  1800. static inline int mdss_mdp_ad_is_supported(struct msm_fb_data_type *mfd)
  1801. {
  1802. struct mdss_mdp_ctl *ctl = mfd_to_ctl(mfd);
  1803. struct mdss_mdp_mixer *mixer;
  1804. if (!ctl) {
  1805. pr_debug("there is no ctl attached to fb\n");
  1806. return 0;
  1807. }
  1808. mixer = mdss_mdp_mixer_get(ctl, MDSS_MDP_MIXER_MUX_LEFT);
  1809. if (mixer && (mixer->num > ctl->mdata->nad_cfgs)) {
  1810. if (!mixer)
  1811. pr_warn("there is no mixer attached to fb\n");
  1812. else
  1813. pr_debug("mixer attached (%d) doesnt support ad\n",
  1814. mixer->num);
  1815. return 0;
  1816. }
  1817. mixer = mdss_mdp_mixer_get(ctl, MDSS_MDP_MIXER_MUX_RIGHT);
  1818. if (mixer && (mixer->num > ctl->mdata->nad_cfgs))
  1819. return 0;
  1820. return 1;
  1821. }
  1822. static ssize_t mdss_mdp_ad_show(struct device *dev,
  1823. struct device_attribute *attr, char *buf)
  1824. {
  1825. struct fb_info *fbi = dev_get_drvdata(dev);
  1826. struct msm_fb_data_type *mfd = fbi->par;
  1827. struct mdss_overlay_private *mdp5_data = mfd_to_mdp5_data(mfd);
  1828. int ret, state;
  1829. state = mdss_mdp_ad_is_supported(mfd) ? mdp5_data->ad_state : -1;
  1830. ret = scnprintf(buf, PAGE_SIZE, "%d", state);
  1831. return ret;
  1832. }
  1833. static ssize_t mdss_mdp_ad_store(struct device *dev,
  1834. struct device_attribute *attr, const char *buf, size_t count)
  1835. {
  1836. struct fb_info *fbi = dev_get_drvdata(dev);
  1837. struct msm_fb_data_type *mfd = fbi->par;
  1838. struct mdss_overlay_private *mdp5_data = mfd_to_mdp5_data(mfd);
  1839. int ret, ad;
  1840. ret = kstrtoint(buf, 10, &ad);
  1841. if (ret) {
  1842. pr_err("Invalid input for ad\n");
  1843. return -EINVAL;
  1844. }
  1845. mdp5_data->ad_state = ad;
  1846. sysfs_notify(&dev->kobj, NULL, "ad");
  1847. return count;
  1848. }
  1849. static DEVICE_ATTR(vsync_event, S_IRUGO, mdss_mdp_vsync_show_event, NULL);
  1850. static DEVICE_ATTR(ad, S_IRUGO | S_IWUSR | S_IWGRP, mdss_mdp_ad_show,
  1851. mdss_mdp_ad_store);
  1852. static struct attribute *mdp_overlay_sysfs_attrs[] = {
  1853. &dev_attr_vsync_event.attr,
  1854. &dev_attr_ad.attr,
  1855. NULL,
  1856. };
  1857. static struct attribute_group mdp_overlay_sysfs_group = {
  1858. .attrs = mdp_overlay_sysfs_attrs,
  1859. };
  1860. static int mdss_mdp_hw_cursor_update(struct msm_fb_data_type *mfd,
  1861. struct fb_cursor *cursor)
  1862. {
  1863. struct mdss_overlay_private *mdp5_data = mfd_to_mdp5_data(mfd);
  1864. struct mdss_mdp_mixer *mixer;
  1865. struct fb_image *img = &cursor->image;
  1866. u32 blendcfg;
  1867. int off, ret = 0;
  1868. if (!mfd->cursor_buf && (cursor->set & FB_CUR_SETIMAGE)) {
  1869. mfd->cursor_buf = dma_alloc_coherent(NULL, MDSS_MDP_CURSOR_SIZE,
  1870. (dma_addr_t *) &mfd->cursor_buf_phys,
  1871. GFP_KERNEL);
  1872. if (!mfd->cursor_buf) {
  1873. pr_err("can't allocate cursor buffer\n");
  1874. return -ENOMEM;
  1875. }
  1876. ret = msm_iommu_map_contig_buffer(mfd->cursor_buf_phys,
  1877. mdss_get_iommu_domain(MDSS_IOMMU_DOMAIN_UNSECURE),
  1878. 0, MDSS_MDP_CURSOR_SIZE, SZ_4K, 0,
  1879. &(mfd->cursor_buf_iova));
  1880. if (IS_ERR_VALUE(ret)) {
  1881. dma_free_coherent(NULL, MDSS_MDP_CURSOR_SIZE,
  1882. mfd->cursor_buf,
  1883. (dma_addr_t) mfd->cursor_buf_phys);
  1884. pr_err("unable to map cursor buffer to iommu(%d)\n",
  1885. ret);
  1886. return -ENOMEM;
  1887. }
  1888. }
  1889. mixer = mdss_mdp_mixer_get(mdp5_data->ctl, MDSS_MDP_MIXER_MUX_DEFAULT);
  1890. off = MDSS_MDP_REG_LM_OFFSET(mixer->num);
  1891. if (!mixer)
  1892. return -ENODEV;
  1893. if ((img->width > MDSS_MDP_CURSOR_WIDTH) ||
  1894. (img->height > MDSS_MDP_CURSOR_HEIGHT) ||
  1895. (img->depth != 32))
  1896. return -EINVAL;
  1897. pr_debug("mixer=%d enable=%x set=%x\n", mixer->num, cursor->enable,
  1898. cursor->set);
  1899. mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_ON, false);
  1900. blendcfg = MDSS_MDP_REG_READ(off + MDSS_MDP_REG_LM_CURSOR_BLEND_CONFIG);
  1901. if (cursor->set & FB_CUR_SETPOS)
  1902. MDSS_MDP_REG_WRITE(off + MDSS_MDP_REG_LM_CURSOR_START_XY,
  1903. (img->dy << 16) | img->dx);
  1904. if (cursor->set & FB_CUR_SETIMAGE) {
  1905. int calpha_en, transp_en, alpha, size, cursor_addr;
  1906. ret = copy_from_user(mfd->cursor_buf, img->data,
  1907. img->width * img->height * 4);
  1908. if (ret)
  1909. return ret;
  1910. if (is_mdss_iommu_attached())
  1911. cursor_addr = mfd->cursor_buf_iova;
  1912. else
  1913. cursor_addr = mfd->cursor_buf_phys;
  1914. if (img->bg_color == 0xffffffff)
  1915. transp_en = 0;
  1916. else
  1917. transp_en = 1;
  1918. alpha = (img->fg_color & 0xff000000) >> 24;
  1919. if (alpha)
  1920. calpha_en = 0x0; /* xrgb */
  1921. else
  1922. calpha_en = 0x2; /* argb */
  1923. size = (img->height << 16) | img->width;
  1924. MDSS_MDP_REG_WRITE(off + MDSS_MDP_REG_LM_CURSOR_IMG_SIZE, size);
  1925. MDSS_MDP_REG_WRITE(off + MDSS_MDP_REG_LM_CURSOR_SIZE, size);
  1926. MDSS_MDP_REG_WRITE(off + MDSS_MDP_REG_LM_CURSOR_STRIDE,
  1927. img->width * 4);
  1928. MDSS_MDP_REG_WRITE(off + MDSS_MDP_REG_LM_CURSOR_BASE_ADDR,
  1929. cursor_addr);
  1930. wmb();
  1931. blendcfg &= ~0x1;
  1932. blendcfg |= (transp_en << 3) | (calpha_en << 1);
  1933. MDSS_MDP_REG_WRITE(off + MDSS_MDP_REG_LM_CURSOR_BLEND_CONFIG,
  1934. blendcfg);
  1935. if (calpha_en)
  1936. MDSS_MDP_REG_WRITE(off +
  1937. MDSS_MDP_REG_LM_CURSOR_BLEND_PARAM,
  1938. alpha);
  1939. if (transp_en) {
  1940. MDSS_MDP_REG_WRITE(off +
  1941. MDSS_MDP_REG_LM_CURSOR_BLEND_TRANSP_LOW0,
  1942. ((img->bg_color & 0xff00) << 8) |
  1943. (img->bg_color & 0xff));
  1944. MDSS_MDP_REG_WRITE(off +
  1945. MDSS_MDP_REG_LM_CURSOR_BLEND_TRANSP_LOW1,
  1946. ((img->bg_color & 0xff0000) >> 16));
  1947. MDSS_MDP_REG_WRITE(off +
  1948. MDSS_MDP_REG_LM_CURSOR_BLEND_TRANSP_HIGH0,
  1949. ((img->bg_color & 0xff00) << 8) |
  1950. (img->bg_color & 0xff));
  1951. MDSS_MDP_REG_WRITE(off +
  1952. MDSS_MDP_REG_LM_CURSOR_BLEND_TRANSP_HIGH1,
  1953. ((img->bg_color & 0xff0000) >> 16));
  1954. }
  1955. }
  1956. if (!cursor->enable != !(blendcfg & 0x1)) {
  1957. if (cursor->enable) {
  1958. pr_debug("enable hw cursor on mixer=%d\n", mixer->num);
  1959. blendcfg |= 0x1;
  1960. } else {
  1961. pr_debug("disable hw cursor on mixer=%d\n", mixer->num);
  1962. blendcfg &= ~0x1;
  1963. }
  1964. MDSS_MDP_REG_WRITE(off + MDSS_MDP_REG_LM_CURSOR_BLEND_CONFIG,
  1965. blendcfg);
  1966. mixer->cursor_enabled = cursor->enable;
  1967. mixer->params_changed++;
  1968. }
  1969. mixer->ctl->flush_bits |= BIT(6) << mixer->num;
  1970. mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_OFF, false);
  1971. return 0;
  1972. }
  1973. static int mdss_bl_scale_config(struct msm_fb_data_type *mfd,
  1974. struct mdp_bl_scale_data *data)
  1975. {
  1976. int ret = 0;
  1977. int curr_bl;
  1978. mutex_lock(&mfd->bl_lock);
  1979. curr_bl = mfd->bl_level;
  1980. mfd->bl_scale = data->scale;
  1981. mfd->bl_min_lvl = data->min_lvl;
  1982. pr_debug("update scale = %d, min_lvl = %d\n", mfd->bl_scale,
  1983. mfd->bl_min_lvl);
  1984. /* Update current backlight to use new scaling, if it is not zero */
  1985. if (curr_bl)
  1986. mdss_fb_set_backlight(mfd, curr_bl);
  1987. mutex_unlock(&mfd->bl_lock);
  1988. return ret;
  1989. }
  1990. static int mdss_mdp_pp_ioctl(struct msm_fb_data_type *mfd,
  1991. void __user *argp)
  1992. {
  1993. int ret;
  1994. struct msmfb_mdp_pp mdp_pp;
  1995. u32 copyback = 0;
  1996. u32 copy_from_kernel = 0;
  1997. if (mfd->panel_info->partial_update_enabled) {
  1998. pr_err("Partical update feature is enabled.");
  1999. return -EPERM;
  2000. }
  2001. ret = copy_from_user(&mdp_pp, argp, sizeof(mdp_pp));
  2002. if (ret)
  2003. return ret;
  2004. /* Supprt only MDP register read/write and
  2005. exit_dcm in DCM state*/
  2006. if (mfd->dcm_state == DCM_ENTER &&
  2007. (mdp_pp.op != mdp_op_calib_buffer &&
  2008. mdp_pp.op != mdp_op_calib_dcm_state))
  2009. return -EPERM;
  2010. switch (mdp_pp.op) {
  2011. case mdp_op_pa_cfg:
  2012. ret = mdss_mdp_pa_config(&mdp_pp.data.pa_cfg_data,
  2013. &copyback);
  2014. break;
  2015. case mdp_op_pa_v2_cfg:
  2016. ret = mdss_mdp_pa_v2_config(&mdp_pp.data.pa_v2_cfg_data,
  2017. &copyback);
  2018. break;
  2019. case mdp_op_pcc_cfg:
  2020. ret = mdss_mdp_pcc_config(&mdp_pp.data.pcc_cfg_data,
  2021. &copyback);
  2022. break;
  2023. case mdp_op_lut_cfg:
  2024. switch (mdp_pp.data.lut_cfg_data.lut_type) {
  2025. case mdp_lut_igc:
  2026. ret = mdss_mdp_igc_lut_config(
  2027. (struct mdp_igc_lut_data *)
  2028. &mdp_pp.data.lut_cfg_data.data,
  2029. &copyback, copy_from_kernel);
  2030. break;
  2031. case mdp_lut_pgc:
  2032. ret = mdss_mdp_argc_config(
  2033. &mdp_pp.data.lut_cfg_data.data.pgc_lut_data,
  2034. &copyback);
  2035. break;
  2036. case mdp_lut_hist:
  2037. ret = mdss_mdp_hist_lut_config(
  2038. (struct mdp_hist_lut_data *)
  2039. &mdp_pp.data.lut_cfg_data.data, &copyback);
  2040. break;
  2041. default:
  2042. ret = -ENOTSUPP;
  2043. break;
  2044. }
  2045. break;
  2046. case mdp_op_dither_cfg:
  2047. ret = mdss_mdp_dither_config(
  2048. &mdp_pp.data.dither_cfg_data,
  2049. &copyback);
  2050. break;
  2051. case mdp_op_gamut_cfg:
  2052. ret = mdss_mdp_gamut_config(
  2053. &mdp_pp.data.gamut_cfg_data,
  2054. &copyback);
  2055. break;
  2056. case mdp_bl_scale_cfg:
  2057. ret = mdss_bl_scale_config(mfd, (struct mdp_bl_scale_data *)
  2058. &mdp_pp.data.bl_scale_data);
  2059. break;
  2060. case mdp_op_ad_cfg:
  2061. ret = mdss_mdp_ad_config(mfd, &mdp_pp.data.ad_init_cfg);
  2062. break;
  2063. case mdp_op_ad_input:
  2064. ret = mdss_mdp_ad_input(mfd, &mdp_pp.data.ad_input, 1);
  2065. if (ret > 0) {
  2066. ret = 0;
  2067. copyback = 1;
  2068. }
  2069. break;
  2070. case mdp_op_calib_cfg:
  2071. ret = mdss_mdp_calib_config((struct mdp_calib_config_data *)
  2072. &mdp_pp.data.calib_cfg, &copyback);
  2073. break;
  2074. case mdp_op_calib_mode:
  2075. ret = mdss_mdp_calib_mode(mfd, &mdp_pp.data.mdss_calib_cfg);
  2076. break;
  2077. case mdp_op_calib_buffer:
  2078. ret = mdss_mdp_calib_config_buffer(
  2079. (struct mdp_calib_config_buffer *)
  2080. &mdp_pp.data.calib_buffer, &copyback);
  2081. break;
  2082. case mdp_op_calib_dcm_state:
  2083. ret = mdss_fb_dcm(mfd, mdp_pp.data.calib_dcm.dcm_state);
  2084. break;
  2085. default:
  2086. pr_err("Unsupported request to MDP_PP IOCTL. %d = op\n",
  2087. mdp_pp.op);
  2088. ret = -EINVAL;
  2089. break;
  2090. }
  2091. if ((ret == 0) && copyback)
  2092. ret = copy_to_user(argp, &mdp_pp, sizeof(struct msmfb_mdp_pp));
  2093. return ret;
  2094. }
  2095. static int mdss_mdp_histo_ioctl(struct msm_fb_data_type *mfd, u32 cmd,
  2096. void __user *argp)
  2097. {
  2098. int ret = -ENOSYS;
  2099. struct mdp_histogram_data hist;
  2100. struct mdp_histogram_start_req hist_req;
  2101. u32 block;
  2102. u32 pp_bus_handle;
  2103. static int req = -1;
  2104. if (mfd->panel_info->partial_update_enabled) {
  2105. pr_err("Partical update feature is enabled.");
  2106. return -EPERM;
  2107. }
  2108. switch (cmd) {
  2109. case MSMFB_HISTOGRAM_START:
  2110. if (!mfd->panel_power_on)
  2111. return -EPERM;
  2112. pp_bus_handle = mdss_mdp_get_mdata()->pp_bus_hdl;
  2113. req = msm_bus_scale_client_update_request(pp_bus_handle,
  2114. PP_CLK_CFG_ON);
  2115. if (req)
  2116. pr_err("Updated pp_bus_scale failed, ret = %d", req);
  2117. ret = copy_from_user(&hist_req, argp, sizeof(hist_req));
  2118. if (ret)
  2119. return ret;
  2120. ret = mdss_mdp_hist_start(&hist_req);
  2121. break;
  2122. case MSMFB_HISTOGRAM_STOP:
  2123. ret = copy_from_user(&block, argp, sizeof(int));
  2124. if (ret)
  2125. return ret;
  2126. ret = mdss_mdp_hist_stop(block);
  2127. if (ret)
  2128. return ret;
  2129. if (!req) {
  2130. pp_bus_handle = mdss_mdp_get_mdata()->pp_bus_hdl;
  2131. req = msm_bus_scale_client_update_request(pp_bus_handle,
  2132. PP_CLK_CFG_OFF);
  2133. if (req)
  2134. pr_err("Updated pp_bus_scale failed, ret = %d",
  2135. req);
  2136. }
  2137. break;
  2138. case MSMFB_HISTOGRAM:
  2139. if (!mfd->panel_power_on)
  2140. return -EPERM;
  2141. ret = copy_from_user(&hist, argp, sizeof(hist));
  2142. if (ret)
  2143. return ret;
  2144. ret = mdss_mdp_hist_collect(&hist);
  2145. if (!ret)
  2146. ret = copy_to_user(argp, &hist, sizeof(hist));
  2147. break;
  2148. default:
  2149. break;
  2150. }
  2151. return ret;
  2152. }
  2153. static int mdss_fb_set_metadata(struct msm_fb_data_type *mfd,
  2154. struct msmfb_metadata *metadata)
  2155. {
  2156. struct mdss_data_type *mdata = mfd_to_mdata(mfd);
  2157. struct mdss_mdp_ctl *ctl = mfd_to_ctl(mfd);
  2158. int ret = 0;
  2159. if (!ctl)
  2160. return -EPERM;
  2161. switch (metadata->op) {
  2162. case metadata_op_vic:
  2163. if (mfd->panel_info)
  2164. mfd->panel_info->vic =
  2165. metadata->data.video_info_code;
  2166. else
  2167. ret = -EINVAL;
  2168. break;
  2169. case metadata_op_crc:
  2170. if (!mfd->panel_power_on)
  2171. return -EPERM;
  2172. ret = mdss_misr_set(mdata, &metadata->data.misr_request, ctl);
  2173. break;
  2174. case metadata_op_wb_format:
  2175. ret = mdss_mdp_wb_set_format(mfd,
  2176. metadata->data.mixer_cfg.writeback_format);
  2177. break;
  2178. case metadata_op_wb_secure:
  2179. ret = mdss_mdp_wb_set_secure(mfd, metadata->data.secure_en);
  2180. break;
  2181. default:
  2182. pr_warn("unsupported request to MDP META IOCTL\n");
  2183. ret = -EINVAL;
  2184. break;
  2185. }
  2186. return ret;
  2187. }
  2188. static int mdss_fb_get_hw_caps(struct msm_fb_data_type *mfd,
  2189. struct mdss_hw_caps *caps)
  2190. {
  2191. struct mdss_data_type *mdata = mfd_to_mdata(mfd);
  2192. caps->mdp_rev = mdata->mdp_rev;
  2193. caps->vig_pipes = mdata->nvig_pipes;
  2194. caps->rgb_pipes = mdata->nrgb_pipes;
  2195. caps->dma_pipes = mdata->ndma_pipes;
  2196. if (mdata->has_bwc)
  2197. caps->features |= MDP_BWC_EN;
  2198. if (mdata->has_decimation)
  2199. caps->features |= MDP_DECIMATION_EN;
  2200. caps->max_smp_cnt = mdss_res->smp_mb_cnt;
  2201. caps->smp_per_pipe = mdata->smp_mb_per_pipe;
  2202. return 0;
  2203. }
  2204. static int mdss_fb_get_metadata(struct msm_fb_data_type *mfd,
  2205. struct msmfb_metadata *metadata)
  2206. {
  2207. struct mdss_data_type *mdata = mfd_to_mdata(mfd);
  2208. struct mdss_mdp_ctl *ctl = mfd_to_ctl(mfd);
  2209. int ret = 0;
  2210. if (!ctl)
  2211. return -EPERM;
  2212. switch (metadata->op) {
  2213. case metadata_op_frame_rate:
  2214. metadata->data.panel_frame_rate =
  2215. mdss_panel_get_framerate(mfd->panel_info);
  2216. break;
  2217. case metadata_op_get_caps:
  2218. ret = mdss_fb_get_hw_caps(mfd, &metadata->data.caps);
  2219. break;
  2220. case metadata_op_get_ion_fd:
  2221. if (mfd->fb_ion_handle) {
  2222. metadata->data.fbmem_ionfd =
  2223. dma_buf_fd(mfd->fbmem_buf, 0);
  2224. if (metadata->data.fbmem_ionfd < 0)
  2225. pr_err("fd allocation failed. fd = %d\n",
  2226. metadata->data.fbmem_ionfd);
  2227. }
  2228. break;
  2229. case metadata_op_crc:
  2230. if (!mfd->panel_power_on)
  2231. return -EPERM;
  2232. ret = mdss_misr_get(mdata, &metadata->data.misr_request, ctl);
  2233. break;
  2234. case metadata_op_wb_format:
  2235. ret = mdss_mdp_wb_get_format(mfd, &metadata->data.mixer_cfg);
  2236. break;
  2237. case metadata_op_wb_secure:
  2238. ret = mdss_mdp_wb_get_secure(mfd, &metadata->data.secure_en);
  2239. break;
  2240. default:
  2241. pr_warn("Unsupported request to MDP META IOCTL.\n");
  2242. ret = -EINVAL;
  2243. break;
  2244. }
  2245. return ret;
  2246. }
  2247. static int __handle_overlay_prepare(struct msm_fb_data_type *mfd,
  2248. struct mdp_overlay_list *ovlist,
  2249. struct mdp_overlay *overlays)
  2250. {
  2251. struct mdss_mdp_pipe *right_plist[MDSS_MDP_MAX_STAGE] = { 0 };
  2252. struct mdss_mdp_pipe *left_plist[MDSS_MDP_MAX_STAGE] = { 0 };
  2253. struct mdss_overlay_private *mdp5_data = mfd_to_mdp5_data(mfd);
  2254. struct mdss_mdp_pipe *pipe;
  2255. struct mdp_overlay *req;
  2256. int ret = 0, left_cnt = 0, right_cnt = 0;
  2257. int i;
  2258. u32 new_reqs = 0;
  2259. u32 left_lm_w = left_lm_w_from_mfd(mfd);
  2260. ret = mutex_lock_interruptible(&mdp5_data->ov_lock);
  2261. if (ret)
  2262. return ret;
  2263. if (!mfd->panel_power_on) {
  2264. mutex_unlock(&mdp5_data->ov_lock);
  2265. return -EPERM;
  2266. }
  2267. pr_debug("prepare fb%d num_overlays=%d\n", mfd->index,
  2268. ovlist->num_overlays);
  2269. for (i = 0; i < ovlist->num_overlays; i++) {
  2270. req = overlays + i;
  2271. req->z_order += MDSS_MDP_STAGE_0;
  2272. ret = mdss_mdp_overlay_pipe_setup(mfd, req, &pipe);
  2273. req->z_order -= MDSS_MDP_STAGE_0;
  2274. if (IS_ERR_VALUE(ret))
  2275. goto validate_exit;
  2276. /* keep track of the new overlays to unset in case of errors */
  2277. if (pipe->play_cnt == 0)
  2278. new_reqs |= pipe->ndx;
  2279. if (IS_RIGHT_MIXER_OV(req->flags, req->dst_rect.x, left_lm_w)) {
  2280. if (right_cnt >= MDSS_MDP_MAX_STAGE) {
  2281. pr_err("too many pipes on right mixer\n");
  2282. ret = -EINVAL;
  2283. goto validate_exit;
  2284. }
  2285. right_plist[right_cnt] = pipe;
  2286. right_cnt++;
  2287. } else {
  2288. if (left_cnt >= MDSS_MDP_MAX_STAGE) {
  2289. pr_err("too many pipes on left mixer\n");
  2290. ret = -EINVAL;
  2291. goto validate_exit;
  2292. }
  2293. left_plist[left_cnt] = pipe;
  2294. left_cnt++;
  2295. }
  2296. }
  2297. ret = mdss_mdp_perf_bw_check(mdp5_data->ctl, left_plist, left_cnt,
  2298. right_plist, right_cnt);
  2299. validate_exit:
  2300. if (IS_ERR_VALUE(ret))
  2301. mdss_mdp_overlay_release(mfd, new_reqs);
  2302. mutex_unlock(&mdp5_data->ov_lock);
  2303. ovlist->processed_overlays = i;
  2304. return ret;
  2305. }
  2306. static int __handle_ioctl_overlay_prepare(struct msm_fb_data_type *mfd,
  2307. void __user *argp)
  2308. {
  2309. struct mdp_overlay_list ovlist;
  2310. struct mdp_overlay *req_list[OVERLAY_MAX];
  2311. struct mdp_overlay *overlays;
  2312. int i, ret;
  2313. if (copy_from_user(&ovlist, argp, sizeof(ovlist)))
  2314. return -EFAULT;
  2315. if (ovlist.num_overlays >= OVERLAY_MAX) {
  2316. pr_err("Number of overlays exceeds max\n");
  2317. return -EINVAL;
  2318. }
  2319. overlays = kmalloc(ovlist.num_overlays * sizeof(*overlays), GFP_KERNEL);
  2320. if (!overlays) {
  2321. pr_err("Unable to allocate memory for overlays\n");
  2322. return -ENOMEM;
  2323. }
  2324. if (copy_from_user(req_list, ovlist.overlay_list,
  2325. sizeof(struct mdp_overlay*) * ovlist.num_overlays)) {
  2326. ret = -EFAULT;
  2327. goto validate_exit;
  2328. }
  2329. for (i = 0; i < ovlist.num_overlays; i++) {
  2330. if (copy_from_user(overlays + i, req_list[i],
  2331. sizeof(struct mdp_overlay))) {
  2332. ret = -EFAULT;
  2333. goto validate_exit;
  2334. }
  2335. }
  2336. ret = __handle_overlay_prepare(mfd, &ovlist, overlays);
  2337. if (!IS_ERR_VALUE(ret)) {
  2338. for (i = 0; i < ovlist.num_overlays; i++) {
  2339. if (copy_to_user(req_list[i], overlays + i,
  2340. sizeof(struct mdp_overlay))) {
  2341. ret = -EFAULT;
  2342. goto validate_exit;
  2343. }
  2344. }
  2345. }
  2346. if (copy_to_user(argp, &ovlist, sizeof(ovlist)))
  2347. ret = -EFAULT;
  2348. validate_exit:
  2349. kfree(overlays);
  2350. return ret;
  2351. }
  2352. static int mdss_mdp_overlay_ioctl_handler(struct msm_fb_data_type *mfd,
  2353. u32 cmd, void __user *argp)
  2354. {
  2355. struct mdss_overlay_private *mdp5_data = mfd_to_mdp5_data(mfd);
  2356. struct mdp_overlay *req = NULL;
  2357. int val, ret = -ENOSYS;
  2358. struct msmfb_metadata metadata;
  2359. switch (cmd) {
  2360. case MSMFB_MDP_PP:
  2361. ID_PRINTK(ID_HDMI, "%s() MSMFB_MDP_PP\n", __func__);
  2362. ret = mdss_mdp_pp_ioctl(mfd, argp);
  2363. break;
  2364. case MSMFB_HISTOGRAM_START:
  2365. ID_PRINTK(ID_HDMI, "%s() MSMFB_HISTOGRAM_START\n", __func__);
  2366. case MSMFB_HISTOGRAM_STOP:
  2367. ID_PRINTK(ID_HDMI, "%s() MSMFB_HISTOGRAM_STOP\n", __func__);
  2368. case MSMFB_HISTOGRAM:
  2369. ID_PRINTK(ID_HDMI, "%s() MSMFB_HISTOGRAM\n", __func__);
  2370. ret = mdss_mdp_histo_ioctl(mfd, cmd, argp);
  2371. break;
  2372. case MSMFB_OVERLAY_GET:
  2373. ID_PRINTK(ID_HDMI, "%s() MSMFB_OVERLAY_GET\n", __func__);
  2374. req = kmalloc(sizeof(struct mdp_overlay), GFP_KERNEL);
  2375. if (!req)
  2376. return -ENOMEM;
  2377. ret = copy_from_user(req, argp, sizeof(*req));
  2378. if (!ret) {
  2379. ret = mdss_mdp_overlay_get(mfd, req);
  2380. if (!IS_ERR_VALUE(ret))
  2381. ret = copy_to_user(argp, req, sizeof(*req));
  2382. }
  2383. if (ret)
  2384. pr_debug("OVERLAY_GET failed (%d)\n", ret);
  2385. break;
  2386. case MSMFB_OVERLAY_SET:
  2387. ID_PRINTK(ID_HDMI, "%s() MSMFB_OVERLAY_SET\n", __func__);
  2388. req = kmalloc(sizeof(struct mdp_overlay), GFP_KERNEL);
  2389. if (!req)
  2390. {
  2391. pr_err("MSMFB_OVERLAY_SET kmalloc result was NULL \n");
  2392. return -ENOMEM;
  2393. }
  2394. ret = copy_from_user(req, argp, sizeof(*req));
  2395. if (!ret) {
  2396. ret = mdss_mdp_overlay_set(mfd, req);
  2397. if (!IS_ERR_VALUE(ret))
  2398. ret = copy_to_user(argp, req, sizeof(*req));
  2399. }
  2400. if (ret)
  2401. pr_debug("OVERLAY_SET failed (%d)\n", ret);
  2402. break;
  2403. case MSMFB_OVERLAY_UNSET:
  2404. ID_PRINTK(ID_HDMI, "%s() MSMFB_OVERLAY_UNSET\n", __func__);
  2405. if (!IS_ERR_VALUE(copy_from_user(&val, argp, sizeof(val))))
  2406. ret = mdss_mdp_overlay_unset(mfd, val);
  2407. break;
  2408. case MSMFB_OVERLAY_PLAY_ENABLE:
  2409. ID_PRINTK(ID_HDMI, "%s() MSMFB_OVERLAY_PLAY_ENABLE\n", __func__);
  2410. if (!copy_from_user(&val, argp, sizeof(val))) {
  2411. mdp5_data->overlay_play_enable = val;
  2412. ret = 0;
  2413. } else {
  2414. pr_err("OVERLAY_PLAY_ENABLE failed (%d)\n", ret);
  2415. ret = -EFAULT;
  2416. }
  2417. break;
  2418. case MSMFB_OVERLAY_PLAY:
  2419. ID_PRINTK(ID_HDMI, "%s() MSMFB_OVERLAY_PLAY\n", __func__);
  2420. if (mdp5_data->overlay_play_enable) {
  2421. struct msmfb_overlay_data data;
  2422. ret = copy_from_user(&data, argp, sizeof(data));
  2423. if (!ret)
  2424. ret = mdss_mdp_overlay_play(mfd, &data);
  2425. if (ret)
  2426. pr_debug("OVERLAY_PLAY failed (%d)\n", ret);
  2427. } else {
  2428. ret = 0;
  2429. }
  2430. break;
  2431. case MSMFB_OVERLAY_PLAY_WAIT:
  2432. ID_PRINTK(ID_HDMI, "%s() MSMFB_OVERLAY_PLAY_WAIT\n", __func__);
  2433. if (mdp5_data->overlay_play_enable) {
  2434. struct msmfb_overlay_data data;
  2435. ret = copy_from_user(&data, argp, sizeof(data));
  2436. if (!ret)
  2437. ret = mdss_mdp_overlay_play_wait(mfd, &data);
  2438. if (ret)
  2439. pr_err("OVERLAY_PLAY_WAIT failed (%d)\n", ret);
  2440. } else {
  2441. ret = 0;
  2442. }
  2443. break;
  2444. case MSMFB_VSYNC_CTRL:
  2445. ID_PRINTK(ID_HDMI, "%s() MSMFB_VSYNC_CTRL\n", __func__);
  2446. case MSMFB_OVERLAY_VSYNC_CTRL:
  2447. ID_PRINTK(ID_HDMI, "%s() MSMFB_OVERLAY_VSYNC_CTRL\n", __func__);
  2448. if (!copy_from_user(&val, argp, sizeof(val))) {
  2449. mutex_lock(&mfd->ctx_lock);
  2450. ret = mdss_mdp_overlay_vsync_ctrl(mfd, val);
  2451. mutex_unlock(&mfd->ctx_lock);
  2452. } else {
  2453. pr_err("MSMFB_OVERLAY_VSYNC_CTRL failed (%d)\n", ret);
  2454. ret = -EFAULT;
  2455. }
  2456. break;
  2457. case MSMFB_OVERLAY_COMMIT:
  2458. ID_PRINTK(ID_HDMI, "%s() MSMFB_OVERLAY_COMMIT\n", __func__);
  2459. mdss_fb_wait_for_fence(&(mfd->mdp_sync_pt_data));
  2460. ret = mfd->mdp.kickoff_fnc(mfd, NULL);
  2461. break;
  2462. case MSMFB_METADATA_SET:
  2463. ID_PRINTK(ID_HDMI, "%s() MSMFB_METADATA_SET\n", __func__);
  2464. ret = copy_from_user(&metadata, argp, sizeof(metadata));
  2465. if (ret)
  2466. return ret;
  2467. ret = mdss_fb_set_metadata(mfd, &metadata);
  2468. break;
  2469. case MSMFB_METADATA_GET:
  2470. ID_PRINTK(ID_HDMI, "%s() MSMFB_METADATA_GET\n", __func__);
  2471. ret = copy_from_user(&metadata, argp, sizeof(metadata));
  2472. if (ret)
  2473. return ret;
  2474. ret = mdss_fb_get_metadata(mfd, &metadata);
  2475. if (!ret)
  2476. ret = copy_to_user(argp, &metadata, sizeof(metadata));
  2477. break;
  2478. case MSMFB_OVERLAY_PREPARE:
  2479. ret = __handle_ioctl_overlay_prepare(mfd, argp);
  2480. break;
  2481. default:
  2482. ID_PRINTK(ID_HDMI, "%s() default\n", __func__);
  2483. if (mfd->panel.type == WRITEBACK_PANEL)
  2484. ret = mdss_mdp_wb_ioctl_handler(mfd, cmd, argp);
  2485. break;
  2486. }
  2487. kfree(req);
  2488. return ret;
  2489. }
  2490. /**
  2491. * __mdss_mdp_overlay_ctl_init - Helper function to intialize control structure
  2492. * @mfd: msm frame buffer data structure associated with the fb device.
  2493. *
  2494. * Helper function that allocates and initializes the mdp control structure
  2495. * for a frame buffer device. Whenver applicable, this function will also setup
  2496. * the control for the split display path as well.
  2497. *
  2498. * Return: pointer to the newly allocated control structure.
  2499. */
  2500. static struct mdss_mdp_ctl *__mdss_mdp_overlay_ctl_init(
  2501. struct msm_fb_data_type *mfd)
  2502. {
  2503. int rc = 0;
  2504. struct mdss_mdp_ctl *ctl;
  2505. struct mdss_panel_data *pdata;
  2506. if (!mfd)
  2507. return ERR_PTR(-EINVAL);
  2508. pdata = dev_get_platdata(&mfd->pdev->dev);
  2509. if (!pdata) {
  2510. pr_err("no panel connected for fb%d\n", mfd->index);
  2511. rc = -ENODEV;
  2512. goto error;
  2513. }
  2514. ctl = mdss_mdp_ctl_init(pdata, mfd);
  2515. if (IS_ERR_OR_NULL(ctl)) {
  2516. pr_err("Unable to initialize ctl for fb%d\n",
  2517. mfd->index);
  2518. rc = PTR_ERR(ctl);
  2519. goto error;
  2520. }
  2521. ctl->vsync_handler.vsync_handler =
  2522. mdss_mdp_overlay_handle_vsync;
  2523. ctl->vsync_handler.cmd_post_flush = false;
  2524. ctl->recover_underrun_handler.vsync_handler =
  2525. mdss_mdp_recover_underrun_handler;
  2526. ctl->recover_underrun_handler.cmd_post_flush = false;
  2527. INIT_WORK(&ctl->remove_underrun_handler,
  2528. remove_underrun_vsync_handler);
  2529. if (mfd->split_display && pdata->next) {
  2530. /* enable split display */
  2531. rc = mdss_mdp_ctl_split_display_setup(ctl, pdata->next);
  2532. if (rc) {
  2533. mdss_mdp_ctl_destroy(ctl);
  2534. goto error;
  2535. }
  2536. }
  2537. error:
  2538. if (rc)
  2539. return ERR_PTR(rc);
  2540. else
  2541. return ctl;
  2542. }
  2543. static int mdss_mdp_overlay_on(struct msm_fb_data_type *mfd)
  2544. {
  2545. int rc;
  2546. struct mdss_overlay_private *mdp5_data;
  2547. struct mdss_mdp_ctl *ctl = NULL;
  2548. struct mdss_panel_info *pinfo = mfd->panel_info;
  2549. if (!mfd)
  2550. return -ENODEV;
  2551. if (mfd->key != MFD_KEY)
  2552. return -EINVAL;
  2553. pr_info("%s: ++ \n",__func__);
  2554. mdp5_data = mfd_to_mdp5_data(mfd);
  2555. if (!mdp5_data)
  2556. return -EINVAL;
  2557. if (!mdp5_data->ctl) {
  2558. ctl = __mdss_mdp_overlay_ctl_init(mfd);
  2559. if (IS_ERR_OR_NULL(ctl))
  2560. return PTR_ERR(ctl);
  2561. mdp5_data->ctl = ctl;
  2562. }
  2563. if (!mfd->panel_info->cont_splash_enabled &&
  2564. (mfd->panel_info->type != DTV_PANEL) &&
  2565. !(pinfo->alpm_event && pinfo->alpm_event(CHECK_PREVIOUS_STATUS))) {
  2566. rc = mdss_mdp_overlay_start(mfd);
  2567. if (!IS_ERR_VALUE(rc) &&
  2568. (mfd->panel_info->type != WRITEBACK_PANEL)) {
  2569. atomic_inc(&mfd->mdp_sync_pt_data.commit_cnt);
  2570. rc = mdss_mdp_overlay_kickoff(mfd, NULL);
  2571. }
  2572. } else {
  2573. rc = mdss_mdp_ctl_setup(mdp5_data->ctl);
  2574. if (rc)
  2575. return rc;
  2576. }
  2577. if (IS_ERR_VALUE(rc)) {
  2578. pr_err("Failed to turn on fb%d\n", mfd->index);
  2579. mdss_mdp_overlay_off(mfd);
  2580. }
  2581. pr_info("%s: -- \n",__func__);
  2582. return rc;
  2583. }
  2584. static int mdss_mdp_overlay_off(struct msm_fb_data_type *mfd)
  2585. {
  2586. int rc;
  2587. struct mdss_overlay_private *mdp5_data;
  2588. struct mdss_mdp_mixer *mixer;
  2589. int need_cleanup;
  2590. struct mdss_panel_info *pinfo;
  2591. if (!mfd)
  2592. return -ENODEV;
  2593. if (mfd->key != MFD_KEY)
  2594. return -EINVAL;
  2595. pinfo = mfd->panel_info;
  2596. mdp5_data = mfd_to_mdp5_data(mfd);
  2597. if (!mdp5_data || !mdp5_data->ctl) {
  2598. pr_err("ctl not initialized\n");
  2599. return -ENODEV;
  2600. }
  2601. if (!mdp5_data->ctl->power_on)
  2602. return 0;
  2603. mdss_mdp_overlay_free_fb_pipe(mfd);
  2604. mixer = mdss_mdp_mixer_get(mdp5_data->ctl, MDSS_MDP_MIXER_MUX_LEFT);
  2605. if (mixer)
  2606. mixer->cursor_enabled = 0;
  2607. mixer = mdss_mdp_mixer_get(mdp5_data->ctl, MDSS_MDP_MIXER_MUX_RIGHT);
  2608. if (mixer)
  2609. mixer->cursor_enabled = 0;
  2610. mutex_lock(&mdp5_data->list_lock);
  2611. need_cleanup = !list_empty(&mdp5_data->pipes_cleanup);
  2612. mutex_unlock(&mdp5_data->list_lock);
  2613. if (need_cleanup) {
  2614. if (pinfo->alpm_event && pinfo->alpm_event(CHECK_CURRENT_STATUS)) {
  2615. pr_debug("[ALPM_DEBUG] %s, Skip cleanup pipes on fb%d\n",\
  2616. __func__, mfd->index);
  2617. } else {
  2618. pr_debug("cleaning up pipes on fb%d\n", mfd->index);
  2619. mdss_mdp_overlay_kickoff(mfd, NULL);
  2620. }
  2621. }
  2622. /*
  2623. * If retire fences are still active wait for a vsync time
  2624. * for retire fence to be updated.
  2625. * As a last resort signal the timeline if vsync doesn't arrive.
  2626. */
  2627. if (mdp5_data->retire_cnt) {
  2628. u32 fps = mdss_panel_get_framerate(mfd->panel_info);
  2629. u32 vsync_time = 1000 / (fps ? : DEFAULT_FRAME_RATE);
  2630. msleep(vsync_time);
  2631. __vsync_retire_signal(mfd, mdp5_data->retire_cnt);
  2632. }
  2633. rc = mdss_mdp_ctl_stop(mdp5_data->ctl);
  2634. if (rc == 0) {
  2635. __mdss_mdp_overlay_free_list_purge(mfd);
  2636. mdss_mdp_ctl_notifier_unregister(mdp5_data->ctl,
  2637. &mfd->mdp_sync_pt_data.notifier);
  2638. if (!mfd->ref_cnt) {
  2639. mdp5_data->borderfill_enable = false;
  2640. mdss_mdp_ctl_destroy(mdp5_data->ctl);
  2641. mdp5_data->ctl = NULL;
  2642. }
  2643. if (atomic_dec_return(&ov_active_panels) == 0)
  2644. mdss_mdp_rotator_release_all();
  2645. rc = pm_runtime_put(&mfd->pdev->dev);
  2646. if (rc)
  2647. pr_err("unable to suspend w/pm_runtime_put (%d)\n", rc);
  2648. }
  2649. return rc;
  2650. }
  2651. int mdss_panel_register_done(struct mdss_panel_data *pdata)
  2652. {
  2653. static int first_register=true;
  2654. /*
  2655. * Clocks are already on if continuous splash is enabled,
  2656. * increasing ref_cnt to help balance clocks once done.
  2657. */
  2658. if (pdata->panel_info.cont_splash_enabled && first_register) {
  2659. mdss_mdp_footswitch_ctrl_splash(1);
  2660. first_register=false;
  2661. }
  2662. return 0;
  2663. }
  2664. static int __mdss_mdp_ctl_handoff(struct mdss_mdp_ctl *ctl,
  2665. struct mdss_data_type *mdata)
  2666. {
  2667. int rc = 0;
  2668. int i, j;
  2669. u32 mixercfg;
  2670. struct mdss_mdp_pipe *pipe = NULL;
  2671. if (!ctl || !mdata)
  2672. return -EINVAL;
  2673. for (i = 0; i < mdata->nmixers_intf; i++) {
  2674. mixercfg = mdss_mdp_ctl_read(ctl, MDSS_MDP_REG_CTL_LAYER(i));
  2675. pr_debug("for lm%d mixercfg = 0x%09x\n", i, mixercfg);
  2676. j = MDSS_MDP_SSPP_VIG0;
  2677. for (; j < MDSS_MDP_MAX_SSPP && mixercfg; j++) {
  2678. u32 cfg = j * 3;
  2679. if ((j == MDSS_MDP_SSPP_VIG3) ||
  2680. (j == MDSS_MDP_SSPP_RGB3)) {
  2681. /* Add 2 to account for Cursor & Border bits */
  2682. cfg += 2;
  2683. }
  2684. if (mixercfg & (0x7 << cfg)) {
  2685. pr_debug("Pipe %d staged\n", j);
  2686. pipe = mdss_mdp_pipe_search(mdata, BIT(j));
  2687. if (!pipe) {
  2688. pr_warn("Invalid pipe %d staged\n", j);
  2689. continue;
  2690. }
  2691. rc = mdss_mdp_pipe_handoff(pipe);
  2692. if (rc) {
  2693. pr_err("Failed to handoff pipe%d\n",
  2694. pipe->num);
  2695. goto exit;
  2696. }
  2697. rc = mdss_mdp_mixer_handoff(ctl, i, pipe);
  2698. if (rc) {
  2699. pr_err("failed to handoff mix%d\n", i);
  2700. goto exit;
  2701. }
  2702. }
  2703. }
  2704. }
  2705. exit:
  2706. return rc;
  2707. }
  2708. /**
  2709. * mdss_mdp_overlay_handoff() - Read MDP registers to handoff an active ctl path
  2710. * @mfd: Msm frame buffer structure associated with the fb device.
  2711. *
  2712. * This function populates the MDP software structures with the current state of
  2713. * the MDP hardware to handoff any active control path for the framebuffer
  2714. * device. This is needed to identify any ctl, mixers and pipes being set up by
  2715. * the bootloader to display the splash screen when the continuous splash screen
  2716. * feature is enabled in kernel.
  2717. */
  2718. static int mdss_mdp_overlay_handoff(struct msm_fb_data_type *mfd)
  2719. {
  2720. int rc = 0;
  2721. struct mdss_data_type *mdata = mfd_to_mdata(mfd);
  2722. struct mdss_overlay_private *mdp5_data = mfd_to_mdp5_data(mfd);
  2723. struct mdss_mdp_ctl *ctl = NULL;
  2724. struct mdss_mdp_ctl *sctl = NULL;
  2725. if (!mdp5_data->ctl) {
  2726. ctl = __mdss_mdp_overlay_ctl_init(mfd);
  2727. if (IS_ERR_OR_NULL(ctl)) {
  2728. rc = PTR_ERR(ctl);
  2729. goto error;
  2730. }
  2731. mdp5_data->ctl = ctl;
  2732. }
  2733. if (IS_ERR_OR_NULL(ctl)) {
  2734. rc = PTR_ERR(ctl);
  2735. goto error;
  2736. }
  2737. /*
  2738. * vsync interrupt needs on during continuous splash, this is
  2739. * to initialize necessary ctl members here.
  2740. */
  2741. rc = mdss_mdp_ctl_start(ctl, true);
  2742. if (rc) {
  2743. pr_err("Failed to initialize ctl\n");
  2744. goto error;
  2745. }
  2746. ctl->clk_rate = mdss_mdp_get_clk_rate(MDSS_CLK_MDP_SRC);
  2747. pr_debug("Set the ctl clock rate to %d Hz\n", ctl->clk_rate);
  2748. rc = __mdss_mdp_ctl_handoff(ctl, mdata);
  2749. if (rc) {
  2750. pr_err("primary ctl handoff failed. rc=%d\n", rc);
  2751. goto error;
  2752. }
  2753. if (mfd->split_display) {
  2754. sctl = mdss_mdp_get_split_ctl(ctl);
  2755. if (!sctl) {
  2756. pr_err("cannot get secondary ctl. fail the handoff\n");
  2757. rc = -EPERM;
  2758. goto error;
  2759. }
  2760. rc = __mdss_mdp_ctl_handoff(sctl, mdata);
  2761. if (rc) {
  2762. pr_err("secondary ctl handoff failed. rc=%d\n", rc);
  2763. goto error;
  2764. }
  2765. }
  2766. rc = mdss_mdp_smp_handoff(mdata);
  2767. if (rc)
  2768. pr_err("Failed to handoff smps\n");
  2769. mdp5_data->handoff = true;
  2770. error:
  2771. if (rc && ctl) {
  2772. mdss_mdp_handoff_cleanup_pipes(mfd, MDSS_MDP_PIPE_TYPE_RGB);
  2773. mdss_mdp_handoff_cleanup_pipes(mfd, MDSS_MDP_PIPE_TYPE_VIG);
  2774. mdss_mdp_handoff_cleanup_pipes(mfd, MDSS_MDP_PIPE_TYPE_DMA);
  2775. mdss_mdp_ctl_destroy(ctl);
  2776. mdp5_data->ctl = NULL;
  2777. mdp5_data->handoff = false;
  2778. }
  2779. return rc;
  2780. }
  2781. static void __vsync_retire_handle_vsync(struct mdss_mdp_ctl *ctl, ktime_t t)
  2782. {
  2783. struct msm_fb_data_type *mfd = ctl->mfd;
  2784. struct mdss_overlay_private *mdp5_data;
  2785. if (!mfd || !mfd->mdp.private1) {
  2786. pr_warn("Invalid handle for vsync\n");
  2787. return;
  2788. }
  2789. mdp5_data = mfd_to_mdp5_data(mfd);
  2790. queue_kthread_work(&mdp5_data->worker, &mdp5_data->vsync_work);
  2791. }
  2792. static void __vsync_retire_work_handler(struct kthread_work *work)
  2793. {
  2794. struct mdss_overlay_private *mdp5_data =
  2795. container_of(work, typeof(*mdp5_data), vsync_work);
  2796. if (!mdp5_data->ctl || !mdp5_data->ctl->mfd)
  2797. return;
  2798. if (!mdp5_data->ctl->remove_vsync_handler)
  2799. return;
  2800. __vsync_retire_signal(mdp5_data->ctl->mfd, 1);
  2801. }
  2802. static void __vsync_retire_signal(struct msm_fb_data_type *mfd, int val)
  2803. {
  2804. struct mdss_overlay_private *mdp5_data = mfd_to_mdp5_data(mfd);
  2805. mutex_lock(&mfd->mdp_sync_pt_data.sync_mutex);
  2806. if (mdp5_data->retire_cnt > 0) {
  2807. sw_sync_timeline_inc(mdp5_data->vsync_timeline, val);
  2808. mdp5_data->retire_cnt -= min(val, mdp5_data->retire_cnt);
  2809. if (mdp5_data->retire_cnt == 0) {
  2810. mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_ON, false);
  2811. mdp5_data->ctl->remove_vsync_handler(mdp5_data->ctl,
  2812. &mdp5_data->vsync_retire_handler);
  2813. mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_OFF, false);
  2814. }
  2815. }
  2816. mutex_unlock(&mfd->mdp_sync_pt_data.sync_mutex);
  2817. }
  2818. static struct sync_fence *
  2819. __vsync_retire_get_fence(struct msm_sync_pt_data *sync_pt_data)
  2820. {
  2821. struct msm_fb_data_type *mfd;
  2822. struct mdss_overlay_private *mdp5_data;
  2823. struct mdss_mdp_ctl *ctl;
  2824. int rc, value;
  2825. mfd = container_of(sync_pt_data, typeof(*mfd), mdp_sync_pt_data);
  2826. mdp5_data = mfd_to_mdp5_data(mfd);
  2827. if (!mdp5_data || !mdp5_data->ctl)
  2828. return ERR_PTR(-ENODEV);
  2829. ctl = mdp5_data->ctl;
  2830. if (!ctl->add_vsync_handler)
  2831. return ERR_PTR(-EOPNOTSUPP);
  2832. if (!ctl->power_on) {
  2833. pr_debug("fb%d vsync pending first update\n", mfd->index);
  2834. return ERR_PTR(-EPERM);
  2835. }
  2836. if (!mdp5_data->vsync_retire_handler.enabled) {
  2837. mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_ON, false);
  2838. rc = ctl->add_vsync_handler(ctl,
  2839. &mdp5_data->vsync_retire_handler);
  2840. mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_OFF, false);
  2841. if (IS_ERR_VALUE(rc))
  2842. return ERR_PTR(rc);
  2843. }
  2844. value = mdp5_data->vsync_timeline->value + 1 + mdp5_data->retire_cnt;
  2845. mdp5_data->retire_cnt++;
  2846. return mdss_fb_sync_get_fence(mdp5_data->vsync_timeline,
  2847. "mdp-retire", value);
  2848. }
  2849. static int __vsync_retire_setup(struct msm_fb_data_type *mfd)
  2850. {
  2851. struct mdss_overlay_private *mdp5_data = mfd_to_mdp5_data(mfd);
  2852. char name[24];
  2853. struct sched_param param = { .sched_priority = 5 };
  2854. snprintf(name, sizeof(name), "mdss_fb%d_retire", mfd->index);
  2855. mdp5_data->vsync_timeline = sw_sync_timeline_create(name);
  2856. if (mdp5_data->vsync_timeline == NULL) {
  2857. pr_err("cannot vsync create time line");
  2858. return -ENOMEM;
  2859. }
  2860. init_kthread_worker(&mdp5_data->worker);
  2861. init_kthread_work(&mdp5_data->vsync_work, __vsync_retire_work_handler);
  2862. mdp5_data->thread = kthread_run(kthread_worker_fn,
  2863. &mdp5_data->worker, "vsync_retire_work");
  2864. if (IS_ERR(mdp5_data->thread)) {
  2865. pr_err("unable to start vsync thread\n");
  2866. mdp5_data->thread = NULL;
  2867. return -ENOMEM;
  2868. }
  2869. sched_setscheduler(mdp5_data->thread, SCHED_FIFO, &param);
  2870. mfd->mdp_sync_pt_data.get_retire_fence = __vsync_retire_get_fence;
  2871. mdp5_data->vsync_retire_handler.vsync_handler =
  2872. __vsync_retire_handle_vsync;
  2873. mdp5_data->vsync_retire_handler.cmd_post_flush = false;
  2874. return 0;
  2875. }
  2876. static int mdss_mdp_update_panel_info(struct msm_fb_data_type *mfd, int mode)
  2877. {
  2878. int ret = 0;
  2879. struct mdss_overlay_private *mdp5_data = mfd_to_mdp5_data(mfd);
  2880. struct mdss_mdp_ctl *ctl = mdp5_data->ctl;
  2881. ret = mdss_mdp_ctl_intf_event(ctl, MDSS_EVENT_DSI_DYNAMIC_SWITCH,
  2882. (void *)(unsigned long)mode);
  2883. if (ret)
  2884. pr_err("Dynamic switch to %s mode failed!\n",
  2885. mode ? "command" : "video");
  2886. /*
  2887. * Destroy current ctrl sturcture as this is
  2888. * going to be re-initialized with the requested mode.
  2889. */
  2890. mdss_mdp_ctl_destroy(mdp5_data->ctl);
  2891. mdp5_data->ctl = NULL;
  2892. return 0;
  2893. }
  2894. int mdss_mdp_overlay_init(struct msm_fb_data_type *mfd)
  2895. {
  2896. struct device *dev = mfd->fbi->dev;
  2897. struct msm_mdp_interface *mdp5_interface = &mfd->mdp;
  2898. struct mdss_overlay_private *mdp5_data = NULL;
  2899. int rc;
  2900. mdp5_interface->on_fnc = mdss_mdp_overlay_on;
  2901. mdp5_interface->off_fnc = mdss_mdp_overlay_off;
  2902. mdp5_interface->release_fnc = __mdss_mdp_overlay_release_all;
  2903. mdp5_interface->do_histogram = NULL;
  2904. mdp5_interface->cursor_update = mdss_mdp_hw_cursor_update;
  2905. mdp5_interface->dma_fnc = mdss_mdp_overlay_pan_display;
  2906. mdp5_interface->ioctl_handler = mdss_mdp_overlay_ioctl_handler;
  2907. mdp5_interface->panel_register_done = mdss_panel_register_done;
  2908. mdp5_interface->kickoff_fnc = mdss_mdp_overlay_kickoff;
  2909. mdp5_interface->get_sync_fnc = mdss_mdp_rotator_sync_pt_get;
  2910. mdp5_interface->splash_init_fnc = mdss_mdp_splash_init;
  2911. mdp5_interface->configure_panel = mdss_mdp_update_panel_info;
  2912. mdp5_data = kmalloc(sizeof(struct mdss_overlay_private), GFP_KERNEL);
  2913. if (!mdp5_data) {
  2914. pr_err("fail to allocate mdp5 private data structure");
  2915. return -ENOMEM;
  2916. }
  2917. memset(mdp5_data, 0, sizeof(struct mdss_overlay_private));
  2918. INIT_LIST_HEAD(&mdp5_data->pipes_used);
  2919. INIT_LIST_HEAD(&mdp5_data->pipes_cleanup);
  2920. INIT_LIST_HEAD(&mdp5_data->rot_proc_list);
  2921. mutex_init(&mdp5_data->list_lock);
  2922. mutex_init(&mdp5_data->ov_lock);
  2923. mutex_init(&mdp5_data->dfps_lock);
  2924. mdp5_data->hw_refresh = true;
  2925. mdp5_data->overlay_play_enable = true;
  2926. mdp5_data->mdata = dev_get_drvdata(mfd->pdev->dev.parent);
  2927. if (!mdp5_data->mdata) {
  2928. pr_err("unable to initialize overlay for fb%d\n", mfd->index);
  2929. rc = -ENODEV;
  2930. goto init_fail;
  2931. }
  2932. mfd->mdp.private1 = mdp5_data;
  2933. mfd->wait_for_kickoff = true;
  2934. rc = mdss_mdp_overlay_fb_parse_dt(mfd);
  2935. if (rc)
  2936. return rc;
  2937. rc = sysfs_create_group(&dev->kobj, &mdp_overlay_sysfs_group);
  2938. if (rc) {
  2939. pr_err("vsync sysfs group creation failed, ret=%d\n", rc);
  2940. goto init_fail;
  2941. }
  2942. mdp5_data->vsync_event_sd = sysfs_get_dirent(dev->kobj.sd, NULL,
  2943. "vsync_event");
  2944. if (!mdp5_data->vsync_event_sd) {
  2945. pr_err("vsync_event sysfs lookup failed\n");
  2946. rc = -ENODEV;
  2947. goto init_fail;
  2948. }
  2949. if (mfd->panel_info->type == MIPI_VIDEO_PANEL) {
  2950. rc = sysfs_create_group(&dev->kobj,
  2951. &dynamic_fps_fs_attrs_group);
  2952. if (rc) {
  2953. pr_err("Error dfps sysfs creation ret=%d\n", rc);
  2954. goto init_fail;
  2955. }
  2956. }
  2957. if (mfd->panel_info->mipi.dynamic_switch_enabled ||
  2958. mfd->panel_info->type == MIPI_CMD_PANEL) {
  2959. rc = __vsync_retire_setup(mfd);
  2960. if (IS_ERR_VALUE(rc)) {
  2961. pr_err("unable to create vsync timeline\n");
  2962. goto init_fail;
  2963. }
  2964. }
  2965. mfd->mdp_sync_pt_data.async_wait_fences = true;
  2966. rc = sysfs_create_link_nowarn(&dev->kobj,
  2967. &mdp5_data->mdata->pdev->dev.kobj, "mdp");
  2968. if (rc)
  2969. pr_warn("problem creating link to mdp sysfs\n");
  2970. pm_runtime_set_suspended(&mfd->pdev->dev);
  2971. pm_runtime_enable(&mfd->pdev->dev);
  2972. kobject_uevent(&dev->kobj, KOBJ_ADD);
  2973. pr_debug("vsync kobject_uevent(KOBJ_ADD)\n");
  2974. mdp5_data->cpu_pm_hdl = add_event_timer(NULL, (void *)mdp5_data);
  2975. if (!mdp5_data->cpu_pm_hdl)
  2976. pr_warn("%s: unable to add event timer\n", __func__);
  2977. if (mfd->panel_info->cont_splash_enabled) {
  2978. rc = mdss_mdp_overlay_handoff(mfd);
  2979. if (rc) {
  2980. /*
  2981. * Even though handoff failed, it is not fatal.
  2982. * MDP can continue, just that we would have a longer
  2983. * delay in transitioning from splash screen to boot
  2984. * animation
  2985. */
  2986. pr_warn("Overlay handoff failed for fb%d. rc=%d\n",
  2987. mfd->index, rc);
  2988. rc = 0;
  2989. }
  2990. }
  2991. if (mdss_mdp_pp_overlay_init(mfd))
  2992. pr_warn("Failed to initialize pp overlay data.\n");
  2993. return rc;
  2994. init_fail:
  2995. kfree(mdp5_data);
  2996. return rc;
  2997. }
  2998. static int mdss_mdp_overlay_fb_parse_dt(struct msm_fb_data_type *mfd)
  2999. {
  3000. int rc = 0;
  3001. struct platform_device *pdev = mfd->pdev;
  3002. struct mdss_overlay_private *mdp5_mdata = mfd_to_mdp5_data(mfd);
  3003. mdp5_mdata->mixer_swap = of_property_read_bool(pdev->dev.of_node,
  3004. "qcom,mdss-mixer-swap");
  3005. if (mdp5_mdata->mixer_swap) {
  3006. pr_info("mixer swap is enabled for fb device=%s\n",
  3007. pdev->name);
  3008. }
  3009. return rc;
  3010. }
  3011. #if defined (CONFIG_FB_MSM_MDSS_DBG_SEQ_TICK)
  3012. void mdss_dbg_tick_save(int op_name)
  3013. {
  3014. ktime_t tick;
  3015. tick = ktime_get();
  3016. switch(op_name)
  3017. {
  3018. case COMMIT :
  3019. mdss_dbg_tick.commit[mdss_dbg_tick.commit_cnt] = ktime_to_ns(tick);
  3020. mdss_dbg_tick.commit_cnt++;
  3021. if(mdss_dbg_tick.commit_cnt > 9)
  3022. mdss_dbg_tick.commit_cnt = 0;
  3023. break;
  3024. case KICKOFF :
  3025. mdss_dbg_tick.kickoff[mdss_dbg_tick.kickoff_cnt] = ktime_to_ns(tick);
  3026. mdss_dbg_tick.kickoff_cnt++;
  3027. if(mdss_dbg_tick.kickoff_cnt > 9)
  3028. mdss_dbg_tick.kickoff_cnt = 0;
  3029. break;
  3030. case PP_DONE :
  3031. mdss_dbg_tick.pingpong_done[mdss_dbg_tick.pingpong_done_cnt] = ktime_to_ns(tick);
  3032. mdss_dbg_tick.pingpong_done_cnt++;
  3033. if(mdss_dbg_tick.pingpong_done_cnt > 9)
  3034. mdss_dbg_tick.pingpong_done_cnt = 0;
  3035. break;
  3036. }
  3037. }
  3038. #endif
  3039. /*
  3040. * [srcx,srcy,srcw,srch]->[dstx,dsty,dstw,dsth][flags]|src_format|bpp|pipe_ndx|
  3041. * mdp_clk = %ld, bus_ab = %llu, bus_ib = %llu
  3042. */
  3043. void mdss_mdp_underrun_dump_info(struct msm_fb_data_type *mfd)
  3044. {
  3045. struct mdss_mdp_pipe *pipe;
  3046. struct mdss_overlay_private *mdp5_data = mfd_to_mdp5_data(mfd);
  3047. int pcount = mdp5_data->mdata->nrgb_pipes+ mdp5_data->mdata->nvig_pipes+mdp5_data->mdata->ndma_pipes;
  3048. pr_info(" ============ dump_start ===========\n");
  3049. list_for_each_entry(pipe, &mdp5_data->pipes_used, list) {
  3050. if (pipe)
  3051. pr_info(" [%4d, %4d, %4d, %4d] -> [%4d, %4d, %4d, %4d]"
  3052. "|flags = %8d|src_format = %2d|bpp = %2d|ndx = %3d|\n",
  3053. pipe->src.x, pipe->src.y, pipe->src.w, pipe->src.h,
  3054. pipe->dst.x, pipe->dst.y, pipe->dst.w, pipe->dst.h,
  3055. pipe->flags, pipe->src_fmt->format, pipe->src_fmt->bpp,
  3056. pipe->ndx);
  3057. pr_info("pipe addr : %pK\n", pipe);
  3058. pcount--;
  3059. if(!pcount) break;
  3060. }
  3061. mdss_mdp_underrun_clk_info();
  3062. pr_info(" ============ dump_end =========== \n");
  3063. }