mdss_hdmi_edid.c 50 KB

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  1. /* Copyright (c) 2010-2014, The Linux Foundation. All rights reserved.
  2. *
  3. * This program is free software; you can redistribute it and/or modify
  4. * it under the terms of the GNU General Public License version 2 and
  5. * only version 2 as published by the Free Software Foundation.
  6. *
  7. * This program is distributed in the hope that it will be useful,
  8. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  10. * GNU General Public License for more details.
  11. */
  12. #include <linux/io.h>
  13. #include <linux/types.h>
  14. #include <mach/board.h>
  15. #include "mdss_hdmi_edid.h"
  16. #if defined (CONFIG_VIDEO_MHL_V2) || defined (CONFIG_VIDEO_MHL_SII8246)
  17. #include "../mhl_v2/sii8240/sii8240_driver.h"
  18. #endif
  19. #define DBC_START_OFFSET 4
  20. /*
  21. * As per CEA-861-E specification 7.5.2, there can be
  22. * upto 31 bytes following any tag (data block type).
  23. */
  24. #define MAX_DATA_BLOCK_SIZE 31
  25. #define HDMI_VSDB_3D_EVF_DATA_OFFSET(vsd) \
  26. (!((vsd)[8] & BIT(7)) ? 9 : (!((vsd)[8] & BIT(6)) ? 11 : 13))
  27. /*
  28. * As per the CEA-861E spec, there can be a total of 10 short audio
  29. * descriptors with each SAD being 3 bytes long.
  30. * Thus, the maximum length of the audio data block would be 30 bytes
  31. */
  32. #define MAX_AUDIO_DATA_BLOCK_SIZE 30
  33. #define MAX_SPKR_ALLOC_DATA_BLOCK_SIZE 3
  34. #define BUFF_SIZE_3D 128
  35. /* Support for first 5 EDID blocks */
  36. #define MAX_EDID_BLOCK_SIZE (0x80 * 5)
  37. enum data_block_types {
  38. RESERVED,
  39. AUDIO_DATA_BLOCK,
  40. VIDEO_DATA_BLOCK,
  41. VENDOR_SPECIFIC_DATA_BLOCK,
  42. SPEAKER_ALLOCATION_DATA_BLOCK,
  43. VESA_DTC_DATA_BLOCK,
  44. RESERVED2,
  45. USE_EXTENDED_TAG
  46. };
  47. struct hdmi_edid_sink_data {
  48. u32 disp_mode_list[HDMI_VFRMT_MAX];
  49. u32 disp_3d_mode_list[HDMI_VFRMT_MAX];
  50. u32 disp_multi_3d_mode_list[16];
  51. u32 disp_multi_3d_mode_list_cnt;
  52. u32 num_of_elements;
  53. u32 preferred_video_format;
  54. };
  55. struct hdmi_edid_ctrl {
  56. u8 pt_scan_info;
  57. u8 it_scan_info;
  58. u8 ce_scan_info;
  59. u16 physical_address;
  60. u32 video_resolution; /* selected by user */
  61. u32 sink_mode; /* HDMI or DVI */
  62. u16 audio_latency;
  63. u16 video_latency;
  64. u32 present_3d;
  65. #if defined (CONFIG_VIDEO_MHL_V2) || defined (CONFIG_VIDEO_MHL_SII8246)
  66. u32 audio_channel_info;
  67. #endif
  68. u8 audio_data_block[MAX_AUDIO_DATA_BLOCK_SIZE];
  69. int adb_size;
  70. u8 spkr_alloc_data_block[MAX_SPKR_ALLOC_DATA_BLOCK_SIZE];
  71. int sadb_size;
  72. u8 edid_buf[MAX_EDID_BLOCK_SIZE];
  73. struct hdmi_edid_sink_data sink_data;
  74. struct hdmi_edid_init_data init_data;
  75. };
  76. /* The Logic ID for HDMI TX Core. Currently only support 1 HDMI TX Core. */
  77. struct hdmi_edid_video_mode_property_type {
  78. u32 video_code;
  79. u32 active_h;
  80. u32 active_v;
  81. u32 interlaced;
  82. u32 total_h;
  83. u32 total_blank_h;
  84. u32 total_v;
  85. u32 total_blank_v;
  86. /* Must divide by 1000 to get the frequency */
  87. u32 freq_h;
  88. /* Must divide by 1000 to get the frequency */
  89. u32 freq_v;
  90. /* Must divide by 1000 to get the frequency */
  91. u32 pixel_freq;
  92. /* Must divide by 1000 to get the frequency */
  93. u32 refresh_rate;
  94. u32 aspect_ratio_4_3;
  95. };
  96. /* LUT is sorted from lowest Active H to highest Active H - ease searching */
  97. static struct hdmi_edid_video_mode_property_type
  98. hdmi_edid_disp_mode_lut[] = {
  99. /* All 640 H Active */
  100. {HDMI_VFRMT_640x480p60_4_3, 640, 480, false, 800, 160, 525, 45,
  101. 31465, 59940, 25175, 59940, true},
  102. {HDMI_VFRMT_640x480p60_4_3, 640, 480, false, 800, 160, 525, 45,
  103. 31500, 60000, 25200, 60000, true},
  104. /* All 720 H Active */
  105. {HDMI_VFRMT_720x576p50_4_3, 720, 576, false, 864, 144, 625, 49,
  106. 31250, 50000, 27000, 50000, true},
  107. {HDMI_VFRMT_720x480p60_4_3, 720, 480, false, 858, 138, 525, 45,
  108. 31465, 59940, 27000, 59940, true},
  109. {HDMI_VFRMT_720x480p60_4_3, 720, 480, false, 858, 138, 525, 45,
  110. 31500, 60000, 27030, 60000, true},
  111. {HDMI_VFRMT_720x576p100_4_3, 720, 576, false, 864, 144, 625, 49,
  112. 62500, 100000, 54000, 100000, true},
  113. {HDMI_VFRMT_720x480p120_4_3, 720, 480, false, 858, 138, 525, 45,
  114. 62937, 119880, 54000, 119880, true},
  115. {HDMI_VFRMT_720x480p120_4_3, 720, 480, false, 858, 138, 525, 45,
  116. 63000, 120000, 54054, 120000, true},
  117. {HDMI_VFRMT_720x576p200_4_3, 720, 576, false, 864, 144, 625, 49,
  118. 125000, 200000, 108000, 200000, true},
  119. {HDMI_VFRMT_720x480p240_4_3, 720, 480, false, 858, 138, 525, 45,
  120. 125874, 239760, 108000, 239000, true},
  121. {HDMI_VFRMT_720x480p240_4_3, 720, 480, false, 858, 138, 525, 45,
  122. 126000, 240000, 108108, 240000, true},
  123. /* All 1280 H Active */
  124. {HDMI_VFRMT_1280x720p50_16_9, 1280, 720, false, 1980, 700, 750, 30,
  125. 37500, 50000, 74250, 50000, false},
  126. {HDMI_VFRMT_1280x720p60_16_9, 1280, 720, false, 1650, 370, 750, 30,
  127. 44955, 59940, 74176, 59940, false},
  128. {HDMI_VFRMT_1280x720p60_16_9, 1280, 720, false, 1650, 370, 750, 30,
  129. 45000, 60000, 74250, 60000, false},
  130. {HDMI_VFRMT_1280x720p100_16_9, 1280, 720, false, 1980, 700, 750, 30,
  131. 75000, 100000, 148500, 100000, false},
  132. {HDMI_VFRMT_1280x720p120_16_9, 1280, 720, false, 1650, 370, 750, 30,
  133. 89909, 119880, 148352, 119880, false},
  134. {HDMI_VFRMT_1280x720p120_16_9, 1280, 720, false, 1650, 370, 750, 30,
  135. 90000, 120000, 148500, 120000, false},
  136. {HDMI_VFRMT_1280x1024p60_5_4, 1280, 1024, false, 1688, 408, 1066, 42,
  137. 63981, 60020, 108000, 60000, false},
  138. /* All 1024 H Active */
  139. {HDMI_VFRMT_1024x768p60_4_3, 1024, 768, false, 1344, 320, 806, 38,
  140. 48363, 60004, 65000, 60000, false},
  141. /* All 1440 H Active */
  142. {HDMI_VFRMT_1440x576i50_4_3, 1440, 576, true, 1728, 288, 625, 24,
  143. 15625, 50000, 27000, 50000, true},
  144. {HDMI_VFRMT_720x288p50_4_3, 1440, 288, false, 1728, 288, 312, 24,
  145. 15625, 50080, 27000, 50000, true},
  146. {HDMI_VFRMT_720x288p50_4_3, 1440, 288, false, 1728, 288, 313, 25,
  147. 15625, 49920, 27000, 50000, true},
  148. {HDMI_VFRMT_720x288p50_4_3, 1440, 288, false, 1728, 288, 314, 26,
  149. 15625, 49761, 27000, 50000, true},
  150. {HDMI_VFRMT_1440x576p50_4_3, 1440, 576, false, 1728, 288, 625, 49,
  151. 31250, 50000, 54000, 50000, true},
  152. {HDMI_VFRMT_1440x480i60_4_3, 1440, 480, true, 1716, 276, 525, 22,
  153. 15734, 59940, 27000, 59940, true},
  154. {HDMI_VFRMT_1440x240p60_4_3, 1440, 240, false, 1716, 276, 262, 22,
  155. 15734, 60054, 27000, 59940, true},
  156. {HDMI_VFRMT_1440x240p60_4_3, 1440, 240, false, 1716, 276, 263, 23,
  157. 15734, 59826, 27000, 59940, true},
  158. {HDMI_VFRMT_1440x480p60_4_3, 1440, 480, false, 1716, 276, 525, 45,
  159. 31469, 59940, 54000, 59940, true},
  160. {HDMI_VFRMT_1440x480i60_4_3, 1440, 480, true, 1716, 276, 525, 22,
  161. 15750, 60000, 27027, 60000, true},
  162. {HDMI_VFRMT_1440x240p60_4_3, 1440, 240, false, 1716, 276, 262, 22,
  163. 15750, 60115, 27027, 60000, true},
  164. {HDMI_VFRMT_1440x240p60_4_3, 1440, 240, false, 1716, 276, 263, 23,
  165. 15750, 59886, 27027, 60000, true},
  166. {HDMI_VFRMT_1440x480p60_4_3, 1440, 480, false, 1716, 276, 525, 45,
  167. 31500, 60000, 54054, 60000, true},
  168. {HDMI_VFRMT_1440x576i100_4_3, 1440, 576, true, 1728, 288, 625, 24,
  169. 31250, 100000, 54000, 100000, true},
  170. {HDMI_VFRMT_1440x480i120_4_3, 1440, 480, true, 1716, 276, 525, 22,
  171. 31469, 119880, 54000, 119880, true},
  172. {HDMI_VFRMT_1440x480i120_4_3, 1440, 480, true, 1716, 276, 525, 22,
  173. 31500, 120000, 54054, 120000, true},
  174. {HDMI_VFRMT_1440x576i200_4_3, 1440, 576, true, 1728, 288, 625, 24,
  175. 62500, 200000, 108000, 200000, true},
  176. {HDMI_VFRMT_1440x480i240_4_3, 1440, 480, true, 1716, 276, 525, 22,
  177. 62937, 239760, 108000, 239000, true},
  178. {HDMI_VFRMT_1440x480i240_4_3, 1440, 480, true, 1716, 276, 525, 22,
  179. 63000, 240000, 108108, 240000, true},
  180. /* All 1920 H Active */
  181. {HDMI_VFRMT_1920x1080p60_16_9, 1920, 1080, false, 2200, 280, 1125,
  182. 45, 67433, 59940, 148352, 59940, false},
  183. {HDMI_VFRMT_1920x1080p60_16_9, 1920, 1080, true, 2200, 280, 1125,
  184. 45, 67500, 60000, 148500, 60000, false},
  185. {HDMI_VFRMT_1920x1080p50_16_9, 1920, 1080, false, 2640, 720, 1125,
  186. 45, 56250, 50000, 148500, 50000, false},
  187. {HDMI_VFRMT_1920x1080p24_16_9, 1920, 1080, false, 2750, 830, 1125,
  188. 45, 26973, 23976, 74176, 24000, false},
  189. {HDMI_VFRMT_1920x1080p24_16_9, 1920, 1080, false, 2750, 830, 1125,
  190. 45, 27000, 24000, 74250, 24000, false},
  191. {HDMI_VFRMT_1920x1080p25_16_9, 1920, 1080, false, 2640, 720, 1125,
  192. 45, 28125, 25000, 74250, 25000, false},
  193. {HDMI_VFRMT_1920x1080p30_16_9, 1920, 1080, false, 2200, 280, 1125,
  194. 45, 33716, 29970, 74176, 30000, false},
  195. {HDMI_VFRMT_1920x1080p30_16_9, 1920, 1080, false, 2200, 280, 1125,
  196. 45, 33750, 30000, 74250, 30000, false},
  197. {HDMI_VFRMT_1920x1080i50_16_9, 1920, 1080, true, 2304, 384, 1250,
  198. 85, 31250, 50000, 72000, 50000, false},
  199. {HDMI_VFRMT_1920x1080i60_16_9, 1920, 1080, true, 2200, 280, 1125,
  200. 22, 33716, 59940, 74176, 59940, false},
  201. {HDMI_VFRMT_1920x1080i60_16_9, 1920, 1080, true, 2200, 280, 1125,
  202. 22, 33750, 60000, 74250, 60000, false},
  203. {HDMI_VFRMT_1920x1080i100_16_9, 1920, 1080, true, 2640, 720, 1125,
  204. 22, 56250, 100000, 148500, 100000, false},
  205. {HDMI_VFRMT_1920x1080i120_16_9, 1920, 1080, true, 2200, 280, 1125,
  206. 22, 67432, 119880, 148352, 119980, false},
  207. {HDMI_VFRMT_1920x1080i120_16_9, 1920, 1080, true, 2200, 280, 1125,
  208. 22, 67500, 120000, 148500, 120000, false},
  209. /* All 2560 H Active */
  210. {HDMI_VFRMT_2560x1600p60_16_9, 2560, 1600, false, 2720, 160, 1646,
  211. 46, 98700, 60000, 268500, 60000, false},
  212. /* All 2880 H Active */
  213. {HDMI_VFRMT_2880x576i50_4_3, 2880, 576, true, 3456, 576, 625, 24,
  214. 15625, 50000, 54000, 50000, true},
  215. {HDMI_VFRMT_2880x288p50_4_3, 2880, 576, false, 3456, 576, 312, 24,
  216. 15625, 50080, 54000, 50000, true},
  217. {HDMI_VFRMT_2880x288p50_4_3, 2880, 576, false, 3456, 576, 313, 25,
  218. 15625, 49920, 54000, 50000, true},
  219. {HDMI_VFRMT_2880x288p50_4_3, 2880, 576, false, 3456, 576, 314, 26,
  220. 15625, 49761, 54000, 50000, true},
  221. {HDMI_VFRMT_2880x576p50_4_3, 2880, 576, false, 3456, 576, 625, 49,
  222. 31250, 50000, 108000, 50000, true},
  223. {HDMI_VFRMT_2880x480i60_4_3, 2880, 480, true, 3432, 552, 525, 22,
  224. 15734, 59940, 54000, 59940, true},
  225. {HDMI_VFRMT_2880x240p60_4_3, 2880, 480, false, 3432, 552, 262, 22,
  226. 15734, 60054, 54000, 59940, true},
  227. {HDMI_VFRMT_2880x240p60_4_3, 2880, 480, false, 3432, 552, 263, 23,
  228. 15734, 59940, 54000, 59940, true},
  229. {HDMI_VFRMT_2880x480p60_4_3, 2880, 480, false, 3432, 552, 525, 45,
  230. 31469, 59940, 108000, 59940, true},
  231. {HDMI_VFRMT_2880x480i60_4_3, 2880, 480, true, 3432, 552, 525, 22,
  232. 15750, 60000, 54054, 60000, true},
  233. {HDMI_VFRMT_2880x240p60_4_3, 2880, 240, false, 3432, 552, 262, 22,
  234. 15750, 60115, 54054, 60000, true},
  235. {HDMI_VFRMT_2880x240p60_4_3, 2880, 240, false, 3432, 552, 262, 23,
  236. 15750, 59886, 54054, 60000, true},
  237. {HDMI_VFRMT_2880x480p60_4_3, 2880, 480, false, 3432, 552, 525, 45,
  238. 31500, 60000, 108108, 60000, true},
  239. };
  240. int hdmi_forced_resolution = -1;
  241. static ssize_t hdmi_edid_sysfs_rda_modes(struct device *dev,
  242. struct device_attribute *attr, char *buf)
  243. {
  244. ssize_t ret = 0;
  245. int i;
  246. struct hdmi_edid_ctrl *edid_ctrl =
  247. hdmi_get_featuredata_from_sysfs_dev(dev, HDMI_TX_FEAT_EDID);
  248. if (!edid_ctrl) {
  249. DEV_ERR("%s: invalid input\n", __func__);
  250. return -EINVAL;
  251. }
  252. buf[0] = 0;
  253. if (edid_ctrl->sink_data.num_of_elements) {
  254. u32 *video_mode = edid_ctrl->sink_data.disp_mode_list;
  255. for (i = 0; i < edid_ctrl->sink_data.num_of_elements; ++i) {
  256. if (!hdmi_get_supported_mode(*video_mode))
  257. continue;
  258. if (ret > 0)
  259. ret += scnprintf(buf + ret, PAGE_SIZE - ret,
  260. ",%d", *video_mode++);
  261. else
  262. ret += scnprintf(buf + ret, PAGE_SIZE - ret,
  263. "%d", *video_mode++);
  264. }
  265. } else {
  266. ret += scnprintf(buf + ret, PAGE_SIZE - ret, "%d",
  267. edid_ctrl->video_resolution);
  268. }
  269. if (hdmi_forced_resolution >= 0)
  270. ret = snprintf(buf, PAGE_SIZE, "%d", hdmi_forced_resolution+1);
  271. DEV_INFO("%s: '%s'\n", __func__, buf);
  272. ret += scnprintf(buf + ret, PAGE_SIZE - ret, "\n");
  273. return ret;
  274. } /* hdmi_edid_sysfs_rda_modes */
  275. static DEVICE_ATTR(edid_modes, S_IRUGO, hdmi_edid_sysfs_rda_modes, NULL);
  276. static ssize_t hdmi_edid_sysfs_rda_physical_address(struct device *dev,
  277. struct device_attribute *attr, char *buf)
  278. {
  279. ssize_t ret;
  280. struct hdmi_edid_ctrl *edid_ctrl =
  281. hdmi_get_featuredata_from_sysfs_dev(dev, HDMI_TX_FEAT_EDID);
  282. if (!edid_ctrl) {
  283. DEV_ERR("%s: invalid input\n", __func__);
  284. return -EINVAL;
  285. }
  286. ret = scnprintf(buf, PAGE_SIZE, "%d\n", edid_ctrl->physical_address);
  287. DEV_DBG("%s: '%d'\n", __func__, edid_ctrl->physical_address);
  288. return ret;
  289. } /* hdmi_edid_sysfs_rda_physical_address */
  290. static DEVICE_ATTR(pa, S_IRUSR, hdmi_edid_sysfs_rda_physical_address, NULL);
  291. static ssize_t hdmi_edid_sysfs_rda_scan_info(struct device *dev,
  292. struct device_attribute *attr, char *buf)
  293. {
  294. ssize_t ret;
  295. struct hdmi_edid_ctrl *edid_ctrl =
  296. hdmi_get_featuredata_from_sysfs_dev(dev, HDMI_TX_FEAT_EDID);
  297. if (!edid_ctrl) {
  298. DEV_ERR("%s: invalid input\n", __func__);
  299. return -EINVAL;
  300. }
  301. ret = scnprintf(buf, PAGE_SIZE, "%d, %d, %d\n", edid_ctrl->pt_scan_info,
  302. edid_ctrl->it_scan_info, edid_ctrl->ce_scan_info);
  303. DEV_DBG("%s: '%s'\n", __func__, buf);
  304. return ret;
  305. } /* hdmi_edid_sysfs_rda_scan_info */
  306. static DEVICE_ATTR(scan_info, S_IRUGO, hdmi_edid_sysfs_rda_scan_info, NULL);
  307. static ssize_t hdmi_edid_sysfs_rda_3d_modes(struct device *dev,
  308. struct device_attribute *attr, char *buf)
  309. {
  310. ssize_t ret = 0;
  311. int i;
  312. char buff_3d[BUFF_SIZE_3D];
  313. struct hdmi_edid_ctrl *edid_ctrl =
  314. hdmi_get_featuredata_from_sysfs_dev(dev, HDMI_TX_FEAT_EDID);
  315. if (!edid_ctrl) {
  316. DEV_ERR("%s: invalid input\n", __func__);
  317. return -EINVAL;
  318. }
  319. buf[0] = 0;
  320. if (edid_ctrl->sink_data.num_of_elements) {
  321. u32 *video_mode = edid_ctrl->sink_data.disp_mode_list;
  322. u32 *video_3d_mode = edid_ctrl->sink_data.disp_3d_mode_list;
  323. for (i = 0; i < edid_ctrl->sink_data.num_of_elements; ++i) {
  324. ret = hdmi_get_video_3d_fmt_2string(*video_3d_mode++,
  325. buff_3d, sizeof(buff_3d));
  326. if (ret > 0)
  327. ret += scnprintf(buf + ret, PAGE_SIZE - ret,
  328. ",%d=%s", *video_mode++,
  329. buff_3d);
  330. else
  331. ret += scnprintf(buf + ret, PAGE_SIZE - ret,
  332. "%d=%s", *video_mode++,
  333. buff_3d);
  334. }
  335. } else {
  336. ret += scnprintf(buf + ret, PAGE_SIZE - ret, "%d",
  337. edid_ctrl->video_resolution);
  338. }
  339. DEV_DBG("%s: '%s'\n", __func__, buf);
  340. ret += scnprintf(buf + ret, PAGE_SIZE - ret, "\n");
  341. return ret;
  342. } /* hdmi_edid_sysfs_rda_3d_modes */
  343. static DEVICE_ATTR(edid_3d_modes, S_IRUGO, hdmi_edid_sysfs_rda_3d_modes, NULL);
  344. static ssize_t hdmi_common_rda_edid_raw_data(struct device *dev,
  345. struct device_attribute *attr, char *buf)
  346. {
  347. struct hdmi_edid_ctrl *edid_ctrl =
  348. hdmi_get_featuredata_from_sysfs_dev(dev, HDMI_TX_FEAT_EDID);
  349. if (!edid_ctrl) {
  350. DEV_ERR("%s: invalid input\n", __func__);
  351. return -EINVAL;
  352. }
  353. memcpy(buf, edid_ctrl->edid_buf,
  354. sizeof(edid_ctrl->edid_buf));
  355. return sizeof(edid_ctrl->edid_buf);
  356. } /* hdmi_common_rda_edid_raw_data */
  357. static DEVICE_ATTR(edid_raw_data, S_IRUGO, hdmi_common_rda_edid_raw_data, NULL);
  358. static struct attribute *hdmi_edid_fs_attrs[] = {
  359. &dev_attr_edid_modes.attr,
  360. &dev_attr_pa.attr,
  361. &dev_attr_scan_info.attr,
  362. &dev_attr_edid_3d_modes.attr,
  363. &dev_attr_edid_raw_data.attr,
  364. NULL,
  365. };
  366. static struct attribute_group hdmi_edid_fs_attrs_group = {
  367. .attrs = hdmi_edid_fs_attrs,
  368. };
  369. #if defined (CONFIG_VIDEO_MHL_V2) || defined (CONFIG_VIDEO_MHL_SII8246)
  370. struct hdmi_edid_ctrl *edid_ctrl_ext;
  371. #endif
  372. #if !defined (CONFIG_VIDEO_MHL_V2) || defined (CONFIG_VIDEO_MHL_SII8246)
  373. static int hdmi_edid_read_block(struct hdmi_edid_ctrl *edid_ctrl, int block,
  374. u8 *edid_buf)
  375. {
  376. const u8 *b = NULL;
  377. u32 ndx, check_sum, print_len;
  378. int block_size;
  379. int i, status;
  380. int retry_cnt = 0;
  381. struct hdmi_tx_ddc_data ddc_data;
  382. b = edid_buf;
  383. if (!edid_ctrl) {
  384. DEV_ERR("%s: invalid input\n", __func__);
  385. return -EINVAL;
  386. }
  387. read_retry:
  388. block_size = 0x80;
  389. status = 0;
  390. do {
  391. DEV_DBG("EDID: reading block(%d) with block-size=%d\n",
  392. block, block_size);
  393. for (i = 0; i < 0x80; i += block_size) {
  394. memset(&ddc_data, 0, sizeof(ddc_data));
  395. ddc_data.dev_addr = 0xA0;
  396. ddc_data.offset = block*0x80 + i;
  397. ddc_data.data_buf = edid_buf+i;
  398. ddc_data.data_len = block_size;
  399. ddc_data.request_len = block_size;
  400. ddc_data.retry = 1;
  401. ddc_data.what = "EDID";
  402. ddc_data.no_align = false;
  403. /*Read EDID twice with 32bit alighnment too */
  404. if (block < 2)
  405. status = hdmi_ddc_read(
  406. edid_ctrl->init_data.ddc_ctrl,
  407. &ddc_data);
  408. else
  409. status = hdmi_ddc_read_seg(
  410. edid_ctrl->init_data.ddc_ctrl,
  411. &ddc_data);
  412. if (status)
  413. break;
  414. }
  415. block_size /= 2;
  416. } while (status && (block_size >= 16));
  417. /* EDID Debug - YHM */
  418. pr_info("****EDID : [%d] block****\n", block);
  419. for (ndx = 0; ndx < 0x80; ndx += 16)
  420. pr_info("EDID[%02x-%02x] %02x %02x %02x %02x "
  421. "%02x %02x %02x %02x %02x %02x %02x %02x "
  422. "%02x %02x %02x %02x\n", ndx, ndx+15,
  423. b[ndx+0], b[ndx+1], b[ndx+2], b[ndx+3],
  424. b[ndx+4], b[ndx+5], b[ndx+6], b[ndx+7],
  425. b[ndx+8], b[ndx+9], b[ndx+10], b[ndx+11],
  426. b[ndx+12], b[ndx+13], b[ndx+14], b[ndx+15]);
  427. if (status)
  428. goto error;
  429. /* Calculate checksum */
  430. check_sum = 0;
  431. for (ndx = 0; ndx < 0x80; ++ndx)
  432. check_sum += edid_buf[ndx];
  433. if (check_sum & 0xFF) {
  434. DEV_ERR("%s: failed CHECKSUM (read:%x, expected:%x)\n",
  435. __func__, (u8)edid_buf[0x7F], (u8)check_sum);
  436. for (ndx = 0; ndx < 0x100; ndx += 4)
  437. DEV_DBG("EDID[%02x-%02x] %02x %02x %02x %02x\n",
  438. ndx, ndx+3,
  439. b[ndx+0], b[ndx+1], b[ndx+2], b[ndx+3]);
  440. status = -EPROTO;
  441. if (retry_cnt++ < 3) {
  442. DEV_DBG("Retrying reading EDID %d time\n", retry_cnt);
  443. goto read_retry;
  444. }
  445. goto error;
  446. }
  447. print_len = 0x80;
  448. for (ndx = 0; ndx < print_len; ndx += 4)
  449. DEV_DBG("EDID[%02x-%02x] %02x %02x %02x %02x\n",
  450. ndx, ndx+3,
  451. b[ndx+0], b[ndx+1], b[ndx+2], b[ndx+3]);
  452. error:
  453. return status;
  454. } /* hdmi_edid_read_block */
  455. #endif
  456. #define EDID_BLK_LEN 128
  457. #define EDID_DTD_LEN 18
  458. static const u8 *hdmi_edid_find_block(const u8 *in_buf, u32 start_offset,
  459. u8 type, u8 *len)
  460. {
  461. /* the start of data block collection, start of Video Data Block */
  462. u32 offset = start_offset;
  463. u32 dbc_offset = in_buf[2];
  464. if (dbc_offset >= EDID_BLK_LEN - EDID_DTD_LEN)
  465. return NULL;
  466. *len = 0;
  467. /*
  468. * * edid buffer 1, byte 2 being 4 means no non-DTD/Data block
  469. * collection present.
  470. * * edid buffer 1, byte 2 being 0 menas no non-DTD/DATA block
  471. * collection present and no DTD data present.
  472. */
  473. if ((dbc_offset == 0) || (dbc_offset == 4)) {
  474. DEV_WARN("EDID: no DTD or non-DTD data present\n");
  475. return NULL;
  476. }
  477. while (offset < dbc_offset) {
  478. u8 block_len = in_buf[offset] & 0x1F;
  479. if ((offset + block_len <= dbc_offset) &&
  480. (in_buf[offset] >> 5) == type) {
  481. *len = block_len;
  482. DEV_DBG("%s: EDID: block=%d found @ 0x%x w/ len=%d\n",
  483. __func__, type, offset, block_len);
  484. return in_buf + offset;
  485. }
  486. offset += 1 + block_len;
  487. }
  488. DEV_WARN("%s: EDID: type=%d block not found in EDID block\n",
  489. __func__, type);
  490. return NULL;
  491. } /* hdmi_edid_find_block */
  492. static void hdmi_edid_extract_extended_data_blocks(
  493. struct hdmi_edid_ctrl *edid_ctrl, const u8 *in_buf)
  494. {
  495. u8 len = 0;
  496. u32 start_offset = DBC_START_OFFSET;
  497. u8 const *etag = NULL;
  498. if (!edid_ctrl) {
  499. DEV_ERR("%s: invalid input\n", __func__);
  500. return;
  501. }
  502. /* A Tage code of 7 identifies extended data blocks */
  503. etag = hdmi_edid_find_block(in_buf, start_offset, USE_EXTENDED_TAG,
  504. &len);
  505. while (etag != NULL) {
  506. /* The extended data block should at least be 2 bytes long */
  507. if (len < 2) {
  508. DEV_DBG("%s: data block of len < 2 bytes. Ignor...\n",
  509. __func__);
  510. } else {
  511. /*
  512. * The second byte of the extended data block has the
  513. * extended tag code
  514. */
  515. switch (etag[1]) {
  516. case 0:
  517. /* Video Capability Data Block */
  518. DEV_DBG("%s: EDID: VCDB=%02X %02X\n", __func__,
  519. etag[1], etag[2]);
  520. /*
  521. * Check if the sink specifies underscan
  522. * support for:
  523. * BIT 5: preferred video format
  524. * BIT 3: IT video format
  525. * BIT 1: CE video format
  526. */
  527. edid_ctrl->pt_scan_info =
  528. (etag[2] & (BIT(4) | BIT(5))) >> 4;
  529. edid_ctrl->it_scan_info =
  530. (etag[2] & (BIT(3) | BIT(2))) >> 2;
  531. edid_ctrl->ce_scan_info =
  532. etag[2] & (BIT(1) | BIT(0));
  533. DEV_DBG("%s: Scan Info (pt|it|ce): (%d|%d|%d)",
  534. __func__,
  535. edid_ctrl->pt_scan_info,
  536. edid_ctrl->it_scan_info,
  537. edid_ctrl->ce_scan_info);
  538. break;
  539. default:
  540. DEV_DBG("%s: Tag Code %d not supported\n",
  541. __func__, etag[1]);
  542. break;
  543. }
  544. }
  545. /* There could be more that one extended data block */
  546. start_offset = etag - in_buf + len + 1;
  547. etag = hdmi_edid_find_block(in_buf, start_offset,
  548. USE_EXTENDED_TAG, &len);
  549. }
  550. } /* hdmi_edid_extract_extended_data_blocks */
  551. static void hdmi_edid_extract_3d_present(struct hdmi_edid_ctrl *edid_ctrl,
  552. const u8 *in_buf)
  553. {
  554. u8 len, offset;
  555. const u8 *vsd = NULL;
  556. if (!edid_ctrl) {
  557. DEV_ERR("%s: invalid input\n", __func__);
  558. return;
  559. }
  560. vsd = hdmi_edid_find_block(in_buf, DBC_START_OFFSET,
  561. VENDOR_SPECIFIC_DATA_BLOCK, &len);
  562. edid_ctrl->present_3d = 0;
  563. if (vsd == NULL || len == 0 || len > MAX_DATA_BLOCK_SIZE) {
  564. DEV_DBG("%s: No/Invalid vendor Specific Data Block\n",
  565. __func__);
  566. return;
  567. }
  568. offset = HDMI_VSDB_3D_EVF_DATA_OFFSET(vsd);
  569. DEV_DBG("%s: EDID: 3D present @ 0x%x = %02x\n", __func__,
  570. offset, vsd[offset]);
  571. if (vsd[offset] >> 7) { /* 3D format indication present */
  572. DEV_INFO("%s: EDID: 3D present, 3D-len=%d\n", __func__,
  573. vsd[offset+1] & 0x1F);
  574. edid_ctrl->present_3d = 1;
  575. }
  576. } /* hdmi_edid_extract_3d_present */
  577. static void hdmi_edid_extract_audio_data_blocks(
  578. struct hdmi_edid_ctrl *edid_ctrl, const u8 *in_buf)
  579. {
  580. u8 len, cnt = 0;
  581. const u8 *adb = NULL;
  582. u16 audio_ch = 0;
  583. u32 bit_rate = 0;
  584. if (!edid_ctrl) {
  585. DEV_ERR("%s: invalid input\n", __func__);
  586. return;
  587. }
  588. if (in_buf[3] & (1<<6)) {
  589. DEV_INFO("%s: default audio format\n", __func__);
  590. edid_ctrl_ext->audio_channel_info |= 2;
  591. }
  592. adb = hdmi_edid_find_block(in_buf, DBC_START_OFFSET, AUDIO_DATA_BLOCK,
  593. &len);
  594. if ((adb == NULL) || (len > MAX_AUDIO_DATA_BLOCK_SIZE)) {
  595. DEV_DBG("%s: No/Invalid Audio Data Block\n",
  596. __func__);
  597. return;
  598. }
  599. memcpy(edid_ctrl->audio_data_block, adb + 1, len);
  600. edid_ctrl->adb_size = len;
  601. while (len >= 3 && cnt < 16) {
  602. DEV_INFO("%s: ch=%d fmt=%d sampling=0x%02x bitdepth=0x%02x\n",
  603. __func__, (adb[1]&0x7)+1, adb[1]>>3, adb[2], adb[3]);
  604. if(adb[1]>>3 == 1) {
  605. audio_ch |= (1 << (adb[1] & 0x7));
  606. if((adb[1] & 0x7) > 0x04)
  607. audio_ch |= 0x20;
  608. if (adb[3] & 0x07) {
  609. bit_rate = adb[3] & 0x7;
  610. bit_rate |= (adb[2] & 0x7F) << 3;
  611. }
  612. }
  613. cnt++;
  614. len -= 3;
  615. adb += 3;
  616. }
  617. #if defined (CONFIG_VIDEO_MHL_V2) || defined (CONFIG_VIDEO_MHL_SII8246)
  618. edid_ctrl_ext->audio_channel_info |= (bit_rate << 16);
  619. edid_ctrl_ext->audio_channel_info |= audio_ch;
  620. DEV_INFO("%s: HDMI Audio info : 0x%X\n", __func__,
  621. edid_ctrl_ext->audio_channel_info);
  622. #endif
  623. } /* hdmi_edid_extract_audio_data_blocks */
  624. #if defined (CONFIG_VIDEO_MHL_V2) || defined (CONFIG_VIDEO_MHL_SII8246)
  625. u32 hdmi_get_audio_ch(void)
  626. {
  627. return edid_ctrl_ext->audio_channel_info;
  628. }
  629. #endif
  630. static void hdmi_edid_extract_speaker_allocation_data(
  631. struct hdmi_edid_ctrl *edid_ctrl, const u8 *in_buf)
  632. {
  633. u8 len;
  634. const u8 *sadb = NULL;
  635. u16 speaker_allocation = 0;
  636. if (!edid_ctrl) {
  637. DEV_ERR("%s: invalid input\n", __func__);
  638. return;
  639. }
  640. sadb = hdmi_edid_find_block(in_buf, DBC_START_OFFSET,
  641. SPEAKER_ALLOCATION_DATA_BLOCK, &len);
  642. if ((sadb == NULL) || (len != MAX_SPKR_ALLOC_DATA_BLOCK_SIZE)) {
  643. DEV_DBG("%s: No/Invalid Speaker Allocation Data Block\n",
  644. __func__);
  645. return;
  646. }
  647. memcpy(edid_ctrl->spkr_alloc_data_block, sadb + 1, len);
  648. edid_ctrl->sadb_size = len;
  649. speaker_allocation |= (sadb[1] & 0x7F);
  650. DEV_INFO("%s: EDID: speaker alloc data SP byte = %08x %s%s%s%s%s%s%s\n",
  651. __func__, sadb[1],
  652. (sadb[1] & BIT(0)) ? "FL/FR," : "",
  653. (sadb[1] & BIT(1)) ? "LFE," : "",
  654. (sadb[1] & BIT(2)) ? "FC," : "",
  655. (sadb[1] & BIT(3)) ? "RL/RR," : "",
  656. (sadb[1] & BIT(4)) ? "RC," : "",
  657. (sadb[1] & BIT(5)) ? "FLC/FRC," : "",
  658. (sadb[1] & BIT(6)) ? "RLC/RRC," : "");
  659. edid_ctrl_ext->audio_channel_info |= (speaker_allocation << 8);
  660. } /* hdmi_edid_extract_speaker_allocation_data */
  661. static void hdmi_edid_extract_latency_fields(struct hdmi_edid_ctrl *edid_ctrl,
  662. const u8 *in_buf)
  663. {
  664. u8 len;
  665. const u8 *vsd = NULL;
  666. if (!edid_ctrl) {
  667. DEV_ERR("%s: invalid input\n", __func__);
  668. return;
  669. }
  670. vsd = hdmi_edid_find_block(in_buf, DBC_START_OFFSET,
  671. VENDOR_SPECIFIC_DATA_BLOCK, &len);
  672. if (vsd == NULL || len == 0 || len > MAX_DATA_BLOCK_SIZE ||
  673. !(vsd[8] & BIT(7))) {
  674. edid_ctrl->video_latency = (u16)-1;
  675. edid_ctrl->audio_latency = (u16)-1;
  676. DEV_DBG("%s: EDID: No audio/video latency present\n", __func__);
  677. } else {
  678. edid_ctrl->video_latency = vsd[9];
  679. edid_ctrl->audio_latency = vsd[10];
  680. DEV_DBG("%s: EDID: video-latency=%04x, audio-latency=%04x\n",
  681. __func__, edid_ctrl->video_latency,
  682. edid_ctrl->audio_latency);
  683. }
  684. } /* hdmi_edid_extract_latency_fields */
  685. static u32 hdmi_edid_extract_ieee_reg_id(struct hdmi_edid_ctrl *edid_ctrl,
  686. const u8 *in_buf)
  687. {
  688. u8 len;
  689. const u8 *vsd = NULL;
  690. if (!edid_ctrl) {
  691. DEV_ERR("%s: invalid input\n", __func__);
  692. return 0;
  693. }
  694. vsd = hdmi_edid_find_block(in_buf, DBC_START_OFFSET,
  695. VENDOR_SPECIFIC_DATA_BLOCK, &len);
  696. if (vsd == NULL || len == 0 || len > MAX_DATA_BLOCK_SIZE) {
  697. DEV_DBG("%s: No/Invalid Vendor Specific Data Block\n",
  698. __func__);
  699. return 0;
  700. }
  701. DEV_DBG("%s: EDID: VSD PhyAddr=%04x, MaxTMDS=%dMHz\n", __func__,
  702. ((u32)vsd[4] << 8) + (u32)vsd[5], (u32)vsd[7] * 5);
  703. edid_ctrl->physical_address = ((u16)vsd[4] << 8) + (u16)vsd[5];
  704. return ((u32)vsd[3] << 16) + ((u32)vsd[2] << 8) + (u32)vsd[1];
  705. } /* hdmi_edid_extract_ieee_reg_id */
  706. static void hdmi_edid_extract_vendor_id(const u8 *in_buf,
  707. char *vendor_id)
  708. {
  709. u32 id_codes = ((u32)in_buf[8] << 8) + in_buf[9];
  710. vendor_id[0] = 'A' - 1 + ((id_codes >> 10) & 0x1F);
  711. vendor_id[1] = 'A' - 1 + ((id_codes >> 5) & 0x1F);
  712. vendor_id[2] = 'A' - 1 + (id_codes & 0x1F);
  713. vendor_id[3] = 0;
  714. } /* hdmi_edid_extract_vendor_id */
  715. static u32 hdmi_edid_check_header(const u8 *edid_buf)
  716. {
  717. return (edid_buf[0] == 0x00) && (edid_buf[1] == 0xff)
  718. && (edid_buf[2] == 0xff) && (edid_buf[3] == 0xff)
  719. && (edid_buf[4] == 0xff) && (edid_buf[5] == 0xff)
  720. && (edid_buf[6] == 0xff) && (edid_buf[7] == 0x00);
  721. } /* hdmi_edid_check_header */
  722. static void hdmi_edid_detail_desc(const u8 *data_buf, u32 *disp_mode)
  723. {
  724. u32 aspect_ratio_4_3 = false;
  725. u32 interlaced = false;
  726. u32 active_h = 0;
  727. u32 active_v = 0;
  728. u32 blank_h = 0;
  729. u32 blank_v = 0;
  730. u32 ndx = 0;
  731. u32 max_num_of_elements = 0;
  732. u32 img_size_h = 0;
  733. u32 img_size_v = 0;
  734. /*
  735. * * See VESA Spec
  736. * * EDID_TIMING_DESC_UPPER_H_NIBBLE[0x4]: Relative Offset to the
  737. * EDID detailed timing descriptors - Upper 4 bit for each H
  738. * active/blank field
  739. * * EDID_TIMING_DESC_H_ACTIVE[0x2]: Relative Offset to the EDID
  740. * detailed timing descriptors - H active
  741. */
  742. active_h = ((((u32)data_buf[0x4] >> 0x4) & 0xF) << 8)
  743. | data_buf[0x2];
  744. /*
  745. * EDID_TIMING_DESC_H_BLANK[0x3]: Relative Offset to the EDID detailed
  746. * timing descriptors - H blank
  747. */
  748. blank_h = (((u32)data_buf[0x4] & 0xF) << 8)
  749. | data_buf[0x3];
  750. /*
  751. * * EDID_TIMING_DESC_UPPER_V_NIBBLE[0x7]: Relative Offset to the
  752. * EDID detailed timing descriptors - Upper 4 bit for each V
  753. * active/blank field
  754. * * EDID_TIMING_DESC_V_ACTIVE[0x5]: Relative Offset to the EDID
  755. * detailed timing descriptors - V active
  756. */
  757. active_v = ((((u32)data_buf[0x7] >> 0x4) & 0xF) << 8)
  758. | data_buf[0x5];
  759. /*
  760. * EDID_TIMING_DESC_V_BLANK[0x6]: Relative Offset to the EDID
  761. * detailed timing descriptors - V blank
  762. */
  763. blank_v = (((u32)data_buf[0x7] & 0xF) << 8)
  764. | data_buf[0x6];
  765. /*
  766. * * EDID_TIMING_DESC_IMAGE_SIZE_UPPER_NIBBLE[0xE]: Relative Offset
  767. * to the EDID detailed timing descriptors - Image Size upper
  768. * nibble V and H
  769. * * EDID_TIMING_DESC_H_IMAGE_SIZE[0xC]: Relative Offset to the EDID
  770. * detailed timing descriptors - H image size
  771. * * EDID_TIMING_DESC_V_IMAGE_SIZE[0xD]: Relative Offset to the EDID
  772. * detailed timing descriptors - V image size
  773. */
  774. img_size_h = ((((u32)data_buf[0xE] >> 0x4) & 0xF) << 8)
  775. | data_buf[0xC];
  776. img_size_v = (((u32)data_buf[0xE] & 0xF) << 8)
  777. | data_buf[0xD];
  778. /*
  779. * aspect ratio as 4:3 if within specificed range , rathaer than being
  780. * absolute value
  781. */
  782. aspect_ratio_4_3 = (abs(img_size_h * 3 - img_size_v * 4) < 5) ? 1 : 0;
  783. max_num_of_elements = sizeof(hdmi_edid_disp_mode_lut)
  784. / sizeof(*hdmi_edid_disp_mode_lut);
  785. /*
  786. * EDID_TIMING_DESC_INTERLACE[0x11:7]: Relative Offset to the EDID
  787. * detailed timing descriptors - Interlace flag
  788. */
  789. DEV_DBG("%s: Interlaced mode byte data_buf[0x11]=[%x]\n", __func__,
  790. data_buf[0x11]);
  791. /*
  792. * CEA 861-D: interlaced bit is bit[7] of byte[0x11]
  793. */
  794. interlaced = (data_buf[0x11] & 0x80) >> 7;
  795. DEV_DBG("%s: A[%ux%u] B[%ux%u] V[%ux%u] %s\n", __func__,
  796. active_h, active_v, blank_h, blank_v, img_size_h, img_size_v,
  797. interlaced ? "i" : "p");
  798. *disp_mode = HDMI_VFRMT_FORCE_32BIT;
  799. while (ndx < max_num_of_elements) {
  800. const struct hdmi_edid_video_mode_property_type *edid =
  801. hdmi_edid_disp_mode_lut + ndx;
  802. if ((interlaced == edid->interlaced) &&
  803. (active_h == edid->active_h) &&
  804. (blank_h == edid->total_blank_h) &&
  805. (blank_v == edid->total_blank_v) &&
  806. ((active_v == edid->active_v) ||
  807. (active_v == (edid->active_v + 1)))) {
  808. if (edid->aspect_ratio_4_3 && !aspect_ratio_4_3)
  809. /* Aspect ratio 16:9 */
  810. *disp_mode = edid->video_code + 1;
  811. else
  812. /* Aspect ratio 4:3 */
  813. *disp_mode = edid->video_code;
  814. DEV_DBG("%s: mode found:%d\n", __func__, *disp_mode);
  815. break;
  816. }
  817. ++ndx;
  818. }
  819. if (ndx == max_num_of_elements)
  820. DEV_INFO("%s: *no mode* found\n", __func__);
  821. } /* hdmi_edid_detail_desc */
  822. static void hdmi_edid_add_sink_3d_format(struct hdmi_edid_sink_data *sink_data,
  823. u32 video_format, u32 video_3d_format)
  824. {
  825. char string[BUFF_SIZE_3D];
  826. u32 added = false;
  827. int i;
  828. for (i = 0; i < sink_data->num_of_elements; ++i) {
  829. if (sink_data->disp_mode_list[i] == video_format) {
  830. sink_data->disp_3d_mode_list[i] |= video_3d_format;
  831. added = true;
  832. break;
  833. }
  834. }
  835. hdmi_get_video_3d_fmt_2string(video_3d_format, string, sizeof(string));
  836. DEV_DBG("%s: EDID[3D]: format: %d [%s], %s %s\n", __func__,
  837. video_format, msm_hdmi_mode_2string(video_format),
  838. string, added ? "added" : "NOT added");
  839. } /* hdmi_edid_add_sink_3d_format */
  840. static void hdmi_edid_add_sink_video_format(
  841. struct hdmi_edid_sink_data *sink_data, u32 video_format)
  842. {
  843. const struct msm_hdmi_mode_timing_info *timing =
  844. hdmi_get_supported_mode(video_format);
  845. u32 supported = timing != NULL;
  846. u32 mhl_supported = supported;
  847. if (video_format >= HDMI_VFRMT_MAX) {
  848. DEV_ERR("%s: video format: %s is not supported\n", __func__,
  849. msm_hdmi_mode_2string(video_format));
  850. return;
  851. }
  852. DEV_INFO("%s: EDID: format: %d [%s], %s\n", __func__,
  853. video_format, msm_hdmi_mode_2string(video_format),
  854. supported ? "Supported" : "Not-Supported");
  855. /* TODO : Should check MHL Connection */
  856. if (!sii8240_support_packedpixel()) {
  857. const struct msm_hdmi_mode_timing_info *mhl_timing =
  858. hdmi_mhl_get_supported_mode(video_format);
  859. mhl_supported = mhl_timing != NULL;
  860. DEV_INFO("%s: EDID: format: %d [%s], %s by MHL\n",__func__,
  861. video_format, msm_hdmi_mode_2string(video_format),
  862. mhl_supported ? "Supported" : "Not-Supported");
  863. }
  864. if (supported && mhl_supported) {
  865. /* todo: MHL */
  866. sink_data->disp_mode_list[sink_data->num_of_elements++] =
  867. video_format;
  868. }
  869. } /* hdmi_edid_add_sink_video_format */
  870. static int hdmi_edid_get_display_vsd_3d_mode(const u8 *data_buf,
  871. struct hdmi_edid_sink_data *sink_data, u32 num_of_cea_blocks)
  872. {
  873. u8 len, offset, present_multi_3d, hdmi_vic_len;
  874. int hdmi_3d_len;
  875. u16 structure_all, structure_mask;
  876. const u8 *vsd = num_of_cea_blocks ?
  877. hdmi_edid_find_block(data_buf+0x80, DBC_START_OFFSET,
  878. VENDOR_SPECIFIC_DATA_BLOCK, &len) : NULL;
  879. int i;
  880. if (vsd == NULL || len == 0 || len > MAX_DATA_BLOCK_SIZE) {
  881. DEV_DBG("%s: No/Invalid Vendor Specific Data Block\n",
  882. __func__);
  883. return -ENXIO;
  884. }
  885. offset = HDMI_VSDB_3D_EVF_DATA_OFFSET(vsd);
  886. if (offset >= len - 1)
  887. return -ETOOSMALL;
  888. present_multi_3d = (vsd[offset] & 0x60) >> 5;
  889. offset += 1;
  890. hdmi_vic_len = (vsd[offset] >> 5) & 0x7;
  891. hdmi_3d_len = vsd[offset] & 0x1F;
  892. DEV_DBG("%s: EDID[3D]: HDMI_VIC_LEN = %d, HDMI_3D_LEN = %d\n", __func__,
  893. hdmi_vic_len, hdmi_3d_len);
  894. offset += (hdmi_vic_len + 1);
  895. if (offset >= len - 1)
  896. return -ETOOSMALL;
  897. if (present_multi_3d == 1 || present_multi_3d == 2) {
  898. DEV_DBG("%s: EDID[3D]: multi 3D present (%d)\n", __func__,
  899. present_multi_3d);
  900. /* 3d_structure_all */
  901. structure_all = (vsd[offset] << 8) | vsd[offset + 1];
  902. offset += 2;
  903. if (offset >= len - 1)
  904. return -ETOOSMALL;
  905. hdmi_3d_len -= 2;
  906. if (present_multi_3d == 2) {
  907. /* 3d_structure_mask */
  908. structure_mask = (vsd[offset] << 8) | vsd[offset + 1];
  909. offset += 2;
  910. hdmi_3d_len -= 2;
  911. } else
  912. structure_mask = 0xffff;
  913. i = 0;
  914. while (i < 16) {
  915. if (i >= sink_data->disp_multi_3d_mode_list_cnt)
  916. break;
  917. if (!(structure_mask & BIT(i))) {
  918. ++i;
  919. continue;
  920. }
  921. /* BIT0: FRAME PACKING */
  922. if (structure_all & BIT(0))
  923. hdmi_edid_add_sink_3d_format(sink_data,
  924. sink_data->
  925. disp_multi_3d_mode_list[i],
  926. FRAME_PACKING);
  927. /* BIT6: TOP AND BOTTOM */
  928. if (structure_all & BIT(6))
  929. hdmi_edid_add_sink_3d_format(sink_data,
  930. sink_data->
  931. disp_multi_3d_mode_list[i],
  932. TOP_AND_BOTTOM);
  933. /* BIT8: SIDE BY SIDE HALF */
  934. if (structure_all & BIT(8))
  935. hdmi_edid_add_sink_3d_format(sink_data,
  936. sink_data->
  937. disp_multi_3d_mode_list[i],
  938. SIDE_BY_SIDE_HALF);
  939. ++i;
  940. }
  941. }
  942. i = 0;
  943. while (hdmi_3d_len > 0) {
  944. if (offset >= len - 1)
  945. return -ETOOSMALL;
  946. DEV_DBG("%s: EDID: 3D_Structure_%d @ 0x%x: %02x\n",
  947. __func__, i + 1, offset, vsd[offset]);
  948. if ((vsd[offset] >> 4) >=
  949. sink_data->disp_multi_3d_mode_list_cnt) {
  950. if ((vsd[offset] & 0x0F) >= 8) {
  951. offset += 1;
  952. hdmi_3d_len -= 1;
  953. DEV_DBG("%s:EDID:3D_Detail_%d @ 0x%x: %02x\n",
  954. __func__, i + 1, offset,
  955. vsd[min_t(u32, offset, (len - 1))]);
  956. }
  957. i += 1;
  958. offset += 1;
  959. hdmi_3d_len -= 1;
  960. continue;
  961. }
  962. switch (vsd[offset] & 0x0F) {
  963. case 0:
  964. /* 0000b: FRAME PACKING */
  965. hdmi_edid_add_sink_3d_format(sink_data,
  966. sink_data->
  967. disp_multi_3d_mode_list[vsd[offset] >> 4],
  968. FRAME_PACKING);
  969. break;
  970. case 6:
  971. /* 0110b: TOP AND BOTTOM */
  972. hdmi_edid_add_sink_3d_format(sink_data,
  973. sink_data->
  974. disp_multi_3d_mode_list[vsd[offset] >> 4],
  975. TOP_AND_BOTTOM);
  976. break;
  977. case 8:
  978. /* 1000b: SIDE BY SIDE HALF */
  979. hdmi_edid_add_sink_3d_format(sink_data,
  980. sink_data->
  981. disp_multi_3d_mode_list[vsd[offset] >> 4],
  982. SIDE_BY_SIDE_HALF);
  983. break;
  984. }
  985. if ((vsd[offset] & 0x0F) >= 8) {
  986. offset += 1;
  987. hdmi_3d_len -= 1;
  988. DEV_DBG("%s: EDID[3D]: 3D_Detail_%d @ 0x%x: %02x\n",
  989. __func__, i + 1, offset,
  990. vsd[min_t(u32, offset, (len - 1))]);
  991. }
  992. i += 1;
  993. offset += 1;
  994. hdmi_3d_len -= 1;
  995. }
  996. return 0;
  997. } /* hdmi_edid_get_display_vsd_3d_mode */
  998. static void hdmi_edid_get_extended_video_formats(
  999. struct hdmi_edid_ctrl *edid_ctrl, const u8 *in_buf)
  1000. {
  1001. u8 db_len, offset, i;
  1002. u8 hdmi_vic_len;
  1003. u32 video_format;
  1004. const u8 *vsd = NULL;
  1005. if (!edid_ctrl) {
  1006. DEV_ERR("%s: invalid input\n", __func__);
  1007. return;
  1008. }
  1009. vsd = hdmi_edid_find_block(in_buf, DBC_START_OFFSET,
  1010. VENDOR_SPECIFIC_DATA_BLOCK, &db_len);
  1011. if (vsd == NULL || db_len == 0 || db_len > MAX_DATA_BLOCK_SIZE) {
  1012. DEV_DBG("%s: No/Invalid Vendor Specific Data Block\n",
  1013. __func__);
  1014. return;
  1015. }
  1016. /* check if HDMI_Video_present flag is set or not */
  1017. if (!(vsd[8] & BIT(5))) {
  1018. DEV_DBG("%s: extended vfmts are not supported by the sink.\n",
  1019. __func__);
  1020. return;
  1021. }
  1022. offset = HDMI_VSDB_3D_EVF_DATA_OFFSET(vsd);
  1023. hdmi_vic_len = vsd[offset + 1] >> 5;
  1024. if (hdmi_vic_len) {
  1025. DEV_DBG("%s: EDID: EVFRMT @ 0x%x of block 3, len = %02x\n",
  1026. __func__, offset, hdmi_vic_len);
  1027. for (i = 0; i < hdmi_vic_len; i++) {
  1028. video_format = HDMI_VFRMT_END + vsd[offset + 2 + i];
  1029. hdmi_edid_add_sink_video_format(&edid_ctrl->sink_data,
  1030. video_format);
  1031. }
  1032. }
  1033. } /* hdmi_edid_get_extended_video_formats */
  1034. static void hdmi_edid_get_display_mode(struct hdmi_edid_ctrl *edid_ctrl,
  1035. const u8 *data_buf, u32 num_of_cea_blocks)
  1036. {
  1037. u8 i = 0, offset = 0, std_blk = 0;
  1038. u32 video_format = HDMI_VFRMT_640x480p60_4_3;
  1039. u32 has480p = false;
  1040. u8 len = 0;
  1041. int rc;
  1042. const u8 *edid_blk0 = NULL;
  1043. const u8 *edid_blk1 = NULL;
  1044. const u8 *svd = NULL;
  1045. u32 has60hz_mode = false;
  1046. u32 has50hz_mode = false;
  1047. struct hdmi_edid_sink_data *sink_data = NULL;
  1048. if (!edid_ctrl || !data_buf) {
  1049. DEV_ERR("%s: invalid input\n", __func__);
  1050. return;
  1051. }
  1052. edid_blk0 = &data_buf[0x0];
  1053. edid_blk1 = &data_buf[0x80];
  1054. svd = num_of_cea_blocks ?
  1055. hdmi_edid_find_block(data_buf+0x80, DBC_START_OFFSET,
  1056. VIDEO_DATA_BLOCK, &len) : NULL;
  1057. if (num_of_cea_blocks && (len == 0 || len > MAX_DATA_BLOCK_SIZE)) {
  1058. DEV_DBG("%s: No/Invalid Video Data Block\n",
  1059. __func__);
  1060. return;
  1061. }
  1062. sink_data = &edid_ctrl->sink_data;
  1063. sink_data->num_of_elements = 0;
  1064. sink_data->disp_multi_3d_mode_list_cnt = 0;
  1065. if (svd != NULL) {
  1066. ++svd;
  1067. for (i = 0; i < len; ++i, ++svd) {
  1068. /*
  1069. * Subtract 1 because it is zero based in the driver,
  1070. * while the Video identification code is 1 based in the
  1071. * CEA_861D spec
  1072. */
  1073. video_format = (*svd & 0x7F);
  1074. hdmi_edid_add_sink_video_format(sink_data,
  1075. video_format);
  1076. /* Make a note of the preferred video format */
  1077. if (i == 0)
  1078. sink_data->preferred_video_format =
  1079. video_format;
  1080. if (i < 16) {
  1081. sink_data->disp_multi_3d_mode_list[i]
  1082. = video_format;
  1083. sink_data->disp_multi_3d_mode_list_cnt++;
  1084. }
  1085. if (video_format <= HDMI_VFRMT_1920x1080p60_16_9 ||
  1086. video_format == HDMI_VFRMT_2880x480p60_4_3 ||
  1087. video_format == HDMI_VFRMT_2880x480p60_16_9)
  1088. has60hz_mode = true;
  1089. if ((video_format >= HDMI_VFRMT_720x576p50_4_3 &&
  1090. video_format <= HDMI_VFRMT_1920x1080p50_16_9) ||
  1091. video_format == HDMI_VFRMT_2880x576p50_4_3 ||
  1092. video_format == HDMI_VFRMT_2880x576p50_16_9 ||
  1093. video_format == HDMI_VFRMT_1920x1250i50_16_9)
  1094. has50hz_mode = true;
  1095. if (video_format == HDMI_VFRMT_640x480p60_4_3)
  1096. has480p = true;
  1097. }
  1098. } else if (!num_of_cea_blocks) {
  1099. /* Detailed timing descriptors */
  1100. u32 desc_offset = 0;
  1101. /*
  1102. * * Maximum 4 timing descriptor in block 0 - No CEA
  1103. * extension in this case
  1104. * * EDID_FIRST_TIMING_DESC[0x36] - 1st detailed timing
  1105. * descriptor
  1106. * * EDID_DETAIL_TIMING_DESC_BLCK_SZ[0x12] - Each detailed
  1107. * timing descriptor has block size of 18
  1108. */
  1109. while (4 > i && 0 != edid_blk0[0x36+desc_offset]) {
  1110. hdmi_edid_detail_desc(edid_blk0+0x36+desc_offset,
  1111. &video_format);
  1112. DEV_DBG("[%s:%d] Block-0 Adding vid fmt = [%s]\n",
  1113. __func__, __LINE__,
  1114. msm_hdmi_mode_2string(video_format));
  1115. hdmi_edid_add_sink_video_format(sink_data,
  1116. video_format);
  1117. if (video_format == HDMI_VFRMT_640x480p60_4_3)
  1118. has480p = true;
  1119. /* Make a note of the preferred video format */
  1120. if (i == 0) {
  1121. sink_data->preferred_video_format =
  1122. video_format;
  1123. }
  1124. desc_offset += 0x12;
  1125. ++i;
  1126. }
  1127. } else if (1 == num_of_cea_blocks) {
  1128. u32 desc_offset = 0;
  1129. /*
  1130. * Read from both block 0 and block 1
  1131. * Read EDID block[0] as above
  1132. */
  1133. while (4 > i && 0 != edid_blk0[0x36+desc_offset]) {
  1134. hdmi_edid_detail_desc(edid_blk0+0x36+desc_offset,
  1135. &video_format);
  1136. DEV_DBG("[%s:%d] Block-0 Adding vid fmt = [%s]\n",
  1137. __func__, __LINE__,
  1138. msm_hdmi_mode_2string(video_format));
  1139. hdmi_edid_add_sink_video_format(sink_data,
  1140. video_format);
  1141. if (video_format == HDMI_VFRMT_640x480p60_4_3)
  1142. has480p = true;
  1143. /* Make a note of the preferred video format */
  1144. if (i == 0) {
  1145. sink_data->preferred_video_format =
  1146. video_format;
  1147. }
  1148. desc_offset += 0x12;
  1149. ++i;
  1150. }
  1151. /*
  1152. * * Parse block 1 - CEA extension byte offset of first
  1153. * detailed timing generation - offset is relevant to
  1154. * the offset of block 1
  1155. * * EDID_CEA_EXTENSION_FIRST_DESC[0x82]: Offset to CEA
  1156. * extension first timing desc - indicate the offset of
  1157. * the first detailed timing descriptor
  1158. * * EDID_BLOCK_SIZE = 0x80 Each page size in the EDID ROM
  1159. */
  1160. desc_offset = edid_blk1[0x02];
  1161. while (0 != edid_blk1[desc_offset]) {
  1162. hdmi_edid_detail_desc(edid_blk1+desc_offset,
  1163. &video_format);
  1164. DEV_DBG("[%s:%d] Block-1 Adding vid fmt = [%s]\n",
  1165. __func__, __LINE__,
  1166. msm_hdmi_mode_2string(video_format));
  1167. hdmi_edid_add_sink_video_format(sink_data,
  1168. video_format);
  1169. if (video_format == HDMI_VFRMT_640x480p60_4_3)
  1170. has480p = true;
  1171. /* Make a note of the preferred video format */
  1172. if (i == 0) {
  1173. sink_data->preferred_video_format =
  1174. video_format;
  1175. }
  1176. desc_offset += 0x12;
  1177. ++i;
  1178. }
  1179. }
  1180. std_blk = 0;
  1181. offset = 0;
  1182. while (std_blk < 8) {
  1183. if ((edid_blk0[0x26 + offset] == 0x81) &&
  1184. (edid_blk0[0x26 + offset + 1] == 0x80)) {
  1185. pr_debug("%s: 108MHz: off=[%x] stdblk=[%x]\n",
  1186. __func__, offset, std_blk);
  1187. hdmi_edid_add_sink_video_format(sink_data,
  1188. HDMI_VFRMT_1280x1024p60_5_4);
  1189. }
  1190. if ((edid_blk0[0x26 + offset] == 0x61) &&
  1191. (edid_blk0[0x26 + offset + 1] == 0x40)) {
  1192. pr_debug("%s: 65MHz: off=[%x] stdblk=[%x]\n",
  1193. __func__, offset, std_blk);
  1194. hdmi_edid_add_sink_video_format(sink_data,
  1195. HDMI_VFRMT_1024x768p60_4_3);
  1196. break;
  1197. } else {
  1198. offset += 2;
  1199. }
  1200. std_blk++;
  1201. }
  1202. /* check if the EDID revision is 4 (version 1.4) */
  1203. if (edid_blk0[0x13] == 4) {
  1204. u8 start = 0x36;
  1205. i = 0;
  1206. /* Check each of 4 - 18 bytes descriptors */
  1207. while (i < 4) {
  1208. u8 iter = start;
  1209. u32 header_1 = 0;
  1210. u8 header_2 = 0;
  1211. header_1 = edid_blk0[iter++];
  1212. header_1 = header_1 << 8 | edid_blk0[iter++];
  1213. header_1 = header_1 << 8 | edid_blk0[iter++];
  1214. header_1 = header_1 << 8 | edid_blk0[iter++];
  1215. header_2 = edid_blk0[iter];
  1216. if (header_1 == 0x000000F7 &&
  1217. header_2 == 0x00) {
  1218. iter++;
  1219. /* VESA DMT Standard Version (0x0A)*/
  1220. iter++;
  1221. /* First set of supported formats */
  1222. iter++;
  1223. /* Second set of supported formats */
  1224. if (edid_blk0[iter] & 0x02) {
  1225. pr_debug("%s: DMT 1280x1024@60\n",
  1226. __func__);
  1227. hdmi_edid_add_sink_video_format(
  1228. sink_data,
  1229. HDMI_VFRMT_1280x1024p60_5_4);
  1230. break;
  1231. }
  1232. }
  1233. i++;
  1234. start += 0x12;
  1235. }
  1236. }
  1237. /* Established Timing I and II */
  1238. if (edid_blk0[0x24] & BIT(3)) {
  1239. pr_debug("%s: 65MHz: off=[%x] stdblk=[%x]\n",
  1240. __func__, offset, std_blk);
  1241. hdmi_edid_add_sink_video_format(sink_data,
  1242. HDMI_VFRMT_1024x768p60_4_3);
  1243. }
  1244. hdmi_edid_get_extended_video_formats(edid_ctrl, data_buf+0x80);
  1245. /* mandaroty 3d format */
  1246. if (edid_ctrl->present_3d) {
  1247. if (has60hz_mode) {
  1248. hdmi_edid_add_sink_3d_format(sink_data,
  1249. HDMI_VFRMT_1920x1080p24_16_9,
  1250. FRAME_PACKING | TOP_AND_BOTTOM);
  1251. hdmi_edid_add_sink_3d_format(sink_data,
  1252. HDMI_VFRMT_1280x720p60_16_9,
  1253. FRAME_PACKING | TOP_AND_BOTTOM);
  1254. hdmi_edid_add_sink_3d_format(sink_data,
  1255. HDMI_VFRMT_1920x1080i60_16_9,
  1256. SIDE_BY_SIDE_HALF);
  1257. }
  1258. if (has50hz_mode) {
  1259. hdmi_edid_add_sink_3d_format(sink_data,
  1260. HDMI_VFRMT_1920x1080p24_16_9,
  1261. FRAME_PACKING | TOP_AND_BOTTOM);
  1262. hdmi_edid_add_sink_3d_format(sink_data,
  1263. HDMI_VFRMT_1280x720p50_16_9,
  1264. FRAME_PACKING | TOP_AND_BOTTOM);
  1265. hdmi_edid_add_sink_3d_format(sink_data,
  1266. HDMI_VFRMT_1920x1080i50_16_9,
  1267. SIDE_BY_SIDE_HALF);
  1268. }
  1269. /* 3d format described in Vendor Specific Data */
  1270. rc = hdmi_edid_get_display_vsd_3d_mode(data_buf, sink_data,
  1271. num_of_cea_blocks);
  1272. if (!rc)
  1273. pr_debug("%s: 3D formats in VSD\n", __func__);
  1274. }
  1275. /*
  1276. * Need to add default 640 by 480 timings, in case not described
  1277. * in the EDID structure.
  1278. * All DTV sink devices should support this mode
  1279. */
  1280. if (!has480p)
  1281. hdmi_edid_add_sink_video_format(sink_data,
  1282. HDMI_VFRMT_640x480p60_4_3);
  1283. } /* hdmi_edid_get_display_mode */
  1284. int hdmi_edid_read(void *input)
  1285. {
  1286. /* EDID_BLOCK_SIZE[0x80] Each page size in the EDID ROM */
  1287. u8 *edid_buf;
  1288. #ifndef CONFIG_VIDEO_MHL_V2
  1289. u32 i = 1;
  1290. #endif
  1291. u32 cea_extension_ver = 0;
  1292. u32 num_of_cea_blocks = 0;
  1293. u32 ieee_reg_id = 0;
  1294. int status = 0;
  1295. char vendor_id[5];
  1296. struct hdmi_edid_ctrl *edid_ctrl = (struct hdmi_edid_ctrl *)input;
  1297. #if defined (CONFIG_VIDEO_MHL_V2) || defined (CONFIG_VIDEO_MHL_SII8246)
  1298. edid_ctrl_ext = edid_ctrl;
  1299. #endif
  1300. if (!edid_ctrl) {
  1301. DEV_ERR("%s: invalid input\n", __func__);
  1302. return -EINVAL;
  1303. }
  1304. edid_buf = edid_ctrl->edid_buf;
  1305. #ifdef CONFIG_VIDEO_MHL_V2
  1306. memcpy(edid_buf, sii8240_get_mhl_edid(),MAX_EDID_BLOCK_SIZE);
  1307. #endif
  1308. /* audio_channel_info reset */
  1309. edid_ctrl->audio_channel_info = 0;
  1310. edid_ctrl->pt_scan_info = 0;
  1311. edid_ctrl->it_scan_info = 0;
  1312. edid_ctrl->ce_scan_info = 0;
  1313. edid_ctrl->present_3d = 0;
  1314. memset(&edid_ctrl->sink_data, 0, sizeof(edid_ctrl->sink_data));
  1315. #if !defined (CONFIG_VIDEO_MHL_V2) || defined (CONFIG_VIDEO_MHL_SII8246)
  1316. memset(edid_buf, 0, sizeof(edid_buf));
  1317. #endif
  1318. memset(edid_ctrl->audio_data_block, 0,
  1319. sizeof(edid_ctrl->audio_data_block));
  1320. memset(edid_ctrl->spkr_alloc_data_block, 0,
  1321. sizeof(edid_ctrl->spkr_alloc_data_block));
  1322. edid_ctrl->adb_size = 0;
  1323. edid_ctrl->sadb_size = 0;
  1324. #if !defined (CONFIG_VIDEO_MHL_V2) || defined (CONFIG_VIDEO_MHL_SII8246)
  1325. status = hdmi_edid_read_block(edid_ctrl, 0, edid_buf);
  1326. #endif
  1327. if (status || !hdmi_edid_check_header(edid_buf)) {
  1328. if (!status)
  1329. status = -EPROTO;
  1330. DEV_ERR("%s: blk0 fail:%d[%02x%02x%02x%02x%02x%02x%02x%02x]\n",
  1331. __func__, status,
  1332. edid_buf[0], edid_buf[1], edid_buf[2], edid_buf[3],
  1333. edid_buf[4], edid_buf[5], edid_buf[6], edid_buf[7]);
  1334. goto error;
  1335. }
  1336. hdmi_edid_extract_vendor_id(edid_buf, vendor_id);
  1337. /* EDID_CEA_EXTENSION_FLAG[0x7E] - CEC extension byte */
  1338. num_of_cea_blocks = edid_buf[0x7E];
  1339. DEV_DBG("%s: No. of CEA blocks is [%u]\n", __func__,
  1340. num_of_cea_blocks);
  1341. /* Find out any CEA extension blocks following block 0 */
  1342. switch (num_of_cea_blocks) {
  1343. case 0: /* No CEA extension */
  1344. edid_ctrl->sink_mode = false;
  1345. DEV_DBG("HDMI DVI mode: %s\n",
  1346. edid_ctrl->sink_mode ? "no" : "yes");
  1347. break;
  1348. case 1: /* Read block 1 */
  1349. #if !defined (CONFIG_VIDEO_MHL_V2) || defined (CONFIG_VIDEO_MHL_SII8246)
  1350. status = hdmi_edid_read_block(edid_ctrl, 1, &edid_buf[0x80]);
  1351. if (status) {
  1352. DEV_ERR("%s: ddc read block(1) failed: %d\n", __func__,
  1353. status);
  1354. goto error;
  1355. }
  1356. #endif
  1357. if (edid_buf[0x80] != 2)
  1358. num_of_cea_blocks = 0;
  1359. if (num_of_cea_blocks) {
  1360. ieee_reg_id =
  1361. hdmi_edid_extract_ieee_reg_id(edid_ctrl,
  1362. edid_buf+0x80);
  1363. if (ieee_reg_id == 0x0c03)
  1364. edid_ctrl->sink_mode = true;
  1365. else
  1366. edid_ctrl->sink_mode = false;
  1367. hdmi_edid_extract_latency_fields(edid_ctrl,
  1368. edid_buf+0x80);
  1369. hdmi_edid_extract_speaker_allocation_data(
  1370. edid_ctrl, edid_buf+0x80);
  1371. hdmi_edid_extract_audio_data_blocks(edid_ctrl,
  1372. edid_buf+0x80);
  1373. hdmi_edid_extract_3d_present(edid_ctrl,
  1374. edid_buf+0x80);
  1375. hdmi_edid_extract_extended_data_blocks(edid_ctrl,
  1376. edid_buf+0x80);
  1377. }
  1378. break;
  1379. case 2:
  1380. case 3:
  1381. case 4:
  1382. #if !defined (CONFIG_VIDEO_MHL_V2) || defined (CONFIG_VIDEO_MHL_SII8246)
  1383. for (i = 1; i <= num_of_cea_blocks; i++) {
  1384. if (!(i % 2)) {
  1385. status = hdmi_edid_read_block(
  1386. edid_ctrl, i, edid_buf + (0x80 * i));
  1387. if (status) {
  1388. DEV_ERR("%s: read blk(%d) failed:%d\n",
  1389. __func__, i, status);
  1390. goto error;
  1391. }
  1392. } else {
  1393. status = hdmi_edid_read_block(
  1394. edid_ctrl, i, edid_buf + (0x80 * i));
  1395. if (status) {
  1396. DEV_ERR("%s: read blk(%d) failed:%d\n",
  1397. __func__, i, status);
  1398. goto error;
  1399. }
  1400. }
  1401. }
  1402. #endif
  1403. break;
  1404. default:
  1405. DEV_ERR("%s: ddc read failed, not supported multi-blocks: %d\n",
  1406. __func__, num_of_cea_blocks);
  1407. status = -EPROTO;
  1408. goto error;
  1409. }
  1410. if (num_of_cea_blocks) {
  1411. /* EDID_CEA_EXTENSION_VERSION[0x81]: Offset to CEA extension
  1412. * version number - v1,v2,v3 (v1 is seldom, v2 is obsolete,
  1413. * v3 most common) */
  1414. cea_extension_ver = edid_buf[0x81];
  1415. }
  1416. /* EDID_VERSION[0x12] - EDID Version */
  1417. /* EDID_REVISION[0x13] - EDID Revision */
  1418. DEV_INFO("%s: V=%d.%d #CEABlks=%d[V%d] ID=%s IEEE=%04x Ext=0x%02x\n",
  1419. __func__, edid_buf[0x12], edid_buf[0x13],
  1420. num_of_cea_blocks, cea_extension_ver, vendor_id, ieee_reg_id,
  1421. edid_buf[0x80]);
  1422. hdmi_edid_get_display_mode(edid_ctrl, edid_buf, num_of_cea_blocks);
  1423. return 0;
  1424. error:
  1425. edid_ctrl->sink_data.num_of_elements = 1;
  1426. edid_ctrl->sink_data.disp_mode_list[0] = edid_ctrl->video_resolution;
  1427. return status;
  1428. } /* hdmi_edid_read */
  1429. /*
  1430. * If the sink specified support for both underscan/overscan then, by default,
  1431. * set the underscan bit. Only checking underscan support for preferred
  1432. * format and cea formats.
  1433. */
  1434. u8 hdmi_edid_get_sink_scaninfo(void *input, u32 resolution)
  1435. {
  1436. u8 scaninfo = 0;
  1437. int use_ce_scan_info = true;
  1438. struct hdmi_edid_ctrl *edid_ctrl = (struct hdmi_edid_ctrl *)input;
  1439. if (!edid_ctrl) {
  1440. DEV_ERR("%s: invalid input\n", __func__);
  1441. goto end;
  1442. }
  1443. if (resolution == edid_ctrl->sink_data.preferred_video_format) {
  1444. use_ce_scan_info = false;
  1445. switch (edid_ctrl->pt_scan_info) {
  1446. case 0:
  1447. /*
  1448. * Need to use the info specified for the corresponding
  1449. * IT or CE format
  1450. */
  1451. DEV_DBG("%s: No underscan info for preferred V fmt\n",
  1452. __func__);
  1453. use_ce_scan_info = true;
  1454. break;
  1455. case 3:
  1456. DEV_DBG("%s: Set underscan bit for preferred V fmt\n",
  1457. __func__);
  1458. scaninfo = BIT(1);
  1459. break;
  1460. default:
  1461. DEV_DBG("%s: Underscan not set for preferred V fmt\n",
  1462. __func__);
  1463. break;
  1464. }
  1465. }
  1466. if (use_ce_scan_info) {
  1467. if (3 == edid_ctrl->ce_scan_info) {
  1468. DEV_DBG("%s: Setting underscan bit for CE video fmt\n",
  1469. __func__);
  1470. scaninfo |= BIT(1);
  1471. } else {
  1472. DEV_DBG("%s: Not setting underscan bit for CE V fmt\n",
  1473. __func__);
  1474. }
  1475. }
  1476. end:
  1477. return scaninfo;
  1478. } /* hdmi_edid_get_sink_scaninfo */
  1479. u32 hdmi_edid_get_sink_mode(void *input)
  1480. {
  1481. struct hdmi_edid_ctrl *edid_ctrl = (struct hdmi_edid_ctrl *)input;
  1482. if (!edid_ctrl) {
  1483. DEV_ERR("%s: invalid input\n", __func__);
  1484. return 0;
  1485. }
  1486. return edid_ctrl->sink_mode;
  1487. } /* hdmi_edid_get_sink_mode */
  1488. int hdmi_edid_get_audio_blk(void *input, struct msm_hdmi_audio_edid_blk *blk)
  1489. {
  1490. struct hdmi_edid_ctrl *edid_ctrl = (struct hdmi_edid_ctrl *)input;
  1491. if (!edid_ctrl || !blk) {
  1492. DEV_ERR("%s: invalid input\n", __func__);
  1493. return -EINVAL;
  1494. }
  1495. blk->audio_data_blk = edid_ctrl->audio_data_block;
  1496. blk->audio_data_blk_size = edid_ctrl->adb_size;
  1497. blk->spk_alloc_data_blk = edid_ctrl->spkr_alloc_data_block;
  1498. blk->spk_alloc_data_blk_size = edid_ctrl->sadb_size;
  1499. return 0;
  1500. } /* hdmi_edid_get_audio_blk */
  1501. void hdmi_edid_set_video_resolution(void *input, u32 resolution)
  1502. {
  1503. struct hdmi_edid_ctrl *edid_ctrl = (struct hdmi_edid_ctrl *)input;
  1504. if (!edid_ctrl) {
  1505. DEV_ERR("%s: invalid input\n", __func__);
  1506. return;
  1507. }
  1508. edid_ctrl->video_resolution = resolution;
  1509. if (1 == edid_ctrl->sink_data.num_of_elements)
  1510. edid_ctrl->sink_data.disp_mode_list[0] = resolution;
  1511. } /* hdmi_edid_set_video_resolution */
  1512. void hdmi_edid_deinit(void *input)
  1513. {
  1514. struct hdmi_edid_ctrl *edid_ctrl = (struct hdmi_edid_ctrl *)input;
  1515. if (edid_ctrl) {
  1516. sysfs_remove_group(edid_ctrl->init_data.sysfs_kobj,
  1517. &hdmi_edid_fs_attrs_group);
  1518. kfree(edid_ctrl);
  1519. }
  1520. } /* hdmi_edid_deinit */
  1521. void *hdmi_edid_init(struct hdmi_edid_init_data *init_data)
  1522. {
  1523. struct hdmi_edid_ctrl *edid_ctrl = NULL;
  1524. if (!init_data || !init_data->io ||
  1525. !init_data->mutex || !init_data->sysfs_kobj ||
  1526. !init_data->ddc_ctrl) {
  1527. DEV_ERR("%s: invalid input\n", __func__);
  1528. goto error;
  1529. }
  1530. edid_ctrl = kzalloc(sizeof(*edid_ctrl), GFP_KERNEL);
  1531. if (!edid_ctrl) {
  1532. DEV_ERR("%s: Out of memory\n", __func__);
  1533. goto error;
  1534. }
  1535. edid_ctrl->init_data = *init_data;
  1536. edid_ctrl->sink_mode = false;
  1537. if (sysfs_create_group(init_data->sysfs_kobj,
  1538. &hdmi_edid_fs_attrs_group)) {
  1539. DEV_ERR("%s: EDID sysfs create failed\n", __func__);
  1540. kfree(edid_ctrl);
  1541. edid_ctrl = NULL;
  1542. }
  1543. error:
  1544. return (void *)edid_ctrl;
  1545. } /* hdmi_edid_deinit */