wanxl.h 4.4 KB

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  1. /*
  2. * wanXL serial card driver for Linux
  3. * definitions common to host driver and card firmware
  4. *
  5. * Copyright (C) 2003 Krzysztof Halasa <khc@pm.waw.pl>
  6. *
  7. * This program is free software; you can redistribute it and/or modify it
  8. * under the terms of version 2 of the GNU General Public License
  9. * as published by the Free Software Foundation.
  10. */
  11. #define RESET_WHILE_LOADING 0
  12. /* you must rebuild the firmware if any of the following is changed */
  13. #define DETECT_RAM 0 /* needed for > 4MB RAM, 16 MB maximum */
  14. #define QUICC_MEMCPY_USES_PLX 1 /* must be used if the host has > 256 MB RAM */
  15. #define STATUS_CABLE_V35 2
  16. #define STATUS_CABLE_X21 3
  17. #define STATUS_CABLE_V24 4
  18. #define STATUS_CABLE_EIA530 5
  19. #define STATUS_CABLE_INVALID 6
  20. #define STATUS_CABLE_NONE 7
  21. #define STATUS_CABLE_DCE 0x8000
  22. #define STATUS_CABLE_DSR 0x0010
  23. #define STATUS_CABLE_DCD 0x0008
  24. #define STATUS_CABLE_PM_SHIFT 5
  25. #define PDM_OFFSET 0x1000
  26. #define TX_BUFFERS 10 /* per port */
  27. #define RX_BUFFERS 30
  28. #define RX_QUEUE_LENGTH 40 /* card->host queue length - per card */
  29. #define PACKET_EMPTY 0x00
  30. #define PACKET_FULL 0x10
  31. #define PACKET_SENT 0x20 /* TX only */
  32. #define PACKET_UNDERRUN 0x30 /* TX only */
  33. #define PACKET_PORT_MASK 0x03 /* RX only */
  34. /* bit numbers in PLX9060 doorbell registers */
  35. #define DOORBELL_FROM_CARD_TX_0 0 /* packet sent by the card */
  36. #define DOORBELL_FROM_CARD_TX_1 1
  37. #define DOORBELL_FROM_CARD_TX_2 2
  38. #define DOORBELL_FROM_CARD_TX_3 3
  39. #define DOORBELL_FROM_CARD_RX 4
  40. #define DOORBELL_FROM_CARD_CABLE_0 5 /* cable/PM/etc. changed */
  41. #define DOORBELL_FROM_CARD_CABLE_1 6
  42. #define DOORBELL_FROM_CARD_CABLE_2 7
  43. #define DOORBELL_FROM_CARD_CABLE_3 8
  44. #define DOORBELL_TO_CARD_OPEN_0 0
  45. #define DOORBELL_TO_CARD_OPEN_1 1
  46. #define DOORBELL_TO_CARD_OPEN_2 2
  47. #define DOORBELL_TO_CARD_OPEN_3 3
  48. #define DOORBELL_TO_CARD_CLOSE_0 4
  49. #define DOORBELL_TO_CARD_CLOSE_1 5
  50. #define DOORBELL_TO_CARD_CLOSE_2 6
  51. #define DOORBELL_TO_CARD_CLOSE_3 7
  52. #define DOORBELL_TO_CARD_TX_0 8 /* outbound packet queued */
  53. #define DOORBELL_TO_CARD_TX_1 9
  54. #define DOORBELL_TO_CARD_TX_2 10
  55. #define DOORBELL_TO_CARD_TX_3 11
  56. /* firmware-only status bits, starting from last DOORBELL_TO_CARD + 1 */
  57. #define TASK_SCC_0 12
  58. #define TASK_SCC_1 13
  59. #define TASK_SCC_2 14
  60. #define TASK_SCC_3 15
  61. #define ALIGN32(x) (((x) + 3) & 0xFFFFFFFC)
  62. #define BUFFER_LENGTH ALIGN32(HDLC_MAX_MRU + 4) /* 4 bytes for 32-bit CRC */
  63. /* Address of TX and RX buffers in 68360 address space */
  64. #define BUFFERS_ADDR 0x4000 /* 16 KB */
  65. #ifndef __ASSEMBLER__
  66. #define PLX_OFFSET 0
  67. #else
  68. #define PLX_OFFSET PLX + 0x80
  69. #endif
  70. #define PLX_MAILBOX_0 (PLX_OFFSET + 0x40)
  71. #define PLX_MAILBOX_1 (PLX_OFFSET + 0x44)
  72. #define PLX_MAILBOX_2 (PLX_OFFSET + 0x48)
  73. #define PLX_MAILBOX_3 (PLX_OFFSET + 0x4C)
  74. #define PLX_MAILBOX_4 (PLX_OFFSET + 0x50)
  75. #define PLX_MAILBOX_5 (PLX_OFFSET + 0x54)
  76. #define PLX_MAILBOX_6 (PLX_OFFSET + 0x58)
  77. #define PLX_MAILBOX_7 (PLX_OFFSET + 0x5C)
  78. #define PLX_DOORBELL_TO_CARD (PLX_OFFSET + 0x60)
  79. #define PLX_DOORBELL_FROM_CARD (PLX_OFFSET + 0x64)
  80. #define PLX_INTERRUPT_CS (PLX_OFFSET + 0x68)
  81. #define PLX_CONTROL (PLX_OFFSET + 0x6C)
  82. #ifdef __ASSEMBLER__
  83. #define PLX_DMA_0_MODE (PLX + 0x100)
  84. #define PLX_DMA_0_PCI (PLX + 0x104)
  85. #define PLX_DMA_0_LOCAL (PLX + 0x108)
  86. #define PLX_DMA_0_LENGTH (PLX + 0x10C)
  87. #define PLX_DMA_0_DESC (PLX + 0x110)
  88. #define PLX_DMA_1_MODE (PLX + 0x114)
  89. #define PLX_DMA_1_PCI (PLX + 0x118)
  90. #define PLX_DMA_1_LOCAL (PLX + 0x11C)
  91. #define PLX_DMA_1_LENGTH (PLX + 0x120)
  92. #define PLX_DMA_1_DESC (PLX + 0x124)
  93. #define PLX_DMA_CMD_STS (PLX + 0x128)
  94. #define PLX_DMA_ARBITR_0 (PLX + 0x12C)
  95. #define PLX_DMA_ARBITR_1 (PLX + 0x130)
  96. #endif
  97. #define DESC_LENGTH 12
  98. /* offsets from start of status_t */
  99. /* card to host */
  100. #define STATUS_OPEN 0
  101. #define STATUS_CABLE (STATUS_OPEN + 4)
  102. #define STATUS_RX_OVERRUNS (STATUS_CABLE + 4)
  103. #define STATUS_RX_FRAME_ERRORS (STATUS_RX_OVERRUNS + 4)
  104. /* host to card */
  105. #define STATUS_PARITY (STATUS_RX_FRAME_ERRORS + 4)
  106. #define STATUS_ENCODING (STATUS_PARITY + 4)
  107. #define STATUS_CLOCKING (STATUS_ENCODING + 4)
  108. #define STATUS_TX_DESCS (STATUS_CLOCKING + 4)
  109. #ifndef __ASSEMBLER__
  110. typedef struct {
  111. volatile u32 stat;
  112. u32 address; /* PCI address */
  113. volatile u32 length;
  114. }desc_t;
  115. typedef struct {
  116. // Card to host
  117. volatile u32 open;
  118. volatile u32 cable;
  119. volatile u32 rx_overruns;
  120. volatile u32 rx_frame_errors;
  121. // Host to card
  122. u32 parity;
  123. u32 encoding;
  124. u32 clocking;
  125. desc_t tx_descs[TX_BUFFERS];
  126. }port_status_t;
  127. #endif /* __ASSEMBLER__ */