tegra-kbc.c 23 KB

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  1. /*
  2. * Keyboard class input driver for the NVIDIA Tegra SoC internal matrix
  3. * keyboard controller
  4. *
  5. * Copyright (c) 2009-2011, NVIDIA Corporation.
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along
  18. * with this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
  20. */
  21. #include <linux/kernel.h>
  22. #include <linux/module.h>
  23. #include <linux/input.h>
  24. #include <linux/platform_device.h>
  25. #include <linux/delay.h>
  26. #include <linux/io.h>
  27. #include <linux/interrupt.h>
  28. #include <linux/of.h>
  29. #include <linux/clk.h>
  30. #include <linux/slab.h>
  31. #include <mach/clk.h>
  32. #include <mach/kbc.h>
  33. #define KBC_MAX_DEBOUNCE_CNT 0x3ffu
  34. /* KBC row scan time and delay for beginning the row scan. */
  35. #define KBC_ROW_SCAN_TIME 16
  36. #define KBC_ROW_SCAN_DLY 5
  37. /* KBC uses a 32KHz clock so a cycle = 1/32Khz */
  38. #define KBC_CYCLE_MS 32
  39. /* KBC Registers */
  40. /* KBC Control Register */
  41. #define KBC_CONTROL_0 0x0
  42. #define KBC_FIFO_TH_CNT_SHIFT(cnt) (cnt << 14)
  43. #define KBC_DEBOUNCE_CNT_SHIFT(cnt) (cnt << 4)
  44. #define KBC_CONTROL_FIFO_CNT_INT_EN (1 << 3)
  45. #define KBC_CONTROL_KEYPRESS_INT_EN (1 << 1)
  46. #define KBC_CONTROL_KBC_EN (1 << 0)
  47. /* KBC Interrupt Register */
  48. #define KBC_INT_0 0x4
  49. #define KBC_INT_FIFO_CNT_INT_STATUS (1 << 2)
  50. #define KBC_INT_KEYPRESS_INT_STATUS (1 << 0)
  51. #define KBC_ROW_CFG0_0 0x8
  52. #define KBC_COL_CFG0_0 0x18
  53. #define KBC_TO_CNT_0 0x24
  54. #define KBC_INIT_DLY_0 0x28
  55. #define KBC_RPT_DLY_0 0x2c
  56. #define KBC_KP_ENT0_0 0x30
  57. #define KBC_KP_ENT1_0 0x34
  58. #define KBC_ROW0_MASK_0 0x38
  59. #define KBC_ROW_SHIFT 3
  60. struct tegra_kbc {
  61. void __iomem *mmio;
  62. struct input_dev *idev;
  63. unsigned int irq;
  64. spinlock_t lock;
  65. unsigned int repoll_dly;
  66. unsigned long cp_dly_jiffies;
  67. unsigned int cp_to_wkup_dly;
  68. bool use_fn_map;
  69. bool use_ghost_filter;
  70. bool keypress_caused_wake;
  71. const struct tegra_kbc_platform_data *pdata;
  72. unsigned short keycode[KBC_MAX_KEY * 2];
  73. unsigned short current_keys[KBC_MAX_KPENT];
  74. unsigned int num_pressed_keys;
  75. u32 wakeup_key;
  76. struct timer_list timer;
  77. struct clk *clk;
  78. };
  79. static const u32 tegra_kbc_default_keymap[] __devinitdata = {
  80. KEY(0, 2, KEY_W),
  81. KEY(0, 3, KEY_S),
  82. KEY(0, 4, KEY_A),
  83. KEY(0, 5, KEY_Z),
  84. KEY(0, 7, KEY_FN),
  85. KEY(1, 7, KEY_LEFTMETA),
  86. KEY(2, 6, KEY_RIGHTALT),
  87. KEY(2, 7, KEY_LEFTALT),
  88. KEY(3, 0, KEY_5),
  89. KEY(3, 1, KEY_4),
  90. KEY(3, 2, KEY_R),
  91. KEY(3, 3, KEY_E),
  92. KEY(3, 4, KEY_F),
  93. KEY(3, 5, KEY_D),
  94. KEY(3, 6, KEY_X),
  95. KEY(4, 0, KEY_7),
  96. KEY(4, 1, KEY_6),
  97. KEY(4, 2, KEY_T),
  98. KEY(4, 3, KEY_H),
  99. KEY(4, 4, KEY_G),
  100. KEY(4, 5, KEY_V),
  101. KEY(4, 6, KEY_C),
  102. KEY(4, 7, KEY_SPACE),
  103. KEY(5, 0, KEY_9),
  104. KEY(5, 1, KEY_8),
  105. KEY(5, 2, KEY_U),
  106. KEY(5, 3, KEY_Y),
  107. KEY(5, 4, KEY_J),
  108. KEY(5, 5, KEY_N),
  109. KEY(5, 6, KEY_B),
  110. KEY(5, 7, KEY_BACKSLASH),
  111. KEY(6, 0, KEY_MINUS),
  112. KEY(6, 1, KEY_0),
  113. KEY(6, 2, KEY_O),
  114. KEY(6, 3, KEY_I),
  115. KEY(6, 4, KEY_L),
  116. KEY(6, 5, KEY_K),
  117. KEY(6, 6, KEY_COMMA),
  118. KEY(6, 7, KEY_M),
  119. KEY(7, 1, KEY_EQUAL),
  120. KEY(7, 2, KEY_RIGHTBRACE),
  121. KEY(7, 3, KEY_ENTER),
  122. KEY(7, 7, KEY_MENU),
  123. KEY(8, 4, KEY_RIGHTSHIFT),
  124. KEY(8, 5, KEY_LEFTSHIFT),
  125. KEY(9, 5, KEY_RIGHTCTRL),
  126. KEY(9, 7, KEY_LEFTCTRL),
  127. KEY(11, 0, KEY_LEFTBRACE),
  128. KEY(11, 1, KEY_P),
  129. KEY(11, 2, KEY_APOSTROPHE),
  130. KEY(11, 3, KEY_SEMICOLON),
  131. KEY(11, 4, KEY_SLASH),
  132. KEY(11, 5, KEY_DOT),
  133. KEY(12, 0, KEY_F10),
  134. KEY(12, 1, KEY_F9),
  135. KEY(12, 2, KEY_BACKSPACE),
  136. KEY(12, 3, KEY_3),
  137. KEY(12, 4, KEY_2),
  138. KEY(12, 5, KEY_UP),
  139. KEY(12, 6, KEY_PRINT),
  140. KEY(12, 7, KEY_PAUSE),
  141. KEY(13, 0, KEY_INSERT),
  142. KEY(13, 1, KEY_DELETE),
  143. KEY(13, 3, KEY_PAGEUP),
  144. KEY(13, 4, KEY_PAGEDOWN),
  145. KEY(13, 5, KEY_RIGHT),
  146. KEY(13, 6, KEY_DOWN),
  147. KEY(13, 7, KEY_LEFT),
  148. KEY(14, 0, KEY_F11),
  149. KEY(14, 1, KEY_F12),
  150. KEY(14, 2, KEY_F8),
  151. KEY(14, 3, KEY_Q),
  152. KEY(14, 4, KEY_F4),
  153. KEY(14, 5, KEY_F3),
  154. KEY(14, 6, KEY_1),
  155. KEY(14, 7, KEY_F7),
  156. KEY(15, 0, KEY_ESC),
  157. KEY(15, 1, KEY_GRAVE),
  158. KEY(15, 2, KEY_F5),
  159. KEY(15, 3, KEY_TAB),
  160. KEY(15, 4, KEY_F1),
  161. KEY(15, 5, KEY_F2),
  162. KEY(15, 6, KEY_CAPSLOCK),
  163. KEY(15, 7, KEY_F6),
  164. /* Software Handled Function Keys */
  165. KEY(20, 0, KEY_KP7),
  166. KEY(21, 0, KEY_KP9),
  167. KEY(21, 1, KEY_KP8),
  168. KEY(21, 2, KEY_KP4),
  169. KEY(21, 4, KEY_KP1),
  170. KEY(22, 1, KEY_KPSLASH),
  171. KEY(22, 2, KEY_KP6),
  172. KEY(22, 3, KEY_KP5),
  173. KEY(22, 4, KEY_KP3),
  174. KEY(22, 5, KEY_KP2),
  175. KEY(22, 7, KEY_KP0),
  176. KEY(27, 1, KEY_KPASTERISK),
  177. KEY(27, 3, KEY_KPMINUS),
  178. KEY(27, 4, KEY_KPPLUS),
  179. KEY(27, 5, KEY_KPDOT),
  180. KEY(28, 5, KEY_VOLUMEUP),
  181. KEY(29, 3, KEY_HOME),
  182. KEY(29, 4, KEY_END),
  183. KEY(29, 5, KEY_BRIGHTNESSDOWN),
  184. KEY(29, 6, KEY_VOLUMEDOWN),
  185. KEY(29, 7, KEY_BRIGHTNESSUP),
  186. KEY(30, 0, KEY_NUMLOCK),
  187. KEY(30, 1, KEY_SCROLLLOCK),
  188. KEY(30, 2, KEY_MUTE),
  189. KEY(31, 4, KEY_HELP),
  190. };
  191. static const
  192. struct matrix_keymap_data tegra_kbc_default_keymap_data __devinitdata = {
  193. .keymap = tegra_kbc_default_keymap,
  194. .keymap_size = ARRAY_SIZE(tegra_kbc_default_keymap),
  195. };
  196. static void tegra_kbc_report_released_keys(struct input_dev *input,
  197. unsigned short old_keycodes[],
  198. unsigned int old_num_keys,
  199. unsigned short new_keycodes[],
  200. unsigned int new_num_keys)
  201. {
  202. unsigned int i, j;
  203. for (i = 0; i < old_num_keys; i++) {
  204. for (j = 0; j < new_num_keys; j++)
  205. if (old_keycodes[i] == new_keycodes[j])
  206. break;
  207. if (j == new_num_keys)
  208. input_report_key(input, old_keycodes[i], 0);
  209. }
  210. }
  211. static void tegra_kbc_report_pressed_keys(struct input_dev *input,
  212. unsigned char scancodes[],
  213. unsigned short keycodes[],
  214. unsigned int num_pressed_keys)
  215. {
  216. unsigned int i;
  217. for (i = 0; i < num_pressed_keys; i++) {
  218. input_event(input, EV_MSC, MSC_SCAN, scancodes[i]);
  219. input_report_key(input, keycodes[i], 1);
  220. }
  221. }
  222. static void tegra_kbc_report_keys(struct tegra_kbc *kbc)
  223. {
  224. unsigned char scancodes[KBC_MAX_KPENT];
  225. unsigned short keycodes[KBC_MAX_KPENT];
  226. u32 val = 0;
  227. unsigned int i;
  228. unsigned int num_down = 0;
  229. bool fn_keypress = false;
  230. bool key_in_same_row = false;
  231. bool key_in_same_col = false;
  232. for (i = 0; i < KBC_MAX_KPENT; i++) {
  233. if ((i % 4) == 0)
  234. val = readl(kbc->mmio + KBC_KP_ENT0_0 + i);
  235. if (val & 0x80) {
  236. unsigned int col = val & 0x07;
  237. unsigned int row = (val >> 3) & 0x0f;
  238. unsigned char scancode =
  239. MATRIX_SCAN_CODE(row, col, KBC_ROW_SHIFT);
  240. scancodes[num_down] = scancode;
  241. keycodes[num_down] = kbc->keycode[scancode];
  242. /* If driver uses Fn map, do not report the Fn key. */
  243. if ((keycodes[num_down] == KEY_FN) && kbc->use_fn_map)
  244. fn_keypress = true;
  245. else
  246. num_down++;
  247. }
  248. val >>= 8;
  249. }
  250. /*
  251. * Matrix keyboard designs are prone to keyboard ghosting.
  252. * Ghosting occurs if there are 3 keys such that -
  253. * any 2 of the 3 keys share a row, and any 2 of them share a column.
  254. * If so ignore the key presses for this iteration.
  255. */
  256. if (kbc->use_ghost_filter && num_down >= 3) {
  257. for (i = 0; i < num_down; i++) {
  258. unsigned int j;
  259. u8 curr_col = scancodes[i] & 0x07;
  260. u8 curr_row = scancodes[i] >> KBC_ROW_SHIFT;
  261. /*
  262. * Find 2 keys such that one key is in the same row
  263. * and the other is in the same column as the i-th key.
  264. */
  265. for (j = i + 1; j < num_down; j++) {
  266. u8 col = scancodes[j] & 0x07;
  267. u8 row = scancodes[j] >> KBC_ROW_SHIFT;
  268. if (col == curr_col)
  269. key_in_same_col = true;
  270. if (row == curr_row)
  271. key_in_same_row = true;
  272. }
  273. }
  274. }
  275. /*
  276. * If the platform uses Fn keymaps, translate keys on a Fn keypress.
  277. * Function keycodes are KBC_MAX_KEY apart from the plain keycodes.
  278. */
  279. if (fn_keypress) {
  280. for (i = 0; i < num_down; i++) {
  281. scancodes[i] += KBC_MAX_KEY;
  282. keycodes[i] = kbc->keycode[scancodes[i]];
  283. }
  284. }
  285. /* Ignore the key presses for this iteration? */
  286. if (key_in_same_col && key_in_same_row)
  287. return;
  288. tegra_kbc_report_released_keys(kbc->idev,
  289. kbc->current_keys, kbc->num_pressed_keys,
  290. keycodes, num_down);
  291. tegra_kbc_report_pressed_keys(kbc->idev, scancodes, keycodes, num_down);
  292. input_sync(kbc->idev);
  293. memcpy(kbc->current_keys, keycodes, sizeof(kbc->current_keys));
  294. kbc->num_pressed_keys = num_down;
  295. }
  296. static void tegra_kbc_set_fifo_interrupt(struct tegra_kbc *kbc, bool enable)
  297. {
  298. u32 val;
  299. val = readl(kbc->mmio + KBC_CONTROL_0);
  300. if (enable)
  301. val |= KBC_CONTROL_FIFO_CNT_INT_EN;
  302. else
  303. val &= ~KBC_CONTROL_FIFO_CNT_INT_EN;
  304. writel(val, kbc->mmio + KBC_CONTROL_0);
  305. }
  306. static void tegra_kbc_set_keypress_interrupt(struct tegra_kbc *kbc, bool enable)
  307. {
  308. u32 val;
  309. val = readl(kbc->mmio + KBC_CONTROL_0);
  310. if (enable)
  311. val |= KBC_CONTROL_KEYPRESS_INT_EN;
  312. else
  313. val &= ~KBC_CONTROL_KEYPRESS_INT_EN;
  314. writel(val, kbc->mmio + KBC_CONTROL_0);
  315. }
  316. static void tegra_kbc_keypress_timer(unsigned long data)
  317. {
  318. struct tegra_kbc *kbc = (struct tegra_kbc *)data;
  319. unsigned long flags;
  320. u32 val;
  321. unsigned int i;
  322. spin_lock_irqsave(&kbc->lock, flags);
  323. val = (readl(kbc->mmio + KBC_INT_0) >> 4) & 0xf;
  324. if (val) {
  325. unsigned long dly;
  326. tegra_kbc_report_keys(kbc);
  327. /*
  328. * If more than one keys are pressed we need not wait
  329. * for the repoll delay.
  330. */
  331. dly = (val == 1) ? kbc->repoll_dly : 1;
  332. mod_timer(&kbc->timer, jiffies + msecs_to_jiffies(dly));
  333. } else {
  334. /* Release any pressed keys and exit the polling loop */
  335. for (i = 0; i < kbc->num_pressed_keys; i++)
  336. input_report_key(kbc->idev, kbc->current_keys[i], 0);
  337. input_sync(kbc->idev);
  338. kbc->num_pressed_keys = 0;
  339. /* All keys are released so enable the keypress interrupt */
  340. tegra_kbc_set_fifo_interrupt(kbc, true);
  341. }
  342. spin_unlock_irqrestore(&kbc->lock, flags);
  343. }
  344. static irqreturn_t tegra_kbc_isr(int irq, void *args)
  345. {
  346. struct tegra_kbc *kbc = args;
  347. unsigned long flags;
  348. u32 val;
  349. spin_lock_irqsave(&kbc->lock, flags);
  350. /*
  351. * Quickly bail out & reenable interrupts if the fifo threshold
  352. * count interrupt wasn't the interrupt source
  353. */
  354. val = readl(kbc->mmio + KBC_INT_0);
  355. writel(val, kbc->mmio + KBC_INT_0);
  356. if (val & KBC_INT_FIFO_CNT_INT_STATUS) {
  357. /*
  358. * Until all keys are released, defer further processing to
  359. * the polling loop in tegra_kbc_keypress_timer.
  360. */
  361. tegra_kbc_set_fifo_interrupt(kbc, false);
  362. mod_timer(&kbc->timer, jiffies + kbc->cp_dly_jiffies);
  363. } else if (val & KBC_INT_KEYPRESS_INT_STATUS) {
  364. /* We can be here only through system resume path */
  365. kbc->keypress_caused_wake = true;
  366. }
  367. spin_unlock_irqrestore(&kbc->lock, flags);
  368. return IRQ_HANDLED;
  369. }
  370. static void tegra_kbc_setup_wakekeys(struct tegra_kbc *kbc, bool filter)
  371. {
  372. const struct tegra_kbc_platform_data *pdata = kbc->pdata;
  373. int i;
  374. unsigned int rst_val;
  375. /* Either mask all keys or none. */
  376. rst_val = (filter && !pdata->wakeup) ? ~0 : 0;
  377. for (i = 0; i < KBC_MAX_ROW; i++)
  378. writel(rst_val, kbc->mmio + KBC_ROW0_MASK_0 + i * 4);
  379. }
  380. static void tegra_kbc_config_pins(struct tegra_kbc *kbc)
  381. {
  382. const struct tegra_kbc_platform_data *pdata = kbc->pdata;
  383. int i;
  384. for (i = 0; i < KBC_MAX_GPIO; i++) {
  385. u32 r_shft = 5 * (i % 6);
  386. u32 c_shft = 4 * (i % 8);
  387. u32 r_mask = 0x1f << r_shft;
  388. u32 c_mask = 0x0f << c_shft;
  389. u32 r_offs = (i / 6) * 4 + KBC_ROW_CFG0_0;
  390. u32 c_offs = (i / 8) * 4 + KBC_COL_CFG0_0;
  391. u32 row_cfg = readl(kbc->mmio + r_offs);
  392. u32 col_cfg = readl(kbc->mmio + c_offs);
  393. row_cfg &= ~r_mask;
  394. col_cfg &= ~c_mask;
  395. switch (pdata->pin_cfg[i].type) {
  396. case PIN_CFG_ROW:
  397. row_cfg |= ((pdata->pin_cfg[i].num << 1) | 1) << r_shft;
  398. break;
  399. case PIN_CFG_COL:
  400. col_cfg |= ((pdata->pin_cfg[i].num << 1) | 1) << c_shft;
  401. break;
  402. case PIN_CFG_IGNORE:
  403. break;
  404. }
  405. writel(row_cfg, kbc->mmio + r_offs);
  406. writel(col_cfg, kbc->mmio + c_offs);
  407. }
  408. }
  409. static int tegra_kbc_start(struct tegra_kbc *kbc)
  410. {
  411. const struct tegra_kbc_platform_data *pdata = kbc->pdata;
  412. unsigned int debounce_cnt;
  413. u32 val = 0;
  414. clk_enable(kbc->clk);
  415. /* Reset the KBC controller to clear all previous status.*/
  416. tegra_periph_reset_assert(kbc->clk);
  417. udelay(100);
  418. tegra_periph_reset_deassert(kbc->clk);
  419. udelay(100);
  420. tegra_kbc_config_pins(kbc);
  421. tegra_kbc_setup_wakekeys(kbc, false);
  422. writel(pdata->repeat_cnt, kbc->mmio + KBC_RPT_DLY_0);
  423. /* Keyboard debounce count is maximum of 12 bits. */
  424. debounce_cnt = min(pdata->debounce_cnt, KBC_MAX_DEBOUNCE_CNT);
  425. val = KBC_DEBOUNCE_CNT_SHIFT(debounce_cnt);
  426. val |= KBC_FIFO_TH_CNT_SHIFT(1); /* set fifo interrupt threshold to 1 */
  427. val |= KBC_CONTROL_FIFO_CNT_INT_EN; /* interrupt on FIFO threshold */
  428. val |= KBC_CONTROL_KBC_EN; /* enable */
  429. writel(val, kbc->mmio + KBC_CONTROL_0);
  430. /*
  431. * Compute the delay(ns) from interrupt mode to continuous polling
  432. * mode so the timer routine is scheduled appropriately.
  433. */
  434. val = readl(kbc->mmio + KBC_INIT_DLY_0);
  435. kbc->cp_dly_jiffies = usecs_to_jiffies((val & 0xfffff) * 32);
  436. kbc->num_pressed_keys = 0;
  437. /*
  438. * Atomically clear out any remaining entries in the key FIFO
  439. * and enable keyboard interrupts.
  440. */
  441. while (1) {
  442. val = readl(kbc->mmio + KBC_INT_0);
  443. val >>= 4;
  444. if (!val)
  445. break;
  446. val = readl(kbc->mmio + KBC_KP_ENT0_0);
  447. val = readl(kbc->mmio + KBC_KP_ENT1_0);
  448. }
  449. writel(0x7, kbc->mmio + KBC_INT_0);
  450. enable_irq(kbc->irq);
  451. return 0;
  452. }
  453. static void tegra_kbc_stop(struct tegra_kbc *kbc)
  454. {
  455. unsigned long flags;
  456. u32 val;
  457. spin_lock_irqsave(&kbc->lock, flags);
  458. val = readl(kbc->mmio + KBC_CONTROL_0);
  459. val &= ~1;
  460. writel(val, kbc->mmio + KBC_CONTROL_0);
  461. spin_unlock_irqrestore(&kbc->lock, flags);
  462. disable_irq(kbc->irq);
  463. del_timer_sync(&kbc->timer);
  464. clk_disable(kbc->clk);
  465. }
  466. static int tegra_kbc_open(struct input_dev *dev)
  467. {
  468. struct tegra_kbc *kbc = input_get_drvdata(dev);
  469. return tegra_kbc_start(kbc);
  470. }
  471. static void tegra_kbc_close(struct input_dev *dev)
  472. {
  473. struct tegra_kbc *kbc = input_get_drvdata(dev);
  474. return tegra_kbc_stop(kbc);
  475. }
  476. static bool __devinit
  477. tegra_kbc_check_pin_cfg(const struct tegra_kbc_platform_data *pdata,
  478. struct device *dev, unsigned int *num_rows)
  479. {
  480. int i;
  481. *num_rows = 0;
  482. for (i = 0; i < KBC_MAX_GPIO; i++) {
  483. const struct tegra_kbc_pin_cfg *pin_cfg = &pdata->pin_cfg[i];
  484. switch (pin_cfg->type) {
  485. case PIN_CFG_ROW:
  486. if (pin_cfg->num >= KBC_MAX_ROW) {
  487. dev_err(dev,
  488. "pin_cfg[%d]: invalid row number %d\n",
  489. i, pin_cfg->num);
  490. return false;
  491. }
  492. (*num_rows)++;
  493. break;
  494. case PIN_CFG_COL:
  495. if (pin_cfg->num >= KBC_MAX_COL) {
  496. dev_err(dev,
  497. "pin_cfg[%d]: invalid column number %d\n",
  498. i, pin_cfg->num);
  499. return false;
  500. }
  501. break;
  502. case PIN_CFG_IGNORE:
  503. break;
  504. default:
  505. dev_err(dev,
  506. "pin_cfg[%d]: invalid entry type %d\n",
  507. pin_cfg->type, pin_cfg->num);
  508. return false;
  509. }
  510. }
  511. return true;
  512. }
  513. #ifdef CONFIG_OF
  514. static struct tegra_kbc_platform_data * __devinit
  515. tegra_kbc_dt_parse_pdata(struct platform_device *pdev)
  516. {
  517. struct tegra_kbc_platform_data *pdata;
  518. struct device_node *np = pdev->dev.of_node;
  519. u32 prop;
  520. int i;
  521. if (!np)
  522. return NULL;
  523. pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
  524. if (!pdata)
  525. return NULL;
  526. if (!of_property_read_u32(np, "nvidia,debounce-delay-ms", &prop))
  527. pdata->debounce_cnt = prop;
  528. if (!of_property_read_u32(np, "nvidia,repeat-delay-ms", &prop))
  529. pdata->repeat_cnt = prop;
  530. if (of_find_property(np, "nvidia,needs-ghost-filter", NULL))
  531. pdata->use_ghost_filter = true;
  532. if (of_find_property(np, "nvidia,wakeup-source", NULL))
  533. pdata->wakeup = true;
  534. /*
  535. * All currently known keymaps with device tree support use the same
  536. * pin_cfg, so set it up here.
  537. */
  538. for (i = 0; i < KBC_MAX_ROW; i++) {
  539. pdata->pin_cfg[i].num = i;
  540. pdata->pin_cfg[i].type = PIN_CFG_ROW;
  541. }
  542. for (i = 0; i < KBC_MAX_COL; i++) {
  543. pdata->pin_cfg[KBC_MAX_ROW + i].num = i;
  544. pdata->pin_cfg[KBC_MAX_ROW + i].type = PIN_CFG_COL;
  545. }
  546. pdata->keymap_data = matrix_keyboard_of_fill_keymap(np, "linux,keymap");
  547. /* FIXME: Add handling of linux,fn-keymap here */
  548. return pdata;
  549. }
  550. #else
  551. static inline struct tegra_kbc_platform_data *tegra_kbc_dt_parse_pdata(
  552. struct platform_device *pdev)
  553. {
  554. return NULL;
  555. }
  556. #endif
  557. static int __devinit tegra_kbc_probe(struct platform_device *pdev)
  558. {
  559. const struct tegra_kbc_platform_data *pdata = pdev->dev.platform_data;
  560. const struct matrix_keymap_data *keymap_data;
  561. struct tegra_kbc *kbc;
  562. struct input_dev *input_dev;
  563. struct resource *res;
  564. int irq;
  565. int err;
  566. int num_rows = 0;
  567. unsigned int debounce_cnt;
  568. unsigned int scan_time_rows;
  569. if (!pdata)
  570. pdata = tegra_kbc_dt_parse_pdata(pdev);
  571. if (!pdata)
  572. return -EINVAL;
  573. if (!tegra_kbc_check_pin_cfg(pdata, &pdev->dev, &num_rows)) {
  574. err = -EINVAL;
  575. goto err_free_pdata;
  576. }
  577. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  578. if (!res) {
  579. dev_err(&pdev->dev, "failed to get I/O memory\n");
  580. err = -ENXIO;
  581. goto err_free_pdata;
  582. }
  583. irq = platform_get_irq(pdev, 0);
  584. if (irq < 0) {
  585. dev_err(&pdev->dev, "failed to get keyboard IRQ\n");
  586. err = -ENXIO;
  587. goto err_free_pdata;
  588. }
  589. kbc = kzalloc(sizeof(*kbc), GFP_KERNEL);
  590. input_dev = input_allocate_device();
  591. if (!kbc || !input_dev) {
  592. err = -ENOMEM;
  593. goto err_free_mem;
  594. }
  595. kbc->pdata = pdata;
  596. kbc->idev = input_dev;
  597. kbc->irq = irq;
  598. spin_lock_init(&kbc->lock);
  599. setup_timer(&kbc->timer, tegra_kbc_keypress_timer, (unsigned long)kbc);
  600. res = request_mem_region(res->start, resource_size(res), pdev->name);
  601. if (!res) {
  602. dev_err(&pdev->dev, "failed to request I/O memory\n");
  603. err = -EBUSY;
  604. goto err_free_mem;
  605. }
  606. kbc->mmio = ioremap(res->start, resource_size(res));
  607. if (!kbc->mmio) {
  608. dev_err(&pdev->dev, "failed to remap I/O memory\n");
  609. err = -ENXIO;
  610. goto err_free_mem_region;
  611. }
  612. kbc->clk = clk_get(&pdev->dev, NULL);
  613. if (IS_ERR(kbc->clk)) {
  614. dev_err(&pdev->dev, "failed to get keyboard clock\n");
  615. err = PTR_ERR(kbc->clk);
  616. goto err_iounmap;
  617. }
  618. /*
  619. * The time delay between two consecutive reads of the FIFO is
  620. * the sum of the repeat time and the time taken for scanning
  621. * the rows. There is an additional delay before the row scanning
  622. * starts. The repoll delay is computed in milliseconds.
  623. */
  624. debounce_cnt = min(pdata->debounce_cnt, KBC_MAX_DEBOUNCE_CNT);
  625. scan_time_rows = (KBC_ROW_SCAN_TIME + debounce_cnt) * num_rows;
  626. kbc->repoll_dly = KBC_ROW_SCAN_DLY + scan_time_rows + pdata->repeat_cnt;
  627. kbc->repoll_dly = DIV_ROUND_UP(kbc->repoll_dly, KBC_CYCLE_MS);
  628. input_dev->name = pdev->name;
  629. input_dev->id.bustype = BUS_HOST;
  630. input_dev->dev.parent = &pdev->dev;
  631. input_dev->open = tegra_kbc_open;
  632. input_dev->close = tegra_kbc_close;
  633. input_set_drvdata(input_dev, kbc);
  634. input_dev->evbit[0] = BIT_MASK(EV_KEY) | BIT_MASK(EV_REP);
  635. input_set_capability(input_dev, EV_MSC, MSC_SCAN);
  636. input_dev->keycode = kbc->keycode;
  637. input_dev->keycodesize = sizeof(kbc->keycode[0]);
  638. input_dev->keycodemax = KBC_MAX_KEY;
  639. if (pdata->use_fn_map)
  640. input_dev->keycodemax *= 2;
  641. kbc->use_fn_map = pdata->use_fn_map;
  642. kbc->use_ghost_filter = pdata->use_ghost_filter;
  643. keymap_data = pdata->keymap_data ?: &tegra_kbc_default_keymap_data;
  644. matrix_keypad_build_keymap(keymap_data, KBC_ROW_SHIFT,
  645. input_dev->keycode, input_dev->keybit);
  646. kbc->wakeup_key = pdata->wakeup_key;
  647. err = request_irq(kbc->irq, tegra_kbc_isr,
  648. IRQF_NO_SUSPEND | IRQF_TRIGGER_HIGH, pdev->name, kbc);
  649. if (err) {
  650. dev_err(&pdev->dev, "failed to request keyboard IRQ\n");
  651. goto err_put_clk;
  652. }
  653. disable_irq(kbc->irq);
  654. err = input_register_device(kbc->idev);
  655. if (err) {
  656. dev_err(&pdev->dev, "failed to register input device\n");
  657. goto err_free_irq;
  658. }
  659. platform_set_drvdata(pdev, kbc);
  660. device_init_wakeup(&pdev->dev, pdata->wakeup);
  661. if (!pdev->dev.platform_data)
  662. matrix_keyboard_of_free_keymap(pdata->keymap_data);
  663. return 0;
  664. err_free_irq:
  665. free_irq(kbc->irq, pdev);
  666. err_put_clk:
  667. clk_put(kbc->clk);
  668. err_iounmap:
  669. iounmap(kbc->mmio);
  670. err_free_mem_region:
  671. release_mem_region(res->start, resource_size(res));
  672. err_free_mem:
  673. input_free_device(input_dev);
  674. kfree(kbc);
  675. err_free_pdata:
  676. if (!pdev->dev.platform_data) {
  677. matrix_keyboard_of_free_keymap(pdata->keymap_data);
  678. kfree(pdata);
  679. }
  680. return err;
  681. }
  682. static int __devexit tegra_kbc_remove(struct platform_device *pdev)
  683. {
  684. struct tegra_kbc *kbc = platform_get_drvdata(pdev);
  685. struct resource *res;
  686. platform_set_drvdata(pdev, NULL);
  687. free_irq(kbc->irq, pdev);
  688. clk_put(kbc->clk);
  689. input_unregister_device(kbc->idev);
  690. iounmap(kbc->mmio);
  691. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  692. release_mem_region(res->start, resource_size(res));
  693. /*
  694. * If we do not have platform data attached to the device we
  695. * allocated it ourselves and thus need to free it.
  696. */
  697. if (!pdev->dev.platform_data)
  698. kfree(kbc->pdata);
  699. kfree(kbc);
  700. return 0;
  701. }
  702. #ifdef CONFIG_PM_SLEEP
  703. static int tegra_kbc_suspend(struct device *dev)
  704. {
  705. struct platform_device *pdev = to_platform_device(dev);
  706. struct tegra_kbc *kbc = platform_get_drvdata(pdev);
  707. mutex_lock(&kbc->idev->mutex);
  708. if (device_may_wakeup(&pdev->dev)) {
  709. disable_irq(kbc->irq);
  710. del_timer_sync(&kbc->timer);
  711. tegra_kbc_set_fifo_interrupt(kbc, false);
  712. /* Forcefully clear the interrupt status */
  713. writel(0x7, kbc->mmio + KBC_INT_0);
  714. /*
  715. * Store the previous resident time of continuous polling mode.
  716. * Force the keyboard into interrupt mode.
  717. */
  718. kbc->cp_to_wkup_dly = readl(kbc->mmio + KBC_TO_CNT_0);
  719. writel(0, kbc->mmio + KBC_TO_CNT_0);
  720. tegra_kbc_setup_wakekeys(kbc, true);
  721. msleep(30);
  722. kbc->keypress_caused_wake = false;
  723. /* Enable keypress interrupt before going into suspend. */
  724. tegra_kbc_set_keypress_interrupt(kbc, true);
  725. enable_irq(kbc->irq);
  726. enable_irq_wake(kbc->irq);
  727. } else {
  728. if (kbc->idev->users)
  729. tegra_kbc_stop(kbc);
  730. }
  731. mutex_unlock(&kbc->idev->mutex);
  732. return 0;
  733. }
  734. static int tegra_kbc_resume(struct device *dev)
  735. {
  736. struct platform_device *pdev = to_platform_device(dev);
  737. struct tegra_kbc *kbc = platform_get_drvdata(pdev);
  738. int err = 0;
  739. mutex_lock(&kbc->idev->mutex);
  740. if (device_may_wakeup(&pdev->dev)) {
  741. disable_irq_wake(kbc->irq);
  742. tegra_kbc_setup_wakekeys(kbc, false);
  743. /* We will use fifo interrupts for key detection. */
  744. tegra_kbc_set_keypress_interrupt(kbc, false);
  745. /* Restore the resident time of continuous polling mode. */
  746. writel(kbc->cp_to_wkup_dly, kbc->mmio + KBC_TO_CNT_0);
  747. tegra_kbc_set_fifo_interrupt(kbc, true);
  748. if (kbc->keypress_caused_wake && kbc->wakeup_key) {
  749. /*
  750. * We can't report events directly from the ISR
  751. * because timekeeping is stopped when processing
  752. * wakeup request and we get a nasty warning when
  753. * we try to call do_gettimeofday() in evdev
  754. * handler.
  755. */
  756. input_report_key(kbc->idev, kbc->wakeup_key, 1);
  757. input_sync(kbc->idev);
  758. input_report_key(kbc->idev, kbc->wakeup_key, 0);
  759. input_sync(kbc->idev);
  760. }
  761. } else {
  762. if (kbc->idev->users)
  763. err = tegra_kbc_start(kbc);
  764. }
  765. mutex_unlock(&kbc->idev->mutex);
  766. return err;
  767. }
  768. #endif
  769. static SIMPLE_DEV_PM_OPS(tegra_kbc_pm_ops, tegra_kbc_suspend, tegra_kbc_resume);
  770. static const struct of_device_id tegra_kbc_of_match[] = {
  771. { .compatible = "nvidia,tegra20-kbc", },
  772. { },
  773. };
  774. MODULE_DEVICE_TABLE(of, tegra_kbc_of_match);
  775. static struct platform_driver tegra_kbc_driver = {
  776. .probe = tegra_kbc_probe,
  777. .remove = __devexit_p(tegra_kbc_remove),
  778. .driver = {
  779. .name = "tegra-kbc",
  780. .owner = THIS_MODULE,
  781. .pm = &tegra_kbc_pm_ops,
  782. .of_match_table = tegra_kbc_of_match,
  783. },
  784. };
  785. module_platform_driver(tegra_kbc_driver);
  786. MODULE_LICENSE("GPL");
  787. MODULE_AUTHOR("Rakesh Iyer <riyer@nvidia.com>");
  788. MODULE_DESCRIPTION("Tegra matrix keyboard controller driver");
  789. MODULE_ALIAS("platform:tegra-kbc");