cpuidle-calxeda.c 2.8 KB

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  1. /*
  2. * Copyright 2012 Calxeda, Inc.
  3. *
  4. * Based on arch/arm/plat-mxc/cpuidle.c: #v3.7
  5. * Copyright 2012 Freescale Semiconductor, Inc.
  6. * Copyright 2012 Linaro Ltd.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms and conditions of the GNU General Public License,
  10. * version 2, as published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program. If not, see <http://www.gnu.org/licenses/>.
  19. *
  20. * Maintainer: Rob Herring <rob.herring@calxeda.com>
  21. */
  22. #include <linux/cpuidle.h>
  23. #include <linux/init.h>
  24. #include <linux/io.h>
  25. #include <linux/of.h>
  26. #include <linux/time.h>
  27. #include <linux/delay.h>
  28. #include <linux/suspend.h>
  29. #include <asm/cpuidle.h>
  30. #include <asm/proc-fns.h>
  31. #include <asm/smp_scu.h>
  32. #include <asm/suspend.h>
  33. #include <asm/cacheflush.h>
  34. #include <asm/cp15.h>
  35. extern void highbank_set_cpu_jump(int cpu, void *jump_addr);
  36. extern void *scu_base_addr;
  37. static inline unsigned int get_auxcr(void)
  38. {
  39. unsigned int val;
  40. asm("mrc p15, 0, %0, c1, c0, 1 @ get AUXCR" : "=r" (val) : : "cc");
  41. return val;
  42. }
  43. static inline void set_auxcr(unsigned int val)
  44. {
  45. asm volatile("mcr p15, 0, %0, c1, c0, 1 @ set AUXCR"
  46. : : "r" (val) : "cc");
  47. isb();
  48. }
  49. static noinline void calxeda_idle_restore(void)
  50. {
  51. set_cr(get_cr() | CR_C);
  52. set_auxcr(get_auxcr() | 0x40);
  53. scu_power_mode(scu_base_addr, SCU_PM_NORMAL);
  54. }
  55. static int calxeda_idle_finish(unsigned long val)
  56. {
  57. /* Already flushed cache, but do it again as the outer cache functions
  58. * dirty the cache with spinlocks */
  59. flush_cache_all();
  60. set_auxcr(get_auxcr() & ~0x40);
  61. set_cr(get_cr() & ~CR_C);
  62. scu_power_mode(scu_base_addr, SCU_PM_DORMANT);
  63. cpu_do_idle();
  64. /* Restore things if we didn't enter power-gating */
  65. calxeda_idle_restore();
  66. return 1;
  67. }
  68. static int calxeda_pwrdown_idle(struct cpuidle_device *dev,
  69. struct cpuidle_driver *drv,
  70. int index)
  71. {
  72. highbank_set_cpu_jump(smp_processor_id(), cpu_resume);
  73. cpu_suspend(0, calxeda_idle_finish);
  74. return index;
  75. }
  76. static struct cpuidle_driver calxeda_idle_driver = {
  77. .name = "calxeda_idle",
  78. .en_core_tk_irqen = 1,
  79. .states = {
  80. ARM_CPUIDLE_WFI_STATE,
  81. {
  82. .name = "PG",
  83. .desc = "Power Gate",
  84. .flags = CPUIDLE_FLAG_TIME_VALID,
  85. .exit_latency = 30,
  86. .power_usage = 50,
  87. .target_residency = 200,
  88. .enter = calxeda_pwrdown_idle,
  89. },
  90. },
  91. .state_count = 2,
  92. };
  93. static int __init calxeda_cpuidle_init(void)
  94. {
  95. if (!of_machine_is_compatible("calxeda,highbank"))
  96. return -ENODEV;
  97. return cpuidle_register(&calxeda_idle_driver, NULL);
  98. }
  99. module_init(calxeda_cpuidle_init);