msm-dai-q6-v2.c 62 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845184618471848184918501851185218531854185518561857185818591860186118621863186418651866186718681869187018711872187318741875187618771878187918801881188218831884188518861887188818891890189118921893189418951896189718981899190019011902190319041905190619071908190919101911191219131914191519161917191819191920192119221923192419251926192719281929193019311932193319341935193619371938193919401941194219431944194519461947194819491950195119521953195419551956195719581959196019611962196319641965196619671968196919701971197219731974197519761977197819791980198119821983198419851986198719881989199019911992199319941995199619971998199920002001200220032004200520062007200820092010201120122013201420152016201720182019202020212022202320242025202620272028202920302031203220332034203520362037203820392040204120422043204420452046204720482049205020512052205320542055205620572058205920602061206220632064206520662067206820692070207120722073207420752076207720782079208020812082208320842085208620872088208920902091209220932094209520962097209820992100210121022103210421052106210721082109211021112112211321142115211621172118211921202121212221232124212521262127212821292130213121322133213421352136213721382139214021412142214321442145214621472148214921502151215221532154215521562157215821592160216121622163216421652166216721682169217021712172217321742175217621772178217921802181218221832184218521862187218821892190219121922193219421952196219721982199220022012202220322042205220622072208220922102211221222132214221522162217221822192220222122222223222422252226222722282229223022312232223322342235223622372238223922402241224222432244224522462247224822492250225122522253225422552256225722582259226022612262226322642265226622672268
  1. /* Copyright (c) 2012-2017, The Linux Foundation. All rights reserved.
  2. *
  3. * This program is free software; you can redistribute it and/or modify
  4. * it under the terms of the GNU General Public License version 2 and
  5. * only version 2 as published by the Free Software Foundation.
  6. *
  7. * This program is distributed in the hope that it will be useful,
  8. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  10. * GNU General Public License for more details.
  11. */
  12. #include <linux/init.h>
  13. #include <linux/module.h>
  14. #include <linux/device.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/mfd/wcd9xxx/core.h>
  17. #include <linux/bitops.h>
  18. #include <linux/slab.h>
  19. #include <linux/clk.h>
  20. #include <linux/of_device.h>
  21. #include <sound/core.h>
  22. #include <sound/pcm.h>
  23. #include <sound/soc.h>
  24. #include <sound/apr_audio-v2.h>
  25. #include <sound/q6afe-v2.h>
  26. #include <sound/msm-dai-q6-v2.h>
  27. #include <sound/pcm_params.h>
  28. #include <mach/clk.h>
  29. #define MSM_DAI_PRI_AUXPCM_DT_DEV_ID 1
  30. #define MSM_DAI_SEC_AUXPCM_DT_DEV_ID 2
  31. static const struct afe_clk_cfg lpass_clk_cfg_default = {
  32. AFE_API_VERSION_I2S_CONFIG,
  33. Q6AFE_LPASS_OSR_CLK_2_P048_MHZ,
  34. 0,
  35. Q6AFE_LPASS_CLK_SRC_INTERNAL,
  36. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  37. Q6AFE_LPASS_MODE_CLK1_VALID,
  38. 0,
  39. };
  40. enum {
  41. STATUS_PORT_STARTED, /* track if AFE port has started */
  42. /* track AFE Tx port status for bi-directional transfers */
  43. STATUS_TX_PORT,
  44. /* track AFE Rx port status for bi-directional transfers */
  45. STATUS_RX_PORT,
  46. STATUS_MAX
  47. };
  48. enum {
  49. RATE_8KHZ,
  50. RATE_16KHZ,
  51. RATE_MAX_NUM_OF_AUX_PCM_RATES,
  52. };
  53. struct msm_dai_q6_dai_data {
  54. DECLARE_BITMAP(status_mask, STATUS_MAX);
  55. DECLARE_BITMAP(hwfree_status, STATUS_MAX);
  56. u32 rate;
  57. u32 channels;
  58. u32 bitwidth;
  59. union afe_port_config port_config;
  60. };
  61. struct msm_dai_q6_mi2s_dai_config {
  62. u16 pdata_mi2s_lines;
  63. struct msm_dai_q6_dai_data mi2s_dai_data;
  64. };
  65. struct msm_dai_q6_mi2s_dai_data {
  66. struct msm_dai_q6_mi2s_dai_config tx_dai;
  67. struct msm_dai_q6_mi2s_dai_config rx_dai;
  68. };
  69. struct msm_dai_q6_auxpcm_dai_data {
  70. /* BITMAP to track Rx and Tx port usage count */
  71. DECLARE_BITMAP(auxpcm_port_status, STATUS_MAX);
  72. struct mutex rlock; /* auxpcm dev resource lock */
  73. u16 rx_pid; /* AUXPCM RX AFE port ID */
  74. u16 tx_pid; /* AUXPCM TX AFE port ID */
  75. struct afe_clk_cfg clk_cfg; /* hold LPASS clock configuration */
  76. struct msm_dai_q6_dai_data bdai_data; /* incoporate base DAI data */
  77. };
  78. /* MI2S format field for AFE_PORT_CMD_I2S_CONFIG command
  79. * 0: linear PCM
  80. * 1: non-linear PCM
  81. * 2: PCM data in IEC 60968 container
  82. * 3: compressed data in IEC 60958 container
  83. */
  84. static const char *const mi2s_format[] = {
  85. "LPCM",
  86. "Compr",
  87. "LPCM-60958",
  88. "Compr-60958"
  89. };
  90. static const struct soc_enum mi2s_config_enum[] = {
  91. SOC_ENUM_SINGLE_EXT(4, mi2s_format),
  92. };
  93. static int msm_dai_q6_auxpcm_hw_params(
  94. struct snd_pcm_substream *substream,
  95. struct snd_pcm_hw_params *params,
  96. struct snd_soc_dai *dai)
  97. {
  98. struct msm_dai_q6_auxpcm_dai_data *aux_dai_data =
  99. dev_get_drvdata(dai->dev);
  100. struct msm_dai_q6_dai_data *dai_data = &aux_dai_data->bdai_data;
  101. struct msm_dai_auxpcm_pdata *auxpcm_pdata =
  102. (struct msm_dai_auxpcm_pdata *) dai->dev->platform_data;
  103. int rc = 0;
  104. if (params_channels(params) != 1 || (params_rate(params) != 8000 &&
  105. params_rate(params) != 16000)) {
  106. dev_err(dai->dev, "%s: invalid param chan %d rate %d\n",
  107. __func__, params_channels(params), params_rate(params));
  108. return -EINVAL;
  109. }
  110. mutex_lock(&aux_dai_data->rlock);
  111. if (test_bit(STATUS_TX_PORT, aux_dai_data->auxpcm_port_status) ||
  112. test_bit(STATUS_RX_PORT, aux_dai_data->auxpcm_port_status)) {
  113. /* AUXPCM DAI in use */
  114. if (dai_data->rate != params_rate(params)) {
  115. dev_err(dai->dev, "%s: rate mismatch of running DAI\n",
  116. __func__);
  117. rc = -EINVAL;
  118. }
  119. mutex_unlock(&aux_dai_data->rlock);
  120. return rc;
  121. }
  122. dai_data->channels = params_channels(params);
  123. dai_data->rate = params_rate(params);
  124. if (dai_data->rate == 8000) {
  125. dai_data->port_config.pcm.pcm_cfg_minor_version =
  126. AFE_API_VERSION_PCM_CONFIG;
  127. dai_data->port_config.pcm.aux_mode = auxpcm_pdata->mode_8k.mode;
  128. dai_data->port_config.pcm.sync_src = auxpcm_pdata->mode_8k.sync;
  129. dai_data->port_config.pcm.frame_setting =
  130. auxpcm_pdata->mode_8k.frame;
  131. dai_data->port_config.pcm.quantype =
  132. auxpcm_pdata->mode_8k.quant;
  133. dai_data->port_config.pcm.ctrl_data_out_enable =
  134. auxpcm_pdata->mode_8k.data;
  135. dai_data->port_config.pcm.sample_rate = dai_data->rate;
  136. dai_data->port_config.pcm.num_channels = dai_data->channels;
  137. dai_data->port_config.pcm.bit_width = 16;
  138. dai_data->port_config.pcm.slot_number_mapping[0] =
  139. auxpcm_pdata->mode_8k.slot;
  140. } else {
  141. dai_data->port_config.pcm.pcm_cfg_minor_version =
  142. AFE_API_VERSION_PCM_CONFIG;
  143. dai_data->port_config.pcm.aux_mode =
  144. auxpcm_pdata->mode_16k.mode;
  145. dai_data->port_config.pcm.sync_src =
  146. auxpcm_pdata->mode_16k.sync;
  147. dai_data->port_config.pcm.frame_setting =
  148. auxpcm_pdata->mode_16k.frame;
  149. dai_data->port_config.pcm.quantype =
  150. auxpcm_pdata->mode_16k.quant;
  151. dai_data->port_config.pcm.ctrl_data_out_enable =
  152. auxpcm_pdata->mode_16k.data;
  153. dai_data->port_config.pcm.sample_rate = dai_data->rate;
  154. dai_data->port_config.pcm.num_channels = dai_data->channels;
  155. dai_data->port_config.pcm.bit_width = 16;
  156. dai_data->port_config.pcm.slot_number_mapping[0] =
  157. auxpcm_pdata->mode_16k.slot;
  158. }
  159. dev_dbg(dai->dev, "%s: aux_mode %x sync_src %x frame_setting %x\n",
  160. __func__, dai_data->port_config.pcm.aux_mode,
  161. dai_data->port_config.pcm.sync_src,
  162. dai_data->port_config.pcm.frame_setting);
  163. dev_dbg(dai->dev, "%s: qtype %x dout %x num_map %x\n",
  164. __func__, dai_data->port_config.pcm.quantype,
  165. dai_data->port_config.pcm.ctrl_data_out_enable,
  166. dai_data->port_config.pcm.slot_number_mapping[0]);
  167. mutex_unlock(&aux_dai_data->rlock);
  168. return rc;
  169. }
  170. static void msm_dai_q6_auxpcm_shutdown(struct snd_pcm_substream *substream,
  171. struct snd_soc_dai *dai)
  172. {
  173. int rc = 0;
  174. struct afe_clk_cfg *lpass_pcm_src_clk = NULL;
  175. struct msm_dai_q6_auxpcm_dai_data *aux_dai_data =
  176. dev_get_drvdata(dai->dev);
  177. mutex_lock(&aux_dai_data->rlock);
  178. if (!(test_bit(STATUS_TX_PORT, aux_dai_data->auxpcm_port_status) ||
  179. test_bit(STATUS_RX_PORT, aux_dai_data->auxpcm_port_status))) {
  180. dev_dbg(dai->dev, "%s(): dai->id %d PCM ports already closed\n",
  181. __func__, dai->id);
  182. goto exit;
  183. }
  184. if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
  185. if (test_bit(STATUS_TX_PORT, aux_dai_data->auxpcm_port_status))
  186. clear_bit(STATUS_TX_PORT,
  187. aux_dai_data->auxpcm_port_status);
  188. else {
  189. dev_dbg(dai->dev, "%s(): PCM_TX port already closed\n",
  190. __func__);
  191. goto exit;
  192. }
  193. } else if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  194. if (test_bit(STATUS_RX_PORT, aux_dai_data->auxpcm_port_status))
  195. clear_bit(STATUS_RX_PORT,
  196. aux_dai_data->auxpcm_port_status);
  197. else {
  198. dev_dbg(dai->dev, "%s(): PCM_RX port already closed\n",
  199. __func__);
  200. goto exit;
  201. }
  202. }
  203. if (test_bit(STATUS_TX_PORT, aux_dai_data->auxpcm_port_status) ||
  204. test_bit(STATUS_RX_PORT, aux_dai_data->auxpcm_port_status)) {
  205. dev_dbg(dai->dev, "%s(): cannot shutdown PCM ports\n",
  206. __func__);
  207. goto exit;
  208. }
  209. dev_dbg(dai->dev, "%s: dai->id = %d closing PCM AFE ports\n",
  210. __func__, dai->id);
  211. lpass_pcm_src_clk = (struct afe_clk_cfg *) &aux_dai_data->clk_cfg;
  212. rc = afe_close(aux_dai_data->rx_pid); /* can block */
  213. if (IS_ERR_VALUE(rc))
  214. dev_err(dai->dev, "fail to close PCM_RX AFE port\n");
  215. rc = afe_close(aux_dai_data->tx_pid);
  216. if (IS_ERR_VALUE(rc))
  217. dev_err(dai->dev, "fail to close AUX PCM TX port\n");
  218. lpass_pcm_src_clk->clk_val1 = 0;
  219. afe_set_lpass_clock(aux_dai_data->rx_pid, lpass_pcm_src_clk);
  220. afe_set_lpass_clock(aux_dai_data->tx_pid, lpass_pcm_src_clk);
  221. exit:
  222. mutex_unlock(&aux_dai_data->rlock);
  223. return;
  224. }
  225. static int msm_dai_q6_auxpcm_prepare(struct snd_pcm_substream *substream,
  226. struct snd_soc_dai *dai)
  227. {
  228. struct msm_dai_q6_auxpcm_dai_data *aux_dai_data =
  229. dev_get_drvdata(dai->dev);
  230. struct msm_dai_q6_dai_data *dai_data = &aux_dai_data->bdai_data;
  231. struct msm_dai_auxpcm_pdata *auxpcm_pdata = NULL;
  232. int rc = 0;
  233. unsigned long pcm_clk_rate;
  234. struct afe_clk_cfg *lpass_pcm_src_clk = NULL;
  235. auxpcm_pdata = dai->dev->platform_data;
  236. lpass_pcm_src_clk = (struct afe_clk_cfg *) &aux_dai_data->clk_cfg;
  237. mutex_lock(&aux_dai_data->rlock);
  238. if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
  239. if (test_bit(STATUS_TX_PORT,
  240. aux_dai_data->auxpcm_port_status)) {
  241. dev_dbg(dai->dev, "%s(): PCM_TX port already ON\n",
  242. __func__);
  243. goto exit;
  244. } else
  245. set_bit(STATUS_TX_PORT,
  246. aux_dai_data->auxpcm_port_status);
  247. } else if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  248. if (test_bit(STATUS_RX_PORT,
  249. aux_dai_data->auxpcm_port_status)) {
  250. dev_dbg(dai->dev, "%s(): PCM_RX port already ON\n",
  251. __func__);
  252. goto exit;
  253. } else
  254. set_bit(STATUS_RX_PORT,
  255. aux_dai_data->auxpcm_port_status);
  256. }
  257. if (test_bit(STATUS_TX_PORT, aux_dai_data->auxpcm_port_status) &&
  258. test_bit(STATUS_RX_PORT, aux_dai_data->auxpcm_port_status)) {
  259. dev_dbg(dai->dev, "%s(): PCM ports already set\n", __func__);
  260. goto exit;
  261. }
  262. dev_dbg(dai->dev, "%s: dai->id:%d opening afe ports\n",
  263. __func__, dai->id);
  264. rc = afe_q6_interface_prepare();
  265. if (IS_ERR_VALUE(rc)) {
  266. dev_err(dai->dev, "fail to open AFE APR\n");
  267. goto fail;
  268. }
  269. /*
  270. * For AUX PCM Interface the below sequence of clk
  271. * settings and afe_open is a strict requirement.
  272. *
  273. * Also using afe_open instead of afe_port_start_nowait
  274. * to make sure the port is open before deasserting the
  275. * clock line. This is required because pcm register is
  276. * not written before clock deassert. Hence the hw does
  277. * not get updated with new setting if the below clock
  278. * assert/deasset and afe_open sequence is not followed.
  279. */
  280. if (dai_data->rate == 8000) {
  281. pcm_clk_rate = auxpcm_pdata->mode_8k.pcm_clk_rate;
  282. } else if (dai_data->rate == 16000) {
  283. pcm_clk_rate = (auxpcm_pdata->mode_16k.pcm_clk_rate);
  284. } else {
  285. dev_err(dai->dev, "%s: Invalid AUX PCM rate %d\n", __func__,
  286. dai_data->rate);
  287. rc = -EINVAL;
  288. goto fail;
  289. }
  290. memcpy(lpass_pcm_src_clk, &lpass_clk_cfg_default,
  291. sizeof(struct afe_clk_cfg));
  292. lpass_pcm_src_clk->clk_val1 = pcm_clk_rate;
  293. rc = afe_set_lpass_clock(aux_dai_data->rx_pid, lpass_pcm_src_clk);
  294. if (rc < 0) {
  295. dev_err(dai->dev,
  296. "%s:afe_set_lpass_clock on RX pcm_src_clk failed\n",
  297. __func__);
  298. goto fail;
  299. }
  300. rc = afe_set_lpass_clock(aux_dai_data->tx_pid, lpass_pcm_src_clk);
  301. if (rc < 0) {
  302. dev_err(dai->dev,
  303. "%s:afe_set_lpass_clock on TX pcm_src_clk failed\n",
  304. __func__);
  305. goto fail;
  306. }
  307. afe_open(aux_dai_data->rx_pid, &dai_data->port_config, dai_data->rate);
  308. afe_open(aux_dai_data->tx_pid, &dai_data->port_config, dai_data->rate);
  309. goto exit;
  310. fail:
  311. if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
  312. clear_bit(STATUS_TX_PORT, aux_dai_data->auxpcm_port_status);
  313. else if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  314. clear_bit(STATUS_RX_PORT, aux_dai_data->auxpcm_port_status);
  315. exit:
  316. mutex_unlock(&aux_dai_data->rlock);
  317. return rc;
  318. }
  319. static int msm_dai_q6_auxpcm_trigger(struct snd_pcm_substream *substream,
  320. int cmd, struct snd_soc_dai *dai)
  321. {
  322. int rc = 0;
  323. pr_debug("%s:port:%d cmd:%d\n",
  324. __func__, dai->id, cmd);
  325. switch (cmd) {
  326. case SNDRV_PCM_TRIGGER_START:
  327. case SNDRV_PCM_TRIGGER_RESUME:
  328. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  329. /* afe_open will be called from prepare */
  330. return 0;
  331. case SNDRV_PCM_TRIGGER_STOP:
  332. case SNDRV_PCM_TRIGGER_SUSPEND:
  333. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  334. return 0;
  335. default:
  336. rc = -EINVAL;
  337. }
  338. return rc;
  339. }
  340. static int msm_dai_q6_dai_auxpcm_remove(struct snd_soc_dai *dai)
  341. {
  342. struct msm_dai_q6_auxpcm_dai_data *aux_dai_data;
  343. struct afe_clk_cfg *lpass_pcm_src_clk = NULL;
  344. int rc;
  345. aux_dai_data = dev_get_drvdata(dai->dev);
  346. dev_dbg(dai->dev, "%s(): dai->id %d closing afe\n",
  347. __func__, dai->id);
  348. if (test_bit(STATUS_TX_PORT, aux_dai_data->auxpcm_port_status) ||
  349. test_bit(STATUS_RX_PORT, aux_dai_data->auxpcm_port_status)) {
  350. rc = afe_close(aux_dai_data->rx_pid); /* can block */
  351. if (IS_ERR_VALUE(rc))
  352. dev_err(dai->dev, "fail to close AUXPCM RX AFE port\n");
  353. rc = afe_close(aux_dai_data->tx_pid);
  354. if (IS_ERR_VALUE(rc))
  355. dev_err(dai->dev, "fail to close AUXPCM TX AFE port\n");
  356. clear_bit(STATUS_TX_PORT, aux_dai_data->auxpcm_port_status);
  357. clear_bit(STATUS_RX_PORT, aux_dai_data->auxpcm_port_status);
  358. }
  359. lpass_pcm_src_clk = (struct afe_clk_cfg *) &aux_dai_data->clk_cfg;
  360. lpass_pcm_src_clk->clk_val1 = 0;
  361. afe_set_lpass_clock(aux_dai_data->rx_pid, lpass_pcm_src_clk);
  362. afe_set_lpass_clock(aux_dai_data->tx_pid, lpass_pcm_src_clk);
  363. return 0;
  364. }
  365. static struct snd_soc_dai_ops msm_dai_q6_auxpcm_ops = {
  366. .prepare = msm_dai_q6_auxpcm_prepare,
  367. .trigger = msm_dai_q6_auxpcm_trigger,
  368. .hw_params = msm_dai_q6_auxpcm_hw_params,
  369. .shutdown = msm_dai_q6_auxpcm_shutdown,
  370. };
  371. static struct snd_soc_dai_driver msm_dai_q6_aux_pcm_dai = {
  372. .playback = {
  373. .rates = (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000),
  374. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  375. .channels_min = 1,
  376. .channels_max = 1,
  377. .rate_max = 16000,
  378. .rate_min = 8000,
  379. },
  380. .capture = {
  381. .rates = (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000),
  382. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  383. .channels_min = 1,
  384. .channels_max = 1,
  385. .rate_max = 16000,
  386. .rate_min = 8000,
  387. },
  388. .ops = &msm_dai_q6_auxpcm_ops,
  389. .remove = msm_dai_q6_dai_auxpcm_remove,
  390. };
  391. static int msm_dai_q6_prepare(struct snd_pcm_substream *substream,
  392. struct snd_soc_dai *dai)
  393. {
  394. struct msm_dai_q6_dai_data *dai_data = dev_get_drvdata(dai->dev);
  395. int rc = 0;
  396. if (!test_bit(STATUS_PORT_STARTED, dai_data->status_mask)) {
  397. rc = afe_port_start(dai->id, &dai_data->port_config,
  398. dai_data->rate);
  399. if (IS_ERR_VALUE(rc))
  400. dev_err(dai->dev, "fail to open AFE port %x\n",
  401. dai->id);
  402. else
  403. set_bit(STATUS_PORT_STARTED,
  404. dai_data->status_mask);
  405. }
  406. return rc;
  407. }
  408. static int msm_dai_q6_cdc_hw_params(struct snd_pcm_hw_params *params,
  409. struct snd_soc_dai *dai, int stream)
  410. {
  411. struct msm_dai_q6_dai_data *dai_data = dev_get_drvdata(dai->dev);
  412. dai_data->channels = params_channels(params);
  413. switch (dai_data->channels) {
  414. case 2:
  415. dai_data->port_config.i2s.mono_stereo = MSM_AFE_STEREO;
  416. break;
  417. case 1:
  418. dai_data->port_config.i2s.mono_stereo = MSM_AFE_MONO;
  419. break;
  420. default:
  421. return -EINVAL;
  422. break;
  423. }
  424. switch (params_format(params)) {
  425. case SNDRV_PCM_FORMAT_S16_LE:
  426. case SNDRV_PCM_FORMAT_SPECIAL:
  427. dai_data->port_config.i2s.bit_width = 16;
  428. break;
  429. case SNDRV_PCM_FORMAT_S24_LE:
  430. dai_data->port_config.i2s.bit_width = 24;
  431. break;
  432. default:
  433. return -EINVAL;
  434. }
  435. dai_data->rate = params_rate(params);
  436. dai_data->port_config.i2s.sample_rate = dai_data->rate;
  437. dai_data->port_config.i2s.i2s_cfg_minor_version =
  438. AFE_API_VERSION_I2S_CONFIG;
  439. dai_data->port_config.i2s.data_format = AFE_LINEAR_PCM_DATA;
  440. dev_dbg(dai->dev, " channel %d sample rate %d entered\n",
  441. dai_data->channels, dai_data->rate);
  442. dai_data->port_config.i2s.channel_mode = 1;
  443. return 0;
  444. }
  445. static u8 num_of_bits_set(u8 sd_line_mask)
  446. {
  447. u8 num_bits_set = 0;
  448. while (sd_line_mask) {
  449. num_bits_set++;
  450. sd_line_mask = sd_line_mask & (sd_line_mask - 1);
  451. }
  452. return num_bits_set;
  453. }
  454. static int msm_dai_q6_i2s_hw_params(struct snd_pcm_hw_params *params,
  455. struct snd_soc_dai *dai, int stream)
  456. {
  457. struct msm_dai_q6_dai_data *dai_data = dev_get_drvdata(dai->dev);
  458. struct msm_i2s_data *i2s_pdata =
  459. (struct msm_i2s_data *) dai->dev->platform_data;
  460. dai_data->channels = params_channels(params);
  461. if (num_of_bits_set(i2s_pdata->sd_lines) == 1) {
  462. switch (dai_data->channels) {
  463. case 2:
  464. dai_data->port_config.i2s.mono_stereo = MSM_AFE_STEREO;
  465. break;
  466. case 1:
  467. dai_data->port_config.i2s.mono_stereo = MSM_AFE_MONO;
  468. break;
  469. default:
  470. pr_warn("greater than stereo has not been validated");
  471. break;
  472. }
  473. }
  474. dai_data->rate = params_rate(params);
  475. dai_data->port_config.i2s.sample_rate = dai_data->rate;
  476. dai_data->port_config.i2s.i2s_cfg_minor_version =
  477. AFE_API_VERSION_I2S_CONFIG;
  478. dai_data->port_config.i2s.data_format = AFE_LINEAR_PCM_DATA;
  479. /* Q6 only supports 16 as now */
  480. dai_data->port_config.i2s.bit_width = 16;
  481. dai_data->port_config.i2s.channel_mode = 1;
  482. return 0;
  483. }
  484. static int msm_dai_q6_slim_bus_hw_params(struct snd_pcm_hw_params *params,
  485. struct snd_soc_dai *dai, int stream)
  486. {
  487. struct msm_dai_q6_dai_data *dai_data = dev_get_drvdata(dai->dev);
  488. dai_data->channels = params_channels(params);
  489. dai_data->rate = params_rate(params);
  490. switch (params_format(params)) {
  491. case SNDRV_PCM_FORMAT_S16_LE:
  492. case SNDRV_PCM_FORMAT_SPECIAL:
  493. dai_data->port_config.slim_sch.bit_width = 16;
  494. break;
  495. case SNDRV_PCM_FORMAT_S24_LE:
  496. dai_data->port_config.slim_sch.bit_width = 24;
  497. break;
  498. default:
  499. return -EINVAL;
  500. }
  501. dai_data->port_config.slim_sch.sb_cfg_minor_version =
  502. AFE_API_VERSION_SLIMBUS_CONFIG;
  503. dai_data->port_config.slim_sch.data_format = 0;
  504. dai_data->port_config.slim_sch.num_channels = dai_data->channels;
  505. dai_data->port_config.slim_sch.sample_rate = dai_data->rate;
  506. dev_dbg(dai->dev, "%s:slimbus_dev_id[%hu] bit_wd[%hu] format[%hu]\n"
  507. "num_channel %hu shared_ch_mapping[0] %hu\n"
  508. "slave_port_mapping[1] %hu slave_port_mapping[2] %hu\n"
  509. "sample_rate %d\n", __func__,
  510. dai_data->port_config.slim_sch.slimbus_dev_id,
  511. dai_data->port_config.slim_sch.bit_width,
  512. dai_data->port_config.slim_sch.data_format,
  513. dai_data->port_config.slim_sch.num_channels,
  514. dai_data->port_config.slim_sch.shared_ch_mapping[0],
  515. dai_data->port_config.slim_sch.shared_ch_mapping[1],
  516. dai_data->port_config.slim_sch.shared_ch_mapping[2],
  517. dai_data->rate);
  518. return 0;
  519. }
  520. static int msm_dai_q6_bt_fm_hw_params(struct snd_pcm_hw_params *params,
  521. struct snd_soc_dai *dai, int stream)
  522. {
  523. struct msm_dai_q6_dai_data *dai_data = dev_get_drvdata(dai->dev);
  524. dai_data->channels = params_channels(params);
  525. dai_data->rate = params_rate(params);
  526. dev_dbg(dai->dev, "channels %d sample rate %d entered\n",
  527. dai_data->channels, dai_data->rate);
  528. memset(&dai_data->port_config, 0, sizeof(dai_data->port_config));
  529. pr_debug("%s: setting bt_fm parameters\n", __func__);
  530. dai_data->port_config.int_bt_fm.bt_fm_cfg_minor_version =
  531. AFE_API_VERSION_INTERNAL_BT_FM_CONFIG;
  532. dai_data->port_config.int_bt_fm.num_channels = dai_data->channels;
  533. dai_data->port_config.int_bt_fm.sample_rate = dai_data->rate;
  534. dai_data->port_config.int_bt_fm.bit_width = 16;
  535. return 0;
  536. }
  537. static int msm_dai_q6_afe_rtproxy_hw_params(struct snd_pcm_hw_params *params,
  538. struct snd_soc_dai *dai)
  539. {
  540. struct msm_dai_q6_dai_data *dai_data = dev_get_drvdata(dai->dev);
  541. dai_data->rate = params_rate(params);
  542. dai_data->port_config.rtproxy.num_channels = params_channels(params);
  543. dai_data->port_config.rtproxy.sample_rate = params_rate(params);
  544. pr_debug("channel %d entered,dai_id: %d,rate: %d\n",
  545. dai_data->port_config.rtproxy.num_channels, dai->id, dai_data->rate);
  546. dai_data->port_config.rtproxy.rt_proxy_cfg_minor_version =
  547. AFE_API_VERSION_RT_PROXY_CONFIG;
  548. dai_data->port_config.rtproxy.bit_width = 16; /* Q6 only supports 16 */
  549. dai_data->port_config.rtproxy.interleaved = 1;
  550. dai_data->port_config.rtproxy.frame_size = params_period_bytes(params);
  551. dai_data->port_config.rtproxy.jitter_allowance =
  552. dai_data->port_config.rtproxy.frame_size/2;
  553. dai_data->port_config.rtproxy.low_water_mark = 0;
  554. dai_data->port_config.rtproxy.high_water_mark = 0;
  555. return 0;
  556. }
  557. static int msm_dai_q6_psuedo_port_hw_params(struct snd_pcm_hw_params *params,
  558. struct snd_soc_dai *dai, int stream)
  559. {
  560. struct msm_dai_q6_dai_data *dai_data = dev_get_drvdata(dai->dev);
  561. dai_data->channels = params_channels(params);
  562. dai_data->rate = params_rate(params);
  563. /* Q6 only supports 16 as now */
  564. dai_data->port_config.pseudo_port.pseud_port_cfg_minor_version =
  565. AFE_API_VERSION_PSEUDO_PORT_CONFIG;
  566. dai_data->port_config.pseudo_port.num_channels =
  567. params_channels(params);
  568. dai_data->port_config.pseudo_port.bit_width = 16;
  569. dai_data->port_config.pseudo_port.data_format = 0;
  570. dai_data->port_config.pseudo_port.timing_mode =
  571. AFE_PSEUDOPORT_TIMING_MODE_TIMER;
  572. dai_data->port_config.pseudo_port.sample_rate = params_rate(params);
  573. dev_dbg(dai->dev, "%s: bit_wd[%hu] num_channels [%hu] format[%hu]\n"
  574. "timing Mode %hu sample_rate %d\n", __func__,
  575. dai_data->port_config.pseudo_port.bit_width,
  576. dai_data->port_config.pseudo_port.num_channels,
  577. dai_data->port_config.pseudo_port.data_format,
  578. dai_data->port_config.pseudo_port.timing_mode,
  579. dai_data->port_config.pseudo_port.sample_rate);
  580. return 0;
  581. }
  582. /* Current implementation assumes hw_param is called once
  583. * This may not be the case but what to do when ADM and AFE
  584. * port are already opened and parameter changes
  585. */
  586. static int msm_dai_q6_hw_params(struct snd_pcm_substream *substream,
  587. struct snd_pcm_hw_params *params,
  588. struct snd_soc_dai *dai)
  589. {
  590. int rc = 0;
  591. switch (dai->id) {
  592. case PRIMARY_I2S_TX:
  593. case PRIMARY_I2S_RX:
  594. case SECONDARY_I2S_RX:
  595. rc = msm_dai_q6_cdc_hw_params(params, dai, substream->stream);
  596. break;
  597. case MI2S_RX:
  598. rc = msm_dai_q6_i2s_hw_params(params, dai, substream->stream);
  599. break;
  600. case SLIMBUS_0_RX:
  601. case SLIMBUS_1_RX:
  602. case SLIMBUS_2_RX:
  603. case SLIMBUS_3_RX:
  604. case SLIMBUS_4_RX:
  605. case SLIMBUS_0_TX:
  606. case SLIMBUS_1_TX:
  607. case SLIMBUS_2_TX:
  608. case SLIMBUS_3_TX:
  609. case SLIMBUS_4_TX:
  610. case SLIMBUS_5_TX:
  611. rc = msm_dai_q6_slim_bus_hw_params(params, dai,
  612. substream->stream);
  613. break;
  614. case INT_BT_SCO_RX:
  615. case INT_BT_SCO_TX:
  616. case INT_FM_RX:
  617. case INT_FM_TX:
  618. rc = msm_dai_q6_bt_fm_hw_params(params, dai, substream->stream);
  619. break;
  620. case RT_PROXY_DAI_001_TX:
  621. case RT_PROXY_DAI_001_RX:
  622. case RT_PROXY_DAI_002_TX:
  623. case RT_PROXY_DAI_002_RX:
  624. rc = msm_dai_q6_afe_rtproxy_hw_params(params, dai);
  625. break;
  626. case VOICE_PLAYBACK_TX:
  627. case VOICE2_PLAYBACK_TX:
  628. case VOICE_RECORD_RX:
  629. case VOICE_RECORD_TX:
  630. rc = msm_dai_q6_psuedo_port_hw_params(params,
  631. dai, substream->stream);
  632. break;
  633. default:
  634. dev_err(dai->dev, "invalid AFE port ID\n");
  635. rc = -EINVAL;
  636. break;
  637. }
  638. return rc;
  639. }
  640. static void msm_dai_q6_shutdown(struct snd_pcm_substream *substream,
  641. struct snd_soc_dai *dai)
  642. {
  643. struct msm_dai_q6_dai_data *dai_data = dev_get_drvdata(dai->dev);
  644. int rc = 0;
  645. if (test_bit(STATUS_PORT_STARTED, dai_data->status_mask)) {
  646. pr_debug("%s, stop pseudo port:%d\n", __func__, dai->id);
  647. rc = afe_close(dai->id); /* can block */
  648. if (IS_ERR_VALUE(rc))
  649. dev_err(dai->dev, "fail to close AFE port\n");
  650. pr_debug("%s: dai_data->status_mask = %ld\n", __func__,
  651. *dai_data->status_mask);
  652. clear_bit(STATUS_PORT_STARTED, dai_data->status_mask);
  653. }
  654. }
  655. static int msm_dai_q6_cdc_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
  656. {
  657. struct msm_dai_q6_dai_data *dai_data = dev_get_drvdata(dai->dev);
  658. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  659. case SND_SOC_DAIFMT_CBS_CFS:
  660. dai_data->port_config.i2s.ws_src = 1; /* CPU is master */
  661. break;
  662. case SND_SOC_DAIFMT_CBM_CFM:
  663. dai_data->port_config.i2s.ws_src = 0; /* CPU is slave */
  664. break;
  665. default:
  666. return -EINVAL;
  667. }
  668. return 0;
  669. }
  670. static int msm_dai_q6_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
  671. {
  672. int rc = 0;
  673. dev_dbg(dai->dev, "enter %s, id = %d fmt[%d]\n", __func__,
  674. dai->id, fmt);
  675. switch (dai->id) {
  676. case PRIMARY_I2S_TX:
  677. case PRIMARY_I2S_RX:
  678. case MI2S_RX:
  679. case SECONDARY_I2S_RX:
  680. rc = msm_dai_q6_cdc_set_fmt(dai, fmt);
  681. break;
  682. default:
  683. dev_err(dai->dev, "invalid cpu_dai set_fmt\n");
  684. rc = -EINVAL;
  685. break;
  686. }
  687. return rc;
  688. }
  689. static int msm_dai_q6_set_channel_map(struct snd_soc_dai *dai,
  690. unsigned int tx_num, unsigned int *tx_slot,
  691. unsigned int rx_num, unsigned int *rx_slot)
  692. {
  693. int rc = 0;
  694. struct msm_dai_q6_dai_data *dai_data = dev_get_drvdata(dai->dev);
  695. unsigned int i = 0;
  696. dev_dbg(dai->dev, "enter %s, id = %d\n", __func__, dai->id);
  697. switch (dai->id) {
  698. case SLIMBUS_0_RX:
  699. case SLIMBUS_1_RX:
  700. case SLIMBUS_2_RX:
  701. case SLIMBUS_3_RX:
  702. case SLIMBUS_4_RX:
  703. /*
  704. * channel number to be between 128 and 255.
  705. * For RX port use channel numbers
  706. * from 138 to 144 for pre-Taiko
  707. * from 144 to 159 for Taiko
  708. */
  709. if (!rx_slot)
  710. return -EINVAL;
  711. if (rx_num > AFE_PORT_MAX_AUDIO_CHAN_CNT) {
  712. pr_err("%s: invalid rx num %d\n", __func__, rx_num);
  713. return -EINVAL;
  714. }
  715. for (i = 0; i < rx_num; i++) {
  716. dai_data->port_config.slim_sch.shared_ch_mapping[i] =
  717. rx_slot[i];
  718. pr_debug("%s: find number of channels[%d] ch[%d]\n",
  719. __func__, i, rx_slot[i]);
  720. }
  721. dai_data->port_config.slim_sch.num_channels = rx_num;
  722. pr_debug("%s:SLIMBUS_%d_RX cnt[%d] ch[%d %d]\n", __func__,
  723. (dai->id - SLIMBUS_0_RX) / 2, rx_num,
  724. dai_data->port_config.slim_sch.shared_ch_mapping[0],
  725. dai_data->port_config.slim_sch.shared_ch_mapping[1]);
  726. break;
  727. case SLIMBUS_0_TX:
  728. case SLIMBUS_1_TX:
  729. case SLIMBUS_2_TX:
  730. case SLIMBUS_3_TX:
  731. case SLIMBUS_4_TX:
  732. case SLIMBUS_5_TX:
  733. /*
  734. * channel number to be between 128 and 255.
  735. * For TX port use channel numbers
  736. * from 128 to 137 for pre-Taiko
  737. * from 128 to 143 for Taiko
  738. */
  739. if (!tx_slot)
  740. return -EINVAL;
  741. if (tx_num > AFE_PORT_MAX_AUDIO_CHAN_CNT) {
  742. pr_err("%s: invalid tx num %d\n", __func__, tx_num);
  743. return -EINVAL;
  744. }
  745. for (i = 0; i < tx_num; i++) {
  746. dai_data->port_config.slim_sch.shared_ch_mapping[i] =
  747. tx_slot[i];
  748. pr_debug("%s: find number of channels[%d] ch[%d]\n",
  749. __func__, i, tx_slot[i]);
  750. }
  751. dai_data->port_config.slim_sch.num_channels = tx_num;
  752. pr_debug("%s:SLIMBUS_%d_TX cnt[%d] ch[%d %d]\n", __func__,
  753. (dai->id - SLIMBUS_0_TX) / 2, tx_num,
  754. dai_data->port_config.slim_sch.shared_ch_mapping[0],
  755. dai_data->port_config.slim_sch.shared_ch_mapping[1]);
  756. break;
  757. default:
  758. dev_err(dai->dev, "invalid cpu_dai id %d\n", dai->id);
  759. rc = -EINVAL;
  760. break;
  761. }
  762. return rc;
  763. }
  764. static struct snd_soc_dai_ops msm_dai_q6_ops = {
  765. .prepare = msm_dai_q6_prepare,
  766. .hw_params = msm_dai_q6_hw_params,
  767. .shutdown = msm_dai_q6_shutdown,
  768. .set_fmt = msm_dai_q6_set_fmt,
  769. .set_channel_map = msm_dai_q6_set_channel_map,
  770. };
  771. static int msm_dai_q6_dai_probe(struct snd_soc_dai *dai)
  772. {
  773. struct msm_dai_q6_dai_data *dai_data;
  774. int rc = 0;
  775. dai_data = kzalloc(sizeof(struct msm_dai_q6_dai_data), GFP_KERNEL);
  776. if (!dai_data) {
  777. dev_err(dai->dev, "DAI-%d: fail to allocate dai data\n",
  778. dai->id);
  779. rc = -ENOMEM;
  780. } else
  781. dev_set_drvdata(dai->dev, dai_data);
  782. return rc;
  783. }
  784. static int msm_dai_q6_dai_remove(struct snd_soc_dai *dai)
  785. {
  786. struct msm_dai_q6_dai_data *dai_data;
  787. int rc;
  788. dai_data = dev_get_drvdata(dai->dev);
  789. /* If AFE port is still up, close it */
  790. if (test_bit(STATUS_PORT_STARTED, dai_data->status_mask)) {
  791. pr_debug("%s, stop pseudo port:%d\n", __func__, dai->id);
  792. rc = afe_close(dai->id); /* can block */
  793. if (IS_ERR_VALUE(rc))
  794. dev_err(dai->dev, "fail to close AFE port\n");
  795. clear_bit(STATUS_PORT_STARTED, dai_data->status_mask);
  796. }
  797. kfree(dai_data);
  798. snd_soc_unregister_dai(dai->dev);
  799. return 0;
  800. }
  801. static struct snd_soc_dai_driver msm_dai_q6_afe_rx_dai = {
  802. .playback = {
  803. .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
  804. SNDRV_PCM_RATE_16000,
  805. .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
  806. .channels_min = 1,
  807. .channels_max = 2,
  808. .rate_min = 8000,
  809. .rate_max = 48000,
  810. },
  811. .ops = &msm_dai_q6_ops,
  812. .probe = msm_dai_q6_dai_probe,
  813. .remove = msm_dai_q6_dai_remove,
  814. };
  815. static struct snd_soc_dai_driver msm_dai_q6_afe_tx_dai = {
  816. .capture = {
  817. .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
  818. SNDRV_PCM_RATE_16000,
  819. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  820. .channels_min = 1,
  821. .channels_max = 8,
  822. .rate_min = 8000,
  823. .rate_max = 48000,
  824. },
  825. .ops = &msm_dai_q6_ops,
  826. .probe = msm_dai_q6_dai_probe,
  827. .remove = msm_dai_q6_dai_remove,
  828. };
  829. static struct snd_soc_dai_driver msm_dai_q6_slimbus_1_rx_dai = {
  830. .playback = {
  831. .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |
  832. SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 |
  833. SNDRV_PCM_RATE_192000,
  834. .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
  835. .channels_min = 1,
  836. .channels_max = 2,
  837. .rate_min = 8000,
  838. .rate_max = 192000,
  839. },
  840. .ops = &msm_dai_q6_ops,
  841. .probe = msm_dai_q6_dai_probe,
  842. .remove = msm_dai_q6_dai_remove,
  843. };
  844. static struct snd_soc_dai_driver msm_dai_q6_slimbus_1_tx_dai = {
  845. .capture = {
  846. .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |
  847. SNDRV_PCM_RATE_48000,
  848. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  849. .channels_min = 1,
  850. .channels_max = 2,
  851. .rate_min = 8000,
  852. .rate_max = 48000,
  853. },
  854. .ops = &msm_dai_q6_ops,
  855. .probe = msm_dai_q6_dai_probe,
  856. .remove = msm_dai_q6_dai_remove,
  857. };
  858. static struct snd_soc_dai_driver msm_dai_q6_bt_sco_rx_dai = {
  859. .playback = {
  860. .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
  861. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  862. .channels_min = 1,
  863. .channels_max = 1,
  864. .rate_max = 16000,
  865. .rate_min = 8000,
  866. },
  867. .ops = &msm_dai_q6_ops,
  868. .probe = msm_dai_q6_dai_probe,
  869. .remove = msm_dai_q6_dai_remove,
  870. };
  871. static struct snd_soc_dai_driver msm_dai_q6_bt_sco_tx_dai = {
  872. .capture = {
  873. .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
  874. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  875. .channels_min = 1,
  876. .channels_max = 1,
  877. .rate_max = 16000,
  878. .rate_min = 8000,
  879. },
  880. .ops = &msm_dai_q6_ops,
  881. .probe = msm_dai_q6_dai_probe,
  882. .remove = msm_dai_q6_dai_remove,
  883. };
  884. static struct snd_soc_dai_driver msm_dai_q6_fm_rx_dai = {
  885. .playback = {
  886. .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
  887. SNDRV_PCM_RATE_16000,
  888. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  889. .channels_min = 2,
  890. .channels_max = 2,
  891. .rate_max = 48000,
  892. .rate_min = 8000,
  893. },
  894. .ops = &msm_dai_q6_ops,
  895. .probe = msm_dai_q6_dai_probe,
  896. .remove = msm_dai_q6_dai_remove,
  897. };
  898. static struct snd_soc_dai_driver msm_dai_q6_fm_tx_dai = {
  899. .capture = {
  900. .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
  901. SNDRV_PCM_RATE_16000,
  902. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  903. .channels_min = 2,
  904. .channels_max = 2,
  905. .rate_max = 48000,
  906. .rate_min = 8000,
  907. },
  908. .ops = &msm_dai_q6_ops,
  909. .probe = msm_dai_q6_dai_probe,
  910. .remove = msm_dai_q6_dai_remove,
  911. };
  912. static struct snd_soc_dai_driver msm_dai_q6_voice_playback_tx_dai = {
  913. .playback = {
  914. .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
  915. SNDRV_PCM_RATE_16000,
  916. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  917. .channels_min = 1,
  918. .channels_max = 2,
  919. .rate_min = 8000,
  920. .rate_max = 48000,
  921. },
  922. .ops = &msm_dai_q6_ops,
  923. .probe = msm_dai_q6_dai_probe,
  924. .remove = msm_dai_q6_dai_remove,
  925. };
  926. static struct snd_soc_dai_driver msm_dai_q6_incall_record_dai = {
  927. .capture = {
  928. .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
  929. SNDRV_PCM_RATE_16000,
  930. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  931. .channels_min = 1,
  932. .channels_max = 2,
  933. .rate_min = 8000,
  934. .rate_max = 48000,
  935. },
  936. .ops = &msm_dai_q6_ops,
  937. .probe = msm_dai_q6_dai_probe,
  938. .remove = msm_dai_q6_dai_remove,
  939. };
  940. static int __devinit msm_auxpcm_dev_probe(struct platform_device *pdev)
  941. {
  942. struct msm_dai_q6_auxpcm_dai_data *dai_data;
  943. struct msm_dai_auxpcm_pdata *auxpcm_pdata;
  944. uint32_t val_array[RATE_MAX_NUM_OF_AUX_PCM_RATES];
  945. const char *intf_name;
  946. int rc = 0;
  947. dai_data = kzalloc(sizeof(struct msm_dai_q6_auxpcm_dai_data),
  948. GFP_KERNEL);
  949. if (!dai_data) {
  950. dev_err(&pdev->dev,
  951. "Failed to allocate memory for auxpcm DAI data\n");
  952. return -ENOMEM;
  953. }
  954. auxpcm_pdata = kzalloc(sizeof(struct msm_dai_auxpcm_pdata),
  955. GFP_KERNEL);
  956. if (!auxpcm_pdata) {
  957. dev_err(&pdev->dev, "Failed to allocate memory for platform data\n");
  958. goto fail_pdata_nomem;
  959. }
  960. dev_dbg(&pdev->dev, "%s: dev %p, dai_data %p, auxpcm_pdata %p\n",
  961. __func__, &pdev->dev, dai_data, auxpcm_pdata);
  962. rc = of_property_read_u32_array(pdev->dev.of_node,
  963. "qcom,msm-cpudai-auxpcm-mode",
  964. val_array, RATE_MAX_NUM_OF_AUX_PCM_RATES);
  965. if (rc) {
  966. dev_err(&pdev->dev, "%s: qcom,msm-cpudai-auxpcm-mode missing in DT node\n",
  967. __func__);
  968. goto fail_invalid_dt;
  969. }
  970. auxpcm_pdata->mode_8k.mode = (u16)val_array[RATE_8KHZ];
  971. auxpcm_pdata->mode_16k.mode = (u16)val_array[RATE_16KHZ];
  972. rc = of_property_read_u32_array(pdev->dev.of_node,
  973. "qcom,msm-cpudai-auxpcm-sync",
  974. val_array, RATE_MAX_NUM_OF_AUX_PCM_RATES);
  975. if (rc) {
  976. dev_err(&pdev->dev, "%s: qcom,msm-cpudai-auxpcm-sync missing in DT node\n",
  977. __func__);
  978. goto fail_invalid_dt;
  979. }
  980. auxpcm_pdata->mode_8k.sync = (u16)val_array[RATE_8KHZ];
  981. auxpcm_pdata->mode_16k.sync = (u16)val_array[RATE_16KHZ];
  982. rc = of_property_read_u32_array(pdev->dev.of_node,
  983. "qcom,msm-cpudai-auxpcm-frame",
  984. val_array, RATE_MAX_NUM_OF_AUX_PCM_RATES);
  985. if (rc) {
  986. dev_err(&pdev->dev, "%s: qcom,msm-cpudai-auxpcm-frame missing in DT node\n",
  987. __func__);
  988. goto fail_invalid_dt;
  989. }
  990. auxpcm_pdata->mode_8k.frame = (u16)val_array[RATE_8KHZ];
  991. auxpcm_pdata->mode_16k.frame = (u16)val_array[RATE_16KHZ];
  992. rc = of_property_read_u32_array(pdev->dev.of_node,
  993. "qcom,msm-cpudai-auxpcm-quant",
  994. val_array, RATE_MAX_NUM_OF_AUX_PCM_RATES);
  995. if (rc) {
  996. dev_err(&pdev->dev, "%s: qcom,msm-cpudai-auxpcm-quant missing in DT node\n",
  997. __func__);
  998. goto fail_invalid_dt;
  999. }
  1000. auxpcm_pdata->mode_8k.quant = (u16)val_array[RATE_8KHZ];
  1001. auxpcm_pdata->mode_16k.quant = (u16)val_array[RATE_16KHZ];
  1002. rc = of_property_read_u32_array(pdev->dev.of_node,
  1003. "qcom,msm-cpudai-auxpcm-slot",
  1004. val_array, RATE_MAX_NUM_OF_AUX_PCM_RATES);
  1005. if (rc) {
  1006. dev_err(&pdev->dev, "%s: qcom,msm-cpudai-auxpcm-slot missing in DT node\n",
  1007. __func__);
  1008. goto fail_invalid_dt;
  1009. }
  1010. auxpcm_pdata->mode_8k.slot = (u16)val_array[RATE_8KHZ];
  1011. auxpcm_pdata->mode_16k.slot = (u16)val_array[RATE_16KHZ];
  1012. rc = of_property_read_u32_array(pdev->dev.of_node,
  1013. "qcom,msm-cpudai-auxpcm-data",
  1014. val_array, RATE_MAX_NUM_OF_AUX_PCM_RATES);
  1015. if (rc) {
  1016. dev_err(&pdev->dev, "%s: qcom,msm-cpudai-auxpcm-data missing in DT node\n",
  1017. __func__);
  1018. goto fail_invalid_dt;
  1019. }
  1020. auxpcm_pdata->mode_8k.data = (u16)val_array[RATE_8KHZ];
  1021. auxpcm_pdata->mode_16k.data = (u16)val_array[RATE_16KHZ];
  1022. rc = of_property_read_u32_array(pdev->dev.of_node,
  1023. "qcom,msm-cpudai-auxpcm-pcm-clk-rate",
  1024. val_array, RATE_MAX_NUM_OF_AUX_PCM_RATES);
  1025. if (rc) {
  1026. dev_err(&pdev->dev,
  1027. "%s: qcom,msm-cpudai-auxpcm-pcm-clk-rate missing in DT\n",
  1028. __func__);
  1029. goto fail_invalid_dt;
  1030. }
  1031. auxpcm_pdata->mode_8k.pcm_clk_rate = (int)val_array[RATE_8KHZ];
  1032. auxpcm_pdata->mode_16k.pcm_clk_rate = (int)val_array[RATE_16KHZ];
  1033. rc = of_property_read_string(pdev->dev.of_node,
  1034. "qcom,msm-auxpcm-interface", &intf_name);
  1035. if (rc) {
  1036. dev_err(&pdev->dev,
  1037. "%s: qcom,msm-auxpcm-interface missing in DT node\n",
  1038. __func__);
  1039. goto fail_nodev_intf;
  1040. }
  1041. if (!strncmp(intf_name, "primary", sizeof("primary"))) {
  1042. dai_data->rx_pid = AFE_PORT_ID_PRIMARY_PCM_RX;
  1043. dai_data->tx_pid = AFE_PORT_ID_PRIMARY_PCM_TX;
  1044. pdev->id = MSM_DAI_PRI_AUXPCM_DT_DEV_ID;
  1045. } else if (!strncmp(intf_name, "secondary", sizeof("secondary"))) {
  1046. dai_data->rx_pid = AFE_PORT_ID_SECONDARY_PCM_RX;
  1047. dai_data->tx_pid = AFE_PORT_ID_SECONDARY_PCM_TX;
  1048. pdev->id = MSM_DAI_SEC_AUXPCM_DT_DEV_ID;
  1049. } else {
  1050. dev_err(&pdev->dev, "%s: invalid DT intf name %s\n",
  1051. __func__, intf_name);
  1052. goto fail_invalid_intf;
  1053. }
  1054. mutex_init(&dai_data->rlock);
  1055. dev_set_name(&pdev->dev, "%s.%d", "msm-dai-q6-auxpcm", pdev->id);
  1056. dev_dbg(&pdev->dev, "dev name %s\n", dev_name(&pdev->dev));
  1057. dev_set_drvdata(&pdev->dev, dai_data);
  1058. pdev->dev.platform_data = (void *) auxpcm_pdata;
  1059. rc = snd_soc_register_dai(&pdev->dev, &msm_dai_q6_aux_pcm_dai);
  1060. if (rc) {
  1061. dev_err(&pdev->dev, "%s: auxpcm dai reg failed, rc=%d\n",
  1062. __func__, rc);
  1063. goto fail_reg_dai;
  1064. }
  1065. return rc;
  1066. fail_reg_dai:
  1067. mutex_destroy(&dai_data->rlock);
  1068. fail_invalid_intf:
  1069. fail_nodev_intf:
  1070. fail_invalid_dt:
  1071. kfree(auxpcm_pdata);
  1072. fail_pdata_nomem:
  1073. kfree(dai_data);
  1074. return rc;
  1075. }
  1076. static int __devexit msm_auxpcm_dev_remove(struct platform_device *pdev)
  1077. {
  1078. struct msm_dai_q6_auxpcm_dai_data *dai_data;
  1079. dai_data = dev_get_drvdata(&pdev->dev);
  1080. snd_soc_unregister_dai(&pdev->dev);
  1081. mutex_destroy(&dai_data->rlock);
  1082. kfree(dai_data);
  1083. kfree(pdev->dev.platform_data);
  1084. return 0;
  1085. }
  1086. static struct of_device_id msm_auxpcm_dev_dt_match[] = {
  1087. { .compatible = "qcom,msm-auxpcm-dev", },
  1088. {}
  1089. };
  1090. static struct platform_driver msm_auxpcm_dev_driver = {
  1091. .probe = msm_auxpcm_dev_probe,
  1092. .remove = __devexit_p(msm_auxpcm_dev_remove),
  1093. .driver = {
  1094. .name = "msm-auxpcm-dev",
  1095. .owner = THIS_MODULE,
  1096. .of_match_table = msm_auxpcm_dev_dt_match,
  1097. },
  1098. };
  1099. static struct snd_soc_dai_driver msm_dai_q6_slimbus_rx_dai = {
  1100. .playback = {
  1101. .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
  1102. SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_96000 |
  1103. SNDRV_PCM_RATE_192000,
  1104. .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
  1105. .channels_min = 1,
  1106. .channels_max = 8,
  1107. .rate_min = 8000,
  1108. .rate_max = 192000,
  1109. },
  1110. .ops = &msm_dai_q6_ops,
  1111. .probe = msm_dai_q6_dai_probe,
  1112. .remove = msm_dai_q6_dai_remove,
  1113. };
  1114. static struct snd_soc_dai_driver msm_dai_q6_slimbus_tx_dai = {
  1115. .capture = {
  1116. .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
  1117. SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_96000 |
  1118. SNDRV_PCM_RATE_192000,
  1119. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  1120. .channels_min = 1,
  1121. .channels_max = 8,
  1122. .rate_min = 8000,
  1123. .rate_max = 192000,
  1124. },
  1125. .ops = &msm_dai_q6_ops,
  1126. .probe = msm_dai_q6_dai_probe,
  1127. .remove = msm_dai_q6_dai_remove,
  1128. };
  1129. static int msm_dai_q6_mi2s_format_put(struct snd_kcontrol *kcontrol,
  1130. struct snd_ctl_elem_value *ucontrol)
  1131. {
  1132. struct msm_dai_q6_dai_data *dai_data = kcontrol->private_data;
  1133. int value = ucontrol->value.integer.value[0];
  1134. dai_data->port_config.i2s.data_format = value;
  1135. pr_debug("%s: value = %d, channel = %d, line = %d\n",
  1136. __func__, value, dai_data->port_config.i2s.mono_stereo,
  1137. dai_data->port_config.i2s.channel_mode);
  1138. return 0;
  1139. }
  1140. static int msm_dai_q6_mi2s_format_get(struct snd_kcontrol *kcontrol,
  1141. struct snd_ctl_elem_value *ucontrol)
  1142. {
  1143. struct msm_dai_q6_dai_data *dai_data = kcontrol->private_data;
  1144. ucontrol->value.integer.value[0] =
  1145. dai_data->port_config.i2s.data_format;
  1146. return 0;
  1147. }
  1148. static const struct snd_kcontrol_new mi2s_config_controls[] = {
  1149. SOC_ENUM_EXT("PRI MI2S RX Format", mi2s_config_enum[0],
  1150. msm_dai_q6_mi2s_format_get,
  1151. msm_dai_q6_mi2s_format_put),
  1152. SOC_ENUM_EXT("SEC MI2S RX Format", mi2s_config_enum[0],
  1153. msm_dai_q6_mi2s_format_get,
  1154. msm_dai_q6_mi2s_format_put),
  1155. SOC_ENUM_EXT("TERT MI2S RX Format", mi2s_config_enum[0],
  1156. msm_dai_q6_mi2s_format_get,
  1157. msm_dai_q6_mi2s_format_put),
  1158. SOC_ENUM_EXT("QUAT MI2S RX Format", mi2s_config_enum[0],
  1159. msm_dai_q6_mi2s_format_get,
  1160. msm_dai_q6_mi2s_format_put),
  1161. SOC_ENUM_EXT("PRI MI2S TX Format", mi2s_config_enum[0],
  1162. msm_dai_q6_mi2s_format_get,
  1163. msm_dai_q6_mi2s_format_put),
  1164. SOC_ENUM_EXT("SEC MI2S TX Format", mi2s_config_enum[0],
  1165. msm_dai_q6_mi2s_format_get,
  1166. msm_dai_q6_mi2s_format_put),
  1167. SOC_ENUM_EXT("TERT MI2S TX Format", mi2s_config_enum[0],
  1168. msm_dai_q6_mi2s_format_get,
  1169. msm_dai_q6_mi2s_format_put),
  1170. SOC_ENUM_EXT("QUAT MI2S TX Format", mi2s_config_enum[0],
  1171. msm_dai_q6_mi2s_format_get,
  1172. msm_dai_q6_mi2s_format_put),
  1173. };
  1174. static int msm_dai_q6_dai_mi2s_probe(struct snd_soc_dai *dai)
  1175. {
  1176. struct msm_dai_q6_mi2s_dai_data *mi2s_dai_data =
  1177. dev_get_drvdata(dai->dev);
  1178. struct snd_kcontrol *kcontrol = NULL;
  1179. int rc = 0;
  1180. const struct snd_kcontrol_new *ctrl = NULL;
  1181. if (mi2s_dai_data->rx_dai.mi2s_dai_data.port_config.i2s.channel_mode) {
  1182. if (!strncmp(dai->name, "msm-dai-q6-mi2s.0", 17))
  1183. ctrl = &mi2s_config_controls[0];
  1184. if (!strncmp(dai->name, "msm-dai-q6-mi2s.1", 17))
  1185. ctrl = &mi2s_config_controls[1];
  1186. if (!strncmp(dai->name, "msm-dai-q6-mi2s.2", 17))
  1187. ctrl = &mi2s_config_controls[2];
  1188. if (!strncmp(dai->name, "msm-dai-q6-mi2s.3", 17))
  1189. ctrl = &mi2s_config_controls[3];
  1190. }
  1191. if (ctrl) {
  1192. kcontrol = snd_ctl_new1(ctrl,
  1193. &mi2s_dai_data->rx_dai.mi2s_dai_data);
  1194. rc = snd_ctl_add(dai->card->snd_card, kcontrol);
  1195. if (IS_ERR_VALUE(rc)) {
  1196. dev_err(dai->dev, "%s: err add RX fmt ctl DAI = %s\n",
  1197. __func__, dai->name);
  1198. goto rtn;
  1199. }
  1200. }
  1201. ctrl = NULL;
  1202. if (mi2s_dai_data->tx_dai.mi2s_dai_data.port_config.i2s.channel_mode) {
  1203. if (!strncmp(dai->name, "msm-dai-q6-mi2s.0", 17))
  1204. ctrl = &mi2s_config_controls[4];
  1205. if (!strncmp(dai->name, "msm-dai-q6-mi2s.1", 17))
  1206. ctrl = &mi2s_config_controls[5];
  1207. if (!strncmp(dai->name, "msm-dai-q6-mi2s.2", 17))
  1208. ctrl = &mi2s_config_controls[6];
  1209. if (!strncmp(dai->name, "msm-dai-q6-mi2s.3", 17))
  1210. ctrl = &mi2s_config_controls[7];
  1211. }
  1212. if (ctrl) {
  1213. rc = snd_ctl_add(dai->card->snd_card,
  1214. snd_ctl_new1(ctrl,
  1215. &mi2s_dai_data->tx_dai.mi2s_dai_data));
  1216. if (IS_ERR_VALUE(rc)) {
  1217. if (kcontrol)
  1218. snd_ctl_remove(dai->card->snd_card, kcontrol);
  1219. dev_err(dai->dev, "%s: err add TX fmt ctl DAI = %s\n",
  1220. __func__, dai->name);
  1221. }
  1222. }
  1223. rtn:
  1224. return rc;
  1225. }
  1226. static int msm_dai_q6_dai_mi2s_remove(struct snd_soc_dai *dai)
  1227. {
  1228. struct msm_dai_q6_mi2s_dai_data *mi2s_dai_data =
  1229. dev_get_drvdata(dai->dev);
  1230. int rc;
  1231. /* If AFE port is still up, close it */
  1232. if (test_bit(STATUS_PORT_STARTED,
  1233. mi2s_dai_data->rx_dai.mi2s_dai_data.status_mask)) {
  1234. rc = afe_close(MI2S_RX); /* can block */
  1235. if (IS_ERR_VALUE(rc))
  1236. dev_err(dai->dev, "fail to close MI2S_RX port\n");
  1237. clear_bit(STATUS_PORT_STARTED,
  1238. mi2s_dai_data->rx_dai.mi2s_dai_data.status_mask);
  1239. }
  1240. if (test_bit(STATUS_PORT_STARTED,
  1241. mi2s_dai_data->tx_dai.mi2s_dai_data.status_mask)) {
  1242. rc = afe_close(MI2S_TX); /* can block */
  1243. if (IS_ERR_VALUE(rc))
  1244. dev_err(dai->dev, "fail to close MI2S_TX port\n");
  1245. clear_bit(STATUS_PORT_STARTED,
  1246. mi2s_dai_data->tx_dai.mi2s_dai_data.status_mask);
  1247. }
  1248. kfree(mi2s_dai_data);
  1249. snd_soc_unregister_dai(dai->dev);
  1250. return 0;
  1251. }
  1252. static int msm_dai_q6_mi2s_startup(struct snd_pcm_substream *substream,
  1253. struct snd_soc_dai *dai)
  1254. {
  1255. return 0;
  1256. }
  1257. static int msm_mi2s_get_port_id(u32 mi2s_id, int stream, u16 *port_id)
  1258. {
  1259. int ret = 0;
  1260. switch (stream) {
  1261. case SNDRV_PCM_STREAM_PLAYBACK:
  1262. switch (mi2s_id) {
  1263. case MSM_PRIM_MI2S:
  1264. *port_id = AFE_PORT_ID_PRIMARY_MI2S_RX;
  1265. break;
  1266. case MSM_SEC_MI2S:
  1267. *port_id = AFE_PORT_ID_SECONDARY_MI2S_RX;
  1268. break;
  1269. case MSM_TERT_MI2S:
  1270. *port_id = AFE_PORT_ID_TERTIARY_MI2S_RX;
  1271. break;
  1272. case MSM_QUAT_MI2S:
  1273. *port_id = AFE_PORT_ID_QUATERNARY_MI2S_RX;
  1274. break;
  1275. break;
  1276. default:
  1277. ret = -1;
  1278. break;
  1279. }
  1280. break;
  1281. case SNDRV_PCM_STREAM_CAPTURE:
  1282. switch (mi2s_id) {
  1283. case MSM_PRIM_MI2S:
  1284. *port_id = AFE_PORT_ID_PRIMARY_MI2S_TX;
  1285. break;
  1286. case MSM_SEC_MI2S:
  1287. *port_id = AFE_PORT_ID_SECONDARY_MI2S_TX;
  1288. break;
  1289. case MSM_TERT_MI2S:
  1290. *port_id = AFE_PORT_ID_TERTIARY_MI2S_TX;
  1291. break;
  1292. case MSM_QUAT_MI2S:
  1293. *port_id = AFE_PORT_ID_QUATERNARY_MI2S_TX;
  1294. break;
  1295. default:
  1296. ret = -1;
  1297. break;
  1298. }
  1299. break;
  1300. default:
  1301. ret = -1;
  1302. break;
  1303. }
  1304. pr_debug("%s: port_id = %#x\n", __func__, *port_id);
  1305. return ret;
  1306. }
  1307. static int msm_dai_q6_mi2s_prepare(struct snd_pcm_substream *substream,
  1308. struct snd_soc_dai *dai)
  1309. {
  1310. struct msm_dai_q6_mi2s_dai_data *mi2s_dai_data =
  1311. dev_get_drvdata(dai->dev);
  1312. struct msm_dai_q6_dai_data *dai_data =
  1313. (substream->stream == SNDRV_PCM_STREAM_PLAYBACK ?
  1314. &mi2s_dai_data->rx_dai.mi2s_dai_data :
  1315. &mi2s_dai_data->tx_dai.mi2s_dai_data);
  1316. u16 port_id = 0;
  1317. int rc = 0;
  1318. if (msm_mi2s_get_port_id(dai->id, substream->stream,
  1319. &port_id) != 0) {
  1320. dev_err(dai->dev, "%s: Invalid Port ID %#x\n",
  1321. __func__, port_id);
  1322. return -EINVAL;
  1323. }
  1324. dev_dbg(dai->dev, "%s: dai id %d, afe port id = %x\n"
  1325. "dai_data->channels = %u sample_rate = %u\n", __func__,
  1326. dai->id, port_id, dai_data->channels, dai_data->rate);
  1327. if (!test_bit(STATUS_PORT_STARTED, dai_data->status_mask)) {
  1328. /* PORT START should be set if prepare called
  1329. * in active state.
  1330. */
  1331. rc = afe_port_start(port_id, &dai_data->port_config,
  1332. dai_data->rate);
  1333. if (IS_ERR_VALUE(rc))
  1334. dev_err(dai->dev, "fail to open AFE port %x\n",
  1335. dai->id);
  1336. else
  1337. set_bit(STATUS_PORT_STARTED,
  1338. dai_data->status_mask);
  1339. }
  1340. if (!test_bit(STATUS_PORT_STARTED, dai_data->hwfree_status)) {
  1341. set_bit(STATUS_PORT_STARTED, dai_data->hwfree_status);
  1342. dev_dbg(dai->dev, "%s: set hwfree_status to started\n",
  1343. __func__);
  1344. }
  1345. return rc;
  1346. }
  1347. static int msm_dai_q6_mi2s_hw_params(struct snd_pcm_substream *substream,
  1348. struct snd_pcm_hw_params *params,
  1349. struct snd_soc_dai *dai)
  1350. {
  1351. struct msm_dai_q6_mi2s_dai_data *mi2s_dai_data =
  1352. dev_get_drvdata(dai->dev);
  1353. struct msm_dai_q6_mi2s_dai_config *mi2s_dai_config =
  1354. (substream->stream == SNDRV_PCM_STREAM_PLAYBACK ?
  1355. &mi2s_dai_data->rx_dai : &mi2s_dai_data->tx_dai);
  1356. struct msm_dai_q6_dai_data *dai_data = &mi2s_dai_config->mi2s_dai_data;
  1357. struct afe_param_id_i2s_cfg *i2s = &dai_data->port_config.i2s;
  1358. dai_data->channels = params_channels(params);
  1359. switch (dai_data->channels) {
  1360. case 8:
  1361. case 7:
  1362. if (mi2s_dai_config->pdata_mi2s_lines < AFE_PORT_I2S_8CHS)
  1363. goto error_invalid_data;
  1364. dai_data->port_config.i2s.channel_mode = AFE_PORT_I2S_8CHS;
  1365. break;
  1366. case 6:
  1367. case 5:
  1368. if (mi2s_dai_config->pdata_mi2s_lines < AFE_PORT_I2S_6CHS)
  1369. goto error_invalid_data;
  1370. dai_data->port_config.i2s.channel_mode = AFE_PORT_I2S_6CHS;
  1371. break;
  1372. case 4:
  1373. case 3:
  1374. if (mi2s_dai_config->pdata_mi2s_lines < AFE_PORT_I2S_QUAD01)
  1375. goto error_invalid_data;
  1376. if (mi2s_dai_config->pdata_mi2s_lines == AFE_PORT_I2S_QUAD23)
  1377. dai_data->port_config.i2s.channel_mode =
  1378. mi2s_dai_config->pdata_mi2s_lines;
  1379. else
  1380. dai_data->port_config.i2s.channel_mode =
  1381. AFE_PORT_I2S_QUAD01;
  1382. break;
  1383. case 2:
  1384. case 1:
  1385. if (mi2s_dai_config->pdata_mi2s_lines < AFE_PORT_I2S_SD0)
  1386. goto error_invalid_data;
  1387. switch (mi2s_dai_config->pdata_mi2s_lines) {
  1388. case AFE_PORT_I2S_SD0:
  1389. case AFE_PORT_I2S_SD1:
  1390. case AFE_PORT_I2S_SD2:
  1391. case AFE_PORT_I2S_SD3:
  1392. dai_data->port_config.i2s.channel_mode =
  1393. mi2s_dai_config->pdata_mi2s_lines;
  1394. break;
  1395. case AFE_PORT_I2S_QUAD01:
  1396. case AFE_PORT_I2S_6CHS:
  1397. case AFE_PORT_I2S_8CHS:
  1398. dai_data->port_config.i2s.channel_mode =
  1399. AFE_PORT_I2S_SD0;
  1400. break;
  1401. case AFE_PORT_I2S_QUAD23:
  1402. dai_data->port_config.i2s.channel_mode =
  1403. AFE_PORT_I2S_SD2;
  1404. break;
  1405. }
  1406. if (dai_data->channels == 2)
  1407. dai_data->port_config.i2s.mono_stereo =
  1408. MSM_AFE_CH_STEREO;
  1409. else
  1410. dai_data->port_config.i2s.mono_stereo = MSM_AFE_MONO;
  1411. break;
  1412. default:
  1413. goto error_invalid_data;
  1414. }
  1415. dai_data->rate = params_rate(params);
  1416. switch (params_format(params)) {
  1417. case SNDRV_PCM_FORMAT_S16_LE:
  1418. case SNDRV_PCM_FORMAT_SPECIAL:
  1419. dai_data->port_config.i2s.bit_width = 16;
  1420. dai_data->bitwidth = 16;
  1421. break;
  1422. case SNDRV_PCM_FORMAT_S24_LE:
  1423. dai_data->port_config.i2s.bit_width = 24;
  1424. dai_data->bitwidth = 24;
  1425. break;
  1426. default:
  1427. return -EINVAL;
  1428. }
  1429. dai_data->port_config.i2s.i2s_cfg_minor_version =
  1430. AFE_API_VERSION_I2S_CONFIG;
  1431. dai_data->port_config.i2s.sample_rate = dai_data->rate;
  1432. if ((test_bit(STATUS_PORT_STARTED,
  1433. mi2s_dai_data->rx_dai.mi2s_dai_data.status_mask) &&
  1434. test_bit(STATUS_PORT_STARTED,
  1435. mi2s_dai_data->rx_dai.mi2s_dai_data.hwfree_status)) ||
  1436. (test_bit(STATUS_PORT_STARTED,
  1437. mi2s_dai_data->tx_dai.mi2s_dai_data.status_mask) &&
  1438. test_bit(STATUS_PORT_STARTED,
  1439. mi2s_dai_data->tx_dai.mi2s_dai_data.hwfree_status))) {
  1440. if ((mi2s_dai_data->tx_dai.mi2s_dai_data.rate !=
  1441. mi2s_dai_data->rx_dai.mi2s_dai_data.rate) ||
  1442. (mi2s_dai_data->rx_dai.mi2s_dai_data.bitwidth !=
  1443. mi2s_dai_data->tx_dai.mi2s_dai_data.bitwidth)) {
  1444. dev_err(dai->dev, "%s: Error mismatch in HW params\n"
  1445. "Tx sample_rate = %u bit_width = %hu\n"
  1446. "Rx sample_rate = %u bit_width = %hu\n"
  1447. , __func__,
  1448. mi2s_dai_data->tx_dai.mi2s_dai_data.rate,
  1449. mi2s_dai_data->tx_dai.mi2s_dai_data.bitwidth,
  1450. mi2s_dai_data->rx_dai.mi2s_dai_data.rate,
  1451. mi2s_dai_data->rx_dai.mi2s_dai_data.bitwidth);
  1452. return -EINVAL;
  1453. }
  1454. }
  1455. dev_dbg(dai->dev, "%s: dai id %d dai_data->channels = %d\n"
  1456. "sample_rate = %u i2s_cfg_minor_version = %#x\n"
  1457. "bit_width = %hu channel_mode = %#x mono_stereo = %#x\n"
  1458. "ws_src = %#x sample_rate = %u data_format = %#x\n"
  1459. "reserved = %u\n", __func__, dai->id, dai_data->channels,
  1460. dai_data->rate, i2s->i2s_cfg_minor_version, i2s->bit_width,
  1461. i2s->channel_mode, i2s->mono_stereo, i2s->ws_src,
  1462. i2s->sample_rate, i2s->data_format, i2s->reserved);
  1463. return 0;
  1464. error_invalid_data:
  1465. pr_debug("%s: dai_data->channels = %d channel_mode = %d\n", __func__,
  1466. dai_data->channels, dai_data->port_config.i2s.channel_mode);
  1467. return -EINVAL;
  1468. }
  1469. static int msm_dai_q6_mi2s_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
  1470. {
  1471. struct msm_dai_q6_mi2s_dai_data *mi2s_dai_data =
  1472. dev_get_drvdata(dai->dev);
  1473. if (test_bit(STATUS_PORT_STARTED,
  1474. mi2s_dai_data->rx_dai.mi2s_dai_data.status_mask) ||
  1475. test_bit(STATUS_PORT_STARTED,
  1476. mi2s_dai_data->tx_dai.mi2s_dai_data.status_mask)) {
  1477. dev_err(dai->dev, "%s: err chg i2s mode while dai running",
  1478. __func__);
  1479. return -EPERM;
  1480. }
  1481. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  1482. case SND_SOC_DAIFMT_CBS_CFS:
  1483. mi2s_dai_data->rx_dai.mi2s_dai_data.port_config.i2s.ws_src = 1;
  1484. mi2s_dai_data->tx_dai.mi2s_dai_data.port_config.i2s.ws_src = 1;
  1485. break;
  1486. case SND_SOC_DAIFMT_CBM_CFM:
  1487. mi2s_dai_data->rx_dai.mi2s_dai_data.port_config.i2s.ws_src = 0;
  1488. mi2s_dai_data->tx_dai.mi2s_dai_data.port_config.i2s.ws_src = 0;
  1489. break;
  1490. default:
  1491. return -EINVAL;
  1492. }
  1493. return 0;
  1494. }
  1495. static int msm_dai_q6_mi2s_hw_free(struct snd_pcm_substream *substream,
  1496. struct snd_soc_dai *dai)
  1497. {
  1498. struct msm_dai_q6_mi2s_dai_data *mi2s_dai_data =
  1499. dev_get_drvdata(dai->dev);
  1500. struct msm_dai_q6_dai_data *dai_data =
  1501. (substream->stream == SNDRV_PCM_STREAM_PLAYBACK ?
  1502. &mi2s_dai_data->rx_dai.mi2s_dai_data :
  1503. &mi2s_dai_data->tx_dai.mi2s_dai_data);
  1504. if (test_bit(STATUS_PORT_STARTED, dai_data->hwfree_status)) {
  1505. clear_bit(STATUS_PORT_STARTED, dai_data->hwfree_status);
  1506. dev_dbg(dai->dev, "%s: clear hwfree_status\n", __func__);
  1507. }
  1508. return 0;
  1509. }
  1510. static void msm_dai_q6_mi2s_shutdown(struct snd_pcm_substream *substream,
  1511. struct snd_soc_dai *dai)
  1512. {
  1513. struct msm_dai_q6_mi2s_dai_data *mi2s_dai_data =
  1514. dev_get_drvdata(dai->dev);
  1515. struct msm_dai_q6_dai_data *dai_data =
  1516. (substream->stream == SNDRV_PCM_STREAM_PLAYBACK ?
  1517. &mi2s_dai_data->rx_dai.mi2s_dai_data :
  1518. &mi2s_dai_data->tx_dai.mi2s_dai_data);
  1519. u16 port_id = 0;
  1520. int rc = 0;
  1521. if (msm_mi2s_get_port_id(dai->id, substream->stream,
  1522. &port_id) != 0) {
  1523. dev_err(dai->dev, "%s: Invalid Port ID %#x\n",
  1524. __func__, port_id);
  1525. }
  1526. dev_dbg(dai->dev, "%s: closing afe port id = %x\n",
  1527. __func__, port_id);
  1528. if (test_bit(STATUS_PORT_STARTED, dai_data->status_mask)) {
  1529. rc = afe_close(port_id);
  1530. if (IS_ERR_VALUE(rc))
  1531. dev_err(dai->dev, "fail to close AFE port\n");
  1532. clear_bit(STATUS_PORT_STARTED, dai_data->status_mask);
  1533. }
  1534. if (test_bit(STATUS_PORT_STARTED, dai_data->hwfree_status))
  1535. clear_bit(STATUS_PORT_STARTED, dai_data->hwfree_status);
  1536. }
  1537. static struct snd_soc_dai_ops msm_dai_q6_mi2s_ops = {
  1538. .startup = msm_dai_q6_mi2s_startup,
  1539. .prepare = msm_dai_q6_mi2s_prepare,
  1540. .hw_params = msm_dai_q6_mi2s_hw_params,
  1541. .hw_free = msm_dai_q6_mi2s_hw_free,
  1542. .set_fmt = msm_dai_q6_mi2s_set_fmt,
  1543. .shutdown = msm_dai_q6_mi2s_shutdown,
  1544. };
  1545. /* Channel min and max are initialized base on platform data */
  1546. static struct snd_soc_dai_driver msm_dai_q6_mi2s_dai = {
  1547. .playback = {
  1548. .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
  1549. SNDRV_PCM_RATE_16000,
  1550. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  1551. .rate_min = 8000,
  1552. .rate_max = 48000,
  1553. },
  1554. .capture = {
  1555. .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
  1556. SNDRV_PCM_RATE_16000,
  1557. .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
  1558. .rate_min = 8000,
  1559. .rate_max = 48000,
  1560. },
  1561. .ops = &msm_dai_q6_mi2s_ops,
  1562. .probe = msm_dai_q6_dai_mi2s_probe,
  1563. .remove = msm_dai_q6_dai_mi2s_remove,
  1564. };
  1565. static int msm_dai_q6_mi2s_get_lineconfig(u16 sd_lines, u16 *config_ptr,
  1566. unsigned int *ch_cnt)
  1567. {
  1568. u8 num_of_sd_lines;
  1569. num_of_sd_lines = num_of_bits_set(sd_lines);
  1570. switch (num_of_sd_lines) {
  1571. case 0:
  1572. pr_debug("%s: no line is assigned\n", __func__);
  1573. break;
  1574. case 1:
  1575. switch (sd_lines) {
  1576. case MSM_MI2S_SD0:
  1577. *config_ptr = AFE_PORT_I2S_SD0;
  1578. break;
  1579. case MSM_MI2S_SD1:
  1580. *config_ptr = AFE_PORT_I2S_SD1;
  1581. break;
  1582. case MSM_MI2S_SD2:
  1583. *config_ptr = AFE_PORT_I2S_SD2;
  1584. break;
  1585. case MSM_MI2S_SD3:
  1586. *config_ptr = AFE_PORT_I2S_SD3;
  1587. break;
  1588. default:
  1589. pr_err("%s: invalid SD line\n",
  1590. __func__);
  1591. goto error_invalid_data;
  1592. }
  1593. break;
  1594. case 2:
  1595. switch (sd_lines) {
  1596. case MSM_MI2S_SD0 | MSM_MI2S_SD1:
  1597. *config_ptr = AFE_PORT_I2S_QUAD01;
  1598. break;
  1599. case MSM_MI2S_SD2 | MSM_MI2S_SD3:
  1600. *config_ptr = AFE_PORT_I2S_QUAD23;
  1601. break;
  1602. default:
  1603. pr_err("%s: invalid SD line\n",
  1604. __func__);
  1605. goto error_invalid_data;
  1606. }
  1607. break;
  1608. case 3:
  1609. switch (sd_lines) {
  1610. case MSM_MI2S_SD0 | MSM_MI2S_SD1 | MSM_MI2S_SD2:
  1611. *config_ptr = AFE_PORT_I2S_6CHS;
  1612. break;
  1613. default:
  1614. pr_err("%s: invalid SD lines\n",
  1615. __func__);
  1616. goto error_invalid_data;
  1617. }
  1618. break;
  1619. case 4:
  1620. switch (sd_lines) {
  1621. case MSM_MI2S_SD0 | MSM_MI2S_SD1 | MSM_MI2S_SD2 | MSM_MI2S_SD3:
  1622. *config_ptr = AFE_PORT_I2S_8CHS;
  1623. break;
  1624. default:
  1625. pr_err("%s: invalid SD lines\n",
  1626. __func__);
  1627. goto error_invalid_data;
  1628. }
  1629. break;
  1630. default:
  1631. pr_err("%s: invalid SD lines\n", __func__);
  1632. goto error_invalid_data;
  1633. }
  1634. *ch_cnt = num_of_sd_lines;
  1635. return 0;
  1636. error_invalid_data:
  1637. return -EINVAL;
  1638. }
  1639. static int msm_dai_q6_mi2s_platform_data_validation(
  1640. struct platform_device *pdev, struct snd_soc_dai_driver *dai_driver)
  1641. {
  1642. struct msm_dai_q6_mi2s_dai_data *dai_data = dev_get_drvdata(&pdev->dev);
  1643. struct msm_mi2s_pdata *mi2s_pdata =
  1644. (struct msm_mi2s_pdata *) pdev->dev.platform_data;
  1645. unsigned int ch_cnt;
  1646. int rc = 0;
  1647. u16 sd_line;
  1648. if (mi2s_pdata == NULL) {
  1649. pr_err("%s: mi2s_pdata NULL", __func__);
  1650. return -EINVAL;
  1651. }
  1652. rc = msm_dai_q6_mi2s_get_lineconfig(mi2s_pdata->rx_sd_lines,
  1653. &sd_line, &ch_cnt);
  1654. if (IS_ERR_VALUE(rc)) {
  1655. dev_err(&pdev->dev, "invalid MI2S RX sd line config\n");
  1656. goto rtn;
  1657. }
  1658. if (ch_cnt) {
  1659. dai_data->rx_dai.mi2s_dai_data.port_config.i2s.channel_mode =
  1660. sd_line;
  1661. dai_data->rx_dai.pdata_mi2s_lines = sd_line;
  1662. dai_driver->playback.channels_min = 1;
  1663. dai_driver->playback.channels_max = ch_cnt << 1;
  1664. } else {
  1665. dai_driver->playback.channels_min = 0;
  1666. dai_driver->playback.channels_max = 0;
  1667. }
  1668. rc = msm_dai_q6_mi2s_get_lineconfig(mi2s_pdata->tx_sd_lines,
  1669. &sd_line, &ch_cnt);
  1670. if (IS_ERR_VALUE(rc)) {
  1671. dev_err(&pdev->dev, "invalid MI2S TX sd line config\n");
  1672. goto rtn;
  1673. }
  1674. if (ch_cnt) {
  1675. dai_data->tx_dai.mi2s_dai_data.port_config.i2s.channel_mode =
  1676. sd_line;
  1677. dai_data->tx_dai.pdata_mi2s_lines = sd_line;
  1678. dai_driver->capture.channels_min = 1;
  1679. dai_driver->capture.channels_max = ch_cnt << 1;
  1680. } else {
  1681. dai_driver->capture.channels_min = 0;
  1682. dai_driver->capture.channels_max = 0;
  1683. }
  1684. dev_dbg(&pdev->dev, "%s: playback sdline %x capture sdline %x\n",
  1685. __func__, dai_data->rx_dai.pdata_mi2s_lines,
  1686. dai_data->tx_dai.pdata_mi2s_lines);
  1687. dev_dbg(&pdev->dev, "%s: playback ch_max %d capture ch_mx %d\n",
  1688. __func__, dai_driver->playback.channels_max,
  1689. dai_driver->capture.channels_max);
  1690. rtn:
  1691. return rc;
  1692. }
  1693. static __devinit int msm_dai_q6_mi2s_dev_probe(struct platform_device *pdev)
  1694. {
  1695. struct msm_dai_q6_mi2s_dai_data *dai_data;
  1696. const char *q6_mi2s_dev_id = "qcom,msm-dai-q6-mi2s-dev-id";
  1697. u32 tx_line = 0;
  1698. u32 rx_line = 0;
  1699. u32 mi2s_intf = 0;
  1700. struct msm_mi2s_pdata *mi2s_pdata;
  1701. int rc;
  1702. struct snd_soc_dai_driver *mi2s_dai;
  1703. rc = of_property_read_u32(pdev->dev.of_node, q6_mi2s_dev_id,
  1704. &mi2s_intf);
  1705. if (rc) {
  1706. dev_err(&pdev->dev,
  1707. "%s: missing %x in dt node\n", __func__, mi2s_intf);
  1708. goto rtn;
  1709. }
  1710. dev_dbg(&pdev->dev, "dev name %s dev id %x\n", dev_name(&pdev->dev),
  1711. mi2s_intf);
  1712. if (mi2s_intf < MSM_PRIM_MI2S || mi2s_intf > MSM_QUAT_MI2S) {
  1713. dev_err(&pdev->dev,
  1714. "%s: Invalid MI2S ID %u from Device Tree\n",
  1715. __func__, mi2s_intf);
  1716. rc = -ENXIO;
  1717. goto rtn;
  1718. }
  1719. dev_set_name(&pdev->dev, "%s.%d", "msm-dai-q6-mi2s", mi2s_intf);
  1720. pdev->id = mi2s_intf;
  1721. mi2s_pdata = kzalloc(sizeof(struct msm_mi2s_pdata), GFP_KERNEL);
  1722. if (!mi2s_pdata) {
  1723. dev_err(&pdev->dev, "fail to allocate mi2s_pdata data\n");
  1724. rc = -ENOMEM;
  1725. goto rtn;
  1726. }
  1727. rc = of_property_read_u32(pdev->dev.of_node, "qcom,msm-mi2s-rx-lines",
  1728. &rx_line);
  1729. if (rc) {
  1730. dev_err(&pdev->dev, "%s: Rx line from DT file %s\n", __func__,
  1731. "qcom,msm-mi2s-rx-lines");
  1732. goto free_pdata;
  1733. }
  1734. rc = of_property_read_u32(pdev->dev.of_node, "qcom,msm-mi2s-tx-lines",
  1735. &tx_line);
  1736. if (rc) {
  1737. dev_err(&pdev->dev, "%s: Tx line from DT file %s\n", __func__,
  1738. "qcom,msm-mi2s-tx-lines");
  1739. goto free_pdata;
  1740. }
  1741. dev_dbg(&pdev->dev, "dev name %s Rx line %x , Tx ine %x\n",
  1742. dev_name(&pdev->dev), rx_line, tx_line);
  1743. mi2s_pdata->rx_sd_lines = rx_line;
  1744. mi2s_pdata->tx_sd_lines = tx_line;
  1745. dai_data = kzalloc(sizeof(struct msm_dai_q6_mi2s_dai_data),
  1746. GFP_KERNEL);
  1747. if (!dai_data) {
  1748. dev_err(&pdev->dev, "fail to allocate dai data\n");
  1749. rc = -ENOMEM;
  1750. goto free_pdata;
  1751. } else
  1752. dev_set_drvdata(&pdev->dev, dai_data);
  1753. pdev->dev.platform_data = mi2s_pdata;
  1754. mi2s_dai = kzalloc(sizeof(struct snd_soc_dai_driver), GFP_KERNEL);
  1755. if (!mi2s_dai) {
  1756. dev_err(&pdev->dev, "fail to allocate for mi2s_dai\n");
  1757. rc = -ENOMEM;
  1758. goto free_dai_data;
  1759. }
  1760. memcpy(mi2s_dai, &msm_dai_q6_mi2s_dai,
  1761. sizeof(struct snd_soc_dai_driver));
  1762. rc = msm_dai_q6_mi2s_platform_data_validation(pdev, mi2s_dai);
  1763. if (IS_ERR_VALUE(rc))
  1764. goto free_dai;
  1765. rc = snd_soc_register_dai(&pdev->dev, mi2s_dai);
  1766. if (IS_ERR_VALUE(rc))
  1767. goto err_register;
  1768. return 0;
  1769. err_register:
  1770. dev_err(&pdev->dev, "fail to msm_dai_q6_mi2s_dev_probe\n");
  1771. free_dai:
  1772. kfree(mi2s_dai);
  1773. free_dai_data:
  1774. kfree(dai_data);
  1775. free_pdata:
  1776. kfree(mi2s_pdata);
  1777. rtn:
  1778. return rc;
  1779. }
  1780. static __devexit int msm_dai_q6_mi2s_dev_remove(struct platform_device *pdev)
  1781. {
  1782. snd_soc_unregister_dai(&pdev->dev);
  1783. return 0;
  1784. }
  1785. static int msm_dai_q6_dev_probe(struct platform_device *pdev)
  1786. {
  1787. int rc, id;
  1788. const char *q6_dev_id = "qcom,msm-dai-q6-dev-id";
  1789. rc = of_property_read_u32(pdev->dev.of_node, q6_dev_id, &id);
  1790. if (rc) {
  1791. dev_err(&pdev->dev,
  1792. "%s: missing %s in dt node\n", __func__, q6_dev_id);
  1793. return rc;
  1794. }
  1795. pdev->id = id;
  1796. dev_set_name(&pdev->dev, "%s.%d", "msm-dai-q6-dev", id);
  1797. pr_debug("%s: dev name %s, id:%d\n", __func__,
  1798. dev_name(&pdev->dev), pdev->id);
  1799. switch (id) {
  1800. case SLIMBUS_0_RX:
  1801. case SLIMBUS_2_RX:
  1802. rc = snd_soc_register_dai(&pdev->dev,
  1803. &msm_dai_q6_slimbus_rx_dai);
  1804. break;
  1805. case SLIMBUS_0_TX:
  1806. case SLIMBUS_2_TX:
  1807. case SLIMBUS_5_TX:
  1808. rc = snd_soc_register_dai(&pdev->dev,
  1809. &msm_dai_q6_slimbus_tx_dai);
  1810. break;
  1811. case SLIMBUS_1_RX:
  1812. case SLIMBUS_3_RX:
  1813. case SLIMBUS_4_RX:
  1814. rc = snd_soc_register_dai(&pdev->dev,
  1815. &msm_dai_q6_slimbus_1_rx_dai);
  1816. break;
  1817. case SLIMBUS_1_TX:
  1818. case SLIMBUS_3_TX:
  1819. case SLIMBUS_4_TX:
  1820. rc = snd_soc_register_dai(&pdev->dev,
  1821. &msm_dai_q6_slimbus_1_tx_dai);
  1822. break;
  1823. case INT_BT_SCO_RX:
  1824. rc = snd_soc_register_dai(&pdev->dev,
  1825. &msm_dai_q6_bt_sco_rx_dai);
  1826. break;
  1827. case INT_BT_SCO_TX:
  1828. rc = snd_soc_register_dai(&pdev->dev,
  1829. &msm_dai_q6_bt_sco_tx_dai);
  1830. break;
  1831. case INT_FM_RX:
  1832. rc = snd_soc_register_dai(&pdev->dev, &msm_dai_q6_fm_rx_dai);
  1833. break;
  1834. case INT_FM_TX:
  1835. rc = snd_soc_register_dai(&pdev->dev, &msm_dai_q6_fm_tx_dai);
  1836. break;
  1837. case RT_PROXY_DAI_001_RX:
  1838. case RT_PROXY_DAI_002_RX:
  1839. rc = snd_soc_register_dai(&pdev->dev, &msm_dai_q6_afe_rx_dai);
  1840. break;
  1841. case RT_PROXY_DAI_001_TX:
  1842. case RT_PROXY_DAI_002_TX:
  1843. rc = snd_soc_register_dai(&pdev->dev, &msm_dai_q6_afe_tx_dai);
  1844. break;
  1845. case VOICE_PLAYBACK_TX:
  1846. case VOICE2_PLAYBACK_TX:
  1847. rc = snd_soc_register_dai(&pdev->dev,
  1848. &msm_dai_q6_voice_playback_tx_dai);
  1849. break;
  1850. case VOICE_RECORD_RX:
  1851. case VOICE_RECORD_TX:
  1852. rc = snd_soc_register_dai(&pdev->dev,
  1853. &msm_dai_q6_incall_record_dai);
  1854. break;
  1855. default:
  1856. rc = -ENODEV;
  1857. break;
  1858. }
  1859. return rc;
  1860. }
  1861. static int msm_dai_q6_dev_remove(struct platform_device *pdev)
  1862. {
  1863. snd_soc_unregister_dai(&pdev->dev);
  1864. return 0;
  1865. }
  1866. static const struct of_device_id msm_dai_q6_dev_dt_match[] = {
  1867. { .compatible = "qcom,msm-dai-q6-dev", },
  1868. { }
  1869. };
  1870. MODULE_DEVICE_TABLE(of, msm_dai_q6_dev_dt_match);
  1871. static struct platform_driver msm_dai_q6_dev = {
  1872. .probe = msm_dai_q6_dev_probe,
  1873. .remove = msm_dai_q6_dev_remove,
  1874. .driver = {
  1875. .name = "msm-dai-q6-dev",
  1876. .owner = THIS_MODULE,
  1877. .of_match_table = msm_dai_q6_dev_dt_match,
  1878. },
  1879. };
  1880. static int msm_dai_q6_probe(struct platform_device *pdev)
  1881. {
  1882. int rc;
  1883. pr_debug("%s: dev name %s, id:%d\n", __func__,
  1884. dev_name(&pdev->dev), pdev->id);
  1885. rc = of_platform_populate(pdev->dev.of_node, NULL, NULL, &pdev->dev);
  1886. if (rc) {
  1887. dev_err(&pdev->dev, "%s: failed to add child nodes, rc=%d\n",
  1888. __func__, rc);
  1889. } else
  1890. dev_dbg(&pdev->dev, "%s: added child node\n", __func__);
  1891. return rc;
  1892. }
  1893. static int msm_dai_q6_remove(struct platform_device *pdev)
  1894. {
  1895. return 0;
  1896. }
  1897. static const struct of_device_id msm_dai_q6_dt_match[] = {
  1898. { .compatible = "qcom,msm-dai-q6", },
  1899. { }
  1900. };
  1901. MODULE_DEVICE_TABLE(of, msm_dai_q6_dt_match);
  1902. static struct platform_driver msm_dai_q6 = {
  1903. .probe = msm_dai_q6_probe,
  1904. .remove = msm_dai_q6_remove,
  1905. .driver = {
  1906. .name = "msm-dai-q6",
  1907. .owner = THIS_MODULE,
  1908. .of_match_table = msm_dai_q6_dt_match,
  1909. },
  1910. };
  1911. static int msm_dai_mi2s_q6_probe(struct platform_device *pdev)
  1912. {
  1913. int rc;
  1914. rc = of_platform_populate(pdev->dev.of_node, NULL, NULL, &pdev->dev);
  1915. if (rc) {
  1916. dev_err(&pdev->dev, "%s: failed to add child nodes, rc=%d\n",
  1917. __func__, rc);
  1918. } else
  1919. dev_dbg(&pdev->dev, "%s: added child node\n", __func__);
  1920. return rc;
  1921. }
  1922. static int msm_dai_mi2s_q6_remove(struct platform_device *pdev)
  1923. {
  1924. return 0;
  1925. }
  1926. static const struct of_device_id msm_dai_mi2s_dt_match[] = {
  1927. { .compatible = "qcom,msm-dai-mi2s", },
  1928. { }
  1929. };
  1930. MODULE_DEVICE_TABLE(of, msm_dai_mi2s_dt_match);
  1931. static struct platform_driver msm_dai_mi2s_q6 = {
  1932. .probe = msm_dai_mi2s_q6_probe,
  1933. .remove = msm_dai_mi2s_q6_remove,
  1934. .driver = {
  1935. .name = "msm-dai-mi2s",
  1936. .owner = THIS_MODULE,
  1937. .of_match_table = msm_dai_mi2s_dt_match,
  1938. },
  1939. };
  1940. static const struct of_device_id msm_dai_q6_mi2s_dev_dt_match[] = {
  1941. { .compatible = "qcom,msm-dai-q6-mi2s", },
  1942. { }
  1943. };
  1944. MODULE_DEVICE_TABLE(of, msm_dai_q6_mi2s_dev_dt_match);
  1945. static struct platform_driver msm_dai_q6_mi2s_driver = {
  1946. .probe = msm_dai_q6_mi2s_dev_probe,
  1947. .remove = __devexit_p(msm_dai_q6_mi2s_dev_remove),
  1948. .driver = {
  1949. .name = "msm-dai-q6-mi2s",
  1950. .owner = THIS_MODULE,
  1951. .of_match_table = msm_dai_q6_mi2s_dev_dt_match,
  1952. },
  1953. };
  1954. static int __init msm_dai_q6_init(void)
  1955. {
  1956. int rc;
  1957. rc = platform_driver_register(&msm_auxpcm_dev_driver);
  1958. if (rc) {
  1959. pr_err("%s: fail to register auxpcm dev driver", __func__);
  1960. goto fail;
  1961. }
  1962. rc = platform_driver_register(&msm_dai_q6);
  1963. if (rc) {
  1964. pr_err("%s: fail to register dai q6 driver", __func__);
  1965. goto dai_q6_fail;
  1966. }
  1967. rc = platform_driver_register(&msm_dai_q6_dev);
  1968. if (rc) {
  1969. pr_err("%s: fail to register dai q6 dev driver", __func__);
  1970. goto dai_q6_dev_fail;
  1971. }
  1972. rc = platform_driver_register(&msm_dai_q6_mi2s_driver);
  1973. if (rc) {
  1974. pr_err("%s: fail to register dai MI2S dev drv\n", __func__);
  1975. goto dai_q6_mi2s_drv_fail;
  1976. }
  1977. rc = platform_driver_register(&msm_dai_mi2s_q6);
  1978. if (rc) {
  1979. pr_err("%s: fail to register dai MI2S\n", __func__);
  1980. goto dai_mi2s_q6_fail;
  1981. }
  1982. return rc;
  1983. dai_mi2s_q6_fail:
  1984. platform_driver_unregister(&msm_dai_q6_mi2s_driver);
  1985. dai_q6_mi2s_drv_fail:
  1986. platform_driver_unregister(&msm_dai_q6_dev);
  1987. dai_q6_dev_fail:
  1988. platform_driver_unregister(&msm_dai_q6);
  1989. dai_q6_fail:
  1990. platform_driver_unregister(&msm_auxpcm_dev_driver);
  1991. fail:
  1992. return rc;
  1993. }
  1994. module_init(msm_dai_q6_init);
  1995. static void __exit msm_dai_q6_exit(void)
  1996. {
  1997. platform_driver_unregister(&msm_dai_q6_dev);
  1998. platform_driver_unregister(&msm_dai_q6);
  1999. platform_driver_unregister(&msm_auxpcm_dev_driver);
  2000. }
  2001. module_exit(msm_dai_q6_exit);
  2002. /* Module information */
  2003. MODULE_DESCRIPTION("MSM DSP DAI driver");
  2004. MODULE_LICENSE("GPL v2");