bf5xx-ac97-pcm.c 14 KB

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  1. /*
  2. * File: sound/soc/blackfin/bf5xx-ac97-pcm.c
  3. * Author: Cliff Cai <Cliff.Cai@analog.com>
  4. *
  5. * Created: Tue June 06 2008
  6. * Description: DMA Driver for AC97 sound chip
  7. *
  8. * Modified:
  9. * Copyright 2008 Analog Devices Inc.
  10. *
  11. * Bugs: Enter bugs at http://blackfin.uclinux.org/
  12. *
  13. * This program is free software; you can redistribute it and/or modify
  14. * it under the terms of the GNU General Public License as published by
  15. * the Free Software Foundation; either version 2 of the License, or
  16. * (at your option) any later version.
  17. *
  18. * This program is distributed in the hope that it will be useful,
  19. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  20. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  21. * GNU General Public License for more details.
  22. *
  23. * You should have received a copy of the GNU General Public License
  24. * along with this program; if not, see the file COPYING, or write
  25. * to the Free Software Foundation, Inc.,
  26. * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  27. */
  28. #include <linux/module.h>
  29. #include <linux/init.h>
  30. #include <linux/platform_device.h>
  31. #include <linux/dma-mapping.h>
  32. #include <linux/gfp.h>
  33. #include <sound/core.h>
  34. #include <sound/pcm.h>
  35. #include <sound/pcm_params.h>
  36. #include <sound/soc.h>
  37. #include <asm/dma.h>
  38. #include "bf5xx-ac97-pcm.h"
  39. #include "bf5xx-ac97.h"
  40. #include "bf5xx-sport.h"
  41. static unsigned int ac97_chan_mask[] = {
  42. SP_FL, /* Mono */
  43. SP_STEREO, /* Stereo */
  44. SP_2DOT1, /* 2.1*/
  45. SP_QUAD,/*Quadraquic*/
  46. SP_FL | SP_FR | SP_FC | SP_SL | SP_SR,/*5 channels */
  47. SP_5DOT1, /* 5.1 */
  48. };
  49. #if defined(CONFIG_SND_BF5XX_MMAP_SUPPORT)
  50. static void bf5xx_mmap_copy(struct snd_pcm_substream *substream,
  51. snd_pcm_uframes_t count)
  52. {
  53. struct snd_pcm_runtime *runtime = substream->runtime;
  54. struct sport_device *sport = runtime->private_data;
  55. unsigned int chan_mask = ac97_chan_mask[runtime->channels - 1];
  56. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  57. bf5xx_pcm_to_ac97((struct ac97_frame *)sport->tx_dma_buf +
  58. sport->tx_pos, (__u16 *)runtime->dma_area + sport->tx_pos *
  59. runtime->channels, count, chan_mask);
  60. sport->tx_pos += runtime->period_size;
  61. if (sport->tx_pos >= runtime->buffer_size)
  62. sport->tx_pos %= runtime->buffer_size;
  63. sport->tx_delay_pos = sport->tx_pos;
  64. } else {
  65. bf5xx_ac97_to_pcm((struct ac97_frame *)sport->rx_dma_buf +
  66. sport->rx_pos, (__u16 *)runtime->dma_area + sport->rx_pos *
  67. runtime->channels, count);
  68. sport->rx_pos += runtime->period_size;
  69. if (sport->rx_pos >= runtime->buffer_size)
  70. sport->rx_pos %= runtime->buffer_size;
  71. }
  72. }
  73. #endif
  74. static void bf5xx_dma_irq(void *data)
  75. {
  76. struct snd_pcm_substream *pcm = data;
  77. #if defined(CONFIG_SND_BF5XX_MMAP_SUPPORT)
  78. struct snd_pcm_runtime *runtime = pcm->runtime;
  79. struct sport_device *sport = runtime->private_data;
  80. bf5xx_mmap_copy(pcm, runtime->period_size);
  81. if (pcm->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  82. if (sport->once == 0) {
  83. snd_pcm_period_elapsed(pcm);
  84. bf5xx_mmap_copy(pcm, runtime->period_size);
  85. sport->once = 1;
  86. }
  87. }
  88. #endif
  89. snd_pcm_period_elapsed(pcm);
  90. }
  91. /* The memory size for pure pcm data is 128*1024 = 0x20000 bytes.
  92. * The total rx/tx buffer is for ac97 frame to hold all pcm data
  93. * is 0x20000 * sizeof(struct ac97_frame) / 4.
  94. */
  95. static const struct snd_pcm_hardware bf5xx_pcm_hardware = {
  96. .info = SNDRV_PCM_INFO_INTERLEAVED |
  97. #if defined(CONFIG_SND_BF5XX_MMAP_SUPPORT)
  98. SNDRV_PCM_INFO_MMAP |
  99. SNDRV_PCM_INFO_MMAP_VALID |
  100. #endif
  101. SNDRV_PCM_INFO_BLOCK_TRANSFER,
  102. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  103. .period_bytes_min = 32,
  104. .period_bytes_max = 0x10000,
  105. .periods_min = 1,
  106. .periods_max = PAGE_SIZE/32,
  107. .buffer_bytes_max = 0x20000, /* 128 kbytes */
  108. .fifo_size = 16,
  109. };
  110. static int bf5xx_pcm_hw_params(struct snd_pcm_substream *substream,
  111. struct snd_pcm_hw_params *params)
  112. {
  113. size_t size = bf5xx_pcm_hardware.buffer_bytes_max
  114. * sizeof(struct ac97_frame) / 4;
  115. snd_pcm_lib_malloc_pages(substream, size);
  116. return 0;
  117. }
  118. static int bf5xx_pcm_hw_free(struct snd_pcm_substream *substream)
  119. {
  120. #if defined(CONFIG_SND_BF5XX_MMAP_SUPPORT)
  121. struct snd_pcm_runtime *runtime = substream->runtime;
  122. struct sport_device *sport = runtime->private_data;
  123. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  124. sport->once = 0;
  125. if (runtime->dma_area)
  126. memset(runtime->dma_area, 0, runtime->buffer_size);
  127. memset(sport->tx_dma_buf, 0, runtime->buffer_size *
  128. sizeof(struct ac97_frame));
  129. } else
  130. memset(sport->rx_dma_buf, 0, runtime->buffer_size *
  131. sizeof(struct ac97_frame));
  132. #endif
  133. snd_pcm_lib_free_pages(substream);
  134. return 0;
  135. }
  136. static int bf5xx_pcm_prepare(struct snd_pcm_substream *substream)
  137. {
  138. struct snd_pcm_runtime *runtime = substream->runtime;
  139. struct sport_device *sport = runtime->private_data;
  140. /* An intermediate buffer is introduced for implementing mmap for
  141. * SPORT working in TMD mode(include AC97).
  142. */
  143. #if defined(CONFIG_SND_BF5XX_MMAP_SUPPORT)
  144. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  145. sport_set_tx_callback(sport, bf5xx_dma_irq, substream);
  146. sport_config_tx_dma(sport, sport->tx_dma_buf, runtime->periods,
  147. runtime->period_size * sizeof(struct ac97_frame));
  148. } else {
  149. sport_set_rx_callback(sport, bf5xx_dma_irq, substream);
  150. sport_config_rx_dma(sport, sport->rx_dma_buf, runtime->periods,
  151. runtime->period_size * sizeof(struct ac97_frame));
  152. }
  153. #else
  154. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  155. sport_set_tx_callback(sport, bf5xx_dma_irq, substream);
  156. sport_config_tx_dma(sport, runtime->dma_area, runtime->periods,
  157. runtime->period_size * sizeof(struct ac97_frame));
  158. } else {
  159. sport_set_rx_callback(sport, bf5xx_dma_irq, substream);
  160. sport_config_rx_dma(sport, runtime->dma_area, runtime->periods,
  161. runtime->period_size * sizeof(struct ac97_frame));
  162. }
  163. #endif
  164. return 0;
  165. }
  166. static int bf5xx_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
  167. {
  168. struct snd_pcm_runtime *runtime = substream->runtime;
  169. struct sport_device *sport = runtime->private_data;
  170. int ret = 0;
  171. pr_debug("%s enter\n", __func__);
  172. switch (cmd) {
  173. case SNDRV_PCM_TRIGGER_START:
  174. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  175. #if defined(CONFIG_SND_BF5XX_MMAP_SUPPORT)
  176. bf5xx_mmap_copy(substream, runtime->period_size);
  177. sport->tx_delay_pos = 0;
  178. #endif
  179. sport_tx_start(sport);
  180. } else
  181. sport_rx_start(sport);
  182. break;
  183. case SNDRV_PCM_TRIGGER_STOP:
  184. case SNDRV_PCM_TRIGGER_SUSPEND:
  185. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  186. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  187. #if defined(CONFIG_SND_BF5XX_MMAP_SUPPORT)
  188. sport->tx_pos = 0;
  189. #endif
  190. sport_tx_stop(sport);
  191. } else {
  192. #if defined(CONFIG_SND_BF5XX_MMAP_SUPPORT)
  193. sport->rx_pos = 0;
  194. #endif
  195. sport_rx_stop(sport);
  196. }
  197. break;
  198. default:
  199. ret = -EINVAL;
  200. }
  201. return ret;
  202. }
  203. static snd_pcm_uframes_t bf5xx_pcm_pointer(struct snd_pcm_substream *substream)
  204. {
  205. struct snd_pcm_runtime *runtime = substream->runtime;
  206. struct sport_device *sport = runtime->private_data;
  207. unsigned int curr;
  208. #if defined(CONFIG_SND_BF5XX_MMAP_SUPPORT)
  209. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  210. curr = sport->tx_delay_pos;
  211. else
  212. curr = sport->rx_pos;
  213. #else
  214. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  215. curr = sport_curr_offset_tx(sport) / sizeof(struct ac97_frame);
  216. else
  217. curr = sport_curr_offset_rx(sport) / sizeof(struct ac97_frame);
  218. #endif
  219. return curr;
  220. }
  221. static int bf5xx_pcm_open(struct snd_pcm_substream *substream)
  222. {
  223. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  224. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  225. struct sport_device *sport_handle = snd_soc_dai_get_drvdata(cpu_dai);
  226. struct snd_pcm_runtime *runtime = substream->runtime;
  227. int ret;
  228. pr_debug("%s enter\n", __func__);
  229. snd_soc_set_runtime_hwparams(substream, &bf5xx_pcm_hardware);
  230. ret = snd_pcm_hw_constraint_integer(runtime,
  231. SNDRV_PCM_HW_PARAM_PERIODS);
  232. if (ret < 0)
  233. goto out;
  234. if (sport_handle != NULL)
  235. runtime->private_data = sport_handle;
  236. else {
  237. pr_err("sport_handle is NULL\n");
  238. return -1;
  239. }
  240. return 0;
  241. out:
  242. return ret;
  243. }
  244. #if defined(CONFIG_SND_BF5XX_MMAP_SUPPORT)
  245. static int bf5xx_pcm_mmap(struct snd_pcm_substream *substream,
  246. struct vm_area_struct *vma)
  247. {
  248. struct snd_pcm_runtime *runtime = substream->runtime;
  249. size_t size = vma->vm_end - vma->vm_start;
  250. vma->vm_start = (unsigned long)runtime->dma_area;
  251. vma->vm_end = vma->vm_start + size;
  252. vma->vm_flags |= VM_SHARED;
  253. return 0 ;
  254. }
  255. #else
  256. static int bf5xx_pcm_copy(struct snd_pcm_substream *substream, int channel,
  257. snd_pcm_uframes_t pos,
  258. void __user *buf, snd_pcm_uframes_t count)
  259. {
  260. struct snd_pcm_runtime *runtime = substream->runtime;
  261. unsigned int chan_mask = ac97_chan_mask[runtime->channels - 1];
  262. pr_debug("%s copy pos:0x%lx count:0x%lx\n",
  263. substream->stream ? "Capture" : "Playback", pos, count);
  264. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  265. bf5xx_pcm_to_ac97((struct ac97_frame *)runtime->dma_area + pos,
  266. (__u16 *)buf, count, chan_mask);
  267. else
  268. bf5xx_ac97_to_pcm((struct ac97_frame *)runtime->dma_area + pos,
  269. (__u16 *)buf, count);
  270. return 0;
  271. }
  272. #endif
  273. static struct snd_pcm_ops bf5xx_pcm_ac97_ops = {
  274. .open = bf5xx_pcm_open,
  275. .ioctl = snd_pcm_lib_ioctl,
  276. .hw_params = bf5xx_pcm_hw_params,
  277. .hw_free = bf5xx_pcm_hw_free,
  278. .prepare = bf5xx_pcm_prepare,
  279. .trigger = bf5xx_pcm_trigger,
  280. .pointer = bf5xx_pcm_pointer,
  281. #if defined(CONFIG_SND_BF5XX_MMAP_SUPPORT)
  282. .mmap = bf5xx_pcm_mmap,
  283. #else
  284. .copy = bf5xx_pcm_copy,
  285. #endif
  286. };
  287. static int bf5xx_pcm_preallocate_dma_buffer(struct snd_pcm *pcm, int stream)
  288. {
  289. struct snd_soc_pcm_runtime *rtd = pcm->private_data;
  290. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  291. struct sport_device *sport_handle = snd_soc_dai_get_drvdata(cpu_dai);
  292. struct snd_pcm_substream *substream = pcm->streams[stream].substream;
  293. struct snd_dma_buffer *buf = &substream->dma_buffer;
  294. size_t size = bf5xx_pcm_hardware.buffer_bytes_max
  295. * sizeof(struct ac97_frame) / 4;
  296. buf->dev.type = SNDRV_DMA_TYPE_DEV;
  297. buf->dev.dev = pcm->card->dev;
  298. buf->private_data = NULL;
  299. buf->area = dma_alloc_coherent(pcm->card->dev, size,
  300. &buf->addr, GFP_KERNEL);
  301. if (!buf->area) {
  302. pr_err("Failed to allocate dma memory\n");
  303. pr_err("Please increase uncached DMA memory region\n");
  304. return -ENOMEM;
  305. }
  306. buf->bytes = size;
  307. pr_debug("%s, area:%p, size:0x%08lx\n", __func__,
  308. buf->area, buf->bytes);
  309. if (stream == SNDRV_PCM_STREAM_PLAYBACK)
  310. sport_handle->tx_buf = buf->area;
  311. else
  312. sport_handle->rx_buf = buf->area;
  313. /*
  314. * Need to allocate local buffer when enable
  315. * MMAP for SPORT working in TMD mode (include AC97).
  316. */
  317. #if defined(CONFIG_SND_BF5XX_MMAP_SUPPORT)
  318. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  319. if (!sport_handle->tx_dma_buf) {
  320. sport_handle->tx_dma_buf = dma_alloc_coherent(NULL, \
  321. size, &sport_handle->tx_dma_phy, GFP_KERNEL);
  322. if (!sport_handle->tx_dma_buf) {
  323. pr_err("Failed to allocate memory for tx dma buf - Please increase uncached DMA memory region\n");
  324. return -ENOMEM;
  325. } else
  326. memset(sport_handle->tx_dma_buf, 0, size);
  327. } else
  328. memset(sport_handle->tx_dma_buf, 0, size);
  329. } else {
  330. if (!sport_handle->rx_dma_buf) {
  331. sport_handle->rx_dma_buf = dma_alloc_coherent(NULL, \
  332. size, &sport_handle->rx_dma_phy, GFP_KERNEL);
  333. if (!sport_handle->rx_dma_buf) {
  334. pr_err("Failed to allocate memory for rx dma buf - Please increase uncached DMA memory region\n");
  335. return -ENOMEM;
  336. } else
  337. memset(sport_handle->rx_dma_buf, 0, size);
  338. } else
  339. memset(sport_handle->rx_dma_buf, 0, size);
  340. }
  341. #endif
  342. return 0;
  343. }
  344. static void bf5xx_pcm_free_dma_buffers(struct snd_pcm *pcm)
  345. {
  346. struct snd_pcm_substream *substream;
  347. struct snd_dma_buffer *buf;
  348. int stream;
  349. #if defined(CONFIG_SND_BF5XX_MMAP_SUPPORT)
  350. struct snd_soc_pcm_runtime *rtd = pcm->private_data;
  351. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  352. struct sport_device *sport_handle = snd_soc_dai_get_drvdata(cpu_dai);
  353. size_t size = bf5xx_pcm_hardware.buffer_bytes_max *
  354. sizeof(struct ac97_frame) / 4;
  355. #endif
  356. for (stream = 0; stream < 2; stream++) {
  357. substream = pcm->streams[stream].substream;
  358. if (!substream)
  359. continue;
  360. buf = &substream->dma_buffer;
  361. if (!buf->area)
  362. continue;
  363. dma_free_coherent(NULL, buf->bytes, buf->area, 0);
  364. buf->area = NULL;
  365. #if defined(CONFIG_SND_BF5XX_MMAP_SUPPORT)
  366. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  367. if (sport_handle->tx_dma_buf)
  368. dma_free_coherent(NULL, size, \
  369. sport_handle->tx_dma_buf, 0);
  370. sport_handle->tx_dma_buf = NULL;
  371. } else {
  372. if (sport_handle->rx_dma_buf)
  373. dma_free_coherent(NULL, size, \
  374. sport_handle->rx_dma_buf, 0);
  375. sport_handle->rx_dma_buf = NULL;
  376. }
  377. #endif
  378. }
  379. }
  380. static u64 bf5xx_pcm_dmamask = DMA_BIT_MASK(32);
  381. static int bf5xx_pcm_ac97_new(struct snd_soc_pcm_runtime *rtd)
  382. {
  383. struct snd_card *card = rtd->card->snd_card;
  384. struct snd_pcm *pcm = rtd->pcm;
  385. int ret = 0;
  386. pr_debug("%s enter\n", __func__);
  387. if (!card->dev->dma_mask)
  388. card->dev->dma_mask = &bf5xx_pcm_dmamask;
  389. if (!card->dev->coherent_dma_mask)
  390. card->dev->coherent_dma_mask = DMA_BIT_MASK(32);
  391. if (pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream) {
  392. ret = bf5xx_pcm_preallocate_dma_buffer(pcm,
  393. SNDRV_PCM_STREAM_PLAYBACK);
  394. if (ret)
  395. goto out;
  396. }
  397. if (pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream) {
  398. ret = bf5xx_pcm_preallocate_dma_buffer(pcm,
  399. SNDRV_PCM_STREAM_CAPTURE);
  400. if (ret)
  401. goto out;
  402. }
  403. out:
  404. return ret;
  405. }
  406. static struct snd_soc_platform_driver bf5xx_ac97_soc_platform = {
  407. .ops = &bf5xx_pcm_ac97_ops,
  408. .pcm_new = bf5xx_pcm_ac97_new,
  409. .pcm_free = bf5xx_pcm_free_dma_buffers,
  410. };
  411. static int __devinit bf5xx_soc_platform_probe(struct platform_device *pdev)
  412. {
  413. return snd_soc_register_platform(&pdev->dev, &bf5xx_ac97_soc_platform);
  414. }
  415. static int __devexit bf5xx_soc_platform_remove(struct platform_device *pdev)
  416. {
  417. snd_soc_unregister_platform(&pdev->dev);
  418. return 0;
  419. }
  420. static struct platform_driver bf5xx_pcm_driver = {
  421. .driver = {
  422. .name = "bfin-ac97-pcm-audio",
  423. .owner = THIS_MODULE,
  424. },
  425. .probe = bf5xx_soc_platform_probe,
  426. .remove = __devexit_p(bf5xx_soc_platform_remove),
  427. };
  428. module_platform_driver(bf5xx_pcm_driver);
  429. MODULE_AUTHOR("Cliff Cai");
  430. MODULE_DESCRIPTION("ADI Blackfin AC97 PCM DMA module");
  431. MODULE_LICENSE("GPL");