pontis.c 22 KB

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  1. /*
  2. * ALSA driver for ICEnsemble VT1724 (Envy24HT)
  3. *
  4. * Lowlevel functions for Pontis MS300
  5. *
  6. * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  21. *
  22. */
  23. #include <asm/io.h>
  24. #include <linux/delay.h>
  25. #include <linux/interrupt.h>
  26. #include <linux/init.h>
  27. #include <linux/slab.h>
  28. #include <linux/mutex.h>
  29. #include <sound/core.h>
  30. #include <sound/info.h>
  31. #include <sound/tlv.h>
  32. #include "ice1712.h"
  33. #include "envy24ht.h"
  34. #include "pontis.h"
  35. /* I2C addresses */
  36. #define WM_DEV 0x34
  37. #define CS_DEV 0x20
  38. /* WM8776 registers */
  39. #define WM_HP_ATTEN_L 0x00 /* headphone left attenuation */
  40. #define WM_HP_ATTEN_R 0x01 /* headphone left attenuation */
  41. #define WM_HP_MASTER 0x02 /* headphone master (both channels) */
  42. /* override LLR */
  43. #define WM_DAC_ATTEN_L 0x03 /* digital left attenuation */
  44. #define WM_DAC_ATTEN_R 0x04
  45. #define WM_DAC_MASTER 0x05
  46. #define WM_PHASE_SWAP 0x06 /* DAC phase swap */
  47. #define WM_DAC_CTRL1 0x07
  48. #define WM_DAC_MUTE 0x08
  49. #define WM_DAC_CTRL2 0x09
  50. #define WM_DAC_INT 0x0a
  51. #define WM_ADC_INT 0x0b
  52. #define WM_MASTER_CTRL 0x0c
  53. #define WM_POWERDOWN 0x0d
  54. #define WM_ADC_ATTEN_L 0x0e
  55. #define WM_ADC_ATTEN_R 0x0f
  56. #define WM_ALC_CTRL1 0x10
  57. #define WM_ALC_CTRL2 0x11
  58. #define WM_ALC_CTRL3 0x12
  59. #define WM_NOISE_GATE 0x13
  60. #define WM_LIMITER 0x14
  61. #define WM_ADC_MUX 0x15
  62. #define WM_OUT_MUX 0x16
  63. #define WM_RESET 0x17
  64. /*
  65. * GPIO
  66. */
  67. #define PONTIS_CS_CS (1<<4) /* CS */
  68. #define PONTIS_CS_CLK (1<<5) /* CLK */
  69. #define PONTIS_CS_RDATA (1<<6) /* CS8416 -> VT1720 */
  70. #define PONTIS_CS_WDATA (1<<7) /* VT1720 -> CS8416 */
  71. /*
  72. * get the current register value of WM codec
  73. */
  74. static unsigned short wm_get(struct snd_ice1712 *ice, int reg)
  75. {
  76. reg <<= 1;
  77. return ((unsigned short)ice->akm[0].images[reg] << 8) |
  78. ice->akm[0].images[reg + 1];
  79. }
  80. /*
  81. * set the register value of WM codec and remember it
  82. */
  83. static void wm_put_nocache(struct snd_ice1712 *ice, int reg, unsigned short val)
  84. {
  85. unsigned short cval;
  86. cval = (reg << 9) | val;
  87. snd_vt1724_write_i2c(ice, WM_DEV, cval >> 8, cval & 0xff);
  88. }
  89. static void wm_put(struct snd_ice1712 *ice, int reg, unsigned short val)
  90. {
  91. wm_put_nocache(ice, reg, val);
  92. reg <<= 1;
  93. ice->akm[0].images[reg] = val >> 8;
  94. ice->akm[0].images[reg + 1] = val;
  95. }
  96. /*
  97. * DAC volume attenuation mixer control (-64dB to 0dB)
  98. */
  99. #define DAC_0dB 0xff
  100. #define DAC_RES 128
  101. #define DAC_MIN (DAC_0dB - DAC_RES)
  102. static int wm_dac_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  103. {
  104. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  105. uinfo->count = 2;
  106. uinfo->value.integer.min = 0; /* mute */
  107. uinfo->value.integer.max = DAC_RES; /* 0dB, 0.5dB step */
  108. return 0;
  109. }
  110. static int wm_dac_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  111. {
  112. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  113. unsigned short val;
  114. int i;
  115. mutex_lock(&ice->gpio_mutex);
  116. for (i = 0; i < 2; i++) {
  117. val = wm_get(ice, WM_DAC_ATTEN_L + i) & 0xff;
  118. val = val > DAC_MIN ? (val - DAC_MIN) : 0;
  119. ucontrol->value.integer.value[i] = val;
  120. }
  121. mutex_unlock(&ice->gpio_mutex);
  122. return 0;
  123. }
  124. static int wm_dac_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  125. {
  126. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  127. unsigned short oval, nval;
  128. int i, idx, change = 0;
  129. mutex_lock(&ice->gpio_mutex);
  130. for (i = 0; i < 2; i++) {
  131. nval = ucontrol->value.integer.value[i];
  132. nval = (nval ? (nval + DAC_MIN) : 0) & 0xff;
  133. idx = WM_DAC_ATTEN_L + i;
  134. oval = wm_get(ice, idx) & 0xff;
  135. if (oval != nval) {
  136. wm_put(ice, idx, nval);
  137. wm_put_nocache(ice, idx, nval | 0x100);
  138. change = 1;
  139. }
  140. }
  141. mutex_unlock(&ice->gpio_mutex);
  142. return change;
  143. }
  144. /*
  145. * ADC gain mixer control (-64dB to 0dB)
  146. */
  147. #define ADC_0dB 0xcf
  148. #define ADC_RES 128
  149. #define ADC_MIN (ADC_0dB - ADC_RES)
  150. static int wm_adc_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  151. {
  152. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  153. uinfo->count = 2;
  154. uinfo->value.integer.min = 0; /* mute (-64dB) */
  155. uinfo->value.integer.max = ADC_RES; /* 0dB, 0.5dB step */
  156. return 0;
  157. }
  158. static int wm_adc_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  159. {
  160. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  161. unsigned short val;
  162. int i;
  163. mutex_lock(&ice->gpio_mutex);
  164. for (i = 0; i < 2; i++) {
  165. val = wm_get(ice, WM_ADC_ATTEN_L + i) & 0xff;
  166. val = val > ADC_MIN ? (val - ADC_MIN) : 0;
  167. ucontrol->value.integer.value[i] = val;
  168. }
  169. mutex_unlock(&ice->gpio_mutex);
  170. return 0;
  171. }
  172. static int wm_adc_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  173. {
  174. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  175. unsigned short ovol, nvol;
  176. int i, idx, change = 0;
  177. mutex_lock(&ice->gpio_mutex);
  178. for (i = 0; i < 2; i++) {
  179. nvol = ucontrol->value.integer.value[i];
  180. nvol = nvol ? (nvol + ADC_MIN) : 0;
  181. idx = WM_ADC_ATTEN_L + i;
  182. ovol = wm_get(ice, idx) & 0xff;
  183. if (ovol != nvol) {
  184. wm_put(ice, idx, nvol);
  185. change = 1;
  186. }
  187. }
  188. mutex_unlock(&ice->gpio_mutex);
  189. return change;
  190. }
  191. /*
  192. * ADC input mux mixer control
  193. */
  194. #define wm_adc_mux_info snd_ctl_boolean_mono_info
  195. static int wm_adc_mux_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  196. {
  197. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  198. int bit = kcontrol->private_value;
  199. mutex_lock(&ice->gpio_mutex);
  200. ucontrol->value.integer.value[0] = (wm_get(ice, WM_ADC_MUX) & (1 << bit)) ? 1 : 0;
  201. mutex_unlock(&ice->gpio_mutex);
  202. return 0;
  203. }
  204. static int wm_adc_mux_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  205. {
  206. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  207. int bit = kcontrol->private_value;
  208. unsigned short oval, nval;
  209. int change;
  210. mutex_lock(&ice->gpio_mutex);
  211. nval = oval = wm_get(ice, WM_ADC_MUX);
  212. if (ucontrol->value.integer.value[0])
  213. nval |= (1 << bit);
  214. else
  215. nval &= ~(1 << bit);
  216. change = nval != oval;
  217. if (change) {
  218. wm_put(ice, WM_ADC_MUX, nval);
  219. }
  220. mutex_unlock(&ice->gpio_mutex);
  221. return change;
  222. }
  223. /*
  224. * Analog bypass (In -> Out)
  225. */
  226. #define wm_bypass_info snd_ctl_boolean_mono_info
  227. static int wm_bypass_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  228. {
  229. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  230. mutex_lock(&ice->gpio_mutex);
  231. ucontrol->value.integer.value[0] = (wm_get(ice, WM_OUT_MUX) & 0x04) ? 1 : 0;
  232. mutex_unlock(&ice->gpio_mutex);
  233. return 0;
  234. }
  235. static int wm_bypass_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  236. {
  237. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  238. unsigned short val, oval;
  239. int change = 0;
  240. mutex_lock(&ice->gpio_mutex);
  241. val = oval = wm_get(ice, WM_OUT_MUX);
  242. if (ucontrol->value.integer.value[0])
  243. val |= 0x04;
  244. else
  245. val &= ~0x04;
  246. if (val != oval) {
  247. wm_put(ice, WM_OUT_MUX, val);
  248. change = 1;
  249. }
  250. mutex_unlock(&ice->gpio_mutex);
  251. return change;
  252. }
  253. /*
  254. * Left/Right swap
  255. */
  256. #define wm_chswap_info snd_ctl_boolean_mono_info
  257. static int wm_chswap_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  258. {
  259. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  260. mutex_lock(&ice->gpio_mutex);
  261. ucontrol->value.integer.value[0] = (wm_get(ice, WM_DAC_CTRL1) & 0xf0) != 0x90;
  262. mutex_unlock(&ice->gpio_mutex);
  263. return 0;
  264. }
  265. static int wm_chswap_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  266. {
  267. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  268. unsigned short val, oval;
  269. int change = 0;
  270. mutex_lock(&ice->gpio_mutex);
  271. oval = wm_get(ice, WM_DAC_CTRL1);
  272. val = oval & 0x0f;
  273. if (ucontrol->value.integer.value[0])
  274. val |= 0x60;
  275. else
  276. val |= 0x90;
  277. if (val != oval) {
  278. wm_put(ice, WM_DAC_CTRL1, val);
  279. wm_put_nocache(ice, WM_DAC_CTRL1, val);
  280. change = 1;
  281. }
  282. mutex_unlock(&ice->gpio_mutex);
  283. return change;
  284. }
  285. /*
  286. * write data in the SPI mode
  287. */
  288. static void set_gpio_bit(struct snd_ice1712 *ice, unsigned int bit, int val)
  289. {
  290. unsigned int tmp = snd_ice1712_gpio_read(ice);
  291. if (val)
  292. tmp |= bit;
  293. else
  294. tmp &= ~bit;
  295. snd_ice1712_gpio_write(ice, tmp);
  296. }
  297. static void spi_send_byte(struct snd_ice1712 *ice, unsigned char data)
  298. {
  299. int i;
  300. for (i = 0; i < 8; i++) {
  301. set_gpio_bit(ice, PONTIS_CS_CLK, 0);
  302. udelay(1);
  303. set_gpio_bit(ice, PONTIS_CS_WDATA, data & 0x80);
  304. udelay(1);
  305. set_gpio_bit(ice, PONTIS_CS_CLK, 1);
  306. udelay(1);
  307. data <<= 1;
  308. }
  309. }
  310. static unsigned int spi_read_byte(struct snd_ice1712 *ice)
  311. {
  312. int i;
  313. unsigned int val = 0;
  314. for (i = 0; i < 8; i++) {
  315. val <<= 1;
  316. set_gpio_bit(ice, PONTIS_CS_CLK, 0);
  317. udelay(1);
  318. if (snd_ice1712_gpio_read(ice) & PONTIS_CS_RDATA)
  319. val |= 1;
  320. udelay(1);
  321. set_gpio_bit(ice, PONTIS_CS_CLK, 1);
  322. udelay(1);
  323. }
  324. return val;
  325. }
  326. static void spi_write(struct snd_ice1712 *ice, unsigned int dev, unsigned int reg, unsigned int data)
  327. {
  328. snd_ice1712_gpio_set_dir(ice, PONTIS_CS_CS|PONTIS_CS_WDATA|PONTIS_CS_CLK);
  329. snd_ice1712_gpio_set_mask(ice, ~(PONTIS_CS_CS|PONTIS_CS_WDATA|PONTIS_CS_CLK));
  330. set_gpio_bit(ice, PONTIS_CS_CS, 0);
  331. spi_send_byte(ice, dev & ~1); /* WRITE */
  332. spi_send_byte(ice, reg); /* MAP */
  333. spi_send_byte(ice, data); /* DATA */
  334. /* trigger */
  335. set_gpio_bit(ice, PONTIS_CS_CS, 1);
  336. udelay(1);
  337. /* restore */
  338. snd_ice1712_gpio_set_mask(ice, ice->gpio.write_mask);
  339. snd_ice1712_gpio_set_dir(ice, ice->gpio.direction);
  340. }
  341. static unsigned int spi_read(struct snd_ice1712 *ice, unsigned int dev, unsigned int reg)
  342. {
  343. unsigned int val;
  344. snd_ice1712_gpio_set_dir(ice, PONTIS_CS_CS|PONTIS_CS_WDATA|PONTIS_CS_CLK);
  345. snd_ice1712_gpio_set_mask(ice, ~(PONTIS_CS_CS|PONTIS_CS_WDATA|PONTIS_CS_CLK));
  346. set_gpio_bit(ice, PONTIS_CS_CS, 0);
  347. spi_send_byte(ice, dev & ~1); /* WRITE */
  348. spi_send_byte(ice, reg); /* MAP */
  349. /* trigger */
  350. set_gpio_bit(ice, PONTIS_CS_CS, 1);
  351. udelay(1);
  352. set_gpio_bit(ice, PONTIS_CS_CS, 0);
  353. spi_send_byte(ice, dev | 1); /* READ */
  354. val = spi_read_byte(ice);
  355. /* trigger */
  356. set_gpio_bit(ice, PONTIS_CS_CS, 1);
  357. udelay(1);
  358. /* restore */
  359. snd_ice1712_gpio_set_mask(ice, ice->gpio.write_mask);
  360. snd_ice1712_gpio_set_dir(ice, ice->gpio.direction);
  361. return val;
  362. }
  363. /*
  364. * SPDIF input source
  365. */
  366. static int cs_source_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  367. {
  368. static const char * const texts[] = {
  369. "Coax", /* RXP0 */
  370. "Optical", /* RXP1 */
  371. "CD", /* RXP2 */
  372. };
  373. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  374. uinfo->count = 1;
  375. uinfo->value.enumerated.items = 3;
  376. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  377. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  378. strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
  379. return 0;
  380. }
  381. static int cs_source_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  382. {
  383. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  384. mutex_lock(&ice->gpio_mutex);
  385. ucontrol->value.enumerated.item[0] = ice->gpio.saved[0];
  386. mutex_unlock(&ice->gpio_mutex);
  387. return 0;
  388. }
  389. static int cs_source_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  390. {
  391. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  392. unsigned char val;
  393. int change = 0;
  394. mutex_lock(&ice->gpio_mutex);
  395. if (ucontrol->value.enumerated.item[0] != ice->gpio.saved[0]) {
  396. ice->gpio.saved[0] = ucontrol->value.enumerated.item[0] & 3;
  397. val = 0x80 | (ice->gpio.saved[0] << 3);
  398. spi_write(ice, CS_DEV, 0x04, val);
  399. change = 1;
  400. }
  401. mutex_unlock(&ice->gpio_mutex);
  402. return change;
  403. }
  404. /*
  405. * GPIO controls
  406. */
  407. static int pontis_gpio_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  408. {
  409. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  410. uinfo->count = 1;
  411. uinfo->value.integer.min = 0;
  412. uinfo->value.integer.max = 0xffff; /* 16bit */
  413. return 0;
  414. }
  415. static int pontis_gpio_mask_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  416. {
  417. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  418. mutex_lock(&ice->gpio_mutex);
  419. /* 4-7 reserved */
  420. ucontrol->value.integer.value[0] = (~ice->gpio.write_mask & 0xffff) | 0x00f0;
  421. mutex_unlock(&ice->gpio_mutex);
  422. return 0;
  423. }
  424. static int pontis_gpio_mask_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  425. {
  426. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  427. unsigned int val;
  428. int changed;
  429. mutex_lock(&ice->gpio_mutex);
  430. /* 4-7 reserved */
  431. val = (~ucontrol->value.integer.value[0] & 0xffff) | 0x00f0;
  432. changed = val != ice->gpio.write_mask;
  433. ice->gpio.write_mask = val;
  434. mutex_unlock(&ice->gpio_mutex);
  435. return changed;
  436. }
  437. static int pontis_gpio_dir_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  438. {
  439. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  440. mutex_lock(&ice->gpio_mutex);
  441. /* 4-7 reserved */
  442. ucontrol->value.integer.value[0] = ice->gpio.direction & 0xff0f;
  443. mutex_unlock(&ice->gpio_mutex);
  444. return 0;
  445. }
  446. static int pontis_gpio_dir_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  447. {
  448. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  449. unsigned int val;
  450. int changed;
  451. mutex_lock(&ice->gpio_mutex);
  452. /* 4-7 reserved */
  453. val = ucontrol->value.integer.value[0] & 0xff0f;
  454. changed = (val != ice->gpio.direction);
  455. ice->gpio.direction = val;
  456. mutex_unlock(&ice->gpio_mutex);
  457. return changed;
  458. }
  459. static int pontis_gpio_data_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  460. {
  461. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  462. mutex_lock(&ice->gpio_mutex);
  463. snd_ice1712_gpio_set_dir(ice, ice->gpio.direction);
  464. snd_ice1712_gpio_set_mask(ice, ice->gpio.write_mask);
  465. ucontrol->value.integer.value[0] = snd_ice1712_gpio_read(ice) & 0xffff;
  466. mutex_unlock(&ice->gpio_mutex);
  467. return 0;
  468. }
  469. static int pontis_gpio_data_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  470. {
  471. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  472. unsigned int val, nval;
  473. int changed = 0;
  474. mutex_lock(&ice->gpio_mutex);
  475. snd_ice1712_gpio_set_dir(ice, ice->gpio.direction);
  476. snd_ice1712_gpio_set_mask(ice, ice->gpio.write_mask);
  477. val = snd_ice1712_gpio_read(ice) & 0xffff;
  478. nval = ucontrol->value.integer.value[0] & 0xffff;
  479. if (val != nval) {
  480. snd_ice1712_gpio_write(ice, nval);
  481. changed = 1;
  482. }
  483. mutex_unlock(&ice->gpio_mutex);
  484. return changed;
  485. }
  486. static const DECLARE_TLV_DB_SCALE(db_scale_volume, -6400, 50, 1);
  487. /*
  488. * mixers
  489. */
  490. static struct snd_kcontrol_new pontis_controls[] __devinitdata = {
  491. {
  492. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  493. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  494. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  495. .name = "PCM Playback Volume",
  496. .info = wm_dac_vol_info,
  497. .get = wm_dac_vol_get,
  498. .put = wm_dac_vol_put,
  499. .tlv = { .p = db_scale_volume },
  500. },
  501. {
  502. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  503. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  504. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  505. .name = "Capture Volume",
  506. .info = wm_adc_vol_info,
  507. .get = wm_adc_vol_get,
  508. .put = wm_adc_vol_put,
  509. .tlv = { .p = db_scale_volume },
  510. },
  511. {
  512. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  513. .name = "CD Capture Switch",
  514. .info = wm_adc_mux_info,
  515. .get = wm_adc_mux_get,
  516. .put = wm_adc_mux_put,
  517. .private_value = 0,
  518. },
  519. {
  520. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  521. .name = "Line Capture Switch",
  522. .info = wm_adc_mux_info,
  523. .get = wm_adc_mux_get,
  524. .put = wm_adc_mux_put,
  525. .private_value = 1,
  526. },
  527. {
  528. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  529. .name = "Analog Bypass Switch",
  530. .info = wm_bypass_info,
  531. .get = wm_bypass_get,
  532. .put = wm_bypass_put,
  533. },
  534. {
  535. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  536. .name = "Swap Output Channels",
  537. .info = wm_chswap_info,
  538. .get = wm_chswap_get,
  539. .put = wm_chswap_put,
  540. },
  541. {
  542. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  543. .name = "IEC958 Input Source",
  544. .info = cs_source_info,
  545. .get = cs_source_get,
  546. .put = cs_source_put,
  547. },
  548. /* FIXME: which interface? */
  549. {
  550. .iface = SNDRV_CTL_ELEM_IFACE_CARD,
  551. .name = "GPIO Mask",
  552. .info = pontis_gpio_mask_info,
  553. .get = pontis_gpio_mask_get,
  554. .put = pontis_gpio_mask_put,
  555. },
  556. {
  557. .iface = SNDRV_CTL_ELEM_IFACE_CARD,
  558. .name = "GPIO Direction",
  559. .info = pontis_gpio_mask_info,
  560. .get = pontis_gpio_dir_get,
  561. .put = pontis_gpio_dir_put,
  562. },
  563. {
  564. .iface = SNDRV_CTL_ELEM_IFACE_CARD,
  565. .name = "GPIO Data",
  566. .info = pontis_gpio_mask_info,
  567. .get = pontis_gpio_data_get,
  568. .put = pontis_gpio_data_put,
  569. },
  570. };
  571. /*
  572. * WM codec registers
  573. */
  574. static void wm_proc_regs_write(struct snd_info_entry *entry, struct snd_info_buffer *buffer)
  575. {
  576. struct snd_ice1712 *ice = entry->private_data;
  577. char line[64];
  578. unsigned int reg, val;
  579. mutex_lock(&ice->gpio_mutex);
  580. while (!snd_info_get_line(buffer, line, sizeof(line))) {
  581. if (sscanf(line, "%x %x", &reg, &val) != 2)
  582. continue;
  583. if (reg <= 0x17 && val <= 0xffff)
  584. wm_put(ice, reg, val);
  585. }
  586. mutex_unlock(&ice->gpio_mutex);
  587. }
  588. static void wm_proc_regs_read(struct snd_info_entry *entry, struct snd_info_buffer *buffer)
  589. {
  590. struct snd_ice1712 *ice = entry->private_data;
  591. int reg, val;
  592. mutex_lock(&ice->gpio_mutex);
  593. for (reg = 0; reg <= 0x17; reg++) {
  594. val = wm_get(ice, reg);
  595. snd_iprintf(buffer, "%02x = %04x\n", reg, val);
  596. }
  597. mutex_unlock(&ice->gpio_mutex);
  598. }
  599. static void wm_proc_init(struct snd_ice1712 *ice)
  600. {
  601. struct snd_info_entry *entry;
  602. if (! snd_card_proc_new(ice->card, "wm_codec", &entry)) {
  603. snd_info_set_text_ops(entry, ice, wm_proc_regs_read);
  604. entry->mode |= S_IWUSR;
  605. entry->c.text.write = wm_proc_regs_write;
  606. }
  607. }
  608. static void cs_proc_regs_read(struct snd_info_entry *entry, struct snd_info_buffer *buffer)
  609. {
  610. struct snd_ice1712 *ice = entry->private_data;
  611. int reg, val;
  612. mutex_lock(&ice->gpio_mutex);
  613. for (reg = 0; reg <= 0x26; reg++) {
  614. val = spi_read(ice, CS_DEV, reg);
  615. snd_iprintf(buffer, "%02x = %02x\n", reg, val);
  616. }
  617. val = spi_read(ice, CS_DEV, 0x7f);
  618. snd_iprintf(buffer, "%02x = %02x\n", 0x7f, val);
  619. mutex_unlock(&ice->gpio_mutex);
  620. }
  621. static void cs_proc_init(struct snd_ice1712 *ice)
  622. {
  623. struct snd_info_entry *entry;
  624. if (! snd_card_proc_new(ice->card, "cs_codec", &entry))
  625. snd_info_set_text_ops(entry, ice, cs_proc_regs_read);
  626. }
  627. static int __devinit pontis_add_controls(struct snd_ice1712 *ice)
  628. {
  629. unsigned int i;
  630. int err;
  631. for (i = 0; i < ARRAY_SIZE(pontis_controls); i++) {
  632. err = snd_ctl_add(ice->card, snd_ctl_new1(&pontis_controls[i], ice));
  633. if (err < 0)
  634. return err;
  635. }
  636. wm_proc_init(ice);
  637. cs_proc_init(ice);
  638. return 0;
  639. }
  640. /*
  641. * initialize the chip
  642. */
  643. static int __devinit pontis_init(struct snd_ice1712 *ice)
  644. {
  645. static const unsigned short wm_inits[] = {
  646. /* These come first to reduce init pop noise */
  647. WM_ADC_MUX, 0x00c0, /* ADC mute */
  648. WM_DAC_MUTE, 0x0001, /* DAC softmute */
  649. WM_DAC_CTRL1, 0x0000, /* DAC mute */
  650. WM_POWERDOWN, 0x0008, /* All power-up except HP */
  651. WM_RESET, 0x0000, /* reset */
  652. };
  653. static const unsigned short wm_inits2[] = {
  654. WM_MASTER_CTRL, 0x0022, /* 256fs, slave mode */
  655. WM_DAC_INT, 0x0022, /* I2S, normal polarity, 24bit */
  656. WM_ADC_INT, 0x0022, /* I2S, normal polarity, 24bit */
  657. WM_DAC_CTRL1, 0x0090, /* DAC L/R */
  658. WM_OUT_MUX, 0x0001, /* OUT DAC */
  659. WM_HP_ATTEN_L, 0x0179, /* HP 0dB */
  660. WM_HP_ATTEN_R, 0x0179, /* HP 0dB */
  661. WM_DAC_ATTEN_L, 0x0000, /* DAC 0dB */
  662. WM_DAC_ATTEN_L, 0x0100, /* DAC 0dB */
  663. WM_DAC_ATTEN_R, 0x0000, /* DAC 0dB */
  664. WM_DAC_ATTEN_R, 0x0100, /* DAC 0dB */
  665. /* WM_DAC_MASTER, 0x0100, */ /* DAC master muted */
  666. WM_PHASE_SWAP, 0x0000, /* phase normal */
  667. WM_DAC_CTRL2, 0x0000, /* no deemphasis, no ZFLG */
  668. WM_ADC_ATTEN_L, 0x0000, /* ADC muted */
  669. WM_ADC_ATTEN_R, 0x0000, /* ADC muted */
  670. #if 0
  671. WM_ALC_CTRL1, 0x007b, /* */
  672. WM_ALC_CTRL2, 0x0000, /* */
  673. WM_ALC_CTRL3, 0x0000, /* */
  674. WM_NOISE_GATE, 0x0000, /* */
  675. #endif
  676. WM_DAC_MUTE, 0x0000, /* DAC unmute */
  677. WM_ADC_MUX, 0x0003, /* ADC unmute, both CD/Line On */
  678. };
  679. static const unsigned char cs_inits[] = {
  680. 0x04, 0x80, /* RUN, RXP0 */
  681. 0x05, 0x05, /* slave, 24bit */
  682. 0x01, 0x00,
  683. 0x02, 0x00,
  684. 0x03, 0x00,
  685. };
  686. unsigned int i;
  687. ice->vt1720 = 1;
  688. ice->num_total_dacs = 2;
  689. ice->num_total_adcs = 2;
  690. /* to remember the register values */
  691. ice->akm = kzalloc(sizeof(struct snd_akm4xxx), GFP_KERNEL);
  692. if (! ice->akm)
  693. return -ENOMEM;
  694. ice->akm_codecs = 1;
  695. /* HACK - use this as the SPDIF source.
  696. * don't call snd_ice1712_gpio_get/put(), otherwise it's overwritten
  697. */
  698. ice->gpio.saved[0] = 0;
  699. /* initialize WM8776 codec */
  700. for (i = 0; i < ARRAY_SIZE(wm_inits); i += 2)
  701. wm_put(ice, wm_inits[i], wm_inits[i+1]);
  702. schedule_timeout_uninterruptible(1);
  703. for (i = 0; i < ARRAY_SIZE(wm_inits2); i += 2)
  704. wm_put(ice, wm_inits2[i], wm_inits2[i+1]);
  705. /* initialize CS8416 codec */
  706. /* assert PRST#; MT05 bit 7 */
  707. outb(inb(ICEMT1724(ice, AC97_CMD)) | 0x80, ICEMT1724(ice, AC97_CMD));
  708. mdelay(5);
  709. /* deassert PRST# */
  710. outb(inb(ICEMT1724(ice, AC97_CMD)) & ~0x80, ICEMT1724(ice, AC97_CMD));
  711. for (i = 0; i < ARRAY_SIZE(cs_inits); i += 2)
  712. spi_write(ice, CS_DEV, cs_inits[i], cs_inits[i+1]);
  713. return 0;
  714. }
  715. /*
  716. * Pontis boards don't provide the EEPROM data at all.
  717. * hence the driver needs to sets up it properly.
  718. */
  719. static unsigned char pontis_eeprom[] __devinitdata = {
  720. [ICE_EEP2_SYSCONF] = 0x08, /* clock 256, mpu401, spdif-in/ADC, 1DAC */
  721. [ICE_EEP2_ACLINK] = 0x80, /* I2S */
  722. [ICE_EEP2_I2S] = 0xf8, /* vol, 96k, 24bit, 192k */
  723. [ICE_EEP2_SPDIF] = 0xc3, /* out-en, out-int, spdif-in */
  724. [ICE_EEP2_GPIO_DIR] = 0x07,
  725. [ICE_EEP2_GPIO_DIR1] = 0x00,
  726. [ICE_EEP2_GPIO_DIR2] = 0x00, /* ignored */
  727. [ICE_EEP2_GPIO_MASK] = 0x0f, /* 4-7 reserved for CS8416 */
  728. [ICE_EEP2_GPIO_MASK1] = 0xff,
  729. [ICE_EEP2_GPIO_MASK2] = 0x00, /* ignored */
  730. [ICE_EEP2_GPIO_STATE] = 0x06, /* 0-low, 1-high, 2-high */
  731. [ICE_EEP2_GPIO_STATE1] = 0x00,
  732. [ICE_EEP2_GPIO_STATE2] = 0x00, /* ignored */
  733. };
  734. /* entry point */
  735. struct snd_ice1712_card_info snd_vt1720_pontis_cards[] __devinitdata = {
  736. {
  737. .subvendor = VT1720_SUBDEVICE_PONTIS_MS300,
  738. .name = "Pontis MS300",
  739. .model = "ms300",
  740. .chip_init = pontis_init,
  741. .build_controls = pontis_add_controls,
  742. .eeprom_size = sizeof(pontis_eeprom),
  743. .eeprom_data = pontis_eeprom,
  744. },
  745. { } /* terminator */
  746. };