socrates_nand.c 6.4 KB

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  1. /*
  2. * drivers/mtd/nand/socrates_nand.c
  3. *
  4. * Copyright © 2008 Ilya Yanok, Emcraft Systems
  5. *
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. *
  11. */
  12. #include <linux/slab.h>
  13. #include <linux/module.h>
  14. #include <linux/mtd/mtd.h>
  15. #include <linux/mtd/nand.h>
  16. #include <linux/mtd/partitions.h>
  17. #include <linux/of_platform.h>
  18. #include <linux/io.h>
  19. #define FPGA_NAND_CMD_MASK (0x7 << 28)
  20. #define FPGA_NAND_CMD_COMMAND (0x0 << 28)
  21. #define FPGA_NAND_CMD_ADDR (0x1 << 28)
  22. #define FPGA_NAND_CMD_READ (0x2 << 28)
  23. #define FPGA_NAND_CMD_WRITE (0x3 << 28)
  24. #define FPGA_NAND_BUSY (0x1 << 15)
  25. #define FPGA_NAND_ENABLE (0x1 << 31)
  26. #define FPGA_NAND_DATA_SHIFT 16
  27. struct socrates_nand_host {
  28. struct nand_chip nand_chip;
  29. struct mtd_info mtd;
  30. void __iomem *io_base;
  31. struct device *dev;
  32. };
  33. /**
  34. * socrates_nand_write_buf - write buffer to chip
  35. * @mtd: MTD device structure
  36. * @buf: data buffer
  37. * @len: number of bytes to write
  38. */
  39. static void socrates_nand_write_buf(struct mtd_info *mtd,
  40. const uint8_t *buf, int len)
  41. {
  42. int i;
  43. struct nand_chip *this = mtd->priv;
  44. struct socrates_nand_host *host = this->priv;
  45. for (i = 0; i < len; i++) {
  46. out_be32(host->io_base, FPGA_NAND_ENABLE |
  47. FPGA_NAND_CMD_WRITE |
  48. (buf[i] << FPGA_NAND_DATA_SHIFT));
  49. }
  50. }
  51. /**
  52. * socrates_nand_read_buf - read chip data into buffer
  53. * @mtd: MTD device structure
  54. * @buf: buffer to store date
  55. * @len: number of bytes to read
  56. */
  57. static void socrates_nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
  58. {
  59. int i;
  60. struct nand_chip *this = mtd->priv;
  61. struct socrates_nand_host *host = this->priv;
  62. uint32_t val;
  63. val = FPGA_NAND_ENABLE | FPGA_NAND_CMD_READ;
  64. out_be32(host->io_base, val);
  65. for (i = 0; i < len; i++) {
  66. buf[i] = (in_be32(host->io_base) >>
  67. FPGA_NAND_DATA_SHIFT) & 0xff;
  68. }
  69. }
  70. /**
  71. * socrates_nand_read_byte - read one byte from the chip
  72. * @mtd: MTD device structure
  73. */
  74. static uint8_t socrates_nand_read_byte(struct mtd_info *mtd)
  75. {
  76. uint8_t byte;
  77. socrates_nand_read_buf(mtd, &byte, sizeof(byte));
  78. return byte;
  79. }
  80. /**
  81. * socrates_nand_read_word - read one word from the chip
  82. * @mtd: MTD device structure
  83. */
  84. static uint16_t socrates_nand_read_word(struct mtd_info *mtd)
  85. {
  86. uint16_t word;
  87. socrates_nand_read_buf(mtd, (uint8_t *)&word, sizeof(word));
  88. return word;
  89. }
  90. /**
  91. * socrates_nand_verify_buf - Verify chip data against buffer
  92. * @mtd: MTD device structure
  93. * @buf: buffer containing the data to compare
  94. * @len: number of bytes to compare
  95. */
  96. static int socrates_nand_verify_buf(struct mtd_info *mtd, const u8 *buf,
  97. int len)
  98. {
  99. int i;
  100. for (i = 0; i < len; i++) {
  101. if (buf[i] != socrates_nand_read_byte(mtd))
  102. return -EFAULT;
  103. }
  104. return 0;
  105. }
  106. /*
  107. * Hardware specific access to control-lines
  108. */
  109. static void socrates_nand_cmd_ctrl(struct mtd_info *mtd, int cmd,
  110. unsigned int ctrl)
  111. {
  112. struct nand_chip *nand_chip = mtd->priv;
  113. struct socrates_nand_host *host = nand_chip->priv;
  114. uint32_t val;
  115. if (cmd == NAND_CMD_NONE)
  116. return;
  117. if (ctrl & NAND_CLE)
  118. val = FPGA_NAND_CMD_COMMAND;
  119. else
  120. val = FPGA_NAND_CMD_ADDR;
  121. if (ctrl & NAND_NCE)
  122. val |= FPGA_NAND_ENABLE;
  123. val |= (cmd & 0xff) << FPGA_NAND_DATA_SHIFT;
  124. out_be32(host->io_base, val);
  125. }
  126. /*
  127. * Read the Device Ready pin.
  128. */
  129. static int socrates_nand_device_ready(struct mtd_info *mtd)
  130. {
  131. struct nand_chip *nand_chip = mtd->priv;
  132. struct socrates_nand_host *host = nand_chip->priv;
  133. if (in_be32(host->io_base) & FPGA_NAND_BUSY)
  134. return 0; /* busy */
  135. return 1;
  136. }
  137. /*
  138. * Probe for the NAND device.
  139. */
  140. static int __devinit socrates_nand_probe(struct platform_device *ofdev)
  141. {
  142. struct socrates_nand_host *host;
  143. struct mtd_info *mtd;
  144. struct nand_chip *nand_chip;
  145. int res;
  146. struct mtd_part_parser_data ppdata;
  147. /* Allocate memory for the device structure (and zero it) */
  148. host = kzalloc(sizeof(struct socrates_nand_host), GFP_KERNEL);
  149. if (!host) {
  150. printk(KERN_ERR
  151. "socrates_nand: failed to allocate device structure.\n");
  152. return -ENOMEM;
  153. }
  154. host->io_base = of_iomap(ofdev->dev.of_node, 0);
  155. if (host->io_base == NULL) {
  156. printk(KERN_ERR "socrates_nand: ioremap failed\n");
  157. kfree(host);
  158. return -EIO;
  159. }
  160. mtd = &host->mtd;
  161. nand_chip = &host->nand_chip;
  162. host->dev = &ofdev->dev;
  163. nand_chip->priv = host; /* link the private data structures */
  164. mtd->priv = nand_chip;
  165. mtd->name = "socrates_nand";
  166. mtd->owner = THIS_MODULE;
  167. mtd->dev.parent = &ofdev->dev;
  168. ppdata.of_node = ofdev->dev.of_node;
  169. /*should never be accessed directly */
  170. nand_chip->IO_ADDR_R = (void *)0xdeadbeef;
  171. nand_chip->IO_ADDR_W = (void *)0xdeadbeef;
  172. nand_chip->cmd_ctrl = socrates_nand_cmd_ctrl;
  173. nand_chip->read_byte = socrates_nand_read_byte;
  174. nand_chip->read_word = socrates_nand_read_word;
  175. nand_chip->write_buf = socrates_nand_write_buf;
  176. nand_chip->read_buf = socrates_nand_read_buf;
  177. nand_chip->verify_buf = socrates_nand_verify_buf;
  178. nand_chip->dev_ready = socrates_nand_device_ready;
  179. nand_chip->ecc.mode = NAND_ECC_SOFT; /* enable ECC */
  180. /* TODO: I have no idea what real delay is. */
  181. nand_chip->chip_delay = 20; /* 20us command delay time */
  182. dev_set_drvdata(&ofdev->dev, host);
  183. /* first scan to find the device and get the page size */
  184. if (nand_scan_ident(mtd, 1, NULL)) {
  185. res = -ENXIO;
  186. goto out;
  187. }
  188. /* second phase scan */
  189. if (nand_scan_tail(mtd)) {
  190. res = -ENXIO;
  191. goto out;
  192. }
  193. res = mtd_device_parse_register(mtd, NULL, &ppdata, NULL, 0);
  194. if (!res)
  195. return res;
  196. nand_release(mtd);
  197. out:
  198. dev_set_drvdata(&ofdev->dev, NULL);
  199. iounmap(host->io_base);
  200. kfree(host);
  201. return res;
  202. }
  203. /*
  204. * Remove a NAND device.
  205. */
  206. static int __devexit socrates_nand_remove(struct platform_device *ofdev)
  207. {
  208. struct socrates_nand_host *host = dev_get_drvdata(&ofdev->dev);
  209. struct mtd_info *mtd = &host->mtd;
  210. nand_release(mtd);
  211. dev_set_drvdata(&ofdev->dev, NULL);
  212. iounmap(host->io_base);
  213. kfree(host);
  214. return 0;
  215. }
  216. static const struct of_device_id socrates_nand_match[] =
  217. {
  218. {
  219. .compatible = "abb,socrates-nand",
  220. },
  221. {},
  222. };
  223. MODULE_DEVICE_TABLE(of, socrates_nand_match);
  224. static struct platform_driver socrates_nand_driver = {
  225. .driver = {
  226. .name = "socrates_nand",
  227. .owner = THIS_MODULE,
  228. .of_match_table = socrates_nand_match,
  229. },
  230. .probe = socrates_nand_probe,
  231. .remove = __devexit_p(socrates_nand_remove),
  232. };
  233. module_platform_driver(socrates_nand_driver);
  234. MODULE_LICENSE("GPL");
  235. MODULE_AUTHOR("Ilya Yanok");
  236. MODULE_DESCRIPTION("NAND driver for Socrates board");