doc2001.c 24 KB

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  1. /*
  2. * Linux driver for Disk-On-Chip Millennium
  3. * (c) 1999 Machine Vision Holdings, Inc.
  4. * (c) 1999, 2000 David Woodhouse <dwmw2@infradead.org>
  5. */
  6. #include <linux/kernel.h>
  7. #include <linux/module.h>
  8. #include <asm/errno.h>
  9. #include <asm/io.h>
  10. #include <asm/uaccess.h>
  11. #include <linux/delay.h>
  12. #include <linux/slab.h>
  13. #include <linux/init.h>
  14. #include <linux/types.h>
  15. #include <linux/bitops.h>
  16. #include <linux/mtd/mtd.h>
  17. #include <linux/mtd/nand.h>
  18. #include <linux/mtd/doc2000.h>
  19. /* #define ECC_DEBUG */
  20. /* I have no idea why some DoC chips can not use memcop_form|to_io().
  21. * This may be due to the different revisions of the ASIC controller built-in or
  22. * simplily a QA/Bug issue. Who knows ?? If you have trouble, please uncomment
  23. * this:*/
  24. #undef USE_MEMCPY
  25. static int doc_read(struct mtd_info *mtd, loff_t from, size_t len,
  26. size_t *retlen, u_char *buf);
  27. static int doc_write(struct mtd_info *mtd, loff_t to, size_t len,
  28. size_t *retlen, const u_char *buf);
  29. static int doc_read_oob(struct mtd_info *mtd, loff_t ofs,
  30. struct mtd_oob_ops *ops);
  31. static int doc_write_oob(struct mtd_info *mtd, loff_t ofs,
  32. struct mtd_oob_ops *ops);
  33. static int doc_erase (struct mtd_info *mtd, struct erase_info *instr);
  34. static struct mtd_info *docmillist = NULL;
  35. /* Perform the required delay cycles by reading from the NOP register */
  36. static void DoC_Delay(void __iomem * docptr, unsigned short cycles)
  37. {
  38. volatile char dummy;
  39. int i;
  40. for (i = 0; i < cycles; i++)
  41. dummy = ReadDOC(docptr, NOP);
  42. }
  43. /* DOC_WaitReady: Wait for RDY line to be asserted by the flash chip */
  44. static int _DoC_WaitReady(void __iomem * docptr)
  45. {
  46. unsigned short c = 0xffff;
  47. pr_debug("_DoC_WaitReady called for out-of-line wait\n");
  48. /* Out-of-line routine to wait for chip response */
  49. while (!(ReadDOC(docptr, CDSNControl) & CDSN_CTRL_FR_B) && --c)
  50. ;
  51. if (c == 0)
  52. pr_debug("_DoC_WaitReady timed out.\n");
  53. return (c == 0);
  54. }
  55. static inline int DoC_WaitReady(void __iomem * docptr)
  56. {
  57. /* This is inline, to optimise the common case, where it's ready instantly */
  58. int ret = 0;
  59. /* 4 read form NOP register should be issued in prior to the read from CDSNControl
  60. see Software Requirement 11.4 item 2. */
  61. DoC_Delay(docptr, 4);
  62. if (!(ReadDOC(docptr, CDSNControl) & CDSN_CTRL_FR_B))
  63. /* Call the out-of-line routine to wait */
  64. ret = _DoC_WaitReady(docptr);
  65. /* issue 2 read from NOP register after reading from CDSNControl register
  66. see Software Requirement 11.4 item 2. */
  67. DoC_Delay(docptr, 2);
  68. return ret;
  69. }
  70. /* DoC_Command: Send a flash command to the flash chip through the CDSN IO register
  71. with the internal pipeline. Each of 4 delay cycles (read from the NOP register) is
  72. required after writing to CDSN Control register, see Software Requirement 11.4 item 3. */
  73. static void DoC_Command(void __iomem * docptr, unsigned char command,
  74. unsigned char xtraflags)
  75. {
  76. /* Assert the CLE (Command Latch Enable) line to the flash chip */
  77. WriteDOC(xtraflags | CDSN_CTRL_CLE | CDSN_CTRL_CE, docptr, CDSNControl);
  78. DoC_Delay(docptr, 4);
  79. /* Send the command */
  80. WriteDOC(command, docptr, Mil_CDSN_IO);
  81. WriteDOC(0x00, docptr, WritePipeTerm);
  82. /* Lower the CLE line */
  83. WriteDOC(xtraflags | CDSN_CTRL_CE, docptr, CDSNControl);
  84. DoC_Delay(docptr, 4);
  85. }
  86. /* DoC_Address: Set the current address for the flash chip through the CDSN IO register
  87. with the internal pipeline. Each of 4 delay cycles (read from the NOP register) is
  88. required after writing to CDSN Control register, see Software Requirement 11.4 item 3. */
  89. static inline void DoC_Address(void __iomem * docptr, int numbytes, unsigned long ofs,
  90. unsigned char xtraflags1, unsigned char xtraflags2)
  91. {
  92. /* Assert the ALE (Address Latch Enable) line to the flash chip */
  93. WriteDOC(xtraflags1 | CDSN_CTRL_ALE | CDSN_CTRL_CE, docptr, CDSNControl);
  94. DoC_Delay(docptr, 4);
  95. /* Send the address */
  96. switch (numbytes)
  97. {
  98. case 1:
  99. /* Send single byte, bits 0-7. */
  100. WriteDOC(ofs & 0xff, docptr, Mil_CDSN_IO);
  101. WriteDOC(0x00, docptr, WritePipeTerm);
  102. break;
  103. case 2:
  104. /* Send bits 9-16 followed by 17-23 */
  105. WriteDOC((ofs >> 9) & 0xff, docptr, Mil_CDSN_IO);
  106. WriteDOC((ofs >> 17) & 0xff, docptr, Mil_CDSN_IO);
  107. WriteDOC(0x00, docptr, WritePipeTerm);
  108. break;
  109. case 3:
  110. /* Send 0-7, 9-16, then 17-23 */
  111. WriteDOC(ofs & 0xff, docptr, Mil_CDSN_IO);
  112. WriteDOC((ofs >> 9) & 0xff, docptr, Mil_CDSN_IO);
  113. WriteDOC((ofs >> 17) & 0xff, docptr, Mil_CDSN_IO);
  114. WriteDOC(0x00, docptr, WritePipeTerm);
  115. break;
  116. default:
  117. return;
  118. }
  119. /* Lower the ALE line */
  120. WriteDOC(xtraflags1 | xtraflags2 | CDSN_CTRL_CE, docptr, CDSNControl);
  121. DoC_Delay(docptr, 4);
  122. }
  123. /* DoC_SelectChip: Select a given flash chip within the current floor */
  124. static int DoC_SelectChip(void __iomem * docptr, int chip)
  125. {
  126. /* Select the individual flash chip requested */
  127. WriteDOC(chip, docptr, CDSNDeviceSelect);
  128. DoC_Delay(docptr, 4);
  129. /* Wait for it to be ready */
  130. return DoC_WaitReady(docptr);
  131. }
  132. /* DoC_SelectFloor: Select a given floor (bank of flash chips) */
  133. static int DoC_SelectFloor(void __iomem * docptr, int floor)
  134. {
  135. /* Select the floor (bank) of chips required */
  136. WriteDOC(floor, docptr, FloorSelect);
  137. /* Wait for the chip to be ready */
  138. return DoC_WaitReady(docptr);
  139. }
  140. /* DoC_IdentChip: Identify a given NAND chip given {floor,chip} */
  141. static int DoC_IdentChip(struct DiskOnChip *doc, int floor, int chip)
  142. {
  143. int mfr, id, i, j;
  144. volatile char dummy;
  145. /* Page in the required floor/chip
  146. FIXME: is this supported by Millennium ?? */
  147. DoC_SelectFloor(doc->virtadr, floor);
  148. DoC_SelectChip(doc->virtadr, chip);
  149. /* Reset the chip, see Software Requirement 11.4 item 1. */
  150. DoC_Command(doc->virtadr, NAND_CMD_RESET, CDSN_CTRL_WP);
  151. DoC_WaitReady(doc->virtadr);
  152. /* Read the NAND chip ID: 1. Send ReadID command */
  153. DoC_Command(doc->virtadr, NAND_CMD_READID, CDSN_CTRL_WP);
  154. /* Read the NAND chip ID: 2. Send address byte zero */
  155. DoC_Address(doc->virtadr, 1, 0x00, CDSN_CTRL_WP, 0x00);
  156. /* Read the manufacturer and device id codes of the flash device through
  157. CDSN IO register see Software Requirement 11.4 item 5.*/
  158. dummy = ReadDOC(doc->virtadr, ReadPipeInit);
  159. DoC_Delay(doc->virtadr, 2);
  160. mfr = ReadDOC(doc->virtadr, Mil_CDSN_IO);
  161. DoC_Delay(doc->virtadr, 2);
  162. id = ReadDOC(doc->virtadr, Mil_CDSN_IO);
  163. dummy = ReadDOC(doc->virtadr, LastDataRead);
  164. /* No response - return failure */
  165. if (mfr == 0xff || mfr == 0)
  166. return 0;
  167. /* FIXME: to deal with multi-flash on multi-Millennium case more carefully */
  168. for (i = 0; nand_flash_ids[i].name != NULL; i++) {
  169. if ( id == nand_flash_ids[i].id) {
  170. /* Try to identify manufacturer */
  171. for (j = 0; nand_manuf_ids[j].id != 0x0; j++) {
  172. if (nand_manuf_ids[j].id == mfr)
  173. break;
  174. }
  175. printk(KERN_INFO "Flash chip found: Manufacturer ID: %2.2X, "
  176. "Chip ID: %2.2X (%s:%s)\n",
  177. mfr, id, nand_manuf_ids[j].name, nand_flash_ids[i].name);
  178. doc->mfr = mfr;
  179. doc->id = id;
  180. doc->chipshift = ffs((nand_flash_ids[i].chipsize << 20)) - 1;
  181. break;
  182. }
  183. }
  184. if (nand_flash_ids[i].name == NULL)
  185. return 0;
  186. else
  187. return 1;
  188. }
  189. /* DoC_ScanChips: Find all NAND chips present in a DiskOnChip, and identify them */
  190. static void DoC_ScanChips(struct DiskOnChip *this)
  191. {
  192. int floor, chip;
  193. int numchips[MAX_FLOORS_MIL];
  194. int ret;
  195. this->numchips = 0;
  196. this->mfr = 0;
  197. this->id = 0;
  198. /* For each floor, find the number of valid chips it contains */
  199. for (floor = 0,ret = 1; floor < MAX_FLOORS_MIL; floor++) {
  200. numchips[floor] = 0;
  201. for (chip = 0; chip < MAX_CHIPS_MIL && ret != 0; chip++) {
  202. ret = DoC_IdentChip(this, floor, chip);
  203. if (ret) {
  204. numchips[floor]++;
  205. this->numchips++;
  206. }
  207. }
  208. }
  209. /* If there are none at all that we recognise, bail */
  210. if (!this->numchips) {
  211. printk("No flash chips recognised.\n");
  212. return;
  213. }
  214. /* Allocate an array to hold the information for each chip */
  215. this->chips = kmalloc(sizeof(struct Nand) * this->numchips, GFP_KERNEL);
  216. if (!this->chips){
  217. printk("No memory for allocating chip info structures\n");
  218. return;
  219. }
  220. /* Fill out the chip array with {floor, chipno} for each
  221. * detected chip in the device. */
  222. for (floor = 0, ret = 0; floor < MAX_FLOORS_MIL; floor++) {
  223. for (chip = 0 ; chip < numchips[floor] ; chip++) {
  224. this->chips[ret].floor = floor;
  225. this->chips[ret].chip = chip;
  226. this->chips[ret].curadr = 0;
  227. this->chips[ret].curmode = 0x50;
  228. ret++;
  229. }
  230. }
  231. /* Calculate and print the total size of the device */
  232. this->totlen = this->numchips * (1 << this->chipshift);
  233. printk(KERN_INFO "%d flash chips found. Total DiskOnChip size: %ld MiB\n",
  234. this->numchips ,this->totlen >> 20);
  235. }
  236. static int DoCMil_is_alias(struct DiskOnChip *doc1, struct DiskOnChip *doc2)
  237. {
  238. int tmp1, tmp2, retval;
  239. if (doc1->physadr == doc2->physadr)
  240. return 1;
  241. /* Use the alias resolution register which was set aside for this
  242. * purpose. If it's value is the same on both chips, they might
  243. * be the same chip, and we write to one and check for a change in
  244. * the other. It's unclear if this register is usuable in the
  245. * DoC 2000 (it's in the Millenium docs), but it seems to work. */
  246. tmp1 = ReadDOC(doc1->virtadr, AliasResolution);
  247. tmp2 = ReadDOC(doc2->virtadr, AliasResolution);
  248. if (tmp1 != tmp2)
  249. return 0;
  250. WriteDOC((tmp1+1) % 0xff, doc1->virtadr, AliasResolution);
  251. tmp2 = ReadDOC(doc2->virtadr, AliasResolution);
  252. if (tmp2 == (tmp1+1) % 0xff)
  253. retval = 1;
  254. else
  255. retval = 0;
  256. /* Restore register contents. May not be necessary, but do it just to
  257. * be safe. */
  258. WriteDOC(tmp1, doc1->virtadr, AliasResolution);
  259. return retval;
  260. }
  261. /* This routine is found from the docprobe code by symbol_get(),
  262. * which will bump the use count of this module. */
  263. void DoCMil_init(struct mtd_info *mtd)
  264. {
  265. struct DiskOnChip *this = mtd->priv;
  266. struct DiskOnChip *old = NULL;
  267. /* We must avoid being called twice for the same device. */
  268. if (docmillist)
  269. old = docmillist->priv;
  270. while (old) {
  271. if (DoCMil_is_alias(this, old)) {
  272. printk(KERN_NOTICE "Ignoring DiskOnChip Millennium at "
  273. "0x%lX - already configured\n", this->physadr);
  274. iounmap(this->virtadr);
  275. kfree(mtd);
  276. return;
  277. }
  278. if (old->nextdoc)
  279. old = old->nextdoc->priv;
  280. else
  281. old = NULL;
  282. }
  283. mtd->name = "DiskOnChip Millennium";
  284. printk(KERN_NOTICE "DiskOnChip Millennium found at address 0x%lX\n",
  285. this->physadr);
  286. mtd->type = MTD_NANDFLASH;
  287. mtd->flags = MTD_CAP_NANDFLASH;
  288. /* FIXME: erase size is not always 8KiB */
  289. mtd->erasesize = 0x2000;
  290. mtd->writebufsize = mtd->writesize = 512;
  291. mtd->oobsize = 16;
  292. mtd->ecc_strength = 2;
  293. mtd->owner = THIS_MODULE;
  294. mtd->_erase = doc_erase;
  295. mtd->_read = doc_read;
  296. mtd->_write = doc_write;
  297. mtd->_read_oob = doc_read_oob;
  298. mtd->_write_oob = doc_write_oob;
  299. this->curfloor = -1;
  300. this->curchip = -1;
  301. /* Ident all the chips present. */
  302. DoC_ScanChips(this);
  303. if (!this->totlen) {
  304. kfree(mtd);
  305. iounmap(this->virtadr);
  306. } else {
  307. this->nextdoc = docmillist;
  308. docmillist = mtd;
  309. mtd->size = this->totlen;
  310. mtd_device_register(mtd, NULL, 0);
  311. return;
  312. }
  313. }
  314. EXPORT_SYMBOL_GPL(DoCMil_init);
  315. static int doc_read (struct mtd_info *mtd, loff_t from, size_t len,
  316. size_t *retlen, u_char *buf)
  317. {
  318. int i, ret;
  319. volatile char dummy;
  320. unsigned char syndrome[6], eccbuf[6];
  321. struct DiskOnChip *this = mtd->priv;
  322. void __iomem *docptr = this->virtadr;
  323. struct Nand *mychip = &this->chips[from >> (this->chipshift)];
  324. /* Don't allow a single read to cross a 512-byte block boundary */
  325. if (from + len > ((from | 0x1ff) + 1))
  326. len = ((from | 0x1ff) + 1) - from;
  327. /* Find the chip which is to be used and select it */
  328. if (this->curfloor != mychip->floor) {
  329. DoC_SelectFloor(docptr, mychip->floor);
  330. DoC_SelectChip(docptr, mychip->chip);
  331. } else if (this->curchip != mychip->chip) {
  332. DoC_SelectChip(docptr, mychip->chip);
  333. }
  334. this->curfloor = mychip->floor;
  335. this->curchip = mychip->chip;
  336. /* issue the Read0 or Read1 command depend on which half of the page
  337. we are accessing. Polling the Flash Ready bit after issue 3 bytes
  338. address in Sequence Read Mode, see Software Requirement 11.4 item 1.*/
  339. DoC_Command(docptr, (from >> 8) & 1, CDSN_CTRL_WP);
  340. DoC_Address(docptr, 3, from, CDSN_CTRL_WP, 0x00);
  341. DoC_WaitReady(docptr);
  342. /* init the ECC engine, see Reed-Solomon EDC/ECC 11.1 .*/
  343. WriteDOC (DOC_ECC_RESET, docptr, ECCConf);
  344. WriteDOC (DOC_ECC_EN, docptr, ECCConf);
  345. /* Read the data via the internal pipeline through CDSN IO register,
  346. see Pipelined Read Operations 11.3 */
  347. dummy = ReadDOC(docptr, ReadPipeInit);
  348. #ifndef USE_MEMCPY
  349. for (i = 0; i < len-1; i++) {
  350. /* N.B. you have to increase the source address in this way or the
  351. ECC logic will not work properly */
  352. buf[i] = ReadDOC(docptr, Mil_CDSN_IO + (i & 0xff));
  353. }
  354. #else
  355. memcpy_fromio(buf, docptr + DoC_Mil_CDSN_IO, len - 1);
  356. #endif
  357. buf[len - 1] = ReadDOC(docptr, LastDataRead);
  358. /* Let the caller know we completed it */
  359. *retlen = len;
  360. ret = 0;
  361. /* Read the ECC data from Spare Data Area,
  362. see Reed-Solomon EDC/ECC 11.1 */
  363. dummy = ReadDOC(docptr, ReadPipeInit);
  364. #ifndef USE_MEMCPY
  365. for (i = 0; i < 5; i++) {
  366. /* N.B. you have to increase the source address in this way or the
  367. ECC logic will not work properly */
  368. eccbuf[i] = ReadDOC(docptr, Mil_CDSN_IO + i);
  369. }
  370. #else
  371. memcpy_fromio(eccbuf, docptr + DoC_Mil_CDSN_IO, 5);
  372. #endif
  373. eccbuf[5] = ReadDOC(docptr, LastDataRead);
  374. /* Flush the pipeline */
  375. dummy = ReadDOC(docptr, ECCConf);
  376. dummy = ReadDOC(docptr, ECCConf);
  377. /* Check the ECC Status */
  378. if (ReadDOC(docptr, ECCConf) & 0x80) {
  379. int nb_errors;
  380. /* There was an ECC error */
  381. #ifdef ECC_DEBUG
  382. printk("DiskOnChip ECC Error: Read at %lx\n", (long)from);
  383. #endif
  384. /* Read the ECC syndrome through the DiskOnChip ECC logic.
  385. These syndrome will be all ZERO when there is no error */
  386. for (i = 0; i < 6; i++) {
  387. syndrome[i] = ReadDOC(docptr, ECCSyndrome0 + i);
  388. }
  389. nb_errors = doc_decode_ecc(buf, syndrome);
  390. #ifdef ECC_DEBUG
  391. printk("ECC Errors corrected: %x\n", nb_errors);
  392. #endif
  393. if (nb_errors < 0) {
  394. /* We return error, but have actually done the read. Not that
  395. this can be told to user-space, via sys_read(), but at least
  396. MTD-aware stuff can know about it by checking *retlen */
  397. ret = -EIO;
  398. }
  399. }
  400. #ifdef PSYCHO_DEBUG
  401. printk("ECC DATA at %lx: %2.2X %2.2X %2.2X %2.2X %2.2X %2.2X\n",
  402. (long)from, eccbuf[0], eccbuf[1], eccbuf[2], eccbuf[3],
  403. eccbuf[4], eccbuf[5]);
  404. #endif
  405. /* disable the ECC engine */
  406. WriteDOC(DOC_ECC_DIS, docptr , ECCConf);
  407. return ret;
  408. }
  409. static int doc_write (struct mtd_info *mtd, loff_t to, size_t len,
  410. size_t *retlen, const u_char *buf)
  411. {
  412. int i,ret = 0;
  413. char eccbuf[6];
  414. volatile char dummy;
  415. struct DiskOnChip *this = mtd->priv;
  416. void __iomem *docptr = this->virtadr;
  417. struct Nand *mychip = &this->chips[to >> (this->chipshift)];
  418. #if 0
  419. /* Don't allow a single write to cross a 512-byte block boundary */
  420. if (to + len > ( (to | 0x1ff) + 1))
  421. len = ((to | 0x1ff) + 1) - to;
  422. #else
  423. /* Don't allow writes which aren't exactly one block */
  424. if (to & 0x1ff || len != 0x200)
  425. return -EINVAL;
  426. #endif
  427. /* Find the chip which is to be used and select it */
  428. if (this->curfloor != mychip->floor) {
  429. DoC_SelectFloor(docptr, mychip->floor);
  430. DoC_SelectChip(docptr, mychip->chip);
  431. } else if (this->curchip != mychip->chip) {
  432. DoC_SelectChip(docptr, mychip->chip);
  433. }
  434. this->curfloor = mychip->floor;
  435. this->curchip = mychip->chip;
  436. /* Reset the chip, see Software Requirement 11.4 item 1. */
  437. DoC_Command(docptr, NAND_CMD_RESET, 0x00);
  438. DoC_WaitReady(docptr);
  439. /* Set device to main plane of flash */
  440. DoC_Command(docptr, NAND_CMD_READ0, 0x00);
  441. /* issue the Serial Data In command to initial the Page Program process */
  442. DoC_Command(docptr, NAND_CMD_SEQIN, 0x00);
  443. DoC_Address(docptr, 3, to, 0x00, 0x00);
  444. DoC_WaitReady(docptr);
  445. /* init the ECC engine, see Reed-Solomon EDC/ECC 11.1 .*/
  446. WriteDOC (DOC_ECC_RESET, docptr, ECCConf);
  447. WriteDOC (DOC_ECC_EN | DOC_ECC_RW, docptr, ECCConf);
  448. /* Write the data via the internal pipeline through CDSN IO register,
  449. see Pipelined Write Operations 11.2 */
  450. #ifndef USE_MEMCPY
  451. for (i = 0; i < len; i++) {
  452. /* N.B. you have to increase the source address in this way or the
  453. ECC logic will not work properly */
  454. WriteDOC(buf[i], docptr, Mil_CDSN_IO + i);
  455. }
  456. #else
  457. memcpy_toio(docptr + DoC_Mil_CDSN_IO, buf, len);
  458. #endif
  459. WriteDOC(0x00, docptr, WritePipeTerm);
  460. /* Write ECC data to flash, the ECC info is generated by the DiskOnChip ECC logic
  461. see Reed-Solomon EDC/ECC 11.1 */
  462. WriteDOC(0, docptr, NOP);
  463. WriteDOC(0, docptr, NOP);
  464. WriteDOC(0, docptr, NOP);
  465. /* Read the ECC data through the DiskOnChip ECC logic */
  466. for (i = 0; i < 6; i++) {
  467. eccbuf[i] = ReadDOC(docptr, ECCSyndrome0 + i);
  468. }
  469. /* ignore the ECC engine */
  470. WriteDOC(DOC_ECC_DIS, docptr , ECCConf);
  471. #ifndef USE_MEMCPY
  472. /* Write the ECC data to flash */
  473. for (i = 0; i < 6; i++) {
  474. /* N.B. you have to increase the source address in this way or the
  475. ECC logic will not work properly */
  476. WriteDOC(eccbuf[i], docptr, Mil_CDSN_IO + i);
  477. }
  478. #else
  479. memcpy_toio(docptr + DoC_Mil_CDSN_IO, eccbuf, 6);
  480. #endif
  481. /* write the block status BLOCK_USED (0x5555) at the end of ECC data
  482. FIXME: this is only a hack for programming the IPL area for LinuxBIOS
  483. and should be replace with proper codes in user space utilities */
  484. WriteDOC(0x55, docptr, Mil_CDSN_IO);
  485. WriteDOC(0x55, docptr, Mil_CDSN_IO + 1);
  486. WriteDOC(0x00, docptr, WritePipeTerm);
  487. #ifdef PSYCHO_DEBUG
  488. printk("OOB data at %lx is %2.2X %2.2X %2.2X %2.2X %2.2X %2.2X\n",
  489. (long) to, eccbuf[0], eccbuf[1], eccbuf[2], eccbuf[3],
  490. eccbuf[4], eccbuf[5]);
  491. #endif
  492. /* Commit the Page Program command and wait for ready
  493. see Software Requirement 11.4 item 1.*/
  494. DoC_Command(docptr, NAND_CMD_PAGEPROG, 0x00);
  495. DoC_WaitReady(docptr);
  496. /* Read the status of the flash device through CDSN IO register
  497. see Software Requirement 11.4 item 5.*/
  498. DoC_Command(docptr, NAND_CMD_STATUS, CDSN_CTRL_WP);
  499. dummy = ReadDOC(docptr, ReadPipeInit);
  500. DoC_Delay(docptr, 2);
  501. if (ReadDOC(docptr, Mil_CDSN_IO) & 1) {
  502. printk("Error programming flash\n");
  503. /* Error in programming
  504. FIXME: implement Bad Block Replacement (in nftl.c ??) */
  505. ret = -EIO;
  506. }
  507. dummy = ReadDOC(docptr, LastDataRead);
  508. /* Let the caller know we completed it */
  509. *retlen = len;
  510. return ret;
  511. }
  512. static int doc_read_oob(struct mtd_info *mtd, loff_t ofs,
  513. struct mtd_oob_ops *ops)
  514. {
  515. #ifndef USE_MEMCPY
  516. int i;
  517. #endif
  518. volatile char dummy;
  519. struct DiskOnChip *this = mtd->priv;
  520. void __iomem *docptr = this->virtadr;
  521. struct Nand *mychip = &this->chips[ofs >> this->chipshift];
  522. uint8_t *buf = ops->oobbuf;
  523. size_t len = ops->len;
  524. BUG_ON(ops->mode != MTD_OPS_PLACE_OOB);
  525. ofs += ops->ooboffs;
  526. /* Find the chip which is to be used and select it */
  527. if (this->curfloor != mychip->floor) {
  528. DoC_SelectFloor(docptr, mychip->floor);
  529. DoC_SelectChip(docptr, mychip->chip);
  530. } else if (this->curchip != mychip->chip) {
  531. DoC_SelectChip(docptr, mychip->chip);
  532. }
  533. this->curfloor = mychip->floor;
  534. this->curchip = mychip->chip;
  535. /* disable the ECC engine */
  536. WriteDOC (DOC_ECC_RESET, docptr, ECCConf);
  537. WriteDOC (DOC_ECC_DIS, docptr, ECCConf);
  538. /* issue the Read2 command to set the pointer to the Spare Data Area.
  539. Polling the Flash Ready bit after issue 3 bytes address in
  540. Sequence Read Mode, see Software Requirement 11.4 item 1.*/
  541. DoC_Command(docptr, NAND_CMD_READOOB, CDSN_CTRL_WP);
  542. DoC_Address(docptr, 3, ofs, CDSN_CTRL_WP, 0x00);
  543. DoC_WaitReady(docptr);
  544. /* Read the data out via the internal pipeline through CDSN IO register,
  545. see Pipelined Read Operations 11.3 */
  546. dummy = ReadDOC(docptr, ReadPipeInit);
  547. #ifndef USE_MEMCPY
  548. for (i = 0; i < len-1; i++) {
  549. /* N.B. you have to increase the source address in this way or the
  550. ECC logic will not work properly */
  551. buf[i] = ReadDOC(docptr, Mil_CDSN_IO + i);
  552. }
  553. #else
  554. memcpy_fromio(buf, docptr + DoC_Mil_CDSN_IO, len - 1);
  555. #endif
  556. buf[len - 1] = ReadDOC(docptr, LastDataRead);
  557. ops->retlen = len;
  558. return 0;
  559. }
  560. static int doc_write_oob(struct mtd_info *mtd, loff_t ofs,
  561. struct mtd_oob_ops *ops)
  562. {
  563. #ifndef USE_MEMCPY
  564. int i;
  565. #endif
  566. volatile char dummy;
  567. int ret = 0;
  568. struct DiskOnChip *this = mtd->priv;
  569. void __iomem *docptr = this->virtadr;
  570. struct Nand *mychip = &this->chips[ofs >> this->chipshift];
  571. uint8_t *buf = ops->oobbuf;
  572. size_t len = ops->len;
  573. BUG_ON(ops->mode != MTD_OPS_PLACE_OOB);
  574. ofs += ops->ooboffs;
  575. /* Find the chip which is to be used and select it */
  576. if (this->curfloor != mychip->floor) {
  577. DoC_SelectFloor(docptr, mychip->floor);
  578. DoC_SelectChip(docptr, mychip->chip);
  579. } else if (this->curchip != mychip->chip) {
  580. DoC_SelectChip(docptr, mychip->chip);
  581. }
  582. this->curfloor = mychip->floor;
  583. this->curchip = mychip->chip;
  584. /* disable the ECC engine */
  585. WriteDOC (DOC_ECC_RESET, docptr, ECCConf);
  586. WriteDOC (DOC_ECC_DIS, docptr, ECCConf);
  587. /* Reset the chip, see Software Requirement 11.4 item 1. */
  588. DoC_Command(docptr, NAND_CMD_RESET, CDSN_CTRL_WP);
  589. DoC_WaitReady(docptr);
  590. /* issue the Read2 command to set the pointer to the Spare Data Area. */
  591. DoC_Command(docptr, NAND_CMD_READOOB, CDSN_CTRL_WP);
  592. /* issue the Serial Data In command to initial the Page Program process */
  593. DoC_Command(docptr, NAND_CMD_SEQIN, 0x00);
  594. DoC_Address(docptr, 3, ofs, 0x00, 0x00);
  595. /* Write the data via the internal pipeline through CDSN IO register,
  596. see Pipelined Write Operations 11.2 */
  597. #ifndef USE_MEMCPY
  598. for (i = 0; i < len; i++) {
  599. /* N.B. you have to increase the source address in this way or the
  600. ECC logic will not work properly */
  601. WriteDOC(buf[i], docptr, Mil_CDSN_IO + i);
  602. }
  603. #else
  604. memcpy_toio(docptr + DoC_Mil_CDSN_IO, buf, len);
  605. #endif
  606. WriteDOC(0x00, docptr, WritePipeTerm);
  607. /* Commit the Page Program command and wait for ready
  608. see Software Requirement 11.4 item 1.*/
  609. DoC_Command(docptr, NAND_CMD_PAGEPROG, 0x00);
  610. DoC_WaitReady(docptr);
  611. /* Read the status of the flash device through CDSN IO register
  612. see Software Requirement 11.4 item 5.*/
  613. DoC_Command(docptr, NAND_CMD_STATUS, 0x00);
  614. dummy = ReadDOC(docptr, ReadPipeInit);
  615. DoC_Delay(docptr, 2);
  616. if (ReadDOC(docptr, Mil_CDSN_IO) & 1) {
  617. printk("Error programming oob data\n");
  618. /* FIXME: implement Bad Block Replacement (in nftl.c ??) */
  619. ops->retlen = 0;
  620. ret = -EIO;
  621. }
  622. dummy = ReadDOC(docptr, LastDataRead);
  623. ops->retlen = len;
  624. return ret;
  625. }
  626. int doc_erase (struct mtd_info *mtd, struct erase_info *instr)
  627. {
  628. volatile char dummy;
  629. struct DiskOnChip *this = mtd->priv;
  630. __u32 ofs = instr->addr;
  631. __u32 len = instr->len;
  632. void __iomem *docptr = this->virtadr;
  633. struct Nand *mychip = &this->chips[ofs >> this->chipshift];
  634. if (len != mtd->erasesize)
  635. printk(KERN_WARNING "Erase not right size (%x != %x)n",
  636. len, mtd->erasesize);
  637. /* Find the chip which is to be used and select it */
  638. if (this->curfloor != mychip->floor) {
  639. DoC_SelectFloor(docptr, mychip->floor);
  640. DoC_SelectChip(docptr, mychip->chip);
  641. } else if (this->curchip != mychip->chip) {
  642. DoC_SelectChip(docptr, mychip->chip);
  643. }
  644. this->curfloor = mychip->floor;
  645. this->curchip = mychip->chip;
  646. instr->state = MTD_ERASE_PENDING;
  647. /* issue the Erase Setup command */
  648. DoC_Command(docptr, NAND_CMD_ERASE1, 0x00);
  649. DoC_Address(docptr, 2, ofs, 0x00, 0x00);
  650. /* Commit the Erase Start command and wait for ready
  651. see Software Requirement 11.4 item 1.*/
  652. DoC_Command(docptr, NAND_CMD_ERASE2, 0x00);
  653. DoC_WaitReady(docptr);
  654. instr->state = MTD_ERASING;
  655. /* Read the status of the flash device through CDSN IO register
  656. see Software Requirement 11.4 item 5.
  657. FIXME: it seems that we are not wait long enough, some blocks are not
  658. erased fully */
  659. DoC_Command(docptr, NAND_CMD_STATUS, CDSN_CTRL_WP);
  660. dummy = ReadDOC(docptr, ReadPipeInit);
  661. DoC_Delay(docptr, 2);
  662. if (ReadDOC(docptr, Mil_CDSN_IO) & 1) {
  663. printk("Error Erasing at 0x%x\n", ofs);
  664. /* There was an error
  665. FIXME: implement Bad Block Replacement (in nftl.c ??) */
  666. instr->state = MTD_ERASE_FAILED;
  667. } else
  668. instr->state = MTD_ERASE_DONE;
  669. dummy = ReadDOC(docptr, LastDataRead);
  670. mtd_erase_callback(instr);
  671. return 0;
  672. }
  673. /****************************************************************************
  674. *
  675. * Module stuff
  676. *
  677. ****************************************************************************/
  678. static void __exit cleanup_doc2001(void)
  679. {
  680. struct mtd_info *mtd;
  681. struct DiskOnChip *this;
  682. while ((mtd=docmillist)) {
  683. this = mtd->priv;
  684. docmillist = this->nextdoc;
  685. mtd_device_unregister(mtd);
  686. iounmap(this->virtadr);
  687. kfree(this->chips);
  688. kfree(mtd);
  689. }
  690. }
  691. module_exit(cleanup_doc2001);
  692. MODULE_LICENSE("GPL");
  693. MODULE_AUTHOR("David Woodhouse <dwmw2@infradead.org> et al.");
  694. MODULE_DESCRIPTION("Alternative driver for DiskOnChip Millennium");