pci.c 12 KB

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  1. /*
  2. * PCI handling of I2O controller
  3. *
  4. * Copyright (C) 1999-2002 Red Hat Software
  5. *
  6. * Written by Alan Cox, Building Number Three Ltd
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of the GNU General Public License as published by the
  10. * Free Software Foundation; either version 2 of the License, or (at your
  11. * option) any later version.
  12. *
  13. * A lot of the I2O message side code from this is taken from the Red
  14. * Creek RCPCI45 adapter driver by Red Creek Communications
  15. *
  16. * Fixes/additions:
  17. * Philipp Rumpf
  18. * Juha Sievänen <Juha.Sievanen@cs.Helsinki.FI>
  19. * Auvo Häkkinen <Auvo.Hakkinen@cs.Helsinki.FI>
  20. * Deepak Saxena <deepak@plexity.net>
  21. * Boji T Kannanthanam <boji.t.kannanthanam@intel.com>
  22. * Alan Cox <alan@lxorguk.ukuu.org.uk>:
  23. * Ported to Linux 2.5.
  24. * Markus Lidel <Markus.Lidel@shadowconnect.com>:
  25. * Minor fixes for 2.6.
  26. * Markus Lidel <Markus.Lidel@shadowconnect.com>:
  27. * Support for sysfs included.
  28. */
  29. #include <linux/pci.h>
  30. #include <linux/interrupt.h>
  31. #include <linux/slab.h>
  32. #include <linux/i2o.h>
  33. #include <linux/module.h>
  34. #include "core.h"
  35. #define OSM_DESCRIPTION "I2O-subsystem"
  36. /* PCI device id table for all I2O controllers */
  37. static struct pci_device_id __devinitdata i2o_pci_ids[] = {
  38. {PCI_DEVICE_CLASS(PCI_CLASS_INTELLIGENT_I2O << 8, 0xffff00)},
  39. {PCI_DEVICE(PCI_VENDOR_ID_DPT, 0xa511)},
  40. {.vendor = PCI_VENDOR_ID_INTEL,.device = 0x1962,
  41. .subvendor = PCI_VENDOR_ID_PROMISE,.subdevice = PCI_ANY_ID},
  42. {0}
  43. };
  44. /**
  45. * i2o_pci_free - Frees the DMA memory for the I2O controller
  46. * @c: I2O controller to free
  47. *
  48. * Remove all allocated DMA memory and unmap memory IO regions. If MTRR
  49. * is enabled, also remove it again.
  50. */
  51. static void i2o_pci_free(struct i2o_controller *c)
  52. {
  53. struct device *dev;
  54. dev = &c->pdev->dev;
  55. i2o_dma_free(dev, &c->out_queue);
  56. i2o_dma_free(dev, &c->status_block);
  57. kfree(c->lct);
  58. i2o_dma_free(dev, &c->dlct);
  59. i2o_dma_free(dev, &c->hrt);
  60. i2o_dma_free(dev, &c->status);
  61. if (c->raptor && c->in_queue.virt)
  62. iounmap(c->in_queue.virt);
  63. if (c->base.virt)
  64. iounmap(c->base.virt);
  65. pci_release_regions(c->pdev);
  66. }
  67. /**
  68. * i2o_pci_alloc - Allocate DMA memory, map IO memory for I2O controller
  69. * @c: I2O controller
  70. *
  71. * Allocate DMA memory for a PCI (or in theory AGP) I2O controller. All
  72. * IO mappings are also done here. If MTRR is enabled, also do add memory
  73. * regions here.
  74. *
  75. * Returns 0 on success or negative error code on failure.
  76. */
  77. static int __devinit i2o_pci_alloc(struct i2o_controller *c)
  78. {
  79. struct pci_dev *pdev = c->pdev;
  80. struct device *dev = &pdev->dev;
  81. int i;
  82. if (pci_request_regions(pdev, OSM_DESCRIPTION)) {
  83. printk(KERN_ERR "%s: device already claimed\n", c->name);
  84. return -ENODEV;
  85. }
  86. for (i = 0; i < 6; i++) {
  87. /* Skip I/O spaces */
  88. if (!(pci_resource_flags(pdev, i) & IORESOURCE_IO)) {
  89. if (!c->base.phys) {
  90. c->base.phys = pci_resource_start(pdev, i);
  91. c->base.len = pci_resource_len(pdev, i);
  92. /*
  93. * If we know what card it is, set the size
  94. * correctly. Code is taken from dpt_i2o.c
  95. */
  96. if (pdev->device == 0xa501) {
  97. if (pdev->subsystem_device >= 0xc032 &&
  98. pdev->subsystem_device <= 0xc03b) {
  99. if (c->base.len > 0x400000)
  100. c->base.len = 0x400000;
  101. } else {
  102. if (c->base.len > 0x100000)
  103. c->base.len = 0x100000;
  104. }
  105. }
  106. if (!c->raptor)
  107. break;
  108. } else {
  109. c->in_queue.phys = pci_resource_start(pdev, i);
  110. c->in_queue.len = pci_resource_len(pdev, i);
  111. break;
  112. }
  113. }
  114. }
  115. if (i == 6) {
  116. printk(KERN_ERR "%s: I2O controller has no memory regions"
  117. " defined.\n", c->name);
  118. i2o_pci_free(c);
  119. return -EINVAL;
  120. }
  121. /* Map the I2O controller */
  122. if (c->raptor) {
  123. printk(KERN_INFO "%s: PCI I2O controller\n", c->name);
  124. printk(KERN_INFO " BAR0 at 0x%08lX size=%ld\n",
  125. (unsigned long)c->base.phys, (unsigned long)c->base.len);
  126. printk(KERN_INFO " BAR1 at 0x%08lX size=%ld\n",
  127. (unsigned long)c->in_queue.phys,
  128. (unsigned long)c->in_queue.len);
  129. } else
  130. printk(KERN_INFO "%s: PCI I2O controller at %08lX size=%ld\n",
  131. c->name, (unsigned long)c->base.phys,
  132. (unsigned long)c->base.len);
  133. c->base.virt = ioremap_nocache(c->base.phys, c->base.len);
  134. if (!c->base.virt) {
  135. printk(KERN_ERR "%s: Unable to map controller.\n", c->name);
  136. i2o_pci_free(c);
  137. return -ENOMEM;
  138. }
  139. if (c->raptor) {
  140. c->in_queue.virt =
  141. ioremap_nocache(c->in_queue.phys, c->in_queue.len);
  142. if (!c->in_queue.virt) {
  143. printk(KERN_ERR "%s: Unable to map controller.\n",
  144. c->name);
  145. i2o_pci_free(c);
  146. return -ENOMEM;
  147. }
  148. } else
  149. c->in_queue = c->base;
  150. c->irq_status = c->base.virt + I2O_IRQ_STATUS;
  151. c->irq_mask = c->base.virt + I2O_IRQ_MASK;
  152. c->in_port = c->base.virt + I2O_IN_PORT;
  153. c->out_port = c->base.virt + I2O_OUT_PORT;
  154. /* Motorola/Freescale chip does not follow spec */
  155. if (pdev->vendor == PCI_VENDOR_ID_MOTOROLA && pdev->device == 0x18c0) {
  156. /* Check if CPU is enabled */
  157. if (be32_to_cpu(readl(c->base.virt + 0x10000)) & 0x10000000) {
  158. printk(KERN_INFO "%s: MPC82XX needs CPU running to "
  159. "service I2O.\n", c->name);
  160. i2o_pci_free(c);
  161. return -ENODEV;
  162. } else {
  163. c->irq_status += I2O_MOTOROLA_PORT_OFFSET;
  164. c->irq_mask += I2O_MOTOROLA_PORT_OFFSET;
  165. c->in_port += I2O_MOTOROLA_PORT_OFFSET;
  166. c->out_port += I2O_MOTOROLA_PORT_OFFSET;
  167. printk(KERN_INFO "%s: MPC82XX workarounds activated.\n",
  168. c->name);
  169. }
  170. }
  171. if (i2o_dma_alloc(dev, &c->status, 8)) {
  172. i2o_pci_free(c);
  173. return -ENOMEM;
  174. }
  175. if (i2o_dma_alloc(dev, &c->hrt, sizeof(i2o_hrt))) {
  176. i2o_pci_free(c);
  177. return -ENOMEM;
  178. }
  179. if (i2o_dma_alloc(dev, &c->dlct, 8192)) {
  180. i2o_pci_free(c);
  181. return -ENOMEM;
  182. }
  183. if (i2o_dma_alloc(dev, &c->status_block, sizeof(i2o_status_block))) {
  184. i2o_pci_free(c);
  185. return -ENOMEM;
  186. }
  187. if (i2o_dma_alloc(dev, &c->out_queue,
  188. I2O_MAX_OUTBOUND_MSG_FRAMES * I2O_OUTBOUND_MSG_FRAME_SIZE *
  189. sizeof(u32))) {
  190. i2o_pci_free(c);
  191. return -ENOMEM;
  192. }
  193. pci_set_drvdata(pdev, c);
  194. return 0;
  195. }
  196. /**
  197. * i2o_pci_interrupt - Interrupt handler for I2O controller
  198. * @irq: interrupt line
  199. * @dev_id: pointer to the I2O controller
  200. *
  201. * Handle an interrupt from a PCI based I2O controller. This turns out
  202. * to be rather simple. We keep the controller pointer in the cookie.
  203. */
  204. static irqreturn_t i2o_pci_interrupt(int irq, void *dev_id)
  205. {
  206. struct i2o_controller *c = dev_id;
  207. u32 m;
  208. irqreturn_t rc = IRQ_NONE;
  209. while (readl(c->irq_status) & I2O_IRQ_OUTBOUND_POST) {
  210. m = readl(c->out_port);
  211. if (m == I2O_QUEUE_EMPTY) {
  212. /*
  213. * Old 960 steppings had a bug in the I2O unit that
  214. * caused the queue to appear empty when it wasn't.
  215. */
  216. m = readl(c->out_port);
  217. if (unlikely(m == I2O_QUEUE_EMPTY))
  218. break;
  219. }
  220. /* dispatch it */
  221. if (i2o_driver_dispatch(c, m))
  222. /* flush it if result != 0 */
  223. i2o_flush_reply(c, m);
  224. rc = IRQ_HANDLED;
  225. }
  226. return rc;
  227. }
  228. /**
  229. * i2o_pci_irq_enable - Allocate interrupt for I2O controller
  230. * @c: i2o_controller that the request is for
  231. *
  232. * Allocate an interrupt for the I2O controller, and activate interrupts
  233. * on the I2O controller.
  234. *
  235. * Returns 0 on success or negative error code on failure.
  236. */
  237. static int i2o_pci_irq_enable(struct i2o_controller *c)
  238. {
  239. struct pci_dev *pdev = c->pdev;
  240. int rc;
  241. writel(0xffffffff, c->irq_mask);
  242. if (pdev->irq) {
  243. rc = request_irq(pdev->irq, i2o_pci_interrupt, IRQF_SHARED,
  244. c->name, c);
  245. if (rc < 0) {
  246. printk(KERN_ERR "%s: unable to allocate interrupt %d."
  247. "\n", c->name, pdev->irq);
  248. return rc;
  249. }
  250. }
  251. writel(0x00000000, c->irq_mask);
  252. printk(KERN_INFO "%s: Installed at IRQ %d\n", c->name, pdev->irq);
  253. return 0;
  254. }
  255. /**
  256. * i2o_pci_irq_disable - Free interrupt for I2O controller
  257. * @c: I2O controller
  258. *
  259. * Disable interrupts in I2O controller and then free interrupt.
  260. */
  261. static void i2o_pci_irq_disable(struct i2o_controller *c)
  262. {
  263. writel(0xffffffff, c->irq_mask);
  264. if (c->pdev->irq > 0)
  265. free_irq(c->pdev->irq, c);
  266. }
  267. /**
  268. * i2o_pci_probe - Probe the PCI device for an I2O controller
  269. * @pdev: PCI device to test
  270. * @id: id which matched with the PCI device id table
  271. *
  272. * Probe the PCI device for any device which is a memory of the
  273. * Intelligent, I2O class or an Adaptec Zero Channel Controller. We
  274. * attempt to set up each such device and register it with the core.
  275. *
  276. * Returns 0 on success or negative error code on failure.
  277. */
  278. static int __devinit i2o_pci_probe(struct pci_dev *pdev,
  279. const struct pci_device_id *id)
  280. {
  281. struct i2o_controller *c;
  282. int rc;
  283. struct pci_dev *i960 = NULL;
  284. printk(KERN_INFO "i2o: Checking for PCI I2O controllers...\n");
  285. if ((pdev->class & 0xff) > 1) {
  286. printk(KERN_WARNING "i2o: %s does not support I2O 1.5 "
  287. "(skipping).\n", pci_name(pdev));
  288. return -ENODEV;
  289. }
  290. if ((rc = pci_enable_device(pdev))) {
  291. printk(KERN_WARNING "i2o: couldn't enable device %s\n",
  292. pci_name(pdev));
  293. return rc;
  294. }
  295. if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
  296. printk(KERN_WARNING "i2o: no suitable DMA found for %s\n",
  297. pci_name(pdev));
  298. rc = -ENODEV;
  299. goto disable;
  300. }
  301. pci_set_master(pdev);
  302. c = i2o_iop_alloc();
  303. if (IS_ERR(c)) {
  304. printk(KERN_ERR "i2o: couldn't allocate memory for %s\n",
  305. pci_name(pdev));
  306. rc = PTR_ERR(c);
  307. goto disable;
  308. } else
  309. printk(KERN_INFO "%s: controller found (%s)\n", c->name,
  310. pci_name(pdev));
  311. c->pdev = pdev;
  312. c->device.parent = &pdev->dev;
  313. /* Cards that fall apart if you hit them with large I/O loads... */
  314. if (pdev->vendor == PCI_VENDOR_ID_NCR && pdev->device == 0x0630) {
  315. c->short_req = 1;
  316. printk(KERN_INFO "%s: Symbios FC920 workarounds activated.\n",
  317. c->name);
  318. }
  319. if (pdev->subsystem_vendor == PCI_VENDOR_ID_PROMISE) {
  320. /*
  321. * Expose the ship behind i960 for initialization, or it will
  322. * failed
  323. */
  324. i960 = pci_get_slot(c->pdev->bus,
  325. PCI_DEVFN(PCI_SLOT(c->pdev->devfn), 0));
  326. if (i960) {
  327. pci_write_config_word(i960, 0x42, 0);
  328. pci_dev_put(i960);
  329. }
  330. c->promise = 1;
  331. c->limit_sectors = 1;
  332. }
  333. if (pdev->subsystem_vendor == PCI_VENDOR_ID_DPT)
  334. c->adaptec = 1;
  335. /* Cards that go bananas if you quiesce them before you reset them. */
  336. if (pdev->vendor == PCI_VENDOR_ID_DPT) {
  337. c->no_quiesce = 1;
  338. if (pdev->device == 0xa511)
  339. c->raptor = 1;
  340. if (pdev->subsystem_device == 0xc05a) {
  341. c->limit_sectors = 1;
  342. printk(KERN_INFO
  343. "%s: limit sectors per request to %d\n", c->name,
  344. I2O_MAX_SECTORS_LIMITED);
  345. }
  346. #ifdef CONFIG_I2O_EXT_ADAPTEC_DMA64
  347. if (sizeof(dma_addr_t) > 4) {
  348. if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)))
  349. printk(KERN_INFO "%s: 64-bit DMA unavailable\n",
  350. c->name);
  351. else {
  352. c->pae_support = 1;
  353. printk(KERN_INFO "%s: using 64-bit DMA\n",
  354. c->name);
  355. }
  356. }
  357. #endif
  358. }
  359. if ((rc = i2o_pci_alloc(c))) {
  360. printk(KERN_ERR "%s: DMA / IO allocation for I2O controller "
  361. "failed\n", c->name);
  362. goto free_controller;
  363. }
  364. if (i2o_pci_irq_enable(c)) {
  365. printk(KERN_ERR "%s: unable to enable interrupts for I2O "
  366. "controller\n", c->name);
  367. goto free_pci;
  368. }
  369. if ((rc = i2o_iop_add(c)))
  370. goto uninstall;
  371. if (i960)
  372. pci_write_config_word(i960, 0x42, 0x03ff);
  373. return 0;
  374. uninstall:
  375. i2o_pci_irq_disable(c);
  376. free_pci:
  377. i2o_pci_free(c);
  378. free_controller:
  379. i2o_iop_free(c);
  380. disable:
  381. pci_disable_device(pdev);
  382. return rc;
  383. }
  384. /**
  385. * i2o_pci_remove - Removes a I2O controller from the system
  386. * @pdev: I2O controller which should be removed
  387. *
  388. * Reset the I2O controller, disable interrupts and remove all allocated
  389. * resources.
  390. */
  391. static void __devexit i2o_pci_remove(struct pci_dev *pdev)
  392. {
  393. struct i2o_controller *c;
  394. c = pci_get_drvdata(pdev);
  395. i2o_iop_remove(c);
  396. i2o_pci_irq_disable(c);
  397. i2o_pci_free(c);
  398. pci_disable_device(pdev);
  399. printk(KERN_INFO "%s: Controller removed.\n", c->name);
  400. put_device(&c->device);
  401. };
  402. /* PCI driver for I2O controller */
  403. static struct pci_driver i2o_pci_driver = {
  404. .name = "PCI_I2O",
  405. .id_table = i2o_pci_ids,
  406. .probe = i2o_pci_probe,
  407. .remove = __devexit_p(i2o_pci_remove),
  408. };
  409. /**
  410. * i2o_pci_init - registers I2O PCI driver in PCI subsystem
  411. *
  412. * Returns > 0 on success or negative error code on failure.
  413. */
  414. int __init i2o_pci_init(void)
  415. {
  416. return pci_register_driver(&i2o_pci_driver);
  417. };
  418. /**
  419. * i2o_pci_exit - unregisters I2O PCI driver from PCI subsystem
  420. */
  421. void __exit i2o_pci_exit(void)
  422. {
  423. pci_unregister_driver(&i2o_pci_driver);
  424. };
  425. MODULE_DEVICE_TABLE(pci, i2o_pci_ids);