memory.c 8.1 KB

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  1. /*
  2. * Functions to handle I2O memory
  3. *
  4. * Pulled from the inlines in i2o headers and uninlined
  5. *
  6. *
  7. * This program is free software; you can redistribute it and/or modify it
  8. * under the terms of the GNU General Public License as published by the
  9. * Free Software Foundation; either version 2 of the License, or (at your
  10. * option) any later version.
  11. */
  12. #include <linux/module.h>
  13. #include <linux/i2o.h>
  14. #include <linux/delay.h>
  15. #include <linux/string.h>
  16. #include <linux/slab.h>
  17. #include "core.h"
  18. /* Protects our 32/64bit mask switching */
  19. static DEFINE_MUTEX(mem_lock);
  20. /**
  21. * i2o_sg_tablesize - Calculate the maximum number of elements in a SGL
  22. * @c: I2O controller for which the calculation should be done
  23. * @body_size: maximum body size used for message in 32-bit words.
  24. *
  25. * Return the maximum number of SG elements in a SG list.
  26. */
  27. u16 i2o_sg_tablesize(struct i2o_controller *c, u16 body_size)
  28. {
  29. i2o_status_block *sb = c->status_block.virt;
  30. u16 sg_count =
  31. (sb->inbound_frame_size - sizeof(struct i2o_message) / 4) -
  32. body_size;
  33. if (c->pae_support) {
  34. /*
  35. * for 64-bit a SG attribute element must be added and each
  36. * SG element needs 12 bytes instead of 8.
  37. */
  38. sg_count -= 2;
  39. sg_count /= 3;
  40. } else
  41. sg_count /= 2;
  42. if (c->short_req && (sg_count > 8))
  43. sg_count = 8;
  44. return sg_count;
  45. }
  46. EXPORT_SYMBOL_GPL(i2o_sg_tablesize);
  47. /**
  48. * i2o_dma_map_single - Map pointer to controller and fill in I2O message.
  49. * @c: I2O controller
  50. * @ptr: pointer to the data which should be mapped
  51. * @size: size of data in bytes
  52. * @direction: DMA_TO_DEVICE / DMA_FROM_DEVICE
  53. * @sg_ptr: pointer to the SG list inside the I2O message
  54. *
  55. * This function does all necessary DMA handling and also writes the I2O
  56. * SGL elements into the I2O message. For details on DMA handling see also
  57. * dma_map_single(). The pointer sg_ptr will only be set to the end of the
  58. * SG list if the allocation was successful.
  59. *
  60. * Returns DMA address which must be checked for failures using
  61. * dma_mapping_error().
  62. */
  63. dma_addr_t i2o_dma_map_single(struct i2o_controller *c, void *ptr,
  64. size_t size,
  65. enum dma_data_direction direction,
  66. u32 ** sg_ptr)
  67. {
  68. u32 sg_flags;
  69. u32 *mptr = *sg_ptr;
  70. dma_addr_t dma_addr;
  71. switch (direction) {
  72. case DMA_TO_DEVICE:
  73. sg_flags = 0xd4000000;
  74. break;
  75. case DMA_FROM_DEVICE:
  76. sg_flags = 0xd0000000;
  77. break;
  78. default:
  79. return 0;
  80. }
  81. dma_addr = dma_map_single(&c->pdev->dev, ptr, size, direction);
  82. if (!dma_mapping_error(&c->pdev->dev, dma_addr)) {
  83. #ifdef CONFIG_I2O_EXT_ADAPTEC_DMA64
  84. if ((sizeof(dma_addr_t) > 4) && c->pae_support) {
  85. *mptr++ = cpu_to_le32(0x7C020002);
  86. *mptr++ = cpu_to_le32(PAGE_SIZE);
  87. }
  88. #endif
  89. *mptr++ = cpu_to_le32(sg_flags | size);
  90. *mptr++ = cpu_to_le32(i2o_dma_low(dma_addr));
  91. #ifdef CONFIG_I2O_EXT_ADAPTEC_DMA64
  92. if ((sizeof(dma_addr_t) > 4) && c->pae_support)
  93. *mptr++ = cpu_to_le32(i2o_dma_high(dma_addr));
  94. #endif
  95. *sg_ptr = mptr;
  96. }
  97. return dma_addr;
  98. }
  99. EXPORT_SYMBOL_GPL(i2o_dma_map_single);
  100. /**
  101. * i2o_dma_map_sg - Map a SG List to controller and fill in I2O message.
  102. * @c: I2O controller
  103. * @sg: SG list to be mapped
  104. * @sg_count: number of elements in the SG list
  105. * @direction: DMA_TO_DEVICE / DMA_FROM_DEVICE
  106. * @sg_ptr: pointer to the SG list inside the I2O message
  107. *
  108. * This function does all necessary DMA handling and also writes the I2O
  109. * SGL elements into the I2O message. For details on DMA handling see also
  110. * dma_map_sg(). The pointer sg_ptr will only be set to the end of the SG
  111. * list if the allocation was successful.
  112. *
  113. * Returns 0 on failure or 1 on success.
  114. */
  115. int i2o_dma_map_sg(struct i2o_controller *c, struct scatterlist *sg,
  116. int sg_count, enum dma_data_direction direction, u32 ** sg_ptr)
  117. {
  118. u32 sg_flags;
  119. u32 *mptr = *sg_ptr;
  120. switch (direction) {
  121. case DMA_TO_DEVICE:
  122. sg_flags = 0x14000000;
  123. break;
  124. case DMA_FROM_DEVICE:
  125. sg_flags = 0x10000000;
  126. break;
  127. default:
  128. return 0;
  129. }
  130. sg_count = dma_map_sg(&c->pdev->dev, sg, sg_count, direction);
  131. if (!sg_count)
  132. return 0;
  133. #ifdef CONFIG_I2O_EXT_ADAPTEC_DMA64
  134. if ((sizeof(dma_addr_t) > 4) && c->pae_support) {
  135. *mptr++ = cpu_to_le32(0x7C020002);
  136. *mptr++ = cpu_to_le32(PAGE_SIZE);
  137. }
  138. #endif
  139. while (sg_count-- > 0) {
  140. if (!sg_count)
  141. sg_flags |= 0xC0000000;
  142. *mptr++ = cpu_to_le32(sg_flags | sg_dma_len(sg));
  143. *mptr++ = cpu_to_le32(i2o_dma_low(sg_dma_address(sg)));
  144. #ifdef CONFIG_I2O_EXT_ADAPTEC_DMA64
  145. if ((sizeof(dma_addr_t) > 4) && c->pae_support)
  146. *mptr++ = cpu_to_le32(i2o_dma_high(sg_dma_address(sg)));
  147. #endif
  148. sg = sg_next(sg);
  149. }
  150. *sg_ptr = mptr;
  151. return 1;
  152. }
  153. EXPORT_SYMBOL_GPL(i2o_dma_map_sg);
  154. /**
  155. * i2o_dma_alloc - Allocate DMA memory
  156. * @dev: struct device pointer to the PCI device of the I2O controller
  157. * @addr: i2o_dma struct which should get the DMA buffer
  158. * @len: length of the new DMA memory
  159. *
  160. * Allocate a coherent DMA memory and write the pointers into addr.
  161. *
  162. * Returns 0 on success or -ENOMEM on failure.
  163. */
  164. int i2o_dma_alloc(struct device *dev, struct i2o_dma *addr, size_t len)
  165. {
  166. struct pci_dev *pdev = to_pci_dev(dev);
  167. int dma_64 = 0;
  168. mutex_lock(&mem_lock);
  169. if ((sizeof(dma_addr_t) > 4) && (pdev->dma_mask == DMA_BIT_MASK(64))) {
  170. dma_64 = 1;
  171. if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
  172. mutex_unlock(&mem_lock);
  173. return -ENOMEM;
  174. }
  175. }
  176. addr->virt = dma_alloc_coherent(dev, len, &addr->phys, GFP_KERNEL);
  177. if ((sizeof(dma_addr_t) > 4) && dma_64)
  178. if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)))
  179. printk(KERN_WARNING "i2o: unable to set 64-bit DMA");
  180. mutex_unlock(&mem_lock);
  181. if (!addr->virt)
  182. return -ENOMEM;
  183. memset(addr->virt, 0, len);
  184. addr->len = len;
  185. return 0;
  186. }
  187. EXPORT_SYMBOL_GPL(i2o_dma_alloc);
  188. /**
  189. * i2o_dma_free - Free DMA memory
  190. * @dev: struct device pointer to the PCI device of the I2O controller
  191. * @addr: i2o_dma struct which contains the DMA buffer
  192. *
  193. * Free a coherent DMA memory and set virtual address of addr to NULL.
  194. */
  195. void i2o_dma_free(struct device *dev, struct i2o_dma *addr)
  196. {
  197. if (addr->virt) {
  198. if (addr->phys)
  199. dma_free_coherent(dev, addr->len, addr->virt,
  200. addr->phys);
  201. else
  202. kfree(addr->virt);
  203. addr->virt = NULL;
  204. }
  205. }
  206. EXPORT_SYMBOL_GPL(i2o_dma_free);
  207. /**
  208. * i2o_dma_realloc - Realloc DMA memory
  209. * @dev: struct device pointer to the PCI device of the I2O controller
  210. * @addr: pointer to a i2o_dma struct DMA buffer
  211. * @len: new length of memory
  212. *
  213. * If there was something allocated in the addr, free it first. If len > 0
  214. * than try to allocate it and write the addresses back to the addr
  215. * structure. If len == 0 set the virtual address to NULL.
  216. *
  217. * Returns the 0 on success or negative error code on failure.
  218. */
  219. int i2o_dma_realloc(struct device *dev, struct i2o_dma *addr, size_t len)
  220. {
  221. i2o_dma_free(dev, addr);
  222. if (len)
  223. return i2o_dma_alloc(dev, addr, len);
  224. return 0;
  225. }
  226. EXPORT_SYMBOL_GPL(i2o_dma_realloc);
  227. /*
  228. * i2o_pool_alloc - Allocate an slab cache and mempool
  229. * @mempool: pointer to struct i2o_pool to write data into.
  230. * @name: name which is used to identify cache
  231. * @size: size of each object
  232. * @min_nr: minimum number of objects
  233. *
  234. * First allocates a slab cache with name and size. Then allocates a
  235. * mempool which uses the slab cache for allocation and freeing.
  236. *
  237. * Returns 0 on success or negative error code on failure.
  238. */
  239. int i2o_pool_alloc(struct i2o_pool *pool, const char *name,
  240. size_t size, int min_nr)
  241. {
  242. pool->name = kmalloc(strlen(name) + 1, GFP_KERNEL);
  243. if (!pool->name)
  244. goto exit;
  245. strcpy(pool->name, name);
  246. pool->slab =
  247. kmem_cache_create(pool->name, size, 0, SLAB_HWCACHE_ALIGN, NULL);
  248. if (!pool->slab)
  249. goto free_name;
  250. pool->mempool = mempool_create_slab_pool(min_nr, pool->slab);
  251. if (!pool->mempool)
  252. goto free_slab;
  253. return 0;
  254. free_slab:
  255. kmem_cache_destroy(pool->slab);
  256. free_name:
  257. kfree(pool->name);
  258. exit:
  259. return -ENOMEM;
  260. }
  261. EXPORT_SYMBOL_GPL(i2o_pool_alloc);
  262. /*
  263. * i2o_pool_free - Free slab cache and mempool again
  264. * @mempool: pointer to struct i2o_pool which should be freed
  265. *
  266. * Note that you have to return all objects to the mempool again before
  267. * calling i2o_pool_free().
  268. */
  269. void i2o_pool_free(struct i2o_pool *pool)
  270. {
  271. mempool_destroy(pool->mempool);
  272. kmem_cache_destroy(pool->slab);
  273. kfree(pool->name);
  274. };
  275. EXPORT_SYMBOL_GPL(i2o_pool_free);