irq-s3c2416.c 6.3 KB

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  1. /* linux/arch/arm/mach-s3c2416/irq.c
  2. *
  3. * Copyright (c) 2009 Yauhen Kharuzhy <jekhor@gmail.com>,
  4. * as part of OpenInkpot project
  5. * Copyright (c) 2009 Promwad Innovation Company
  6. * Yauhen Kharuzhy <yauhen.kharuzhy@promwad.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  21. *
  22. */
  23. #include <linux/init.h>
  24. #include <linux/module.h>
  25. #include <linux/interrupt.h>
  26. #include <linux/ioport.h>
  27. #include <linux/device.h>
  28. #include <linux/io.h>
  29. #include <mach/hardware.h>
  30. #include <asm/irq.h>
  31. #include <asm/mach/irq.h>
  32. #include <mach/regs-irq.h>
  33. #include <mach/regs-gpio.h>
  34. #include <plat/cpu.h>
  35. #include <plat/pm.h>
  36. #include <plat/irq.h>
  37. #define INTMSK(start, end) ((1 << ((end) + 1 - (start))) - 1)
  38. static inline void s3c2416_irq_demux(unsigned int irq, unsigned int len)
  39. {
  40. unsigned int subsrc, submsk;
  41. unsigned int end;
  42. /* read the current pending interrupts, and the mask
  43. * for what it is available */
  44. subsrc = __raw_readl(S3C2410_SUBSRCPND);
  45. submsk = __raw_readl(S3C2410_INTSUBMSK);
  46. subsrc &= ~submsk;
  47. subsrc >>= (irq - S3C2410_IRQSUB(0));
  48. subsrc &= (1 << len)-1;
  49. end = len + irq;
  50. for (; irq < end && subsrc; irq++) {
  51. if (subsrc & 1)
  52. generic_handle_irq(irq);
  53. subsrc >>= 1;
  54. }
  55. }
  56. /* WDT/AC97 sub interrupts */
  57. static void s3c2416_irq_demux_wdtac97(unsigned int irq, struct irq_desc *desc)
  58. {
  59. s3c2416_irq_demux(IRQ_S3C2443_WDT, 4);
  60. }
  61. #define INTMSK_WDTAC97 (1UL << (IRQ_WDT - IRQ_EINT0))
  62. #define SUBMSK_WDTAC97 INTMSK(IRQ_S3C2443_WDT, IRQ_S3C2443_AC97)
  63. static void s3c2416_irq_wdtac97_mask(struct irq_data *data)
  64. {
  65. s3c_irqsub_mask(data->irq, INTMSK_WDTAC97, SUBMSK_WDTAC97);
  66. }
  67. static void s3c2416_irq_wdtac97_unmask(struct irq_data *data)
  68. {
  69. s3c_irqsub_unmask(data->irq, INTMSK_WDTAC97);
  70. }
  71. static void s3c2416_irq_wdtac97_ack(struct irq_data *data)
  72. {
  73. s3c_irqsub_maskack(data->irq, INTMSK_WDTAC97, SUBMSK_WDTAC97);
  74. }
  75. static struct irq_chip s3c2416_irq_wdtac97 = {
  76. .irq_mask = s3c2416_irq_wdtac97_mask,
  77. .irq_unmask = s3c2416_irq_wdtac97_unmask,
  78. .irq_ack = s3c2416_irq_wdtac97_ack,
  79. };
  80. /* LCD sub interrupts */
  81. static void s3c2416_irq_demux_lcd(unsigned int irq, struct irq_desc *desc)
  82. {
  83. s3c2416_irq_demux(IRQ_S3C2443_LCD1, 4);
  84. }
  85. #define INTMSK_LCD (1UL << (IRQ_LCD - IRQ_EINT0))
  86. #define SUBMSK_LCD INTMSK(IRQ_S3C2443_LCD1, IRQ_S3C2443_LCD4)
  87. static void s3c2416_irq_lcd_mask(struct irq_data *data)
  88. {
  89. s3c_irqsub_mask(data->irq, INTMSK_LCD, SUBMSK_LCD);
  90. }
  91. static void s3c2416_irq_lcd_unmask(struct irq_data *data)
  92. {
  93. s3c_irqsub_unmask(data->irq, INTMSK_LCD);
  94. }
  95. static void s3c2416_irq_lcd_ack(struct irq_data *data)
  96. {
  97. s3c_irqsub_maskack(data->irq, INTMSK_LCD, SUBMSK_LCD);
  98. }
  99. static struct irq_chip s3c2416_irq_lcd = {
  100. .irq_mask = s3c2416_irq_lcd_mask,
  101. .irq_unmask = s3c2416_irq_lcd_unmask,
  102. .irq_ack = s3c2416_irq_lcd_ack,
  103. };
  104. /* DMA sub interrupts */
  105. static void s3c2416_irq_demux_dma(unsigned int irq, struct irq_desc *desc)
  106. {
  107. s3c2416_irq_demux(IRQ_S3C2443_DMA0, 6);
  108. }
  109. #define INTMSK_DMA (1UL << (IRQ_S3C2443_DMA - IRQ_EINT0))
  110. #define SUBMSK_DMA INTMSK(IRQ_S3C2443_DMA0, IRQ_S3C2443_DMA5)
  111. static void s3c2416_irq_dma_mask(struct irq_data *data)
  112. {
  113. s3c_irqsub_mask(data->irq, INTMSK_DMA, SUBMSK_DMA);
  114. }
  115. static void s3c2416_irq_dma_unmask(struct irq_data *data)
  116. {
  117. s3c_irqsub_unmask(data->irq, INTMSK_DMA);
  118. }
  119. static void s3c2416_irq_dma_ack(struct irq_data *data)
  120. {
  121. s3c_irqsub_maskack(data->irq, INTMSK_DMA, SUBMSK_DMA);
  122. }
  123. static struct irq_chip s3c2416_irq_dma = {
  124. .irq_mask = s3c2416_irq_dma_mask,
  125. .irq_unmask = s3c2416_irq_dma_unmask,
  126. .irq_ack = s3c2416_irq_dma_ack,
  127. };
  128. /* UART3 sub interrupts */
  129. static void s3c2416_irq_demux_uart3(unsigned int irq, struct irq_desc *desc)
  130. {
  131. s3c2416_irq_demux(IRQ_S3C2443_RX3, 3);
  132. }
  133. #define INTMSK_UART3 (1UL << (IRQ_S3C2443_UART3 - IRQ_EINT0))
  134. #define SUBMSK_UART3 (0x7 << (IRQ_S3C2443_RX3 - S3C2410_IRQSUB(0)))
  135. static void s3c2416_irq_uart3_mask(struct irq_data *data)
  136. {
  137. s3c_irqsub_mask(data->irq, INTMSK_UART3, SUBMSK_UART3);
  138. }
  139. static void s3c2416_irq_uart3_unmask(struct irq_data *data)
  140. {
  141. s3c_irqsub_unmask(data->irq, INTMSK_UART3);
  142. }
  143. static void s3c2416_irq_uart3_ack(struct irq_data *data)
  144. {
  145. s3c_irqsub_maskack(data->irq, INTMSK_UART3, SUBMSK_UART3);
  146. }
  147. static struct irq_chip s3c2416_irq_uart3 = {
  148. .irq_mask = s3c2416_irq_uart3_mask,
  149. .irq_unmask = s3c2416_irq_uart3_unmask,
  150. .irq_ack = s3c2416_irq_uart3_ack,
  151. };
  152. /* IRQ initialisation code */
  153. static int __init s3c2416_add_sub(unsigned int base,
  154. void (*demux)(unsigned int,
  155. struct irq_desc *),
  156. struct irq_chip *chip,
  157. unsigned int start, unsigned int end)
  158. {
  159. unsigned int irqno;
  160. irq_set_chip_and_handler(base, &s3c_irq_level_chip, handle_level_irq);
  161. irq_set_chained_handler(base, demux);
  162. for (irqno = start; irqno <= end; irqno++) {
  163. irq_set_chip_and_handler(irqno, chip, handle_level_irq);
  164. set_irq_flags(irqno, IRQF_VALID);
  165. }
  166. return 0;
  167. }
  168. static int __init s3c2416_irq_add(struct device *dev,
  169. struct subsys_interface *sif)
  170. {
  171. printk(KERN_INFO "S3C2416: IRQ Support\n");
  172. s3c2416_add_sub(IRQ_LCD, s3c2416_irq_demux_lcd, &s3c2416_irq_lcd,
  173. IRQ_S3C2443_LCD2, IRQ_S3C2443_LCD4);
  174. s3c2416_add_sub(IRQ_S3C2443_DMA, s3c2416_irq_demux_dma,
  175. &s3c2416_irq_dma, IRQ_S3C2443_DMA0, IRQ_S3C2443_DMA5);
  176. s3c2416_add_sub(IRQ_S3C2443_UART3, s3c2416_irq_demux_uart3,
  177. &s3c2416_irq_uart3,
  178. IRQ_S3C2443_RX3, IRQ_S3C2443_ERR3);
  179. s3c2416_add_sub(IRQ_WDT, s3c2416_irq_demux_wdtac97,
  180. &s3c2416_irq_wdtac97,
  181. IRQ_S3C2443_WDT, IRQ_S3C2443_AC97);
  182. return 0;
  183. }
  184. static struct subsys_interface s3c2416_irq_interface = {
  185. .name = "s3c2416_irq",
  186. .subsys = &s3c2416_subsys,
  187. .add_dev = s3c2416_irq_add,
  188. };
  189. static int __init s3c2416_irq_init(void)
  190. {
  191. return subsys_interface_register(&s3c2416_irq_interface);
  192. }
  193. arch_initcall(s3c2416_irq_init);