dma-s3c2440.c 4.8 KB

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  1. /* linux/arch/arm/mach-s3c2440/dma.c
  2. *
  3. * Copyright (c) 2006 Simtec Electronics
  4. * Ben Dooks <ben@simtec.co.uk>
  5. *
  6. * S3C2440 DMA selection
  7. *
  8. * http://armlinux.simtec.co.uk/
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. */
  14. #include <linux/kernel.h>
  15. #include <linux/init.h>
  16. #include <linux/device.h>
  17. #include <linux/serial_core.h>
  18. #include <mach/map.h>
  19. #include <mach/dma.h>
  20. #include <plat/dma-s3c24xx.h>
  21. #include <plat/cpu.h>
  22. #include <plat/regs-serial.h>
  23. #include <mach/regs-gpio.h>
  24. #include <plat/regs-ac97.h>
  25. #include <plat/regs-dma.h>
  26. #include <mach/regs-mem.h>
  27. #include <mach/regs-lcd.h>
  28. #include <mach/regs-sdi.h>
  29. #include <plat/regs-iis.h>
  30. #include <plat/regs-spi.h>
  31. static struct s3c24xx_dma_map __initdata s3c2440_dma_mappings[] = {
  32. [DMACH_XD0] = {
  33. .name = "xdreq0",
  34. .channels[0] = S3C2410_DCON_CH0_XDREQ0 | DMA_CH_VALID,
  35. },
  36. [DMACH_XD1] = {
  37. .name = "xdreq1",
  38. .channels[1] = S3C2410_DCON_CH1_XDREQ1 | DMA_CH_VALID,
  39. },
  40. [DMACH_SDI] = {
  41. .name = "sdi",
  42. .channels[0] = S3C2410_DCON_CH0_SDI | DMA_CH_VALID,
  43. .channels[1] = S3C2440_DCON_CH1_SDI | DMA_CH_VALID,
  44. .channels[2] = S3C2410_DCON_CH2_SDI | DMA_CH_VALID,
  45. .channels[3] = S3C2410_DCON_CH3_SDI | DMA_CH_VALID,
  46. },
  47. [DMACH_SPI0] = {
  48. .name = "spi0",
  49. .channels[1] = S3C2410_DCON_CH1_SPI | DMA_CH_VALID,
  50. },
  51. [DMACH_SPI1] = {
  52. .name = "spi1",
  53. .channels[3] = S3C2410_DCON_CH3_SPI | DMA_CH_VALID,
  54. },
  55. [DMACH_UART0] = {
  56. .name = "uart0",
  57. .channels[0] = S3C2410_DCON_CH0_UART0 | DMA_CH_VALID,
  58. },
  59. [DMACH_UART1] = {
  60. .name = "uart1",
  61. .channels[1] = S3C2410_DCON_CH1_UART1 | DMA_CH_VALID,
  62. },
  63. [DMACH_UART2] = {
  64. .name = "uart2",
  65. .channels[3] = S3C2410_DCON_CH3_UART2 | DMA_CH_VALID,
  66. },
  67. [DMACH_TIMER] = {
  68. .name = "timer",
  69. .channels[0] = S3C2410_DCON_CH0_TIMER | DMA_CH_VALID,
  70. .channels[2] = S3C2410_DCON_CH2_TIMER | DMA_CH_VALID,
  71. .channels[3] = S3C2410_DCON_CH3_TIMER | DMA_CH_VALID,
  72. },
  73. [DMACH_I2S_IN] = {
  74. .name = "i2s-sdi",
  75. .channels[1] = S3C2410_DCON_CH1_I2SSDI | DMA_CH_VALID,
  76. .channels[2] = S3C2410_DCON_CH2_I2SSDI | DMA_CH_VALID,
  77. },
  78. [DMACH_I2S_OUT] = {
  79. .name = "i2s-sdo",
  80. .channels[0] = S3C2440_DCON_CH0_I2SSDO | DMA_CH_VALID,
  81. .channels[2] = S3C2410_DCON_CH2_I2SSDO | DMA_CH_VALID,
  82. },
  83. [DMACH_PCM_IN] = {
  84. .name = "pcm-in",
  85. .channels[0] = S3C2440_DCON_CH0_PCMIN | DMA_CH_VALID,
  86. .channels[2] = S3C2440_DCON_CH2_PCMIN | DMA_CH_VALID,
  87. },
  88. [DMACH_PCM_OUT] = {
  89. .name = "pcm-out",
  90. .channels[1] = S3C2440_DCON_CH1_PCMOUT | DMA_CH_VALID,
  91. .channels[3] = S3C2440_DCON_CH3_PCMOUT | DMA_CH_VALID,
  92. },
  93. [DMACH_MIC_IN] = {
  94. .name = "mic-in",
  95. .channels[2] = S3C2440_DCON_CH2_MICIN | DMA_CH_VALID,
  96. .channels[3] = S3C2440_DCON_CH3_MICIN | DMA_CH_VALID,
  97. },
  98. [DMACH_USB_EP1] = {
  99. .name = "usb-ep1",
  100. .channels[0] = S3C2410_DCON_CH0_USBEP1 | DMA_CH_VALID,
  101. },
  102. [DMACH_USB_EP2] = {
  103. .name = "usb-ep2",
  104. .channels[1] = S3C2410_DCON_CH1_USBEP2 | DMA_CH_VALID,
  105. },
  106. [DMACH_USB_EP3] = {
  107. .name = "usb-ep3",
  108. .channels[2] = S3C2410_DCON_CH2_USBEP3 | DMA_CH_VALID,
  109. },
  110. [DMACH_USB_EP4] = {
  111. .name = "usb-ep4",
  112. .channels[3] = S3C2410_DCON_CH3_USBEP4 | DMA_CH_VALID,
  113. },
  114. };
  115. static void s3c2440_dma_select(struct s3c2410_dma_chan *chan,
  116. struct s3c24xx_dma_map *map)
  117. {
  118. chan->dcon = map->channels[chan->number] & ~DMA_CH_VALID;
  119. }
  120. static struct s3c24xx_dma_selection __initdata s3c2440_dma_sel = {
  121. .select = s3c2440_dma_select,
  122. .dcon_mask = 7 << 24,
  123. .map = s3c2440_dma_mappings,
  124. .map_size = ARRAY_SIZE(s3c2440_dma_mappings),
  125. };
  126. static struct s3c24xx_dma_order __initdata s3c2440_dma_order = {
  127. .channels = {
  128. [DMACH_SDI] = {
  129. .list = {
  130. [0] = 3 | DMA_CH_VALID,
  131. [1] = 2 | DMA_CH_VALID,
  132. [2] = 1 | DMA_CH_VALID,
  133. [3] = 0 | DMA_CH_VALID,
  134. },
  135. },
  136. [DMACH_I2S_IN] = {
  137. .list = {
  138. [0] = 1 | DMA_CH_VALID,
  139. [1] = 2 | DMA_CH_VALID,
  140. },
  141. },
  142. [DMACH_I2S_OUT] = {
  143. .list = {
  144. [0] = 2 | DMA_CH_VALID,
  145. [1] = 1 | DMA_CH_VALID,
  146. },
  147. },
  148. [DMACH_PCM_IN] = {
  149. .list = {
  150. [0] = 2 | DMA_CH_VALID,
  151. [1] = 1 | DMA_CH_VALID,
  152. },
  153. },
  154. [DMACH_PCM_OUT] = {
  155. .list = {
  156. [0] = 1 | DMA_CH_VALID,
  157. [1] = 3 | DMA_CH_VALID,
  158. },
  159. },
  160. [DMACH_MIC_IN] = {
  161. .list = {
  162. [0] = 3 | DMA_CH_VALID,
  163. [1] = 2 | DMA_CH_VALID,
  164. },
  165. },
  166. },
  167. };
  168. static int __init s3c2440_dma_add(struct device *dev,
  169. struct subsys_interface *sif)
  170. {
  171. s3c2410_dma_init();
  172. s3c24xx_dma_order_set(&s3c2440_dma_order);
  173. return s3c24xx_dma_init_map(&s3c2440_dma_sel);
  174. }
  175. static struct subsys_interface s3c2440_dma_interface = {
  176. .name = "s3c2440_dma",
  177. .subsys = &s3c2440_subsys,
  178. .add_dev = s3c2440_dma_add,
  179. };
  180. static int __init s3c2440_dma_init(void)
  181. {
  182. return subsys_interface_register(&s3c2440_dma_interface);
  183. }
  184. arch_initcall(s3c2440_dma_init);