devices-qsd8x50.c 20 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964
  1. /*
  2. * Copyright (C) 2008 Google, Inc.
  3. * Copyright (c) 2008-2012, The Linux Foundation. All rights reserved.
  4. *
  5. * This software is licensed under the terms of the GNU General Public
  6. * License version 2, as published by the Free Software Foundation, and
  7. * may be copied, distributed, and modified under those terms.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. *
  14. */
  15. #include <linux/kernel.h>
  16. #include <linux/platform_device.h>
  17. #include <mach/kgsl.h>
  18. #include <linux/dma-mapping.h>
  19. #include <asm/clkdev.h>
  20. #include <mach/irqs.h>
  21. #include <mach/msm_iomap.h>
  22. #include <mach/dma.h>
  23. #include <mach/board.h>
  24. #include "devices.h"
  25. #include <asm/mach/flash.h>
  26. #include <asm/mach/mmc.h>
  27. #include <mach/msm_hsusb.h>
  28. #include <mach/usbdiag.h>
  29. #include <mach/rpc_hsusb.h>
  30. #include "pm.h"
  31. struct platform_device msm8x50_device_acpuclk = {
  32. .name = "acpuclk-8x50",
  33. .id = -1,
  34. };
  35. static struct resource resources_uart1[] = {
  36. {
  37. .start = INT_UART1,
  38. .end = INT_UART1,
  39. .flags = IORESOURCE_IRQ,
  40. },
  41. {
  42. .start = MSM_UART1_PHYS,
  43. .end = MSM_UART1_PHYS + MSM_UART1_SIZE - 1,
  44. .flags = IORESOURCE_MEM,
  45. },
  46. };
  47. static struct resource resources_uart2[] = {
  48. {
  49. .start = INT_UART2,
  50. .end = INT_UART2,
  51. .flags = IORESOURCE_IRQ,
  52. },
  53. {
  54. .start = MSM_UART2_PHYS,
  55. .end = MSM_UART2_PHYS + MSM_UART2_SIZE - 1,
  56. .flags = IORESOURCE_MEM,
  57. },
  58. };
  59. static struct resource resources_uart3[] = {
  60. {
  61. .start = INT_UART3,
  62. .end = INT_UART3,
  63. .flags = IORESOURCE_IRQ,
  64. },
  65. {
  66. .start = MSM_UART3_PHYS,
  67. .end = MSM_UART3_PHYS + MSM_UART3_SIZE - 1,
  68. .flags = IORESOURCE_MEM,
  69. .name = "uart_resource"
  70. },
  71. };
  72. struct platform_device msm_device_uart1 = {
  73. .name = "msm_serial",
  74. .id = 0,
  75. .num_resources = ARRAY_SIZE(resources_uart1),
  76. .resource = resources_uart1,
  77. };
  78. struct platform_device msm_device_uart2 = {
  79. .name = "msm_serial",
  80. .id = 1,
  81. .num_resources = ARRAY_SIZE(resources_uart2),
  82. .resource = resources_uart2,
  83. };
  84. struct platform_device msm_device_uart3 = {
  85. .name = "msm_serial",
  86. .id = 2,
  87. .num_resources = ARRAY_SIZE(resources_uart3),
  88. .resource = resources_uart3,
  89. };
  90. #define MSM_UART1DM_PHYS 0xA0200000
  91. #define MSM_UART2DM_PHYS 0xA0900000
  92. static struct resource msm_uart1_dm_resources[] = {
  93. {
  94. .start = MSM_UART1DM_PHYS,
  95. .end = MSM_UART1DM_PHYS + PAGE_SIZE - 1,
  96. .flags = IORESOURCE_MEM,
  97. },
  98. {
  99. .start = INT_UART1DM_IRQ,
  100. .end = INT_UART1DM_IRQ,
  101. .flags = IORESOURCE_IRQ,
  102. },
  103. {
  104. .start = INT_UART1DM_RX,
  105. .end = INT_UART1DM_RX,
  106. .flags = IORESOURCE_IRQ,
  107. },
  108. {
  109. .start = DMOV_HSUART1_TX_CHAN,
  110. .end = DMOV_HSUART1_RX_CHAN,
  111. .name = "uartdm_channels",
  112. .flags = IORESOURCE_DMA,
  113. },
  114. {
  115. .start = DMOV_HSUART1_TX_CRCI,
  116. .end = DMOV_HSUART1_RX_CRCI,
  117. .name = "uartdm_crci",
  118. .flags = IORESOURCE_DMA,
  119. },
  120. };
  121. static u64 msm_uart_dm1_dma_mask = DMA_BIT_MASK(32);
  122. struct platform_device msm_device_uart_dm1 = {
  123. .name = "msm_serial_hs",
  124. .id = 0,
  125. .num_resources = ARRAY_SIZE(msm_uart1_dm_resources),
  126. .resource = msm_uart1_dm_resources,
  127. .dev = {
  128. .dma_mask = &msm_uart_dm1_dma_mask,
  129. .coherent_dma_mask = DMA_BIT_MASK(32),
  130. },
  131. };
  132. static struct resource msm_uart2_dm_resources[] = {
  133. {
  134. .start = MSM_UART2DM_PHYS,
  135. .end = MSM_UART2DM_PHYS + PAGE_SIZE - 1,
  136. .flags = IORESOURCE_MEM,
  137. },
  138. {
  139. .start = INT_UART2DM_IRQ,
  140. .end = INT_UART2DM_IRQ,
  141. .flags = IORESOURCE_IRQ,
  142. },
  143. {
  144. .start = INT_UART2DM_RX,
  145. .end = INT_UART2DM_RX,
  146. .flags = IORESOURCE_IRQ,
  147. },
  148. {
  149. .start = DMOV_HSUART2_TX_CHAN,
  150. .end = DMOV_HSUART2_RX_CHAN,
  151. .name = "uartdm_channels",
  152. .flags = IORESOURCE_DMA,
  153. },
  154. {
  155. .start = DMOV_HSUART2_TX_CRCI,
  156. .end = DMOV_HSUART2_RX_CRCI,
  157. .name = "uartdm_crci",
  158. .flags = IORESOURCE_DMA,
  159. },
  160. };
  161. static u64 msm_uart_dm2_dma_mask = DMA_BIT_MASK(32);
  162. struct platform_device msm_device_uart_dm2 = {
  163. .name = "msm_serial_hs",
  164. .id = 1,
  165. .num_resources = ARRAY_SIZE(msm_uart2_dm_resources),
  166. .resource = msm_uart2_dm_resources,
  167. .dev = {
  168. .dma_mask = &msm_uart_dm2_dma_mask,
  169. .coherent_dma_mask = DMA_BIT_MASK(32),
  170. },
  171. };
  172. #define MSM_I2C_SIZE SZ_4K
  173. #define MSM_I2C_PHYS 0xA9900000
  174. static struct resource resources_i2c[] = {
  175. {
  176. .start = MSM_I2C_PHYS,
  177. .end = MSM_I2C_PHYS + MSM_I2C_SIZE - 1,
  178. .flags = IORESOURCE_MEM,
  179. },
  180. {
  181. .start = INT_PWB_I2C,
  182. .end = INT_PWB_I2C,
  183. .flags = IORESOURCE_IRQ,
  184. },
  185. };
  186. struct platform_device msm_device_i2c = {
  187. .name = "msm_i2c",
  188. .id = 0,
  189. .num_resources = ARRAY_SIZE(resources_i2c),
  190. .resource = resources_i2c,
  191. };
  192. #define MSM_HSUSB_PHYS 0xA0800000
  193. static struct resource resources_hsusb_otg[] = {
  194. {
  195. .start = MSM_HSUSB_PHYS,
  196. .end = MSM_HSUSB_PHYS + SZ_1K - 1,
  197. .flags = IORESOURCE_MEM,
  198. },
  199. {
  200. .start = INT_USB_HS,
  201. .end = INT_USB_HS,
  202. .flags = IORESOURCE_IRQ,
  203. },
  204. };
  205. static u64 dma_mask = 0xffffffffULL;
  206. struct platform_device msm_device_hsusb_otg = {
  207. .name = "msm_hsusb_otg",
  208. .id = -1,
  209. .num_resources = ARRAY_SIZE(resources_hsusb_otg),
  210. .resource = resources_hsusb_otg,
  211. .dev = {
  212. .dma_mask = &dma_mask,
  213. .coherent_dma_mask = 0xffffffffULL,
  214. },
  215. };
  216. static struct resource resources_hsusb_peripheral[] = {
  217. {
  218. .start = MSM_HSUSB_PHYS,
  219. .end = MSM_HSUSB_PHYS + SZ_1K - 1,
  220. .flags = IORESOURCE_MEM,
  221. },
  222. {
  223. .start = INT_USB_HS,
  224. .end = INT_USB_HS,
  225. .flags = IORESOURCE_IRQ,
  226. },
  227. };
  228. static struct resource resources_gadget_peripheral[] = {
  229. {
  230. .start = MSM_HSUSB_PHYS,
  231. .end = MSM_HSUSB_PHYS + SZ_1K - 1,
  232. .flags = IORESOURCE_MEM,
  233. },
  234. {
  235. .start = INT_USB_HS,
  236. .end = INT_USB_HS,
  237. .flags = IORESOURCE_IRQ,
  238. },
  239. };
  240. struct platform_device msm_device_hsusb_peripheral = {
  241. .name = "msm_hsusb_peripheral",
  242. .id = -1,
  243. .num_resources = ARRAY_SIZE(resources_hsusb_peripheral),
  244. .resource = resources_hsusb_peripheral,
  245. .dev = {
  246. .dma_mask = &dma_mask,
  247. .coherent_dma_mask = 0xffffffffULL,
  248. },
  249. };
  250. struct platform_device msm_device_gadget_peripheral = {
  251. .name = "msm_hsusb",
  252. .id = -1,
  253. .num_resources = ARRAY_SIZE(resources_gadget_peripheral),
  254. .resource = resources_gadget_peripheral,
  255. .dev = {
  256. .dma_mask = &dma_mask,
  257. .coherent_dma_mask = 0xffffffffULL,
  258. },
  259. };
  260. #ifdef CONFIG_USB_FS_HOST
  261. #define MSM_HS2USB_PHYS 0xA0800400
  262. static struct resource resources_hsusb_host2[] = {
  263. {
  264. .start = MSM_HS2USB_PHYS,
  265. .end = MSM_HS2USB_PHYS + SZ_1K - 1,
  266. .flags = IORESOURCE_MEM,
  267. },
  268. {
  269. .start = INT_USB_OTG,
  270. .end = INT_USB_OTG,
  271. .flags = IORESOURCE_IRQ,
  272. },
  273. };
  274. struct platform_device msm_device_hsusb_host2 = {
  275. .name = "msm_hsusb_host",
  276. .id = 1,
  277. .num_resources = ARRAY_SIZE(resources_hsusb_host2),
  278. .resource = resources_hsusb_host2,
  279. .dev = {
  280. .dma_mask = &dma_mask,
  281. .coherent_dma_mask = 0xffffffffULL,
  282. },
  283. };
  284. #endif
  285. static struct resource resources_hsusb_host[] = {
  286. {
  287. .start = MSM_HSUSB_PHYS,
  288. .end = MSM_HSUSB_PHYS + SZ_1K - 1,
  289. .flags = IORESOURCE_MEM,
  290. },
  291. {
  292. .start = INT_USB_HS,
  293. .end = INT_USB_HS,
  294. .flags = IORESOURCE_IRQ,
  295. },
  296. };
  297. struct platform_device msm_device_hsusb_host = {
  298. .name = "msm_hsusb_host",
  299. .id = 0,
  300. .num_resources = ARRAY_SIZE(resources_hsusb_host),
  301. .resource = resources_hsusb_host,
  302. .dev = {
  303. .dma_mask = &dma_mask,
  304. .coherent_dma_mask = 0xffffffffULL,
  305. },
  306. };
  307. static struct platform_device *msm_host_devices[] = {
  308. &msm_device_hsusb_host,
  309. #ifdef CONFIG_USB_FS_HOST
  310. &msm_device_hsusb_host2,
  311. #endif
  312. };
  313. int msm_add_host(unsigned int host, struct msm_usb_host_platform_data *plat)
  314. {
  315. struct platform_device *pdev;
  316. pdev = msm_host_devices[host];
  317. if (!pdev)
  318. return -ENODEV;
  319. pdev->dev.platform_data = plat;
  320. return platform_device_register(pdev);
  321. }
  322. #ifdef CONFIG_USB_ANDROID
  323. struct usb_diag_platform_data usb_diag_pdata = {
  324. .ch_name = DIAG_LEGACY,
  325. .update_pid_and_serial_num = usb_diag_update_pid_and_serial_num,
  326. };
  327. struct platform_device usb_diag_device = {
  328. .name = "usb_diag",
  329. .id = -1,
  330. .dev = {
  331. .platform_data = &usb_diag_pdata,
  332. },
  333. };
  334. #endif
  335. #ifdef CONFIG_USB_F_SERIAL
  336. static struct usb_gadget_fserial_platform_data fserial_pdata = {
  337. .no_ports = 2,
  338. };
  339. struct platform_device usb_gadget_fserial_device = {
  340. .name = "usb_fserial",
  341. .id = -1,
  342. .dev = {
  343. .platform_data = &fserial_pdata,
  344. },
  345. };
  346. #endif
  347. #define MSM_NAND_PHYS 0xA0A00000
  348. static struct resource resources_nand[] = {
  349. [0] = {
  350. .name = "msm_nand_dmac",
  351. .start = DMOV_NAND_CHAN,
  352. .end = DMOV_NAND_CHAN,
  353. .flags = IORESOURCE_DMA,
  354. },
  355. [1] = {
  356. .name = "msm_nand_phys",
  357. .start = MSM_NAND_PHYS,
  358. .end = MSM_NAND_PHYS + 0x7FF,
  359. .flags = IORESOURCE_MEM,
  360. },
  361. };
  362. static struct resource resources_otg[] = {
  363. {
  364. .start = MSM_HSUSB_PHYS,
  365. .end = MSM_HSUSB_PHYS + SZ_1K - 1,
  366. .flags = IORESOURCE_MEM,
  367. },
  368. {
  369. .start = INT_USB_HS,
  370. .end = INT_USB_HS,
  371. .flags = IORESOURCE_IRQ,
  372. },
  373. };
  374. struct platform_device msm_device_otg = {
  375. .name = "msm_otg",
  376. .id = -1,
  377. .num_resources = ARRAY_SIZE(resources_otg),
  378. .resource = resources_otg,
  379. .dev = {
  380. .coherent_dma_mask = 0xffffffffULL,
  381. },
  382. };
  383. struct flash_platform_data msm_nand_data = {
  384. .parts = NULL,
  385. .nr_parts = 0,
  386. };
  387. struct platform_device msm_device_nand = {
  388. .name = "msm_nand",
  389. .id = -1,
  390. .num_resources = ARRAY_SIZE(resources_nand),
  391. .resource = resources_nand,
  392. .dev = {
  393. .platform_data = &msm_nand_data,
  394. },
  395. };
  396. static struct msm_pm_irq_calls qsd8x50_pm_irq_calls = {
  397. .irq_pending = msm_irq_pending,
  398. .idle_sleep_allowed = msm_irq_idle_sleep_allowed,
  399. .enter_sleep1 = msm_irq_enter_sleep1,
  400. .enter_sleep2 = msm_irq_enter_sleep2,
  401. .exit_sleep1 = msm_irq_exit_sleep1,
  402. .exit_sleep2 = msm_irq_exit_sleep2,
  403. .exit_sleep3 = msm_irq_exit_sleep3,
  404. };
  405. void __init msm_pm_register_irqs(void)
  406. {
  407. msm_pm_set_irq_extns(&qsd8x50_pm_irq_calls);
  408. }
  409. struct platform_device msm_device_smd = {
  410. .name = "msm_smd",
  411. .id = -1,
  412. };
  413. static struct resource msm_dmov_resource[] = {
  414. {
  415. .start = INT_ADM_AARM,
  416. .flags = IORESOURCE_IRQ,
  417. },
  418. {
  419. .start = 0xA9700000,
  420. .end = 0xA9700000 + SZ_4K - 1,
  421. .flags = IORESOURCE_MEM,
  422. },
  423. };
  424. static struct msm_dmov_pdata msm_dmov_pdata = {
  425. .sd = 3,
  426. .sd_size = 0x400,
  427. };
  428. struct platform_device msm_device_dmov = {
  429. .name = "msm_dmov",
  430. .id = -1,
  431. .resource = msm_dmov_resource,
  432. .num_resources = ARRAY_SIZE(msm_dmov_resource),
  433. .dev = {
  434. .platform_data = &msm_dmov_pdata,
  435. },
  436. };
  437. #define MSM_SDC1_BASE 0xA0300000
  438. #define MSM_SDC2_BASE 0xA0400000
  439. #define MSM_SDC3_BASE 0xA0500000
  440. #define MSM_SDC4_BASE 0xA0600000
  441. static struct resource resources_sdc1[] = {
  442. {
  443. .name = "core_mem",
  444. .start = MSM_SDC1_BASE,
  445. .end = MSM_SDC1_BASE + SZ_4K - 1,
  446. .flags = IORESOURCE_MEM,
  447. },
  448. {
  449. .name = "core_irq",
  450. .start = INT_SDC1_0,
  451. .end = INT_SDC1_1,
  452. .flags = IORESOURCE_IRQ,
  453. },
  454. {
  455. .name = "dma_chnl",
  456. .start = DMOV_SDC1_CHAN,
  457. .end = DMOV_SDC1_CHAN,
  458. .flags = IORESOURCE_DMA,
  459. },
  460. {
  461. .name = "dma_crci",
  462. .start = DMOV_SDC1_CRCI,
  463. .end = DMOV_SDC1_CRCI,
  464. .flags = IORESOURCE_DMA,
  465. }
  466. };
  467. static struct resource resources_sdc2[] = {
  468. {
  469. .name = "core_mem",
  470. .start = MSM_SDC2_BASE,
  471. .end = MSM_SDC2_BASE + SZ_4K - 1,
  472. .flags = IORESOURCE_MEM,
  473. },
  474. {
  475. .name = "core_irq",
  476. .start = INT_SDC2_0,
  477. .end = INT_SDC2_1,
  478. .flags = IORESOURCE_IRQ,
  479. },
  480. {
  481. .name = "dma_chnl",
  482. .start = DMOV_SDC2_CHAN,
  483. .end = DMOV_SDC2_CHAN,
  484. .flags = IORESOURCE_DMA,
  485. },
  486. {
  487. .name = "dma_crci",
  488. .start = DMOV_SDC2_CRCI,
  489. .end = DMOV_SDC2_CRCI,
  490. .flags = IORESOURCE_DMA,
  491. }
  492. };
  493. static struct resource resources_sdc3[] = {
  494. {
  495. .name = "core_mem",
  496. .start = MSM_SDC3_BASE,
  497. .end = MSM_SDC3_BASE + SZ_4K - 1,
  498. .flags = IORESOURCE_MEM,
  499. },
  500. {
  501. .name = "core_irq",
  502. .start = INT_SDC3_0,
  503. .end = INT_SDC3_1,
  504. .flags = IORESOURCE_IRQ,
  505. },
  506. {
  507. .name = "dma_chnl",
  508. .start = DMOV_SDC3_CHAN,
  509. .end = DMOV_SDC3_CHAN,
  510. .flags = IORESOURCE_DMA,
  511. },
  512. {
  513. .name = "dma_crci",
  514. .start = DMOV_SDC3_CRCI,
  515. .end = DMOV_SDC3_CRCI,
  516. .flags = IORESOURCE_DMA,
  517. },
  518. };
  519. static struct resource resources_sdc4[] = {
  520. {
  521. .name = "core_mem",
  522. .start = MSM_SDC4_BASE,
  523. .end = MSM_SDC4_BASE + SZ_4K - 1,
  524. .flags = IORESOURCE_MEM,
  525. },
  526. {
  527. .name = "core_irq",
  528. .start = INT_SDC4_0,
  529. .end = INT_SDC4_1,
  530. .flags = IORESOURCE_IRQ,
  531. },
  532. {
  533. .name = "dma_chnl",
  534. .start = DMOV_SDC4_CHAN,
  535. .end = DMOV_SDC4_CHAN,
  536. .flags = IORESOURCE_DMA,
  537. },
  538. {
  539. .name = "dma_crci",
  540. .start = DMOV_SDC4_CRCI,
  541. .end = DMOV_SDC4_CRCI,
  542. .flags = IORESOURCE_DMA,
  543. },
  544. };
  545. struct platform_device msm_device_sdc1 = {
  546. .name = "msm_sdcc",
  547. .id = 1,
  548. .num_resources = ARRAY_SIZE(resources_sdc1),
  549. .resource = resources_sdc1,
  550. .dev = {
  551. .coherent_dma_mask = 0xffffffff,
  552. },
  553. };
  554. struct platform_device msm_device_sdc2 = {
  555. .name = "msm_sdcc",
  556. .id = 2,
  557. .num_resources = ARRAY_SIZE(resources_sdc2),
  558. .resource = resources_sdc2,
  559. .dev = {
  560. .coherent_dma_mask = 0xffffffff,
  561. },
  562. };
  563. struct platform_device msm_device_sdc3 = {
  564. .name = "msm_sdcc",
  565. .id = 3,
  566. .num_resources = ARRAY_SIZE(resources_sdc3),
  567. .resource = resources_sdc3,
  568. .dev = {
  569. .coherent_dma_mask = 0xffffffff,
  570. },
  571. };
  572. struct platform_device msm_device_sdc4 = {
  573. .name = "msm_sdcc",
  574. .id = 4,
  575. .num_resources = ARRAY_SIZE(resources_sdc4),
  576. .resource = resources_sdc4,
  577. .dev = {
  578. .coherent_dma_mask = 0xffffffff,
  579. },
  580. };
  581. static struct platform_device *msm_sdcc_devices[] __initdata = {
  582. &msm_device_sdc1,
  583. &msm_device_sdc2,
  584. &msm_device_sdc3,
  585. &msm_device_sdc4,
  586. };
  587. int __init msm_add_sdcc(unsigned int controller, struct mmc_platform_data *plat)
  588. {
  589. struct platform_device *pdev;
  590. if (controller < 1 || controller > 4)
  591. return -EINVAL;
  592. pdev = msm_sdcc_devices[controller-1];
  593. pdev->dev.platform_data = plat;
  594. return platform_device_register(pdev);
  595. }
  596. #if defined(CONFIG_FB_MSM_MDP40)
  597. #define MDP_BASE 0xA3F00000
  598. #define PMDH_BASE 0xAD600000
  599. #define EMDH_BASE 0xAD700000
  600. #define TVENC_BASE 0xAD400000
  601. #else
  602. #define MDP_BASE 0xAA200000
  603. #define PMDH_BASE 0xAA600000
  604. #define EMDH_BASE 0xAA700000
  605. #define TVENC_BASE 0xAA400000
  606. #endif
  607. static struct resource msm_mdp_resources[] = {
  608. {
  609. .name = "mdp",
  610. .start = MDP_BASE,
  611. .end = MDP_BASE + 0x000F0000 - 1,
  612. .flags = IORESOURCE_MEM,
  613. },
  614. {
  615. .start = INT_MDP,
  616. .end = INT_MDP,
  617. .flags = IORESOURCE_IRQ,
  618. },
  619. };
  620. static struct resource msm_mddi_resources[] = {
  621. {
  622. .name = "pmdh",
  623. .start = PMDH_BASE,
  624. .end = PMDH_BASE + PAGE_SIZE - 1,
  625. .flags = IORESOURCE_MEM,
  626. }
  627. };
  628. static struct resource msm_mddi_ext_resources[] = {
  629. {
  630. .name = "emdh",
  631. .start = EMDH_BASE,
  632. .end = EMDH_BASE + PAGE_SIZE - 1,
  633. .flags = IORESOURCE_MEM,
  634. }
  635. };
  636. static struct resource msm_ebi2_lcd_resources[] = {
  637. {
  638. .name = "base",
  639. .start = 0xa0d00000,
  640. .end = 0xa0d00000 + PAGE_SIZE - 1,
  641. .flags = IORESOURCE_MEM,
  642. },
  643. {
  644. .name = "lcd01",
  645. .start = 0x98000000,
  646. .end = 0x98000000 + 0x80000 - 1,
  647. .flags = IORESOURCE_MEM,
  648. },
  649. {
  650. .name = "lcd02",
  651. .start = 0x9c000000,
  652. .end = 0x9c000000 + 0x80000 - 1,
  653. .flags = IORESOURCE_MEM,
  654. },
  655. };
  656. static struct resource msm_tvenc_resources[] = {
  657. {
  658. .name = "tvenc",
  659. .start = TVENC_BASE,
  660. .end = TVENC_BASE + PAGE_SIZE - 1,
  661. .flags = IORESOURCE_MEM,
  662. }
  663. };
  664. static struct platform_device msm_mdp_device = {
  665. .name = "mdp",
  666. .id = 0,
  667. .num_resources = ARRAY_SIZE(msm_mdp_resources),
  668. .resource = msm_mdp_resources,
  669. };
  670. static struct platform_device msm_mddi_device = {
  671. .name = "mddi",
  672. .id = 0,
  673. .num_resources = ARRAY_SIZE(msm_mddi_resources),
  674. .resource = msm_mddi_resources,
  675. };
  676. static struct platform_device msm_mddi_ext_device = {
  677. .name = "mddi_ext",
  678. .id = 0,
  679. .num_resources = ARRAY_SIZE(msm_mddi_ext_resources),
  680. .resource = msm_mddi_ext_resources,
  681. };
  682. static struct platform_device msm_ebi2_lcd_device = {
  683. .name = "ebi2_lcd",
  684. .id = 0,
  685. .num_resources = ARRAY_SIZE(msm_ebi2_lcd_resources),
  686. .resource = msm_ebi2_lcd_resources,
  687. };
  688. struct platform_device msm_lcdc_device = {
  689. .name = "lcdc",
  690. .id = 0,
  691. };
  692. static struct platform_device msm_tvenc_device = {
  693. .name = "tvenc",
  694. .id = 0,
  695. .num_resources = ARRAY_SIZE(msm_tvenc_resources),
  696. .resource = msm_tvenc_resources,
  697. };
  698. #if defined(CONFIG_MSM_SOC_REV_A)
  699. #define MSM_QUP_PHYS 0xA1680000
  700. #define MSM_GSBI_QUP_I2C_PHYS 0xA1600000
  701. #define INT_PWB_QUP_ERR INT_GSBI_QUP
  702. #else
  703. #define MSM_QUP_PHYS 0xA9900000
  704. #define MSM_GSBI_QUP_I2C_PHYS 0xA9900000
  705. #define INT_PWB_QUP_ERR INT_PWB_I2C
  706. #endif
  707. #define MSM_QUP_SIZE SZ_4K
  708. static struct resource resources_qup[] = {
  709. {
  710. .name = "qup_phys_addr",
  711. .start = MSM_QUP_PHYS,
  712. .end = MSM_QUP_PHYS + MSM_QUP_SIZE - 1,
  713. .flags = IORESOURCE_MEM,
  714. },
  715. {
  716. .name = "gsbi_qup_i2c_addr",
  717. .start = MSM_GSBI_QUP_I2C_PHYS,
  718. .end = MSM_GSBI_QUP_I2C_PHYS + 4 - 1,
  719. .flags = IORESOURCE_MEM,
  720. },
  721. {
  722. .name = "qup_err_intr",
  723. .start = INT_PWB_QUP_ERR,
  724. .end = INT_PWB_QUP_ERR,
  725. .flags = IORESOURCE_IRQ,
  726. },
  727. };
  728. struct platform_device qup_device_i2c = {
  729. .name = "qup_i2c",
  730. .id = 4,
  731. .num_resources = ARRAY_SIZE(resources_qup),
  732. .resource = resources_qup,
  733. };
  734. /* TSIF begin */
  735. #if defined(CONFIG_TSIF) || defined(CONFIG_TSIF_MODULE)
  736. #define MSM_TSIF_PHYS (0xa0100000)
  737. #define MSM_TSIF_SIZE (0x200)
  738. static struct resource tsif_resources[] = {
  739. [0] = {
  740. .flags = IORESOURCE_IRQ,
  741. .start = INT_TSIF_IRQ,
  742. .end = INT_TSIF_IRQ,
  743. },
  744. [1] = {
  745. .flags = IORESOURCE_MEM,
  746. .start = MSM_TSIF_PHYS,
  747. .end = MSM_TSIF_PHYS + MSM_TSIF_SIZE - 1,
  748. },
  749. [2] = {
  750. .flags = IORESOURCE_DMA,
  751. .start = DMOV_TSIF_CHAN,
  752. .end = DMOV_TSIF_CRCI,
  753. },
  754. };
  755. static void tsif_release(struct device *dev)
  756. {
  757. dev_info(dev, "release\n");
  758. }
  759. struct platform_device msm_device_tsif = {
  760. .name = "msm_tsif",
  761. .id = 0,
  762. .num_resources = ARRAY_SIZE(tsif_resources),
  763. .resource = tsif_resources,
  764. .dev = {
  765. .release = tsif_release,
  766. },
  767. };
  768. #endif /* defined(CONFIG_TSIF) || defined(CONFIG_TSIF_MODULE) */
  769. /* TSIF end */
  770. #define MSM_TSSC_PHYS 0xAA300000
  771. static struct resource resources_tssc[] = {
  772. {
  773. .start = MSM_TSSC_PHYS,
  774. .end = MSM_TSSC_PHYS + SZ_4K - 1,
  775. .name = "tssc",
  776. .flags = IORESOURCE_MEM,
  777. },
  778. {
  779. .start = INT_TCHSCRN1,
  780. .end = INT_TCHSCRN1,
  781. .name = "tssc1",
  782. .flags = IORESOURCE_IRQ | IRQF_TRIGGER_RISING,
  783. },
  784. {
  785. .start = INT_TCHSCRN2,
  786. .end = INT_TCHSCRN2,
  787. .name = "tssc2",
  788. .flags = IORESOURCE_IRQ | IRQF_TRIGGER_RISING,
  789. },
  790. };
  791. struct platform_device msm_device_tssc = {
  792. .name = "msm_touchscreen",
  793. .id = 0,
  794. .num_resources = ARRAY_SIZE(resources_tssc),
  795. .resource = resources_tssc,
  796. };
  797. static void __init msm_register_device(struct platform_device *pdev, void *data)
  798. {
  799. int ret;
  800. pdev->dev.platform_data = data;
  801. ret = platform_device_register(pdev);
  802. if (ret)
  803. dev_err(&pdev->dev,
  804. "%s: platform_device_register() failed = %d\n",
  805. __func__, ret);
  806. }
  807. void __init msm_fb_register_device(char *name, void *data)
  808. {
  809. if (!strncmp(name, "mdp", 3))
  810. msm_register_device(&msm_mdp_device, data);
  811. else if (!strncmp(name, "pmdh", 4))
  812. msm_register_device(&msm_mddi_device, data);
  813. else if (!strncmp(name, "emdh", 4))
  814. msm_register_device(&msm_mddi_ext_device, data);
  815. else if (!strncmp(name, "ebi2", 4))
  816. msm_register_device(&msm_ebi2_lcd_device, data);
  817. else if (!strncmp(name, "tvenc", 5))
  818. msm_register_device(&msm_tvenc_device, data);
  819. else if (!strncmp(name, "lcdc", 4))
  820. msm_register_device(&msm_lcdc_device, data);
  821. else
  822. printk(KERN_ERR "%s: unknown device! %s\n", __func__, name);
  823. }
  824. static struct platform_device msm_camera_device = {
  825. .name = "msm_camera",
  826. .id = 0,
  827. };
  828. void __init msm_camera_register_device(void *res, uint32_t num,
  829. void *data)
  830. {
  831. msm_camera_device.num_resources = num;
  832. msm_camera_device.resource = res;
  833. msm_register_device(&msm_camera_device, data);
  834. }
  835. static struct resource kgsl_3d0_resources[] = {
  836. {
  837. .name = KGSL_3D0_REG_MEMORY,
  838. .start = 0xA0000000,
  839. .end = 0xA001ffff,
  840. .flags = IORESOURCE_MEM,
  841. },
  842. {
  843. .name = KGSL_3D0_IRQ,
  844. .start = INT_GRAPHICS,
  845. .end = INT_GRAPHICS,
  846. .flags = IORESOURCE_IRQ,
  847. },
  848. };
  849. static struct kgsl_device_platform_data kgsl_3d0_pdata = {
  850. .pwrlevel = {
  851. {
  852. .gpu_freq = 0,
  853. .bus_freq = 128000000,
  854. },
  855. },
  856. .init_level = 0,
  857. .num_levels = 1,
  858. .set_grp_async = NULL,
  859. .idle_timeout = HZ/5,
  860. .clk_map = KGSL_CLK_CORE | KGSL_CLK_MEM,
  861. };
  862. struct platform_device msm_kgsl_3d0 = {
  863. .name = "kgsl-3d0",
  864. .id = 0,
  865. .num_resources = ARRAY_SIZE(kgsl_3d0_resources),
  866. .resource = kgsl_3d0_resources,
  867. .dev = {
  868. .platform_data = &kgsl_3d0_pdata,
  869. },
  870. };