board-8064-gpu.c 6.6 KB

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  1. /* Copyright (c) 2012, The Linux Foundation. All rights reserved.
  2. *
  3. * This program is free software; you can redistribute it and/or modify
  4. * it under the terms of the GNU General Public License version 2 and
  5. * only version 2 as published by the Free Software Foundation.
  6. *
  7. * This program is distributed in the hope that it will be useful,
  8. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  10. * GNU General Public License for more details.
  11. *
  12. */
  13. #include <linux/init.h>
  14. #include <linux/platform_device.h>
  15. #include <mach/kgsl.h>
  16. #include <mach/msm_bus_board.h>
  17. #include <mach/board.h>
  18. #include <mach/msm_dcvs.h>
  19. #include <mach/socinfo.h>
  20. #include "devices.h"
  21. #include "board-8064.h"
  22. #ifdef CONFIG_MSM_DCVS
  23. static struct msm_dcvs_freq_entry grp3d_freq[] = {
  24. {0, 900, 0, 0, 0},
  25. {0, 950, 0, 0, 0},
  26. {0, 950, 0, 0, 0},
  27. {0, 1200, 1, 100, 100},
  28. };
  29. static struct msm_dcvs_core_info grp3d_core_info = {
  30. .freq_tbl = &grp3d_freq[0],
  31. .num_cores = 1,
  32. .sensors = (int[]){0},
  33. .thermal_poll_ms = 60000,
  34. .core_param = {
  35. .core_type = MSM_DCVS_CORE_TYPE_GPU,
  36. },
  37. .algo_param = {
  38. .disable_pc_threshold = 0,
  39. .em_win_size_min_us = 100000,
  40. .em_win_size_max_us = 300000,
  41. .em_max_util_pct = 97,
  42. .group_id = 0,
  43. .max_freq_chg_time_us = 100000,
  44. .slack_mode_dynamic = 0,
  45. .slack_time_min_us = 39000,
  46. .slack_time_max_us = 39000,
  47. .ss_win_size_min_us = 1000000,
  48. .ss_win_size_max_us = 1000000,
  49. .ss_util_pct = 95,
  50. .ss_no_corr_below_freq = 0,
  51. },
  52. .energy_coeffs = {
  53. .leakage_coeff_a = -17720,
  54. .leakage_coeff_b = 37,
  55. .leakage_coeff_c = 3329,
  56. .leakage_coeff_d = -277,
  57. .active_coeff_a = 2492,
  58. .active_coeff_b = 0,
  59. .active_coeff_c = 0
  60. },
  61. .power_param = {
  62. .current_temp = 25,
  63. .num_freq = ARRAY_SIZE(grp3d_freq),
  64. }
  65. };
  66. #endif /* CONFIG_MSM_DCVS */
  67. #ifdef CONFIG_MSM_BUS_SCALING
  68. static struct msm_bus_vectors grp3d_init_vectors[] = {
  69. {
  70. .src = MSM_BUS_MASTER_GRAPHICS_3D,
  71. .dst = MSM_BUS_SLAVE_EBI_CH0,
  72. .ab = 0,
  73. .ib = 0,
  74. },
  75. {
  76. .src = MSM_BUS_MASTER_GRAPHICS_3D_PORT1,
  77. .dst = MSM_BUS_SLAVE_EBI_CH0,
  78. .ab = 0,
  79. .ib = 0,
  80. },
  81. };
  82. static struct msm_bus_vectors grp3d_low_vectors[] = {
  83. {
  84. .src = MSM_BUS_MASTER_GRAPHICS_3D,
  85. .dst = MSM_BUS_SLAVE_EBI_CH0,
  86. .ab = 0,
  87. .ib = KGSL_CONVERT_TO_MBPS(1000),
  88. },
  89. {
  90. .src = MSM_BUS_MASTER_GRAPHICS_3D_PORT1,
  91. .dst = MSM_BUS_SLAVE_EBI_CH0,
  92. .ab = 0,
  93. .ib = KGSL_CONVERT_TO_MBPS(1000),
  94. },
  95. };
  96. static struct msm_bus_vectors grp3d_nominal_low_vectors[] = {
  97. {
  98. .src = MSM_BUS_MASTER_GRAPHICS_3D,
  99. .dst = MSM_BUS_SLAVE_EBI_CH0,
  100. .ab = 0,
  101. .ib = KGSL_CONVERT_TO_MBPS(2000),
  102. },
  103. {
  104. .src = MSM_BUS_MASTER_GRAPHICS_3D_PORT1,
  105. .dst = MSM_BUS_SLAVE_EBI_CH0,
  106. .ab = 0,
  107. .ib = KGSL_CONVERT_TO_MBPS(2000),
  108. },
  109. };
  110. static struct msm_bus_vectors grp3d_nominal_high_vectors[] = {
  111. {
  112. .src = MSM_BUS_MASTER_GRAPHICS_3D,
  113. .dst = MSM_BUS_SLAVE_EBI_CH0,
  114. .ab = 0,
  115. .ib = KGSL_CONVERT_TO_MBPS(2656),
  116. },
  117. {
  118. .src = MSM_BUS_MASTER_GRAPHICS_3D_PORT1,
  119. .dst = MSM_BUS_SLAVE_EBI_CH0,
  120. .ab = 0,
  121. .ib = KGSL_CONVERT_TO_MBPS(2656),
  122. },
  123. };
  124. static struct msm_bus_vectors grp3d_max_vectors[] = {
  125. {
  126. .src = MSM_BUS_MASTER_GRAPHICS_3D,
  127. .dst = MSM_BUS_SLAVE_EBI_CH0,
  128. .ab = 0,
  129. .ib = KGSL_CONVERT_TO_MBPS(4264),
  130. },
  131. {
  132. .src = MSM_BUS_MASTER_GRAPHICS_3D_PORT1,
  133. .dst = MSM_BUS_SLAVE_EBI_CH0,
  134. .ab = 0,
  135. .ib = KGSL_CONVERT_TO_MBPS(4264),
  136. },
  137. };
  138. static struct msm_bus_paths grp3d_bus_scale_usecases[] = {
  139. {
  140. ARRAY_SIZE(grp3d_init_vectors),
  141. grp3d_init_vectors,
  142. },
  143. {
  144. ARRAY_SIZE(grp3d_low_vectors),
  145. grp3d_low_vectors,
  146. },
  147. {
  148. ARRAY_SIZE(grp3d_nominal_low_vectors),
  149. grp3d_nominal_low_vectors,
  150. },
  151. {
  152. ARRAY_SIZE(grp3d_nominal_high_vectors),
  153. grp3d_nominal_high_vectors,
  154. },
  155. {
  156. ARRAY_SIZE(grp3d_max_vectors),
  157. grp3d_max_vectors,
  158. },
  159. };
  160. static struct msm_bus_scale_pdata grp3d_bus_scale_pdata = {
  161. grp3d_bus_scale_usecases,
  162. ARRAY_SIZE(grp3d_bus_scale_usecases),
  163. .name = "grp3d",
  164. };
  165. #endif
  166. static struct resource kgsl_3d0_resources[] = {
  167. {
  168. .name = KGSL_3D0_REG_MEMORY,
  169. .start = 0x04300000, /* GFX3D address */
  170. .end = 0x0430ffff,
  171. .flags = IORESOURCE_MEM,
  172. },
  173. {
  174. .name = KGSL_3D0_SHADER_MEMORY,
  175. .start = 0x04310000, /* Shader Mem Address */
  176. .end = 0x0431ffff,
  177. .flags = IORESOURCE_MEM,
  178. },
  179. {
  180. .name = KGSL_3D0_IRQ,
  181. .start = GFX3D_IRQ,
  182. .end = GFX3D_IRQ,
  183. .flags = IORESOURCE_IRQ,
  184. },
  185. };
  186. static const struct kgsl_iommu_ctx kgsl_3d0_iommu0_ctxs[] = {
  187. { "gfx3d_user", 0 },
  188. { "gfx3d_priv", 1 },
  189. };
  190. static const struct kgsl_iommu_ctx kgsl_3d0_iommu1_ctxs[] = {
  191. { "gfx3d1_user", 0 },
  192. { "gfx3d1_priv", 1 },
  193. };
  194. static struct kgsl_device_iommu_data kgsl_3d0_iommu_data[] = {
  195. {
  196. .iommu_ctxs = kgsl_3d0_iommu0_ctxs,
  197. .iommu_ctx_count = ARRAY_SIZE(kgsl_3d0_iommu0_ctxs),
  198. .physstart = 0x07C00000,
  199. .physend = 0x07C00000 + SZ_1M - 1,
  200. },
  201. {
  202. .iommu_ctxs = kgsl_3d0_iommu1_ctxs,
  203. .iommu_ctx_count = ARRAY_SIZE(kgsl_3d0_iommu1_ctxs),
  204. .physstart = 0x07D00000,
  205. .physend = 0x07D00000 + SZ_1M - 1,
  206. },
  207. };
  208. static struct kgsl_device_platform_data kgsl_3d0_pdata = {
  209. .pwrlevel = {
  210. {
  211. .gpu_freq = 400000000,
  212. .bus_freq = 4,
  213. .io_fraction = 0,
  214. },
  215. {
  216. .gpu_freq = 320000000,
  217. .bus_freq = 3,
  218. .io_fraction = 33,
  219. },
  220. {
  221. .gpu_freq = 200000000,
  222. .bus_freq = 2,
  223. .io_fraction = 100,
  224. },
  225. {
  226. .gpu_freq = 128000000,
  227. .bus_freq = 1,
  228. .io_fraction = 100,
  229. },
  230. {
  231. .gpu_freq = 27000000,
  232. .bus_freq = 0,
  233. },
  234. },
  235. .init_level = 1,
  236. .num_levels = 5,
  237. .set_grp_async = NULL,
  238. .idle_timeout = HZ/10,
  239. .strtstp_sleepwake = true,
  240. .clk_map = KGSL_CLK_CORE | KGSL_CLK_IFACE | KGSL_CLK_MEM_IFACE,
  241. #ifdef CONFIG_MSM_BUS_SCALING
  242. .bus_scale_table = &grp3d_bus_scale_pdata,
  243. #endif
  244. .iommu_data = kgsl_3d0_iommu_data,
  245. .iommu_count = ARRAY_SIZE(kgsl_3d0_iommu_data),
  246. #ifdef CONFIG_MSM_DCVS
  247. .core_info = &grp3d_core_info,
  248. #endif
  249. };
  250. struct platform_device device_kgsl_3d0 = {
  251. .name = "kgsl-3d0",
  252. .id = 0,
  253. .num_resources = ARRAY_SIZE(kgsl_3d0_resources),
  254. .resource = kgsl_3d0_resources,
  255. .dev = {
  256. .platform_data = &kgsl_3d0_pdata,
  257. },
  258. };
  259. void __init apq8064_init_gpu(void)
  260. {
  261. unsigned int version = socinfo_get_version();
  262. if (cpu_is_apq8064ab())
  263. kgsl_3d0_pdata.pwrlevel[0].gpu_freq = 450000000;
  264. if (SOCINFO_VERSION_MAJOR(version) == 2) {
  265. kgsl_3d0_pdata.chipid = ADRENO_CHIPID(3, 2, 0, 2);
  266. } else {
  267. /* The bootloader has started returning 1.2 for chips that
  268. are either 1.1 or 1.2. To handle that and default any
  269. future revisions to this path, check for minor version >=1 */
  270. if ((SOCINFO_VERSION_MAJOR(version) == 1) &&
  271. (SOCINFO_VERSION_MINOR(version) >= 1))
  272. kgsl_3d0_pdata.chipid = ADRENO_CHIPID(3, 2, 0, 1);
  273. else
  274. kgsl_3d0_pdata.chipid = ADRENO_CHIPID(3, 2, 0, 0);
  275. }
  276. platform_device_register(&device_kgsl_3d0);
  277. }