events.c 42 KB

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  1. /*
  2. * Xen event channels
  3. *
  4. * Xen models interrupts with abstract event channels. Because each
  5. * domain gets 1024 event channels, but NR_IRQ is not that large, we
  6. * must dynamically map irqs<->event channels. The event channels
  7. * interface with the rest of the kernel by defining a xen interrupt
  8. * chip. When an event is received, it is mapped to an irq and sent
  9. * through the normal interrupt processing path.
  10. *
  11. * There are four kinds of events which can be mapped to an event
  12. * channel:
  13. *
  14. * 1. Inter-domain notifications. This includes all the virtual
  15. * device events, since they're driven by front-ends in another domain
  16. * (typically dom0).
  17. * 2. VIRQs, typically used for timers. These are per-cpu events.
  18. * 3. IPIs.
  19. * 4. PIRQs - Hardware interrupts.
  20. *
  21. * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
  22. */
  23. #include <linux/linkage.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/irq.h>
  26. #include <linux/module.h>
  27. #include <linux/string.h>
  28. #include <linux/bootmem.h>
  29. #include <linux/slab.h>
  30. #include <linux/irqnr.h>
  31. #include <linux/pci.h>
  32. #include <asm/desc.h>
  33. #include <asm/ptrace.h>
  34. #include <asm/irq.h>
  35. #include <asm/idle.h>
  36. #include <asm/io_apic.h>
  37. #include <asm/sync_bitops.h>
  38. #include <asm/xen/page.h>
  39. #include <asm/xen/pci.h>
  40. #include <asm/xen/hypercall.h>
  41. #include <asm/xen/hypervisor.h>
  42. #include <xen/xen.h>
  43. #include <xen/hvm.h>
  44. #include <xen/xen-ops.h>
  45. #include <xen/events.h>
  46. #include <xen/interface/xen.h>
  47. #include <xen/interface/event_channel.h>
  48. #include <xen/interface/hvm/hvm_op.h>
  49. #include <xen/interface/hvm/params.h>
  50. /*
  51. * This lock protects updates to the following mapping and reference-count
  52. * arrays. The lock does not need to be acquired to read the mapping tables.
  53. */
  54. static DEFINE_MUTEX(irq_mapping_update_lock);
  55. static LIST_HEAD(xen_irq_list_head);
  56. /* IRQ <-> VIRQ mapping. */
  57. static DEFINE_PER_CPU(int [NR_VIRQS], virq_to_irq) = {[0 ... NR_VIRQS-1] = -1};
  58. /* IRQ <-> IPI mapping */
  59. static DEFINE_PER_CPU(int [XEN_NR_IPIS], ipi_to_irq) = {[0 ... XEN_NR_IPIS-1] = -1};
  60. /* Interrupt types. */
  61. enum xen_irq_type {
  62. IRQT_UNBOUND = 0,
  63. IRQT_PIRQ,
  64. IRQT_VIRQ,
  65. IRQT_IPI,
  66. IRQT_EVTCHN
  67. };
  68. /*
  69. * Packed IRQ information:
  70. * type - enum xen_irq_type
  71. * event channel - irq->event channel mapping
  72. * cpu - cpu this event channel is bound to
  73. * index - type-specific information:
  74. * PIRQ - vector, with MSB being "needs EIO", or physical IRQ of the HVM
  75. * guest, or GSI (real passthrough IRQ) of the device.
  76. * VIRQ - virq number
  77. * IPI - IPI vector
  78. * EVTCHN -
  79. */
  80. struct irq_info {
  81. struct list_head list;
  82. int refcnt;
  83. enum xen_irq_type type; /* type */
  84. unsigned irq;
  85. unsigned short evtchn; /* event channel */
  86. unsigned short cpu; /* cpu bound */
  87. union {
  88. unsigned short virq;
  89. enum ipi_vector ipi;
  90. struct {
  91. unsigned short pirq;
  92. unsigned short gsi;
  93. unsigned char vector;
  94. unsigned char flags;
  95. uint16_t domid;
  96. } pirq;
  97. } u;
  98. };
  99. #define PIRQ_NEEDS_EOI (1 << 0)
  100. #define PIRQ_SHAREABLE (1 << 1)
  101. static int *evtchn_to_irq;
  102. static unsigned long *pirq_eoi_map;
  103. static bool (*pirq_needs_eoi)(unsigned irq);
  104. static DEFINE_PER_CPU(unsigned long [NR_EVENT_CHANNELS/BITS_PER_LONG],
  105. cpu_evtchn_mask);
  106. /* Xen will never allocate port zero for any purpose. */
  107. #define VALID_EVTCHN(chn) ((chn) != 0)
  108. static struct irq_chip xen_dynamic_chip;
  109. static struct irq_chip xen_percpu_chip;
  110. static struct irq_chip xen_pirq_chip;
  111. static void enable_dynirq(struct irq_data *data);
  112. static void disable_dynirq(struct irq_data *data);
  113. /* Get info for IRQ */
  114. static struct irq_info *info_for_irq(unsigned irq)
  115. {
  116. return irq_get_handler_data(irq);
  117. }
  118. /* Constructors for packed IRQ information. */
  119. static void xen_irq_info_common_init(struct irq_info *info,
  120. unsigned irq,
  121. enum xen_irq_type type,
  122. unsigned short evtchn,
  123. unsigned short cpu)
  124. {
  125. BUG_ON(info->type != IRQT_UNBOUND && info->type != type);
  126. info->type = type;
  127. info->irq = irq;
  128. info->evtchn = evtchn;
  129. info->cpu = cpu;
  130. evtchn_to_irq[evtchn] = irq;
  131. }
  132. static void xen_irq_info_evtchn_init(unsigned irq,
  133. unsigned short evtchn)
  134. {
  135. struct irq_info *info = info_for_irq(irq);
  136. xen_irq_info_common_init(info, irq, IRQT_EVTCHN, evtchn, 0);
  137. }
  138. static void xen_irq_info_ipi_init(unsigned cpu,
  139. unsigned irq,
  140. unsigned short evtchn,
  141. enum ipi_vector ipi)
  142. {
  143. struct irq_info *info = info_for_irq(irq);
  144. xen_irq_info_common_init(info, irq, IRQT_IPI, evtchn, 0);
  145. info->u.ipi = ipi;
  146. per_cpu(ipi_to_irq, cpu)[ipi] = irq;
  147. }
  148. static void xen_irq_info_virq_init(unsigned cpu,
  149. unsigned irq,
  150. unsigned short evtchn,
  151. unsigned short virq)
  152. {
  153. struct irq_info *info = info_for_irq(irq);
  154. xen_irq_info_common_init(info, irq, IRQT_VIRQ, evtchn, 0);
  155. info->u.virq = virq;
  156. per_cpu(virq_to_irq, cpu)[virq] = irq;
  157. }
  158. static void xen_irq_info_pirq_init(unsigned irq,
  159. unsigned short evtchn,
  160. unsigned short pirq,
  161. unsigned short gsi,
  162. unsigned short vector,
  163. uint16_t domid,
  164. unsigned char flags)
  165. {
  166. struct irq_info *info = info_for_irq(irq);
  167. xen_irq_info_common_init(info, irq, IRQT_PIRQ, evtchn, 0);
  168. info->u.pirq.pirq = pirq;
  169. info->u.pirq.gsi = gsi;
  170. info->u.pirq.vector = vector;
  171. info->u.pirq.domid = domid;
  172. info->u.pirq.flags = flags;
  173. }
  174. /*
  175. * Accessors for packed IRQ information.
  176. */
  177. static unsigned int evtchn_from_irq(unsigned irq)
  178. {
  179. if (unlikely(WARN(irq < 0 || irq >= nr_irqs, "Invalid irq %d!\n", irq)))
  180. return 0;
  181. return info_for_irq(irq)->evtchn;
  182. }
  183. unsigned irq_from_evtchn(unsigned int evtchn)
  184. {
  185. return evtchn_to_irq[evtchn];
  186. }
  187. EXPORT_SYMBOL_GPL(irq_from_evtchn);
  188. static enum ipi_vector ipi_from_irq(unsigned irq)
  189. {
  190. struct irq_info *info = info_for_irq(irq);
  191. BUG_ON(info == NULL);
  192. BUG_ON(info->type != IRQT_IPI);
  193. return info->u.ipi;
  194. }
  195. static unsigned virq_from_irq(unsigned irq)
  196. {
  197. struct irq_info *info = info_for_irq(irq);
  198. BUG_ON(info == NULL);
  199. BUG_ON(info->type != IRQT_VIRQ);
  200. return info->u.virq;
  201. }
  202. static unsigned pirq_from_irq(unsigned irq)
  203. {
  204. struct irq_info *info = info_for_irq(irq);
  205. BUG_ON(info == NULL);
  206. BUG_ON(info->type != IRQT_PIRQ);
  207. return info->u.pirq.pirq;
  208. }
  209. static enum xen_irq_type type_from_irq(unsigned irq)
  210. {
  211. return info_for_irq(irq)->type;
  212. }
  213. static unsigned cpu_from_irq(unsigned irq)
  214. {
  215. return info_for_irq(irq)->cpu;
  216. }
  217. static unsigned int cpu_from_evtchn(unsigned int evtchn)
  218. {
  219. int irq = evtchn_to_irq[evtchn];
  220. unsigned ret = 0;
  221. if (irq != -1)
  222. ret = cpu_from_irq(irq);
  223. return ret;
  224. }
  225. static bool pirq_check_eoi_map(unsigned irq)
  226. {
  227. return test_bit(pirq_from_irq(irq), pirq_eoi_map);
  228. }
  229. static bool pirq_needs_eoi_flag(unsigned irq)
  230. {
  231. struct irq_info *info = info_for_irq(irq);
  232. BUG_ON(info->type != IRQT_PIRQ);
  233. return info->u.pirq.flags & PIRQ_NEEDS_EOI;
  234. }
  235. static inline unsigned long active_evtchns(unsigned int cpu,
  236. struct shared_info *sh,
  237. unsigned int idx)
  238. {
  239. return sh->evtchn_pending[idx] &
  240. per_cpu(cpu_evtchn_mask, cpu)[idx] &
  241. ~sh->evtchn_mask[idx];
  242. }
  243. static void bind_evtchn_to_cpu(unsigned int chn, unsigned int cpu)
  244. {
  245. int irq = evtchn_to_irq[chn];
  246. BUG_ON(irq == -1);
  247. #ifdef CONFIG_SMP
  248. cpumask_copy(irq_to_desc(irq)->irq_data.affinity, cpumask_of(cpu));
  249. #endif
  250. clear_bit(chn, per_cpu(cpu_evtchn_mask, cpu_from_irq(irq)));
  251. set_bit(chn, per_cpu(cpu_evtchn_mask, cpu));
  252. info_for_irq(irq)->cpu = cpu;
  253. }
  254. static void init_evtchn_cpu_bindings(void)
  255. {
  256. int i;
  257. #ifdef CONFIG_SMP
  258. struct irq_info *info;
  259. /* By default all event channels notify CPU#0. */
  260. list_for_each_entry(info, &xen_irq_list_head, list) {
  261. struct irq_desc *desc = irq_to_desc(info->irq);
  262. cpumask_copy(desc->irq_data.affinity, cpumask_of(0));
  263. }
  264. #endif
  265. for_each_possible_cpu(i)
  266. memset(per_cpu(cpu_evtchn_mask, i),
  267. (i == 0) ? ~0 : 0, NR_EVENT_CHANNELS/8);
  268. }
  269. static inline void clear_evtchn(int port)
  270. {
  271. struct shared_info *s = HYPERVISOR_shared_info;
  272. sync_clear_bit(port, &s->evtchn_pending[0]);
  273. }
  274. static inline void set_evtchn(int port)
  275. {
  276. struct shared_info *s = HYPERVISOR_shared_info;
  277. sync_set_bit(port, &s->evtchn_pending[0]);
  278. }
  279. static inline int test_evtchn(int port)
  280. {
  281. struct shared_info *s = HYPERVISOR_shared_info;
  282. return sync_test_bit(port, &s->evtchn_pending[0]);
  283. }
  284. /**
  285. * notify_remote_via_irq - send event to remote end of event channel via irq
  286. * @irq: irq of event channel to send event to
  287. *
  288. * Unlike notify_remote_via_evtchn(), this is safe to use across
  289. * save/restore. Notifications on a broken connection are silently
  290. * dropped.
  291. */
  292. void notify_remote_via_irq(int irq)
  293. {
  294. int evtchn = evtchn_from_irq(irq);
  295. if (VALID_EVTCHN(evtchn))
  296. notify_remote_via_evtchn(evtchn);
  297. }
  298. EXPORT_SYMBOL_GPL(notify_remote_via_irq);
  299. static void mask_evtchn(int port)
  300. {
  301. struct shared_info *s = HYPERVISOR_shared_info;
  302. sync_set_bit(port, &s->evtchn_mask[0]);
  303. }
  304. static void unmask_evtchn(int port)
  305. {
  306. struct shared_info *s = HYPERVISOR_shared_info;
  307. unsigned int cpu = get_cpu();
  308. BUG_ON(!irqs_disabled());
  309. /* Slow path (hypercall) if this is a non-local port. */
  310. if (unlikely(cpu != cpu_from_evtchn(port))) {
  311. struct evtchn_unmask unmask = { .port = port };
  312. (void)HYPERVISOR_event_channel_op(EVTCHNOP_unmask, &unmask);
  313. } else {
  314. struct vcpu_info *vcpu_info = __this_cpu_read(xen_vcpu);
  315. sync_clear_bit(port, &s->evtchn_mask[0]);
  316. /*
  317. * The following is basically the equivalent of
  318. * 'hw_resend_irq'. Just like a real IO-APIC we 'lose
  319. * the interrupt edge' if the channel is masked.
  320. */
  321. if (sync_test_bit(port, &s->evtchn_pending[0]) &&
  322. !sync_test_and_set_bit(port / BITS_PER_LONG,
  323. &vcpu_info->evtchn_pending_sel))
  324. vcpu_info->evtchn_upcall_pending = 1;
  325. }
  326. put_cpu();
  327. }
  328. static void xen_irq_init(unsigned irq)
  329. {
  330. struct irq_info *info;
  331. #ifdef CONFIG_SMP
  332. struct irq_desc *desc = irq_to_desc(irq);
  333. /* By default all event channels notify CPU#0. */
  334. cpumask_copy(desc->irq_data.affinity, cpumask_of(0));
  335. #endif
  336. info = kzalloc(sizeof(*info), GFP_KERNEL);
  337. if (info == NULL)
  338. panic("Unable to allocate metadata for IRQ%d\n", irq);
  339. info->type = IRQT_UNBOUND;
  340. info->refcnt = -1;
  341. irq_set_handler_data(irq, info);
  342. list_add_tail(&info->list, &xen_irq_list_head);
  343. }
  344. static int __must_check xen_allocate_irq_dynamic(void)
  345. {
  346. int first = 0;
  347. int irq;
  348. #ifdef CONFIG_X86_IO_APIC
  349. /*
  350. * For an HVM guest or domain 0 which see "real" (emulated or
  351. * actual respectively) GSIs we allocate dynamic IRQs
  352. * e.g. those corresponding to event channels or MSIs
  353. * etc. from the range above those "real" GSIs to avoid
  354. * collisions.
  355. */
  356. if (xen_initial_domain() || xen_hvm_domain())
  357. first = get_nr_irqs_gsi();
  358. #endif
  359. irq = irq_alloc_desc_from(first, -1);
  360. if (irq >= 0)
  361. xen_irq_init(irq);
  362. return irq;
  363. }
  364. static int __must_check xen_allocate_irq_gsi(unsigned gsi)
  365. {
  366. int irq;
  367. /*
  368. * A PV guest has no concept of a GSI (since it has no ACPI
  369. * nor access to/knowledge of the physical APICs). Therefore
  370. * all IRQs are dynamically allocated from the entire IRQ
  371. * space.
  372. */
  373. if (xen_pv_domain() && !xen_initial_domain())
  374. return xen_allocate_irq_dynamic();
  375. /* Legacy IRQ descriptors are already allocated by the arch. */
  376. if (gsi < NR_IRQS_LEGACY)
  377. irq = gsi;
  378. else
  379. irq = irq_alloc_desc_at(gsi, -1);
  380. xen_irq_init(irq);
  381. return irq;
  382. }
  383. static void xen_free_irq(unsigned irq)
  384. {
  385. struct irq_info *info = irq_get_handler_data(irq);
  386. list_del(&info->list);
  387. irq_set_handler_data(irq, NULL);
  388. WARN_ON(info->refcnt > 0);
  389. kfree(info);
  390. /* Legacy IRQ descriptors are managed by the arch. */
  391. if (irq < NR_IRQS_LEGACY)
  392. return;
  393. irq_free_desc(irq);
  394. }
  395. static void pirq_query_unmask(int irq)
  396. {
  397. struct physdev_irq_status_query irq_status;
  398. struct irq_info *info = info_for_irq(irq);
  399. BUG_ON(info->type != IRQT_PIRQ);
  400. irq_status.irq = pirq_from_irq(irq);
  401. if (HYPERVISOR_physdev_op(PHYSDEVOP_irq_status_query, &irq_status))
  402. irq_status.flags = 0;
  403. info->u.pirq.flags &= ~PIRQ_NEEDS_EOI;
  404. if (irq_status.flags & XENIRQSTAT_needs_eoi)
  405. info->u.pirq.flags |= PIRQ_NEEDS_EOI;
  406. }
  407. static bool probing_irq(int irq)
  408. {
  409. struct irq_desc *desc = irq_to_desc(irq);
  410. return desc && desc->action == NULL;
  411. }
  412. static void eoi_pirq(struct irq_data *data)
  413. {
  414. int evtchn = evtchn_from_irq(data->irq);
  415. struct physdev_eoi eoi = { .irq = pirq_from_irq(data->irq) };
  416. int rc = 0;
  417. irq_move_irq(data);
  418. if (VALID_EVTCHN(evtchn))
  419. clear_evtchn(evtchn);
  420. if (pirq_needs_eoi(data->irq)) {
  421. rc = HYPERVISOR_physdev_op(PHYSDEVOP_eoi, &eoi);
  422. WARN_ON(rc);
  423. }
  424. }
  425. static void mask_ack_pirq(struct irq_data *data)
  426. {
  427. disable_dynirq(data);
  428. eoi_pirq(data);
  429. }
  430. static unsigned int __startup_pirq(unsigned int irq)
  431. {
  432. struct evtchn_bind_pirq bind_pirq;
  433. struct irq_info *info = info_for_irq(irq);
  434. int evtchn = evtchn_from_irq(irq);
  435. int rc;
  436. BUG_ON(info->type != IRQT_PIRQ);
  437. if (VALID_EVTCHN(evtchn))
  438. goto out;
  439. bind_pirq.pirq = pirq_from_irq(irq);
  440. /* NB. We are happy to share unless we are probing. */
  441. bind_pirq.flags = info->u.pirq.flags & PIRQ_SHAREABLE ?
  442. BIND_PIRQ__WILL_SHARE : 0;
  443. rc = HYPERVISOR_event_channel_op(EVTCHNOP_bind_pirq, &bind_pirq);
  444. if (rc != 0) {
  445. if (!probing_irq(irq))
  446. printk(KERN_INFO "Failed to obtain physical IRQ %d\n",
  447. irq);
  448. return 0;
  449. }
  450. evtchn = bind_pirq.port;
  451. pirq_query_unmask(irq);
  452. evtchn_to_irq[evtchn] = irq;
  453. info->evtchn = evtchn;
  454. bind_evtchn_to_cpu(evtchn, 0);
  455. out:
  456. unmask_evtchn(evtchn);
  457. eoi_pirq(irq_get_irq_data(irq));
  458. return 0;
  459. }
  460. static unsigned int startup_pirq(struct irq_data *data)
  461. {
  462. return __startup_pirq(data->irq);
  463. }
  464. static void shutdown_pirq(struct irq_data *data)
  465. {
  466. struct evtchn_close close;
  467. unsigned int irq = data->irq;
  468. struct irq_info *info = info_for_irq(irq);
  469. int evtchn = evtchn_from_irq(irq);
  470. BUG_ON(info->type != IRQT_PIRQ);
  471. if (!VALID_EVTCHN(evtchn))
  472. return;
  473. mask_evtchn(evtchn);
  474. close.port = evtchn;
  475. if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close) != 0)
  476. BUG();
  477. bind_evtchn_to_cpu(evtchn, 0);
  478. evtchn_to_irq[evtchn] = -1;
  479. info->evtchn = 0;
  480. }
  481. static void enable_pirq(struct irq_data *data)
  482. {
  483. startup_pirq(data);
  484. }
  485. static void disable_pirq(struct irq_data *data)
  486. {
  487. disable_dynirq(data);
  488. }
  489. int xen_irq_from_gsi(unsigned gsi)
  490. {
  491. struct irq_info *info;
  492. list_for_each_entry(info, &xen_irq_list_head, list) {
  493. if (info->type != IRQT_PIRQ)
  494. continue;
  495. if (info->u.pirq.gsi == gsi)
  496. return info->irq;
  497. }
  498. return -1;
  499. }
  500. EXPORT_SYMBOL_GPL(xen_irq_from_gsi);
  501. /*
  502. * Do not make any assumptions regarding the relationship between the
  503. * IRQ number returned here and the Xen pirq argument.
  504. *
  505. * Note: We don't assign an event channel until the irq actually started
  506. * up. Return an existing irq if we've already got one for the gsi.
  507. *
  508. * Shareable implies level triggered, not shareable implies edge
  509. * triggered here.
  510. */
  511. int xen_bind_pirq_gsi_to_irq(unsigned gsi,
  512. unsigned pirq, int shareable, char *name)
  513. {
  514. int irq = -1;
  515. struct physdev_irq irq_op;
  516. mutex_lock(&irq_mapping_update_lock);
  517. irq = xen_irq_from_gsi(gsi);
  518. if (irq != -1) {
  519. printk(KERN_INFO "xen_map_pirq_gsi: returning irq %d for gsi %u\n",
  520. irq, gsi);
  521. goto out;
  522. }
  523. irq = xen_allocate_irq_gsi(gsi);
  524. if (irq < 0)
  525. goto out;
  526. irq_op.irq = irq;
  527. irq_op.vector = 0;
  528. /* Only the privileged domain can do this. For non-priv, the pcifront
  529. * driver provides a PCI bus that does the call to do exactly
  530. * this in the priv domain. */
  531. if (xen_initial_domain() &&
  532. HYPERVISOR_physdev_op(PHYSDEVOP_alloc_irq_vector, &irq_op)) {
  533. xen_free_irq(irq);
  534. irq = -ENOSPC;
  535. goto out;
  536. }
  537. xen_irq_info_pirq_init(irq, 0, pirq, gsi, irq_op.vector, DOMID_SELF,
  538. shareable ? PIRQ_SHAREABLE : 0);
  539. pirq_query_unmask(irq);
  540. /* We try to use the handler with the appropriate semantic for the
  541. * type of interrupt: if the interrupt is an edge triggered
  542. * interrupt we use handle_edge_irq.
  543. *
  544. * On the other hand if the interrupt is level triggered we use
  545. * handle_fasteoi_irq like the native code does for this kind of
  546. * interrupts.
  547. *
  548. * Depending on the Xen version, pirq_needs_eoi might return true
  549. * not only for level triggered interrupts but for edge triggered
  550. * interrupts too. In any case Xen always honors the eoi mechanism,
  551. * not injecting any more pirqs of the same kind if the first one
  552. * hasn't received an eoi yet. Therefore using the fasteoi handler
  553. * is the right choice either way.
  554. */
  555. if (shareable)
  556. irq_set_chip_and_handler_name(irq, &xen_pirq_chip,
  557. handle_fasteoi_irq, name);
  558. else
  559. irq_set_chip_and_handler_name(irq, &xen_pirq_chip,
  560. handle_edge_irq, name);
  561. out:
  562. mutex_unlock(&irq_mapping_update_lock);
  563. return irq;
  564. }
  565. #ifdef CONFIG_PCI_MSI
  566. int xen_allocate_pirq_msi(struct pci_dev *dev, struct msi_desc *msidesc)
  567. {
  568. int rc;
  569. struct physdev_get_free_pirq op_get_free_pirq;
  570. op_get_free_pirq.type = MAP_PIRQ_TYPE_MSI;
  571. rc = HYPERVISOR_physdev_op(PHYSDEVOP_get_free_pirq, &op_get_free_pirq);
  572. WARN_ONCE(rc == -ENOSYS,
  573. "hypervisor does not support the PHYSDEVOP_get_free_pirq interface\n");
  574. return rc ? -1 : op_get_free_pirq.pirq;
  575. }
  576. int xen_bind_pirq_msi_to_irq(struct pci_dev *dev, struct msi_desc *msidesc,
  577. int pirq, int vector, const char *name,
  578. domid_t domid)
  579. {
  580. int irq, ret;
  581. mutex_lock(&irq_mapping_update_lock);
  582. irq = xen_allocate_irq_dynamic();
  583. if (irq < 0)
  584. goto out;
  585. irq_set_chip_and_handler_name(irq, &xen_pirq_chip, handle_edge_irq,
  586. name);
  587. xen_irq_info_pirq_init(irq, 0, pirq, 0, vector, domid, 0);
  588. ret = irq_set_msi_desc(irq, msidesc);
  589. if (ret < 0)
  590. goto error_irq;
  591. out:
  592. mutex_unlock(&irq_mapping_update_lock);
  593. return irq;
  594. error_irq:
  595. mutex_unlock(&irq_mapping_update_lock);
  596. xen_free_irq(irq);
  597. return ret;
  598. }
  599. #endif
  600. int xen_destroy_irq(int irq)
  601. {
  602. struct irq_desc *desc;
  603. struct physdev_unmap_pirq unmap_irq;
  604. struct irq_info *info = info_for_irq(irq);
  605. int rc = -ENOENT;
  606. mutex_lock(&irq_mapping_update_lock);
  607. desc = irq_to_desc(irq);
  608. if (!desc)
  609. goto out;
  610. if (xen_initial_domain()) {
  611. unmap_irq.pirq = info->u.pirq.pirq;
  612. unmap_irq.domid = info->u.pirq.domid;
  613. rc = HYPERVISOR_physdev_op(PHYSDEVOP_unmap_pirq, &unmap_irq);
  614. /* If another domain quits without making the pci_disable_msix
  615. * call, the Xen hypervisor takes care of freeing the PIRQs
  616. * (free_domain_pirqs).
  617. */
  618. if ((rc == -ESRCH && info->u.pirq.domid != DOMID_SELF))
  619. printk(KERN_INFO "domain %d does not have %d anymore\n",
  620. info->u.pirq.domid, info->u.pirq.pirq);
  621. else if (rc) {
  622. printk(KERN_WARNING "unmap irq failed %d\n", rc);
  623. goto out;
  624. }
  625. }
  626. xen_free_irq(irq);
  627. out:
  628. mutex_unlock(&irq_mapping_update_lock);
  629. return rc;
  630. }
  631. int xen_irq_from_pirq(unsigned pirq)
  632. {
  633. int irq;
  634. struct irq_info *info;
  635. mutex_lock(&irq_mapping_update_lock);
  636. list_for_each_entry(info, &xen_irq_list_head, list) {
  637. if (info->type != IRQT_PIRQ)
  638. continue;
  639. irq = info->irq;
  640. if (info->u.pirq.pirq == pirq)
  641. goto out;
  642. }
  643. irq = -1;
  644. out:
  645. mutex_unlock(&irq_mapping_update_lock);
  646. return irq;
  647. }
  648. int xen_pirq_from_irq(unsigned irq)
  649. {
  650. return pirq_from_irq(irq);
  651. }
  652. EXPORT_SYMBOL_GPL(xen_pirq_from_irq);
  653. int bind_evtchn_to_irq(unsigned int evtchn)
  654. {
  655. int irq;
  656. mutex_lock(&irq_mapping_update_lock);
  657. irq = evtchn_to_irq[evtchn];
  658. if (irq == -1) {
  659. irq = xen_allocate_irq_dynamic();
  660. if (irq == -1)
  661. goto out;
  662. irq_set_chip_and_handler_name(irq, &xen_dynamic_chip,
  663. handle_edge_irq, "event");
  664. xen_irq_info_evtchn_init(irq, evtchn);
  665. }
  666. out:
  667. mutex_unlock(&irq_mapping_update_lock);
  668. return irq;
  669. }
  670. EXPORT_SYMBOL_GPL(bind_evtchn_to_irq);
  671. static int bind_ipi_to_irq(unsigned int ipi, unsigned int cpu)
  672. {
  673. struct evtchn_bind_ipi bind_ipi;
  674. int evtchn, irq;
  675. mutex_lock(&irq_mapping_update_lock);
  676. irq = per_cpu(ipi_to_irq, cpu)[ipi];
  677. if (irq == -1) {
  678. irq = xen_allocate_irq_dynamic();
  679. if (irq < 0)
  680. goto out;
  681. irq_set_chip_and_handler_name(irq, &xen_percpu_chip,
  682. handle_percpu_irq, "ipi");
  683. bind_ipi.vcpu = cpu;
  684. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
  685. &bind_ipi) != 0)
  686. BUG();
  687. evtchn = bind_ipi.port;
  688. xen_irq_info_ipi_init(cpu, irq, evtchn, ipi);
  689. bind_evtchn_to_cpu(evtchn, cpu);
  690. }
  691. out:
  692. mutex_unlock(&irq_mapping_update_lock);
  693. return irq;
  694. }
  695. static int bind_interdomain_evtchn_to_irq(unsigned int remote_domain,
  696. unsigned int remote_port)
  697. {
  698. struct evtchn_bind_interdomain bind_interdomain;
  699. int err;
  700. bind_interdomain.remote_dom = remote_domain;
  701. bind_interdomain.remote_port = remote_port;
  702. err = HYPERVISOR_event_channel_op(EVTCHNOP_bind_interdomain,
  703. &bind_interdomain);
  704. return err ? : bind_evtchn_to_irq(bind_interdomain.local_port);
  705. }
  706. static int find_virq(unsigned int virq, unsigned int cpu)
  707. {
  708. struct evtchn_status status;
  709. int port, rc = -ENOENT;
  710. memset(&status, 0, sizeof(status));
  711. for (port = 0; port <= NR_EVENT_CHANNELS; port++) {
  712. status.dom = DOMID_SELF;
  713. status.port = port;
  714. rc = HYPERVISOR_event_channel_op(EVTCHNOP_status, &status);
  715. if (rc < 0)
  716. continue;
  717. if (status.status != EVTCHNSTAT_virq)
  718. continue;
  719. if (status.u.virq == virq && status.vcpu == cpu) {
  720. rc = port;
  721. break;
  722. }
  723. }
  724. return rc;
  725. }
  726. int bind_virq_to_irq(unsigned int virq, unsigned int cpu, bool percpu)
  727. {
  728. struct evtchn_bind_virq bind_virq;
  729. int evtchn, irq, ret;
  730. mutex_lock(&irq_mapping_update_lock);
  731. irq = per_cpu(virq_to_irq, cpu)[virq];
  732. if (irq == -1) {
  733. irq = xen_allocate_irq_dynamic();
  734. if (irq == -1)
  735. goto out;
  736. if (percpu)
  737. irq_set_chip_and_handler_name(irq, &xen_percpu_chip,
  738. handle_percpu_irq, "virq");
  739. else
  740. irq_set_chip_and_handler_name(irq, &xen_dynamic_chip,
  741. handle_edge_irq, "virq");
  742. bind_virq.virq = virq;
  743. bind_virq.vcpu = cpu;
  744. ret = HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
  745. &bind_virq);
  746. if (ret == 0)
  747. evtchn = bind_virq.port;
  748. else {
  749. if (ret == -EEXIST)
  750. ret = find_virq(virq, cpu);
  751. BUG_ON(ret < 0);
  752. evtchn = ret;
  753. }
  754. xen_irq_info_virq_init(cpu, irq, evtchn, virq);
  755. bind_evtchn_to_cpu(evtchn, cpu);
  756. }
  757. out:
  758. mutex_unlock(&irq_mapping_update_lock);
  759. return irq;
  760. }
  761. static void unbind_from_irq(unsigned int irq)
  762. {
  763. struct evtchn_close close;
  764. int evtchn = evtchn_from_irq(irq);
  765. struct irq_info *info = irq_get_handler_data(irq);
  766. mutex_lock(&irq_mapping_update_lock);
  767. if (info->refcnt > 0) {
  768. info->refcnt--;
  769. if (info->refcnt != 0)
  770. goto done;
  771. }
  772. if (VALID_EVTCHN(evtchn)) {
  773. close.port = evtchn;
  774. if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close) != 0)
  775. BUG();
  776. switch (type_from_irq(irq)) {
  777. case IRQT_VIRQ:
  778. per_cpu(virq_to_irq, cpu_from_evtchn(evtchn))
  779. [virq_from_irq(irq)] = -1;
  780. break;
  781. case IRQT_IPI:
  782. per_cpu(ipi_to_irq, cpu_from_evtchn(evtchn))
  783. [ipi_from_irq(irq)] = -1;
  784. break;
  785. default:
  786. break;
  787. }
  788. /* Closed ports are implicitly re-bound to VCPU0. */
  789. bind_evtchn_to_cpu(evtchn, 0);
  790. evtchn_to_irq[evtchn] = -1;
  791. }
  792. BUG_ON(info_for_irq(irq)->type == IRQT_UNBOUND);
  793. xen_free_irq(irq);
  794. done:
  795. mutex_unlock(&irq_mapping_update_lock);
  796. }
  797. int bind_evtchn_to_irqhandler(unsigned int evtchn,
  798. irq_handler_t handler,
  799. unsigned long irqflags,
  800. const char *devname, void *dev_id)
  801. {
  802. int irq, retval;
  803. irq = bind_evtchn_to_irq(evtchn);
  804. if (irq < 0)
  805. return irq;
  806. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  807. if (retval != 0) {
  808. unbind_from_irq(irq);
  809. return retval;
  810. }
  811. return irq;
  812. }
  813. EXPORT_SYMBOL_GPL(bind_evtchn_to_irqhandler);
  814. int bind_interdomain_evtchn_to_irqhandler(unsigned int remote_domain,
  815. unsigned int remote_port,
  816. irq_handler_t handler,
  817. unsigned long irqflags,
  818. const char *devname,
  819. void *dev_id)
  820. {
  821. int irq, retval;
  822. irq = bind_interdomain_evtchn_to_irq(remote_domain, remote_port);
  823. if (irq < 0)
  824. return irq;
  825. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  826. if (retval != 0) {
  827. unbind_from_irq(irq);
  828. return retval;
  829. }
  830. return irq;
  831. }
  832. EXPORT_SYMBOL_GPL(bind_interdomain_evtchn_to_irqhandler);
  833. int bind_virq_to_irqhandler(unsigned int virq, unsigned int cpu,
  834. irq_handler_t handler,
  835. unsigned long irqflags, const char *devname, void *dev_id)
  836. {
  837. int irq, retval;
  838. irq = bind_virq_to_irq(virq, cpu, irqflags & IRQF_PERCPU);
  839. if (irq < 0)
  840. return irq;
  841. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  842. if (retval != 0) {
  843. unbind_from_irq(irq);
  844. return retval;
  845. }
  846. return irq;
  847. }
  848. EXPORT_SYMBOL_GPL(bind_virq_to_irqhandler);
  849. int bind_ipi_to_irqhandler(enum ipi_vector ipi,
  850. unsigned int cpu,
  851. irq_handler_t handler,
  852. unsigned long irqflags,
  853. const char *devname,
  854. void *dev_id)
  855. {
  856. int irq, retval;
  857. irq = bind_ipi_to_irq(ipi, cpu);
  858. if (irq < 0)
  859. return irq;
  860. irqflags |= IRQF_NO_SUSPEND | IRQF_FORCE_RESUME | IRQF_EARLY_RESUME;
  861. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  862. if (retval != 0) {
  863. unbind_from_irq(irq);
  864. return retval;
  865. }
  866. return irq;
  867. }
  868. void unbind_from_irqhandler(unsigned int irq, void *dev_id)
  869. {
  870. free_irq(irq, dev_id);
  871. unbind_from_irq(irq);
  872. }
  873. EXPORT_SYMBOL_GPL(unbind_from_irqhandler);
  874. int evtchn_make_refcounted(unsigned int evtchn)
  875. {
  876. int irq = evtchn_to_irq[evtchn];
  877. struct irq_info *info;
  878. if (irq == -1)
  879. return -ENOENT;
  880. info = irq_get_handler_data(irq);
  881. if (!info)
  882. return -ENOENT;
  883. WARN_ON(info->refcnt != -1);
  884. info->refcnt = 1;
  885. return 0;
  886. }
  887. EXPORT_SYMBOL_GPL(evtchn_make_refcounted);
  888. int evtchn_get(unsigned int evtchn)
  889. {
  890. int irq;
  891. struct irq_info *info;
  892. int err = -ENOENT;
  893. if (evtchn >= NR_EVENT_CHANNELS)
  894. return -EINVAL;
  895. mutex_lock(&irq_mapping_update_lock);
  896. irq = evtchn_to_irq[evtchn];
  897. if (irq == -1)
  898. goto done;
  899. info = irq_get_handler_data(irq);
  900. if (!info)
  901. goto done;
  902. err = -EINVAL;
  903. if (info->refcnt <= 0)
  904. goto done;
  905. info->refcnt++;
  906. err = 0;
  907. done:
  908. mutex_unlock(&irq_mapping_update_lock);
  909. return err;
  910. }
  911. EXPORT_SYMBOL_GPL(evtchn_get);
  912. void evtchn_put(unsigned int evtchn)
  913. {
  914. int irq = evtchn_to_irq[evtchn];
  915. if (WARN_ON(irq == -1))
  916. return;
  917. unbind_from_irq(irq);
  918. }
  919. EXPORT_SYMBOL_GPL(evtchn_put);
  920. void xen_send_IPI_one(unsigned int cpu, enum ipi_vector vector)
  921. {
  922. int irq = per_cpu(ipi_to_irq, cpu)[vector];
  923. BUG_ON(irq < 0);
  924. notify_remote_via_irq(irq);
  925. }
  926. irqreturn_t xen_debug_interrupt(int irq, void *dev_id)
  927. {
  928. struct shared_info *sh = HYPERVISOR_shared_info;
  929. int cpu = smp_processor_id();
  930. unsigned long *cpu_evtchn = per_cpu(cpu_evtchn_mask, cpu);
  931. int i;
  932. unsigned long flags;
  933. static DEFINE_SPINLOCK(debug_lock);
  934. struct vcpu_info *v;
  935. spin_lock_irqsave(&debug_lock, flags);
  936. printk("\nvcpu %d\n ", cpu);
  937. for_each_online_cpu(i) {
  938. int pending;
  939. v = per_cpu(xen_vcpu, i);
  940. pending = (get_irq_regs() && i == cpu)
  941. ? xen_irqs_disabled(get_irq_regs())
  942. : v->evtchn_upcall_mask;
  943. printk("%d: masked=%d pending=%d event_sel %0*lx\n ", i,
  944. pending, v->evtchn_upcall_pending,
  945. (int)(sizeof(v->evtchn_pending_sel)*2),
  946. v->evtchn_pending_sel);
  947. }
  948. v = per_cpu(xen_vcpu, cpu);
  949. printk("\npending:\n ");
  950. for (i = ARRAY_SIZE(sh->evtchn_pending)-1; i >= 0; i--)
  951. printk("%0*lx%s", (int)sizeof(sh->evtchn_pending[0])*2,
  952. sh->evtchn_pending[i],
  953. i % 8 == 0 ? "\n " : " ");
  954. printk("\nglobal mask:\n ");
  955. for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
  956. printk("%0*lx%s",
  957. (int)(sizeof(sh->evtchn_mask[0])*2),
  958. sh->evtchn_mask[i],
  959. i % 8 == 0 ? "\n " : " ");
  960. printk("\nglobally unmasked:\n ");
  961. for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
  962. printk("%0*lx%s", (int)(sizeof(sh->evtchn_mask[0])*2),
  963. sh->evtchn_pending[i] & ~sh->evtchn_mask[i],
  964. i % 8 == 0 ? "\n " : " ");
  965. printk("\nlocal cpu%d mask:\n ", cpu);
  966. for (i = (NR_EVENT_CHANNELS/BITS_PER_LONG)-1; i >= 0; i--)
  967. printk("%0*lx%s", (int)(sizeof(cpu_evtchn[0])*2),
  968. cpu_evtchn[i],
  969. i % 8 == 0 ? "\n " : " ");
  970. printk("\nlocally unmasked:\n ");
  971. for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--) {
  972. unsigned long pending = sh->evtchn_pending[i]
  973. & ~sh->evtchn_mask[i]
  974. & cpu_evtchn[i];
  975. printk("%0*lx%s", (int)(sizeof(sh->evtchn_mask[0])*2),
  976. pending, i % 8 == 0 ? "\n " : " ");
  977. }
  978. printk("\npending list:\n");
  979. for (i = 0; i < NR_EVENT_CHANNELS; i++) {
  980. if (sync_test_bit(i, sh->evtchn_pending)) {
  981. int word_idx = i / BITS_PER_LONG;
  982. printk(" %d: event %d -> irq %d%s%s%s\n",
  983. cpu_from_evtchn(i), i,
  984. evtchn_to_irq[i],
  985. sync_test_bit(word_idx, &v->evtchn_pending_sel)
  986. ? "" : " l2-clear",
  987. !sync_test_bit(i, sh->evtchn_mask)
  988. ? "" : " globally-masked",
  989. sync_test_bit(i, cpu_evtchn)
  990. ? "" : " locally-masked");
  991. }
  992. }
  993. spin_unlock_irqrestore(&debug_lock, flags);
  994. return IRQ_HANDLED;
  995. }
  996. static DEFINE_PER_CPU(unsigned, xed_nesting_count);
  997. static DEFINE_PER_CPU(unsigned int, current_word_idx);
  998. static DEFINE_PER_CPU(unsigned int, current_bit_idx);
  999. /*
  1000. * Mask out the i least significant bits of w
  1001. */
  1002. #define MASK_LSBS(w, i) (w & ((~0UL) << i))
  1003. /*
  1004. * Search the CPUs pending events bitmasks. For each one found, map
  1005. * the event number to an irq, and feed it into do_IRQ() for
  1006. * handling.
  1007. *
  1008. * Xen uses a two-level bitmap to speed searching. The first level is
  1009. * a bitset of words which contain pending event bits. The second
  1010. * level is a bitset of pending events themselves.
  1011. */
  1012. static void __xen_evtchn_do_upcall(void)
  1013. {
  1014. int start_word_idx, start_bit_idx;
  1015. int word_idx, bit_idx;
  1016. int i, irq;
  1017. int cpu = get_cpu();
  1018. struct shared_info *s = HYPERVISOR_shared_info;
  1019. struct vcpu_info *vcpu_info = __this_cpu_read(xen_vcpu);
  1020. unsigned count;
  1021. do {
  1022. unsigned long pending_words;
  1023. unsigned long pending_bits;
  1024. struct irq_desc *desc;
  1025. vcpu_info->evtchn_upcall_pending = 0;
  1026. if (__this_cpu_inc_return(xed_nesting_count) - 1)
  1027. goto out;
  1028. #ifndef CONFIG_X86 /* No need for a barrier -- XCHG is a barrier on x86. */
  1029. /* Clear master flag /before/ clearing selector flag. */
  1030. wmb();
  1031. #endif
  1032. if ((irq = per_cpu(virq_to_irq, cpu)[VIRQ_TIMER]) != -1) {
  1033. int evtchn = evtchn_from_irq(irq);
  1034. word_idx = evtchn / BITS_PER_LONG;
  1035. pending_bits = evtchn % BITS_PER_LONG;
  1036. if (active_evtchns(cpu, s, word_idx) & (1ULL << pending_bits)) {
  1037. desc = irq_to_desc(irq);
  1038. if (desc)
  1039. generic_handle_irq_desc(irq, desc);
  1040. }
  1041. }
  1042. pending_words = xchg(&vcpu_info->evtchn_pending_sel, 0);
  1043. start_word_idx = __this_cpu_read(current_word_idx);
  1044. start_bit_idx = __this_cpu_read(current_bit_idx);
  1045. word_idx = start_word_idx;
  1046. for (i = 0; pending_words != 0; i++) {
  1047. unsigned long words;
  1048. words = MASK_LSBS(pending_words, word_idx);
  1049. /*
  1050. * If we masked out all events, wrap to beginning.
  1051. */
  1052. if (words == 0) {
  1053. word_idx = 0;
  1054. bit_idx = 0;
  1055. continue;
  1056. }
  1057. word_idx = __ffs(words);
  1058. pending_bits = active_evtchns(cpu, s, word_idx);
  1059. bit_idx = 0; /* usually scan entire word from start */
  1060. if (word_idx == start_word_idx) {
  1061. /* We scan the starting word in two parts */
  1062. if (i == 0)
  1063. /* 1st time: start in the middle */
  1064. bit_idx = start_bit_idx;
  1065. else
  1066. /* 2nd time: mask bits done already */
  1067. bit_idx &= (1UL << start_bit_idx) - 1;
  1068. }
  1069. do {
  1070. unsigned long bits;
  1071. int port;
  1072. bits = MASK_LSBS(pending_bits, bit_idx);
  1073. /* If we masked out all events, move on. */
  1074. if (bits == 0)
  1075. break;
  1076. bit_idx = __ffs(bits);
  1077. /* Process port. */
  1078. port = (word_idx * BITS_PER_LONG) + bit_idx;
  1079. irq = evtchn_to_irq[port];
  1080. if (irq != -1) {
  1081. desc = irq_to_desc(irq);
  1082. if (desc)
  1083. generic_handle_irq_desc(irq, desc);
  1084. }
  1085. bit_idx = (bit_idx + 1) % BITS_PER_LONG;
  1086. /* Next caller starts at last processed + 1 */
  1087. __this_cpu_write(current_word_idx,
  1088. bit_idx ? word_idx :
  1089. (word_idx+1) % BITS_PER_LONG);
  1090. __this_cpu_write(current_bit_idx, bit_idx);
  1091. } while (bit_idx != 0);
  1092. /* Scan start_l1i twice; all others once. */
  1093. if ((word_idx != start_word_idx) || (i != 0))
  1094. pending_words &= ~(1UL << word_idx);
  1095. word_idx = (word_idx + 1) % BITS_PER_LONG;
  1096. }
  1097. BUG_ON(!irqs_disabled());
  1098. count = __this_cpu_read(xed_nesting_count);
  1099. __this_cpu_write(xed_nesting_count, 0);
  1100. } while (count != 1 || vcpu_info->evtchn_upcall_pending);
  1101. out:
  1102. put_cpu();
  1103. }
  1104. void xen_evtchn_do_upcall(struct pt_regs *regs)
  1105. {
  1106. struct pt_regs *old_regs = set_irq_regs(regs);
  1107. irq_enter();
  1108. exit_idle();
  1109. __xen_evtchn_do_upcall();
  1110. irq_exit();
  1111. set_irq_regs(old_regs);
  1112. }
  1113. void xen_hvm_evtchn_do_upcall(void)
  1114. {
  1115. __xen_evtchn_do_upcall();
  1116. }
  1117. EXPORT_SYMBOL_GPL(xen_hvm_evtchn_do_upcall);
  1118. /* Rebind a new event channel to an existing irq. */
  1119. void rebind_evtchn_irq(int evtchn, int irq)
  1120. {
  1121. struct irq_info *info = info_for_irq(irq);
  1122. /* Make sure the irq is masked, since the new event channel
  1123. will also be masked. */
  1124. disable_irq(irq);
  1125. mutex_lock(&irq_mapping_update_lock);
  1126. /* After resume the irq<->evtchn mappings are all cleared out */
  1127. BUG_ON(evtchn_to_irq[evtchn] != -1);
  1128. /* Expect irq to have been bound before,
  1129. so there should be a proper type */
  1130. BUG_ON(info->type == IRQT_UNBOUND);
  1131. xen_irq_info_evtchn_init(irq, evtchn);
  1132. mutex_unlock(&irq_mapping_update_lock);
  1133. /* new event channels are always bound to cpu 0 */
  1134. irq_set_affinity(irq, cpumask_of(0));
  1135. /* Unmask the event channel. */
  1136. enable_irq(irq);
  1137. }
  1138. /* Rebind an evtchn so that it gets delivered to a specific cpu */
  1139. static int rebind_irq_to_cpu(unsigned irq, unsigned tcpu)
  1140. {
  1141. struct shared_info *s = HYPERVISOR_shared_info;
  1142. struct evtchn_bind_vcpu bind_vcpu;
  1143. int evtchn = evtchn_from_irq(irq);
  1144. int masked;
  1145. if (!VALID_EVTCHN(evtchn))
  1146. return -1;
  1147. /*
  1148. * Events delivered via platform PCI interrupts are always
  1149. * routed to vcpu 0 and hence cannot be rebound.
  1150. */
  1151. if (xen_hvm_domain() && !xen_have_vector_callback)
  1152. return -1;
  1153. /* Send future instances of this interrupt to other vcpu. */
  1154. bind_vcpu.port = evtchn;
  1155. bind_vcpu.vcpu = tcpu;
  1156. /*
  1157. * Mask the event while changing the VCPU binding to prevent
  1158. * it being delivered on an unexpected VCPU.
  1159. */
  1160. masked = sync_test_and_set_bit(evtchn, s->evtchn_mask);
  1161. /*
  1162. * If this fails, it usually just indicates that we're dealing with a
  1163. * virq or IPI channel, which don't actually need to be rebound. Ignore
  1164. * it, but don't do the xenlinux-level rebind in that case.
  1165. */
  1166. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_vcpu, &bind_vcpu) >= 0)
  1167. bind_evtchn_to_cpu(evtchn, tcpu);
  1168. if (!masked)
  1169. unmask_evtchn(evtchn);
  1170. return 0;
  1171. }
  1172. static int set_affinity_irq(struct irq_data *data, const struct cpumask *dest,
  1173. bool force)
  1174. {
  1175. unsigned tcpu = cpumask_first(dest);
  1176. return rebind_irq_to_cpu(data->irq, tcpu);
  1177. }
  1178. int resend_irq_on_evtchn(unsigned int irq)
  1179. {
  1180. int masked, evtchn = evtchn_from_irq(irq);
  1181. struct shared_info *s = HYPERVISOR_shared_info;
  1182. if (!VALID_EVTCHN(evtchn))
  1183. return 1;
  1184. masked = sync_test_and_set_bit(evtchn, s->evtchn_mask);
  1185. sync_set_bit(evtchn, s->evtchn_pending);
  1186. if (!masked)
  1187. unmask_evtchn(evtchn);
  1188. return 1;
  1189. }
  1190. static void enable_dynirq(struct irq_data *data)
  1191. {
  1192. int evtchn = evtchn_from_irq(data->irq);
  1193. if (VALID_EVTCHN(evtchn))
  1194. unmask_evtchn(evtchn);
  1195. }
  1196. static void disable_dynirq(struct irq_data *data)
  1197. {
  1198. int evtchn = evtchn_from_irq(data->irq);
  1199. if (VALID_EVTCHN(evtchn))
  1200. mask_evtchn(evtchn);
  1201. }
  1202. static void ack_dynirq(struct irq_data *data)
  1203. {
  1204. int evtchn = evtchn_from_irq(data->irq);
  1205. irq_move_irq(data);
  1206. if (VALID_EVTCHN(evtchn))
  1207. clear_evtchn(evtchn);
  1208. }
  1209. static void mask_ack_dynirq(struct irq_data *data)
  1210. {
  1211. disable_dynirq(data);
  1212. ack_dynirq(data);
  1213. }
  1214. static int retrigger_dynirq(struct irq_data *data)
  1215. {
  1216. int evtchn = evtchn_from_irq(data->irq);
  1217. struct shared_info *sh = HYPERVISOR_shared_info;
  1218. int ret = 0;
  1219. if (VALID_EVTCHN(evtchn)) {
  1220. int masked;
  1221. masked = sync_test_and_set_bit(evtchn, sh->evtchn_mask);
  1222. sync_set_bit(evtchn, sh->evtchn_pending);
  1223. if (!masked)
  1224. unmask_evtchn(evtchn);
  1225. ret = 1;
  1226. }
  1227. return ret;
  1228. }
  1229. static void restore_pirqs(void)
  1230. {
  1231. int pirq, rc, irq, gsi;
  1232. struct physdev_map_pirq map_irq;
  1233. struct irq_info *info;
  1234. list_for_each_entry(info, &xen_irq_list_head, list) {
  1235. if (info->type != IRQT_PIRQ)
  1236. continue;
  1237. pirq = info->u.pirq.pirq;
  1238. gsi = info->u.pirq.gsi;
  1239. irq = info->irq;
  1240. /* save/restore of PT devices doesn't work, so at this point the
  1241. * only devices present are GSI based emulated devices */
  1242. if (!gsi)
  1243. continue;
  1244. map_irq.domid = DOMID_SELF;
  1245. map_irq.type = MAP_PIRQ_TYPE_GSI;
  1246. map_irq.index = gsi;
  1247. map_irq.pirq = pirq;
  1248. rc = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq, &map_irq);
  1249. if (rc) {
  1250. printk(KERN_WARNING "xen map irq failed gsi=%d irq=%d pirq=%d rc=%d\n",
  1251. gsi, irq, pirq, rc);
  1252. xen_free_irq(irq);
  1253. continue;
  1254. }
  1255. printk(KERN_DEBUG "xen: --> irq=%d, pirq=%d\n", irq, map_irq.pirq);
  1256. __startup_pirq(irq);
  1257. }
  1258. }
  1259. static void restore_cpu_virqs(unsigned int cpu)
  1260. {
  1261. struct evtchn_bind_virq bind_virq;
  1262. int virq, irq, evtchn;
  1263. for (virq = 0; virq < NR_VIRQS; virq++) {
  1264. if ((irq = per_cpu(virq_to_irq, cpu)[virq]) == -1)
  1265. continue;
  1266. BUG_ON(virq_from_irq(irq) != virq);
  1267. /* Get a new binding from Xen. */
  1268. bind_virq.virq = virq;
  1269. bind_virq.vcpu = cpu;
  1270. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
  1271. &bind_virq) != 0)
  1272. BUG();
  1273. evtchn = bind_virq.port;
  1274. /* Record the new mapping. */
  1275. xen_irq_info_virq_init(cpu, irq, evtchn, virq);
  1276. bind_evtchn_to_cpu(evtchn, cpu);
  1277. }
  1278. }
  1279. static void restore_cpu_ipis(unsigned int cpu)
  1280. {
  1281. struct evtchn_bind_ipi bind_ipi;
  1282. int ipi, irq, evtchn;
  1283. for (ipi = 0; ipi < XEN_NR_IPIS; ipi++) {
  1284. if ((irq = per_cpu(ipi_to_irq, cpu)[ipi]) == -1)
  1285. continue;
  1286. BUG_ON(ipi_from_irq(irq) != ipi);
  1287. /* Get a new binding from Xen. */
  1288. bind_ipi.vcpu = cpu;
  1289. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
  1290. &bind_ipi) != 0)
  1291. BUG();
  1292. evtchn = bind_ipi.port;
  1293. /* Record the new mapping. */
  1294. xen_irq_info_ipi_init(cpu, irq, evtchn, ipi);
  1295. bind_evtchn_to_cpu(evtchn, cpu);
  1296. }
  1297. }
  1298. /* Clear an irq's pending state, in preparation for polling on it */
  1299. void xen_clear_irq_pending(int irq)
  1300. {
  1301. int evtchn = evtchn_from_irq(irq);
  1302. if (VALID_EVTCHN(evtchn))
  1303. clear_evtchn(evtchn);
  1304. }
  1305. EXPORT_SYMBOL(xen_clear_irq_pending);
  1306. void xen_set_irq_pending(int irq)
  1307. {
  1308. int evtchn = evtchn_from_irq(irq);
  1309. if (VALID_EVTCHN(evtchn))
  1310. set_evtchn(evtchn);
  1311. }
  1312. bool xen_test_irq_pending(int irq)
  1313. {
  1314. int evtchn = evtchn_from_irq(irq);
  1315. bool ret = false;
  1316. if (VALID_EVTCHN(evtchn))
  1317. ret = test_evtchn(evtchn);
  1318. return ret;
  1319. }
  1320. /* Poll waiting for an irq to become pending with timeout. In the usual case,
  1321. * the irq will be disabled so it won't deliver an interrupt. */
  1322. void xen_poll_irq_timeout(int irq, u64 timeout)
  1323. {
  1324. evtchn_port_t evtchn = evtchn_from_irq(irq);
  1325. if (VALID_EVTCHN(evtchn)) {
  1326. struct sched_poll poll;
  1327. poll.nr_ports = 1;
  1328. poll.timeout = timeout;
  1329. set_xen_guest_handle(poll.ports, &evtchn);
  1330. if (HYPERVISOR_sched_op(SCHEDOP_poll, &poll) != 0)
  1331. BUG();
  1332. }
  1333. }
  1334. EXPORT_SYMBOL(xen_poll_irq_timeout);
  1335. /* Poll waiting for an irq to become pending. In the usual case, the
  1336. * irq will be disabled so it won't deliver an interrupt. */
  1337. void xen_poll_irq(int irq)
  1338. {
  1339. xen_poll_irq_timeout(irq, 0 /* no timeout */);
  1340. }
  1341. /* Check whether the IRQ line is shared with other guests. */
  1342. int xen_test_irq_shared(int irq)
  1343. {
  1344. struct irq_info *info = info_for_irq(irq);
  1345. struct physdev_irq_status_query irq_status = { .irq = info->u.pirq.pirq };
  1346. if (HYPERVISOR_physdev_op(PHYSDEVOP_irq_status_query, &irq_status))
  1347. return 0;
  1348. return !(irq_status.flags & XENIRQSTAT_shared);
  1349. }
  1350. EXPORT_SYMBOL_GPL(xen_test_irq_shared);
  1351. void xen_irq_resume(void)
  1352. {
  1353. unsigned int cpu, evtchn;
  1354. struct irq_info *info;
  1355. init_evtchn_cpu_bindings();
  1356. /* New event-channel space is not 'live' yet. */
  1357. for (evtchn = 0; evtchn < NR_EVENT_CHANNELS; evtchn++)
  1358. mask_evtchn(evtchn);
  1359. /* No IRQ <-> event-channel mappings. */
  1360. list_for_each_entry(info, &xen_irq_list_head, list)
  1361. info->evtchn = 0; /* zap event-channel binding */
  1362. for (evtchn = 0; evtchn < NR_EVENT_CHANNELS; evtchn++)
  1363. evtchn_to_irq[evtchn] = -1;
  1364. for_each_possible_cpu(cpu) {
  1365. restore_cpu_virqs(cpu);
  1366. restore_cpu_ipis(cpu);
  1367. }
  1368. restore_pirqs();
  1369. }
  1370. static struct irq_chip xen_dynamic_chip __read_mostly = {
  1371. .name = "xen-dyn",
  1372. .irq_disable = disable_dynirq,
  1373. .irq_mask = disable_dynirq,
  1374. .irq_unmask = enable_dynirq,
  1375. .irq_ack = ack_dynirq,
  1376. .irq_mask_ack = mask_ack_dynirq,
  1377. .irq_set_affinity = set_affinity_irq,
  1378. .irq_retrigger = retrigger_dynirq,
  1379. };
  1380. static struct irq_chip xen_pirq_chip __read_mostly = {
  1381. .name = "xen-pirq",
  1382. .irq_startup = startup_pirq,
  1383. .irq_shutdown = shutdown_pirq,
  1384. .irq_enable = enable_pirq,
  1385. .irq_disable = disable_pirq,
  1386. .irq_mask = disable_dynirq,
  1387. .irq_unmask = enable_dynirq,
  1388. .irq_ack = eoi_pirq,
  1389. .irq_eoi = eoi_pirq,
  1390. .irq_mask_ack = mask_ack_pirq,
  1391. .irq_set_affinity = set_affinity_irq,
  1392. .irq_retrigger = retrigger_dynirq,
  1393. };
  1394. static struct irq_chip xen_percpu_chip __read_mostly = {
  1395. .name = "xen-percpu",
  1396. .irq_disable = disable_dynirq,
  1397. .irq_mask = disable_dynirq,
  1398. .irq_unmask = enable_dynirq,
  1399. .irq_ack = ack_dynirq,
  1400. };
  1401. int xen_set_callback_via(uint64_t via)
  1402. {
  1403. struct xen_hvm_param a;
  1404. a.domid = DOMID_SELF;
  1405. a.index = HVM_PARAM_CALLBACK_IRQ;
  1406. a.value = via;
  1407. return HYPERVISOR_hvm_op(HVMOP_set_param, &a);
  1408. }
  1409. EXPORT_SYMBOL_GPL(xen_set_callback_via);
  1410. #ifdef CONFIG_XEN_PVHVM
  1411. /* Vector callbacks are better than PCI interrupts to receive event
  1412. * channel notifications because we can receive vector callbacks on any
  1413. * vcpu and we don't need PCI support or APIC interactions. */
  1414. void xen_callback_vector(void)
  1415. {
  1416. int rc;
  1417. uint64_t callback_via;
  1418. if (xen_have_vector_callback) {
  1419. callback_via = HVM_CALLBACK_VECTOR(XEN_HVM_EVTCHN_CALLBACK);
  1420. rc = xen_set_callback_via(callback_via);
  1421. if (rc) {
  1422. printk(KERN_ERR "Request for Xen HVM callback vector"
  1423. " failed.\n");
  1424. xen_have_vector_callback = 0;
  1425. return;
  1426. }
  1427. printk(KERN_INFO "Xen HVM callback vector for event delivery is "
  1428. "enabled\n");
  1429. /* in the restore case the vector has already been allocated */
  1430. if (!test_bit(XEN_HVM_EVTCHN_CALLBACK, used_vectors))
  1431. alloc_intr_gate(XEN_HVM_EVTCHN_CALLBACK, xen_hvm_callback_vector);
  1432. }
  1433. }
  1434. #else
  1435. void xen_callback_vector(void) {}
  1436. #endif
  1437. void __init xen_init_IRQ(void)
  1438. {
  1439. int i, rc;
  1440. evtchn_to_irq = kcalloc(NR_EVENT_CHANNELS, sizeof(*evtchn_to_irq),
  1441. GFP_KERNEL);
  1442. BUG_ON(!evtchn_to_irq);
  1443. for (i = 0; i < NR_EVENT_CHANNELS; i++)
  1444. evtchn_to_irq[i] = -1;
  1445. init_evtchn_cpu_bindings();
  1446. /* No event channels are 'live' right now. */
  1447. for (i = 0; i < NR_EVENT_CHANNELS; i++)
  1448. mask_evtchn(i);
  1449. pirq_needs_eoi = pirq_needs_eoi_flag;
  1450. if (xen_hvm_domain()) {
  1451. xen_callback_vector();
  1452. native_init_IRQ();
  1453. /* pci_xen_hvm_init must be called after native_init_IRQ so that
  1454. * __acpi_register_gsi can point at the right function */
  1455. pci_xen_hvm_init();
  1456. } else {
  1457. struct physdev_pirq_eoi_gmfn eoi_gmfn;
  1458. irq_ctx_init(smp_processor_id());
  1459. if (xen_initial_domain())
  1460. pci_xen_initial_domain();
  1461. pirq_eoi_map = (void *)__get_free_page(GFP_KERNEL|__GFP_ZERO);
  1462. eoi_gmfn.gmfn = virt_to_mfn(pirq_eoi_map);
  1463. rc = HYPERVISOR_physdev_op(PHYSDEVOP_pirq_eoi_gmfn_v2, &eoi_gmfn);
  1464. if (rc != 0) {
  1465. free_page((unsigned long) pirq_eoi_map);
  1466. pirq_eoi_map = NULL;
  1467. } else
  1468. pirq_needs_eoi = pirq_check_eoi_map;
  1469. }
  1470. }