ehci-msm72k.c 20 KB

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  1. /* ehci-msm.c - HSUSB Host Controller Driver Implementation
  2. *
  3. * Copyright (c) 2008-2012, The Linux Foundation. All rights reserved.
  4. *
  5. * Partly derived from ehci-fsl.c and ehci-hcd.c
  6. * Copyright (c) 2000-2004 by David Brownell
  7. * Copyright (c) 2005 MontaVista Software
  8. *
  9. * All source code in this file is licensed under the following license except
  10. * where indicated.
  11. *
  12. * This program is free software; you can redistribute it and/or modify it
  13. * under the terms of the GNU General Public License version 2 as published
  14. * by the Free Software Foundation.
  15. *
  16. * This program is distributed in the hope that it will be useful,
  17. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
  19. *
  20. * See the GNU General Public License for more details.
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, you can find it at http://www.fsf.org
  23. */
  24. #include <linux/platform_device.h>
  25. #include <linux/interrupt.h>
  26. #include <linux/workqueue.h>
  27. #include <linux/clk.h>
  28. #include <linux/spinlock.h>
  29. #include <mach/board.h>
  30. #include <mach/rpc_hsusb.h>
  31. #include <mach/msm_hsusb.h>
  32. #include <mach/msm_hsusb_hw.h>
  33. #include <mach/msm_otg.h>
  34. #include <mach/clk.h>
  35. #include <linux/wakelock.h>
  36. #include <linux/pm_runtime.h>
  37. #include <mach/msm72k_otg.h>
  38. #define MSM_USB_BASE (hcd->regs)
  39. struct msmusb_hcd {
  40. struct ehci_hcd ehci;
  41. struct clk *alt_core_clk;
  42. struct clk *iface_clk;
  43. unsigned in_lpm;
  44. struct work_struct lpm_exit_work;
  45. spinlock_t lock;
  46. struct wake_lock wlock;
  47. unsigned int clk_enabled;
  48. struct msm_usb_host_platform_data *pdata;
  49. unsigned running;
  50. struct usb_phy *xceiv;
  51. struct work_struct otg_work;
  52. unsigned flags;
  53. struct msm_otg_ops otg_ops;
  54. };
  55. static inline struct msmusb_hcd *hcd_to_mhcd(struct usb_hcd *hcd)
  56. {
  57. return (struct msmusb_hcd *) (hcd->hcd_priv);
  58. }
  59. static inline struct usb_hcd *mhcd_to_hcd(struct msmusb_hcd *mhcd)
  60. {
  61. return container_of((void *) mhcd, struct usb_hcd, hcd_priv);
  62. }
  63. static void msm_xusb_pm_qos_update(struct msmusb_hcd *mhcd, int vote)
  64. {
  65. struct msm_usb_host_platform_data *pdata = mhcd->pdata;
  66. /* if otg driver is available, it would take
  67. * care of voting for appropriate pclk source
  68. */
  69. if (mhcd->xceiv)
  70. return;
  71. if (vote)
  72. clk_prepare_enable(pdata->ebi1_clk);
  73. else
  74. clk_disable_unprepare(pdata->ebi1_clk);
  75. }
  76. static void msm_xusb_enable_clks(struct msmusb_hcd *mhcd)
  77. {
  78. struct msm_usb_host_platform_data *pdata = mhcd->pdata;
  79. if (mhcd->clk_enabled)
  80. return;
  81. switch (PHY_TYPE(pdata->phy_info)) {
  82. case USB_PHY_INTEGRATED:
  83. /* OTG driver takes care of clock management */
  84. break;
  85. case USB_PHY_SERIAL_PMIC:
  86. clk_prepare_enable(mhcd->alt_core_clk);
  87. clk_prepare_enable(mhcd->iface_clk);
  88. break;
  89. default:
  90. pr_err("%s: undefined phy type ( %X )\n", __func__,
  91. pdata->phy_info);
  92. return;
  93. }
  94. mhcd->clk_enabled = 1;
  95. }
  96. static void msm_xusb_disable_clks(struct msmusb_hcd *mhcd)
  97. {
  98. struct msm_usb_host_platform_data *pdata = mhcd->pdata;
  99. if (!mhcd->clk_enabled)
  100. return;
  101. switch (PHY_TYPE(pdata->phy_info)) {
  102. case USB_PHY_INTEGRATED:
  103. /* OTG driver takes care of clock management */
  104. break;
  105. case USB_PHY_SERIAL_PMIC:
  106. clk_disable_unprepare(mhcd->alt_core_clk);
  107. clk_disable_unprepare(mhcd->iface_clk);
  108. break;
  109. default:
  110. pr_err("%s: undefined phy type ( %X )\n", __func__,
  111. pdata->phy_info);
  112. return;
  113. }
  114. mhcd->clk_enabled = 0;
  115. }
  116. static int usb_wakeup_phy(struct usb_hcd *hcd)
  117. {
  118. struct msmusb_hcd *mhcd = hcd_to_mhcd(hcd);
  119. struct msm_usb_host_platform_data *pdata = mhcd->pdata;
  120. int ret = -ENODEV;
  121. switch (PHY_TYPE(pdata->phy_info)) {
  122. case USB_PHY_INTEGRATED:
  123. break;
  124. case USB_PHY_SERIAL_PMIC:
  125. ret = msm_fsusb_resume_phy();
  126. break;
  127. default:
  128. pr_err("%s: undefined phy type ( %X ) \n", __func__,
  129. pdata->phy_info);
  130. }
  131. return ret;
  132. }
  133. #ifdef CONFIG_PM
  134. static int usb_suspend_phy(struct usb_hcd *hcd)
  135. {
  136. int ret = 0;
  137. struct msmusb_hcd *mhcd = hcd_to_mhcd(hcd);
  138. struct msm_usb_host_platform_data *pdata = mhcd->pdata;
  139. switch (PHY_TYPE(pdata->phy_info)) {
  140. case USB_PHY_INTEGRATED:
  141. break;
  142. case USB_PHY_SERIAL_PMIC:
  143. ret = msm_fsusb_set_remote_wakeup();
  144. ret = msm_fsusb_suspend_phy();
  145. break;
  146. default:
  147. pr_err("%s: undefined phy type ( %X ) \n", __func__,
  148. pdata->phy_info);
  149. ret = -ENODEV;
  150. break;
  151. }
  152. return ret;
  153. }
  154. static int usb_lpm_enter(struct usb_hcd *hcd)
  155. {
  156. struct device *dev = container_of((void *)hcd, struct device,
  157. platform_data);
  158. struct msmusb_hcd *mhcd = hcd_to_mhcd(hcd);
  159. disable_irq(hcd->irq);
  160. if (mhcd->in_lpm) {
  161. pr_info("%s: already in lpm. nothing to do\n", __func__);
  162. enable_irq(hcd->irq);
  163. return 0;
  164. }
  165. if (HC_IS_RUNNING(hcd->state)) {
  166. pr_info("%s: can't enter into lpm. controller is runnning\n",
  167. __func__);
  168. enable_irq(hcd->irq);
  169. return -1;
  170. }
  171. pr_info("%s: lpm enter procedure started\n", __func__);
  172. mhcd->in_lpm = 1;
  173. if (usb_suspend_phy(hcd)) {
  174. mhcd->in_lpm = 0;
  175. enable_irq(hcd->irq);
  176. pr_info("phy suspend failed\n");
  177. pr_info("%s: lpm enter procedure end\n", __func__);
  178. return -1;
  179. }
  180. msm_xusb_disable_clks(mhcd);
  181. if (mhcd->xceiv && mhcd->xceiv->set_suspend)
  182. mhcd->xceiv->set_suspend(mhcd->xceiv, 1);
  183. if (device_may_wakeup(dev))
  184. enable_irq_wake(hcd->irq);
  185. enable_irq(hcd->irq);
  186. pr_info("%s: lpm enter procedure end\n", __func__);
  187. return 0;
  188. }
  189. #endif
  190. void usb_lpm_exit_w(struct work_struct *work)
  191. {
  192. struct msmusb_hcd *mhcd = container_of((void *) work,
  193. struct msmusb_hcd, lpm_exit_work);
  194. struct usb_hcd *hcd = mhcd_to_hcd(mhcd);
  195. struct device *dev = container_of((void *)hcd, struct device,
  196. platform_data);
  197. msm_xusb_enable_clks(mhcd);
  198. if (usb_wakeup_phy(hcd)) {
  199. pr_err("fatal error: cannot bring phy out of lpm\n");
  200. return;
  201. }
  202. /* If resume signalling finishes before lpm exit, PCD is not set in
  203. * USBSTS register. Drive resume signal to the downstream device now
  204. * so that EHCI can process the upcoming port change interrupt.*/
  205. writel(readl(USB_PORTSC) | PORTSC_FPR, USB_PORTSC);
  206. if (mhcd->xceiv && mhcd->xceiv->set_suspend)
  207. mhcd->xceiv->set_suspend(mhcd->xceiv, 0);
  208. if (device_may_wakeup(dev))
  209. disable_irq_wake(hcd->irq);
  210. enable_irq(hcd->irq);
  211. }
  212. static void usb_lpm_exit(struct usb_hcd *hcd)
  213. {
  214. unsigned long flags;
  215. struct msmusb_hcd *mhcd = hcd_to_mhcd(hcd);
  216. spin_lock_irqsave(&mhcd->lock, flags);
  217. if (!mhcd->in_lpm) {
  218. spin_unlock_irqrestore(&mhcd->lock, flags);
  219. return;
  220. }
  221. mhcd->in_lpm = 0;
  222. disable_irq_nosync(hcd->irq);
  223. schedule_work(&mhcd->lpm_exit_work);
  224. spin_unlock_irqrestore(&mhcd->lock, flags);
  225. }
  226. static irqreturn_t ehci_msm_irq(struct usb_hcd *hcd)
  227. {
  228. struct msmusb_hcd *mhcd = hcd_to_mhcd(hcd);
  229. struct msm_otg *otg = container_of(mhcd->xceiv, struct msm_otg, phy);
  230. /*
  231. * OTG scheduled a work to get Integrated PHY out of LPM,
  232. * WAIT till then */
  233. if (PHY_TYPE(mhcd->pdata->phy_info) == USB_PHY_INTEGRATED)
  234. if (atomic_read(&otg->in_lpm))
  235. return IRQ_HANDLED;
  236. return ehci_irq(hcd);
  237. }
  238. #ifdef CONFIG_PM
  239. static int ehci_msm_bus_suspend(struct usb_hcd *hcd)
  240. {
  241. int ret;
  242. struct msmusb_hcd *mhcd = hcd_to_mhcd(hcd);
  243. struct device *dev = hcd->self.controller;
  244. ret = ehci_bus_suspend(hcd);
  245. if (ret) {
  246. pr_err("ehci_bus suspend faield\n");
  247. return ret;
  248. }
  249. if (PHY_TYPE(mhcd->pdata->phy_info) == USB_PHY_INTEGRATED)
  250. ret = usb_phy_set_suspend(mhcd->xceiv, 1);
  251. else
  252. ret = usb_lpm_enter(hcd);
  253. pm_runtime_put_noidle(dev);
  254. pm_runtime_suspend(dev);
  255. wake_unlock(&mhcd->wlock);
  256. return ret;
  257. }
  258. static int ehci_msm_bus_resume(struct usb_hcd *hcd)
  259. {
  260. struct msmusb_hcd *mhcd = hcd_to_mhcd(hcd);
  261. struct device *dev = hcd->self.controller;
  262. wake_lock(&mhcd->wlock);
  263. pm_runtime_get_noresume(dev);
  264. pm_runtime_resume(dev);
  265. if (PHY_TYPE(mhcd->pdata->phy_info) == USB_PHY_INTEGRATED) {
  266. usb_phy_set_suspend(mhcd->xceiv, 0);
  267. } else { /* PMIC serial phy */
  268. usb_lpm_exit(hcd);
  269. if (cancel_work_sync(&(mhcd->lpm_exit_work)))
  270. usb_lpm_exit_w(&mhcd->lpm_exit_work);
  271. }
  272. return ehci_bus_resume(hcd);
  273. }
  274. #else
  275. #define ehci_msm_bus_suspend NULL
  276. #define ehci_msm_bus_resume NULL
  277. #endif /* CONFIG_PM */
  278. static int ehci_msm_reset(struct usb_hcd *hcd)
  279. {
  280. struct ehci_hcd *ehci = hcd_to_ehci(hcd);
  281. int retval;
  282. ehci->caps = USB_CAPLENGTH;
  283. ehci->regs = USB_CAPLENGTH +
  284. HC_LENGTH(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
  285. /* cache the data to minimize the chip reads*/
  286. ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
  287. retval = ehci_init(hcd);
  288. if (retval)
  289. return retval;
  290. hcd->has_tt = 1;
  291. ehci->sbrn = HCD_USB2;
  292. retval = ehci_reset(ehci);
  293. /* SW workaround for USB stability issues*/
  294. writel(0x0, USB_AHB_MODE);
  295. writel(0x0, USB_AHB_BURST);
  296. return retval;
  297. }
  298. #define PTS_VAL(x) (PHY_TYPE(x) == USB_PHY_SERIAL_PMIC) ? PORTSC_PTS_SERIAL : \
  299. PORTSC_PTS_ULPI
  300. static int ehci_msm_run(struct usb_hcd *hcd)
  301. {
  302. struct ehci_hcd *ehci = hcd_to_ehci(hcd);
  303. struct msmusb_hcd *mhcd = hcd_to_mhcd(hcd);
  304. int retval = 0;
  305. int port = HCS_N_PORTS(ehci->hcs_params);
  306. u32 __iomem *reg_ptr;
  307. u32 hcc_params;
  308. struct msm_usb_host_platform_data *pdata = mhcd->pdata;
  309. hcd->uses_new_polling = 1;
  310. set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
  311. /* set hostmode */
  312. reg_ptr = (u32 __iomem *)(((u8 __iomem *)ehci->regs) + USBMODE);
  313. ehci_writel(ehci, (USBMODE_VBUS | USBMODE_SDIS), reg_ptr);
  314. /* port configuration - phy, port speed, port power, port enable */
  315. while (port--)
  316. ehci_writel(ehci, (PTS_VAL(pdata->phy_info) | PORT_POWER |
  317. PORT_PE), &ehci->regs->port_status[port]);
  318. ehci_writel(ehci, ehci->periodic_dma, &ehci->regs->frame_list);
  319. ehci_writel(ehci, (u32)ehci->async->qh_dma, &ehci->regs->async_next);
  320. hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params);
  321. if (HCC_64BIT_ADDR(hcc_params))
  322. ehci_writel(ehci, 0, &ehci->regs->segment);
  323. ehci->command &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
  324. ehci->command |= CMD_RUN;
  325. ehci_writel(ehci, ehci->command, &ehci->regs->command);
  326. ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */
  327. ehci->rh_state = EHCI_RH_RUNNING;
  328. /*Enable appropriate Interrupts*/
  329. ehci_writel(ehci, INTR_MASK, &ehci->regs->intr_enable);
  330. return retval;
  331. }
  332. static struct hc_driver msm_hc_driver = {
  333. .description = hcd_name,
  334. .product_desc = "Qualcomm On-Chip EHCI Host Controller",
  335. .hcd_priv_size = sizeof(struct msmusb_hcd),
  336. /*
  337. * generic hardware linkage
  338. */
  339. .irq = ehci_msm_irq,
  340. .flags = HCD_USB2,
  341. .reset = ehci_msm_reset,
  342. .start = ehci_msm_run,
  343. .stop = ehci_stop,
  344. .shutdown = ehci_shutdown,
  345. /*
  346. * managing i/o requests and associated device resources
  347. */
  348. .urb_enqueue = ehci_urb_enqueue,
  349. .urb_dequeue = ehci_urb_dequeue,
  350. .endpoint_disable = ehci_endpoint_disable,
  351. /*
  352. * scheduling support
  353. */
  354. .get_frame_number = ehci_get_frame,
  355. /*
  356. * root hub support
  357. */
  358. .hub_status_data = ehci_hub_status_data,
  359. .hub_control = ehci_hub_control,
  360. .bus_suspend = ehci_msm_bus_suspend,
  361. .bus_resume = ehci_msm_bus_resume,
  362. .relinquish_port = ehci_relinquish_port,
  363. .clear_tt_buffer_complete = ehci_clear_tt_buffer_complete,
  364. };
  365. static void msm_hsusb_request_host(void *handle, int request)
  366. {
  367. struct msmusb_hcd *mhcd = handle;
  368. struct usb_hcd *hcd = mhcd_to_hcd(mhcd);
  369. struct msm_usb_host_platform_data *pdata = mhcd->pdata;
  370. struct msm_otg *otg = container_of(mhcd->xceiv, struct msm_otg, phy);
  371. #ifdef CONFIG_USB_OTG
  372. struct usb_device *udev = hcd->self.root_hub;
  373. #endif
  374. struct device *dev = hcd->self.controller;
  375. switch (request) {
  376. #ifdef CONFIG_USB_OTG
  377. case REQUEST_HNP_SUSPEND:
  378. /* disable Root hub auto suspend. As hardware is configured
  379. * for peripheral mode, mark hardware is not available.
  380. */
  381. if (PHY_TYPE(pdata->phy_info) == USB_PHY_INTEGRATED) {
  382. pm_runtime_disable(&udev->dev);
  383. /* Mark root hub as disconnected. This would
  384. * protect suspend/resume via sysfs.
  385. */
  386. udev->state = USB_STATE_NOTATTACHED;
  387. clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
  388. hcd->state = HC_STATE_HALT;
  389. pm_runtime_put_noidle(dev);
  390. pm_runtime_suspend(dev);
  391. }
  392. break;
  393. case REQUEST_HNP_RESUME:
  394. if (PHY_TYPE(pdata->phy_info) == USB_PHY_INTEGRATED) {
  395. pm_runtime_get_noresume(dev);
  396. pm_runtime_resume(dev);
  397. disable_irq(hcd->irq);
  398. ehci_msm_reset(hcd);
  399. ehci_msm_run(hcd);
  400. set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
  401. pm_runtime_enable(&udev->dev);
  402. udev->state = USB_STATE_CONFIGURED;
  403. enable_irq(hcd->irq);
  404. }
  405. break;
  406. #endif
  407. case REQUEST_RESUME:
  408. usb_hcd_resume_root_hub(hcd);
  409. break;
  410. case REQUEST_START:
  411. if (mhcd->running)
  412. break;
  413. pm_runtime_get_noresume(dev);
  414. pm_runtime_resume(dev);
  415. wake_lock(&mhcd->wlock);
  416. msm_xusb_pm_qos_update(mhcd, 1);
  417. msm_xusb_enable_clks(mhcd);
  418. if (PHY_TYPE(pdata->phy_info) == USB_PHY_INTEGRATED)
  419. if (otg->set_clk)
  420. otg->set_clk(mhcd->xceiv, 1);
  421. if (pdata->vbus_power)
  422. pdata->vbus_power(pdata->phy_info, 1);
  423. if (pdata->config_gpio)
  424. pdata->config_gpio(1);
  425. usb_add_hcd(hcd, hcd->irq, IRQF_SHARED);
  426. mhcd->running = 1;
  427. if (PHY_TYPE(pdata->phy_info) == USB_PHY_INTEGRATED)
  428. if (otg->set_clk)
  429. otg->set_clk(mhcd->xceiv, 0);
  430. break;
  431. case REQUEST_STOP:
  432. if (!mhcd->running)
  433. break;
  434. mhcd->running = 0;
  435. /* come out of lpm before deregistration */
  436. if (PHY_TYPE(pdata->phy_info) == USB_PHY_SERIAL_PMIC) {
  437. usb_lpm_exit(hcd);
  438. if (cancel_work_sync(&(mhcd->lpm_exit_work)))
  439. usb_lpm_exit_w(&mhcd->lpm_exit_work);
  440. }
  441. usb_remove_hcd(hcd);
  442. if (pdata->config_gpio)
  443. pdata->config_gpio(0);
  444. if (pdata->vbus_power)
  445. pdata->vbus_power(pdata->phy_info, 0);
  446. msm_xusb_disable_clks(mhcd);
  447. wake_lock_timeout(&mhcd->wlock, HZ/2);
  448. msm_xusb_pm_qos_update(mhcd, 0);
  449. pm_runtime_put_noidle(dev);
  450. pm_runtime_suspend(dev);
  451. break;
  452. }
  453. }
  454. static void msm_hsusb_otg_work(struct work_struct *work)
  455. {
  456. struct msmusb_hcd *mhcd;
  457. mhcd = container_of(work, struct msmusb_hcd, otg_work);
  458. msm_hsusb_request_host((void *)mhcd, mhcd->flags);
  459. }
  460. static void msm_hsusb_start_host(struct usb_bus *bus, int start)
  461. {
  462. struct usb_hcd *hcd = bus_to_hcd(bus);
  463. struct msmusb_hcd *mhcd = hcd_to_mhcd(hcd);
  464. mhcd->flags = start;
  465. if (in_interrupt())
  466. schedule_work(&mhcd->otg_work);
  467. else
  468. msm_hsusb_request_host((void *)mhcd, mhcd->flags);
  469. }
  470. static int msm_xusb_init_phy(struct msmusb_hcd *mhcd)
  471. {
  472. int ret = -ENODEV;
  473. struct usb_hcd *hcd = mhcd_to_hcd(mhcd);
  474. struct msm_usb_host_platform_data *pdata = mhcd->pdata;
  475. switch (PHY_TYPE(pdata->phy_info)) {
  476. case USB_PHY_INTEGRATED:
  477. ret = 0;
  478. case USB_PHY_SERIAL_PMIC:
  479. msm_xusb_enable_clks(mhcd);
  480. writel(0, USB_USBINTR);
  481. ret = msm_fsusb_rpc_init(&mhcd->otg_ops);
  482. if (!ret)
  483. msm_fsusb_init_phy();
  484. msm_xusb_disable_clks(mhcd);
  485. break;
  486. default:
  487. pr_err("%s: undefined phy type ( %X ) \n", __func__,
  488. pdata->phy_info);
  489. }
  490. return ret;
  491. }
  492. static int msm_xusb_rpc_close(struct msmusb_hcd *mhcd)
  493. {
  494. int retval = -ENODEV;
  495. struct msm_usb_host_platform_data *pdata = mhcd->pdata;
  496. switch (PHY_TYPE(pdata->phy_info)) {
  497. case USB_PHY_INTEGRATED:
  498. if (!mhcd->xceiv)
  499. retval = msm_hsusb_rpc_close();
  500. break;
  501. case USB_PHY_SERIAL_PMIC:
  502. retval = msm_fsusb_reset_phy();
  503. msm_fsusb_rpc_deinit();
  504. break;
  505. default:
  506. pr_err("%s: undefined phy type ( %X ) \n", __func__,
  507. pdata->phy_info);
  508. }
  509. return retval;
  510. }
  511. static int msm_xusb_init_host(struct platform_device *pdev,
  512. struct msmusb_hcd *mhcd)
  513. {
  514. int ret = 0;
  515. struct msm_otg *otg;
  516. struct usb_hcd *hcd = mhcd_to_hcd(mhcd);
  517. struct ehci_hcd *ehci = hcd_to_ehci(hcd);
  518. struct msm_usb_host_platform_data *pdata = mhcd->pdata;
  519. switch (PHY_TYPE(pdata->phy_info)) {
  520. case USB_PHY_INTEGRATED:
  521. msm_hsusb_rpc_connect();
  522. if (pdata->vbus_init)
  523. pdata->vbus_init(1);
  524. /* VBUS might be present. Turn off vbus */
  525. if (pdata->vbus_power)
  526. pdata->vbus_power(pdata->phy_info, 0);
  527. INIT_WORK(&mhcd->otg_work, msm_hsusb_otg_work);
  528. mhcd->xceiv = usb_get_transceiver();
  529. if (!mhcd->xceiv)
  530. return -ENODEV;
  531. otg = container_of(mhcd->xceiv, struct msm_otg, phy);
  532. hcd->regs = otg->regs;
  533. otg->start_host = msm_hsusb_start_host;
  534. ret = otg_set_host(mhcd->xceiv->otg, &hcd->self);
  535. ehci->transceiver = mhcd->xceiv;
  536. break;
  537. case USB_PHY_SERIAL_PMIC:
  538. hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len);
  539. if (!hcd->regs)
  540. return -EFAULT;
  541. /* get usb clocks */
  542. mhcd->alt_core_clk = clk_get(&pdev->dev, "alt_core_clk");
  543. if (IS_ERR(mhcd->alt_core_clk)) {
  544. iounmap(hcd->regs);
  545. return PTR_ERR(mhcd->alt_core_clk);
  546. }
  547. mhcd->iface_clk = clk_get(&pdev->dev, "iface_clk");
  548. if (IS_ERR(mhcd->iface_clk)) {
  549. iounmap(hcd->regs);
  550. clk_put(mhcd->alt_core_clk);
  551. return PTR_ERR(mhcd->iface_clk);
  552. }
  553. mhcd->otg_ops.request = msm_hsusb_request_host;
  554. mhcd->otg_ops.handle = (void *) mhcd;
  555. ret = msm_xusb_init_phy(mhcd);
  556. if (ret < 0) {
  557. iounmap(hcd->regs);
  558. clk_put(mhcd->alt_core_clk);
  559. clk_put(mhcd->iface_clk);
  560. }
  561. break;
  562. default:
  563. pr_err("phy type is bad\n");
  564. }
  565. return ret;
  566. }
  567. static int __devinit ehci_msm_probe(struct platform_device *pdev)
  568. {
  569. struct usb_hcd *hcd;
  570. struct resource *res;
  571. struct msm_usb_host_platform_data *pdata;
  572. int retval;
  573. struct msmusb_hcd *mhcd;
  574. hcd = usb_create_hcd(&msm_hc_driver, &pdev->dev, dev_name(&pdev->dev));
  575. if (!hcd)
  576. return -ENOMEM;
  577. hcd_to_bus(hcd)->skip_resume = true;
  578. hcd->irq = platform_get_irq(pdev, 0);
  579. if (hcd->irq < 0) {
  580. usb_put_hcd(hcd);
  581. return hcd->irq;
  582. }
  583. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  584. if (!res) {
  585. usb_put_hcd(hcd);
  586. return -ENODEV;
  587. }
  588. hcd->rsrc_start = res->start;
  589. hcd->rsrc_len = resource_size(res);
  590. mhcd = hcd_to_mhcd(hcd);
  591. spin_lock_init(&mhcd->lock);
  592. mhcd->in_lpm = 0;
  593. mhcd->running = 0;
  594. device_init_wakeup(&pdev->dev, 1);
  595. pdata = pdev->dev.platform_data;
  596. if (PHY_TYPE(pdata->phy_info) == USB_PHY_UNDEFINED) {
  597. usb_put_hcd(hcd);
  598. return -ENODEV;
  599. }
  600. hcd->power_budget = pdata->power_budget;
  601. mhcd->pdata = pdata;
  602. INIT_WORK(&mhcd->lpm_exit_work, usb_lpm_exit_w);
  603. wake_lock_init(&mhcd->wlock, WAKE_LOCK_SUSPEND, dev_name(&pdev->dev));
  604. pdata->ebi1_clk = clk_get(&pdev->dev, "core_clk");
  605. if (IS_ERR(pdata->ebi1_clk))
  606. pdata->ebi1_clk = NULL;
  607. else
  608. clk_set_rate(pdata->ebi1_clk, INT_MAX);
  609. retval = msm_xusb_init_host(pdev, mhcd);
  610. if (retval < 0) {
  611. wake_lock_destroy(&mhcd->wlock);
  612. usb_put_hcd(hcd);
  613. clk_put(pdata->ebi1_clk);
  614. }
  615. pm_runtime_enable(&pdev->dev);
  616. return retval;
  617. }
  618. static void msm_xusb_uninit_host(struct msmusb_hcd *mhcd)
  619. {
  620. struct usb_hcd *hcd = mhcd_to_hcd(mhcd);
  621. struct msm_usb_host_platform_data *pdata = mhcd->pdata;
  622. switch (PHY_TYPE(pdata->phy_info)) {
  623. case USB_PHY_INTEGRATED:
  624. if (pdata->vbus_init)
  625. pdata->vbus_init(0);
  626. hcd_to_ehci(hcd)->transceiver = NULL;
  627. otg_set_host(mhcd->xceiv->otg, NULL);
  628. usb_put_transceiver(mhcd->xceiv);
  629. cancel_work_sync(&mhcd->otg_work);
  630. break;
  631. case USB_PHY_SERIAL_PMIC:
  632. iounmap(hcd->regs);
  633. clk_put(mhcd->alt_core_clk);
  634. clk_put(mhcd->iface_clk);
  635. msm_fsusb_reset_phy();
  636. msm_fsusb_rpc_deinit();
  637. break;
  638. default:
  639. pr_err("phy type is bad\n");
  640. }
  641. }
  642. static int __exit ehci_msm_remove(struct platform_device *pdev)
  643. {
  644. struct usb_hcd *hcd = platform_get_drvdata(pdev);
  645. struct msmusb_hcd *mhcd = hcd_to_mhcd(hcd);
  646. struct msm_usb_host_platform_data *pdata;
  647. int retval = 0;
  648. pdata = pdev->dev.platform_data;
  649. device_init_wakeup(&pdev->dev, 0);
  650. msm_hsusb_request_host((void *)mhcd, REQUEST_STOP);
  651. msm_xusb_uninit_host(mhcd);
  652. retval = msm_xusb_rpc_close(mhcd);
  653. wake_lock_destroy(&mhcd->wlock);
  654. usb_put_hcd(hcd);
  655. clk_put(pdata->ebi1_clk);
  656. pm_runtime_disable(&pdev->dev);
  657. pm_runtime_set_suspended(&pdev->dev);
  658. return retval;
  659. }
  660. static int ehci_msm_runtime_suspend(struct device *dev)
  661. {
  662. dev_dbg(dev, "pm_runtime: suspending...\n");
  663. return 0;
  664. }
  665. static int ehci_msm_runtime_resume(struct device *dev)
  666. {
  667. dev_dbg(dev, "pm_runtime: resuming...\n");
  668. return 0;
  669. }
  670. static int ehci_msm_runtime_idle(struct device *dev)
  671. {
  672. dev_dbg(dev, "pm_runtime: idling...\n");
  673. return 0;
  674. }
  675. static const struct dev_pm_ops ehci_msm_dev_pm_ops = {
  676. .runtime_suspend = ehci_msm_runtime_suspend,
  677. .runtime_resume = ehci_msm_runtime_resume,
  678. .runtime_idle = ehci_msm_runtime_idle
  679. };
  680. static struct platform_driver ehci_msm_driver = {
  681. .probe = ehci_msm_probe,
  682. .remove = __exit_p(ehci_msm_remove),
  683. .driver = {.name = "msm_hsusb_host",
  684. .pm = &ehci_msm_dev_pm_ops, },
  685. };