c67x00.h 9.2 KB

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  1. /*
  2. * c67x00.h: Cypress C67X00 USB register and field definitions
  3. *
  4. * Copyright (C) 2006-2008 Barco N.V.
  5. * Derived from the Cypress cy7c67200/300 ezusb linux driver and
  6. * based on multiple host controller drivers inside the linux kernel.
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
  21. * MA 02110-1301 USA.
  22. */
  23. #ifndef _USB_C67X00_H
  24. #define _USB_C67X00_H
  25. #include <linux/spinlock.h>
  26. #include <linux/platform_device.h>
  27. #include <linux/completion.h>
  28. #include <linux/mutex.h>
  29. /* ---------------------------------------------------------------------
  30. * Cypress C67x00 register definitions
  31. */
  32. /* Hardware Revision Register */
  33. #define HW_REV_REG 0xC004
  34. /* General USB registers */
  35. /* ===================== */
  36. /* USB Control Register */
  37. #define USB_CTL_REG(x) ((x) ? 0xC0AA : 0xC08A)
  38. #define LOW_SPEED_PORT(x) ((x) ? 0x0800 : 0x0400)
  39. #define HOST_MODE 0x0200
  40. #define PORT_RES_EN(x) ((x) ? 0x0100 : 0x0080)
  41. #define SOF_EOP_EN(x) ((x) ? 0x0002 : 0x0001)
  42. /* USB status register - Notice it has different content in hcd/udc mode */
  43. #define USB_STAT_REG(x) ((x) ? 0xC0B0 : 0xC090)
  44. #define EP0_IRQ_FLG 0x0001
  45. #define EP1_IRQ_FLG 0x0002
  46. #define EP2_IRQ_FLG 0x0004
  47. #define EP3_IRQ_FLG 0x0008
  48. #define EP4_IRQ_FLG 0x0010
  49. #define EP5_IRQ_FLG 0x0020
  50. #define EP6_IRQ_FLG 0x0040
  51. #define EP7_IRQ_FLG 0x0080
  52. #define RESET_IRQ_FLG 0x0100
  53. #define SOF_EOP_IRQ_FLG 0x0200
  54. #define ID_IRQ_FLG 0x4000
  55. #define VBUS_IRQ_FLG 0x8000
  56. /* USB Host only registers */
  57. /* ======================= */
  58. /* Host n Control Register */
  59. #define HOST_CTL_REG(x) ((x) ? 0xC0A0 : 0xC080)
  60. #define PREAMBLE_EN 0x0080 /* Preamble enable */
  61. #define SEQ_SEL 0x0040 /* Data Toggle Sequence Bit Select */
  62. #define ISO_EN 0x0010 /* Isochronous enable */
  63. #define ARM_EN 0x0001 /* Arm operation */
  64. /* Host n Interrupt Enable Register */
  65. #define HOST_IRQ_EN_REG(x) ((x) ? 0xC0AC : 0xC08C)
  66. #define SOF_EOP_IRQ_EN 0x0200 /* SOF/EOP Interrupt Enable */
  67. #define SOF_EOP_TMOUT_IRQ_EN 0x0800 /* SOF/EOP Timeout Interrupt Enable */
  68. #define ID_IRQ_EN 0x4000 /* ID interrupt enable */
  69. #define VBUS_IRQ_EN 0x8000 /* VBUS interrupt enable */
  70. #define DONE_IRQ_EN 0x0001 /* Done Interrupt Enable */
  71. /* USB status register */
  72. #define HOST_STAT_MASK 0x02FD
  73. #define PORT_CONNECT_CHANGE(x) ((x) ? 0x0020 : 0x0010)
  74. #define PORT_SE0_STATUS(x) ((x) ? 0x0008 : 0x0004)
  75. /* Host Frame Register */
  76. #define HOST_FRAME_REG(x) ((x) ? 0xC0B6 : 0xC096)
  77. #define HOST_FRAME_MASK 0x07FF
  78. /* USB Peripheral only registers */
  79. /* ============================= */
  80. /* Device n Port Sel reg */
  81. #define DEVICE_N_PORT_SEL(x) ((x) ? 0xC0A4 : 0xC084)
  82. /* Device n Interrupt Enable Register */
  83. #define DEVICE_N_IRQ_EN_REG(x) ((x) ? 0xC0AC : 0xC08C)
  84. #define DEVICE_N_ENDPOINT_N_CTL_REG(dev, ep) ((dev) \
  85. ? (0x0280 + (ep << 4)) \
  86. : (0x0200 + (ep << 4)))
  87. #define DEVICE_N_ENDPOINT_N_STAT_REG(dev, ep) ((dev) \
  88. ? (0x0286 + (ep << 4)) \
  89. : (0x0206 + (ep << 4)))
  90. #define DEVICE_N_ADDRESS(dev) ((dev) ? (0xC0AE) : (0xC08E))
  91. /* HPI registers */
  92. /* ============= */
  93. /* HPI Status register */
  94. #define SOFEOP_FLG(x) (1 << ((x) ? 12 : 10))
  95. #define SIEMSG_FLG(x) (1 << (4 + (x)))
  96. #define RESET_FLG(x) ((x) ? 0x0200 : 0x0002)
  97. #define DONE_FLG(x) (1 << (2 + (x)))
  98. #define RESUME_FLG(x) (1 << (6 + (x)))
  99. #define MBX_OUT_FLG 0x0001 /* Message out available */
  100. #define MBX_IN_FLG 0x0100
  101. #define ID_FLG 0x4000
  102. #define VBUS_FLG 0x8000
  103. /* Interrupt routing register */
  104. #define HPI_IRQ_ROUTING_REG 0x0142
  105. #define HPI_SWAP_ENABLE(x) ((x) ? 0x0100 : 0x0001)
  106. #define RESET_TO_HPI_ENABLE(x) ((x) ? 0x0200 : 0x0002)
  107. #define DONE_TO_HPI_ENABLE(x) ((x) ? 0x0008 : 0x0004)
  108. #define RESUME_TO_HPI_ENABLE(x) ((x) ? 0x0080 : 0x0040)
  109. #define SOFEOP_TO_HPI_EN(x) ((x) ? 0x2000 : 0x0800)
  110. #define SOFEOP_TO_CPU_EN(x) ((x) ? 0x1000 : 0x0400)
  111. #define ID_TO_HPI_ENABLE 0x4000
  112. #define VBUS_TO_HPI_ENABLE 0x8000
  113. /* SIE msg registers */
  114. #define SIEMSG_REG(x) ((x) ? 0x0148 : 0x0144)
  115. #define HUSB_TDListDone 0x1000
  116. #define SUSB_EP0_MSG 0x0001
  117. #define SUSB_EP1_MSG 0x0002
  118. #define SUSB_EP2_MSG 0x0004
  119. #define SUSB_EP3_MSG 0x0008
  120. #define SUSB_EP4_MSG 0x0010
  121. #define SUSB_EP5_MSG 0x0020
  122. #define SUSB_EP6_MSG 0x0040
  123. #define SUSB_EP7_MSG 0x0080
  124. #define SUSB_RST_MSG 0x0100
  125. #define SUSB_SOF_MSG 0x0200
  126. #define SUSB_CFG_MSG 0x0400
  127. #define SUSB_SUS_MSG 0x0800
  128. #define SUSB_ID_MSG 0x4000
  129. #define SUSB_VBUS_MSG 0x8000
  130. /* BIOS interrupt routines */
  131. #define SUSBx_RECEIVE_INT(x) ((x) ? 97 : 81)
  132. #define SUSBx_SEND_INT(x) ((x) ? 96 : 80)
  133. #define SUSBx_DEV_DESC_VEC(x) ((x) ? 0x00D4 : 0x00B4)
  134. #define SUSBx_CONF_DESC_VEC(x) ((x) ? 0x00D6 : 0x00B6)
  135. #define SUSBx_STRING_DESC_VEC(x) ((x) ? 0x00D8 : 0x00B8)
  136. #define CY_HCD_BUF_ADDR 0x500 /* Base address for host */
  137. #define SIE_TD_SIZE 0x200 /* size of the td list */
  138. #define SIE_TD_BUF_SIZE 0x400 /* size of the data buffer */
  139. #define SIE_TD_OFFSET(host) ((host) ? (SIE_TD_SIZE+SIE_TD_BUF_SIZE) : 0)
  140. #define SIE_BUF_OFFSET(host) (SIE_TD_OFFSET(host) + SIE_TD_SIZE)
  141. /* Base address of HCD + 2 x TD_SIZE + 2 x TD_BUF_SIZE */
  142. #define CY_UDC_REQ_HEADER_BASE 0x1100
  143. /* 8- byte request headers for IN/OUT transfers */
  144. #define CY_UDC_REQ_HEADER_SIZE 8
  145. #define CY_UDC_REQ_HEADER_ADDR(ep_num) (CY_UDC_REQ_HEADER_BASE + \
  146. ((ep_num) * CY_UDC_REQ_HEADER_SIZE))
  147. #define CY_UDC_DESC_BASE_ADDRESS (CY_UDC_REQ_HEADER_ADDR(8))
  148. #define CY_UDC_BIOS_REPLACE_BASE 0x1800
  149. #define CY_UDC_REQ_BUFFER_BASE 0x2000
  150. #define CY_UDC_REQ_BUFFER_SIZE 0x0400
  151. #define CY_UDC_REQ_BUFFER_ADDR(ep_num) (CY_UDC_REQ_BUFFER_BASE + \
  152. ((ep_num) * CY_UDC_REQ_BUFFER_SIZE))
  153. /* ---------------------------------------------------------------------
  154. * Driver data structures
  155. */
  156. struct c67x00_device;
  157. /**
  158. * struct c67x00_sie - Common data associated with a SIE
  159. * @lock: lock to protect this struct and the associated chip registers
  160. * @private_data: subdriver dependent data
  161. * @irq: subdriver dependent irq handler, set NULL when not used
  162. * @dev: link to common driver structure
  163. * @sie_num: SIE number on chip, starting from 0
  164. * @mode: SIE mode (host/peripheral/otg/not used)
  165. */
  166. struct c67x00_sie {
  167. /* Entries to be used by the subdrivers */
  168. spinlock_t lock; /* protect this structure */
  169. void *private_data;
  170. void (*irq) (struct c67x00_sie *sie, u16 int_status, u16 msg);
  171. /* Read only: */
  172. struct c67x00_device *dev;
  173. int sie_num;
  174. int mode;
  175. };
  176. #define sie_dev(s) (&(s)->dev->pdev->dev)
  177. /**
  178. * struct c67x00_lcp
  179. */
  180. struct c67x00_lcp {
  181. /* Internal use only */
  182. struct mutex mutex;
  183. struct completion msg_received;
  184. u16 last_msg;
  185. };
  186. /*
  187. * struct c67x00_hpi
  188. */
  189. struct c67x00_hpi {
  190. void __iomem *base;
  191. int regstep;
  192. spinlock_t lock;
  193. struct c67x00_lcp lcp;
  194. };
  195. #define C67X00_SIES 2
  196. #define C67X00_PORTS 2
  197. /**
  198. * struct c67x00_device - Common data associated with a c67x00 instance
  199. * @hpi: hpi addresses
  200. * @sie: array of sie's on this chip
  201. * @pdev: platform device of instance
  202. * @pdata: configuration provided by the platform
  203. */
  204. struct c67x00_device {
  205. struct c67x00_hpi hpi;
  206. struct c67x00_sie sie[C67X00_SIES];
  207. struct platform_device *pdev;
  208. struct c67x00_platform_data *pdata;
  209. };
  210. /* ---------------------------------------------------------------------
  211. * Low level interface functions
  212. */
  213. /* Host Port Interface (HPI) functions */
  214. u16 c67x00_ll_hpi_status(struct c67x00_device *dev);
  215. void c67x00_ll_hpi_reg_init(struct c67x00_device *dev);
  216. void c67x00_ll_hpi_enable_sofeop(struct c67x00_sie *sie);
  217. void c67x00_ll_hpi_disable_sofeop(struct c67x00_sie *sie);
  218. /* General functions */
  219. u16 c67x00_ll_fetch_siemsg(struct c67x00_device *dev, int sie_num);
  220. u16 c67x00_ll_get_usb_ctl(struct c67x00_sie *sie);
  221. void c67x00_ll_usb_clear_status(struct c67x00_sie *sie, u16 bits);
  222. u16 c67x00_ll_usb_get_status(struct c67x00_sie *sie);
  223. void c67x00_ll_write_mem_le16(struct c67x00_device *dev, u16 addr,
  224. void *data, int len);
  225. void c67x00_ll_read_mem_le16(struct c67x00_device *dev, u16 addr,
  226. void *data, int len);
  227. /* Host specific functions */
  228. void c67x00_ll_set_husb_eot(struct c67x00_device *dev, u16 value);
  229. void c67x00_ll_husb_reset(struct c67x00_sie *sie, int port);
  230. void c67x00_ll_husb_set_current_td(struct c67x00_sie *sie, u16 addr);
  231. u16 c67x00_ll_husb_get_current_td(struct c67x00_sie *sie);
  232. u16 c67x00_ll_husb_get_frame(struct c67x00_sie *sie);
  233. void c67x00_ll_husb_init_host_port(struct c67x00_sie *sie);
  234. void c67x00_ll_husb_reset_port(struct c67x00_sie *sie, int port);
  235. /* Called by c67x00_irq to handle lcp interrupts */
  236. void c67x00_ll_irq(struct c67x00_device *dev, u16 int_status);
  237. /* Setup and teardown */
  238. void c67x00_ll_init(struct c67x00_device *dev);
  239. void c67x00_ll_release(struct c67x00_device *dev);
  240. int c67x00_ll_reset(struct c67x00_device *dev);
  241. #endif /* _USB_C67X00_H */