isph3a.h 3.0 KB

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  1. /*
  2. * isph3a.h
  3. *
  4. * TI OMAP3 ISP - H3A AF module
  5. *
  6. * Copyright (C) 2010 Nokia Corporation
  7. * Copyright (C) 2009 Texas Instruments, Inc.
  8. *
  9. * Contacts: David Cohen <dacohen@gmail.com>
  10. * Laurent Pinchart <laurent.pinchart@ideasonboard.com>
  11. * Sakari Ailus <sakari.ailus@iki.fi>
  12. *
  13. * This program is free software; you can redistribute it and/or modify
  14. * it under the terms of the GNU General Public License version 2 as
  15. * published by the Free Software Foundation.
  16. *
  17. * This program is distributed in the hope that it will be useful, but
  18. * WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  20. * General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software
  24. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  25. * 02110-1301 USA
  26. */
  27. #ifndef OMAP3_ISP_H3A_H
  28. #define OMAP3_ISP_H3A_H
  29. #include <linux/omap3isp.h>
  30. /*
  31. * ----------
  32. * -H3A AEWB-
  33. * ----------
  34. */
  35. #define AEWB_PACKET_SIZE 16
  36. #define AEWB_SATURATION_LIMIT 0x3ff
  37. /* Flags for changed registers */
  38. #define PCR_CHNG (1 << 0)
  39. #define AEWWIN1_CHNG (1 << 1)
  40. #define AEWINSTART_CHNG (1 << 2)
  41. #define AEWINBLK_CHNG (1 << 3)
  42. #define AEWSUBWIN_CHNG (1 << 4)
  43. #define PRV_WBDGAIN_CHNG (1 << 5)
  44. #define PRV_WBGAIN_CHNG (1 << 6)
  45. /* ISPH3A REGISTERS bits */
  46. #define ISPH3A_PCR_AF_EN (1 << 0)
  47. #define ISPH3A_PCR_AF_ALAW_EN (1 << 1)
  48. #define ISPH3A_PCR_AF_MED_EN (1 << 2)
  49. #define ISPH3A_PCR_AF_BUSY (1 << 15)
  50. #define ISPH3A_PCR_AEW_EN (1 << 16)
  51. #define ISPH3A_PCR_AEW_ALAW_EN (1 << 17)
  52. #define ISPH3A_PCR_AEW_BUSY (1 << 18)
  53. #define ISPH3A_PCR_AEW_MASK (ISPH3A_PCR_AEW_ALAW_EN | \
  54. ISPH3A_PCR_AEW_AVE2LMT_MASK)
  55. /*
  56. * --------
  57. * -H3A AF-
  58. * --------
  59. */
  60. /* Peripheral Revision */
  61. #define AFPID 0x0
  62. #define AFCOEF_OFFSET 0x00000004 /* COEF base address */
  63. /* PCR fields */
  64. #define AF_BUSYAF (1 << 15)
  65. #define AF_FVMODE (1 << 14)
  66. #define AF_RGBPOS (0x7 << 11)
  67. #define AF_MED_TH (0xFF << 3)
  68. #define AF_MED_EN (1 << 2)
  69. #define AF_ALAW_EN (1 << 1)
  70. #define AF_EN (1 << 0)
  71. #define AF_PCR_MASK (AF_FVMODE | AF_RGBPOS | AF_MED_TH | \
  72. AF_MED_EN | AF_ALAW_EN)
  73. /* AFPAX1 fields */
  74. #define AF_PAXW (0x7F << 16)
  75. #define AF_PAXH 0x7F
  76. /* AFPAX2 fields */
  77. #define AF_AFINCV (0xF << 13)
  78. #define AF_PAXVC (0x7F << 6)
  79. #define AF_PAXHC 0x3F
  80. /* AFPAXSTART fields */
  81. #define AF_PAXSH (0xFFF<<16)
  82. #define AF_PAXSV 0xFFF
  83. /* COEFFICIENT MASK */
  84. #define AF_COEF_MASK0 0xFFF
  85. #define AF_COEF_MASK1 (0xFFF<<16)
  86. /* BIT SHIFTS */
  87. #define AF_RGBPOS_SHIFT 11
  88. #define AF_MED_TH_SHIFT 3
  89. #define AF_PAXW_SHIFT 16
  90. #define AF_LINE_INCR_SHIFT 13
  91. #define AF_VT_COUNT_SHIFT 6
  92. #define AF_HZ_START_SHIFT 16
  93. #define AF_COEF_SHIFT 16
  94. /* Init and cleanup functions */
  95. int omap3isp_h3a_aewb_init(struct isp_device *isp);
  96. int omap3isp_h3a_af_init(struct isp_device *isp);
  97. void omap3isp_h3a_aewb_cleanup(struct isp_device *isp);
  98. void omap3isp_h3a_af_cleanup(struct isp_device *isp);
  99. #endif /* OMAP3_ISP_H3A_H */