atmel-isi.c 28 KB

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  1. /*
  2. * Copyright (c) 2011 Atmel Corporation
  3. * Josh Wu, <josh.wu@atmel.com>
  4. *
  5. * Based on previous work by Lars Haring, <lars.haring@atmel.com>
  6. * and Sedji Gaouaou
  7. * Based on the bttv driver for Bt848 with respective copyright holders
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. */
  13. #include <linux/clk.h>
  14. #include <linux/completion.h>
  15. #include <linux/delay.h>
  16. #include <linux/fs.h>
  17. #include <linux/init.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/kernel.h>
  20. #include <linux/module.h>
  21. #include <linux/platform_device.h>
  22. #include <linux/slab.h>
  23. #include <media/atmel-isi.h>
  24. #include <media/soc_camera.h>
  25. #include <media/soc_mediabus.h>
  26. #include <media/videobuf2-dma-contig.h>
  27. #define MAX_BUFFER_NUM 32
  28. #define MAX_SUPPORT_WIDTH 2048
  29. #define MAX_SUPPORT_HEIGHT 2048
  30. #define VID_LIMIT_BYTES (16 * 1024 * 1024)
  31. #define MIN_FRAME_RATE 15
  32. #define FRAME_INTERVAL_MILLI_SEC (1000 / MIN_FRAME_RATE)
  33. /* ISI states */
  34. enum {
  35. ISI_STATE_IDLE = 0,
  36. ISI_STATE_READY,
  37. ISI_STATE_WAIT_SOF,
  38. };
  39. /* Frame buffer descriptor */
  40. struct fbd {
  41. /* Physical address of the frame buffer */
  42. u32 fb_address;
  43. /* DMA Control Register(only in HISI2) */
  44. u32 dma_ctrl;
  45. /* Physical address of the next fbd */
  46. u32 next_fbd_address;
  47. };
  48. static void set_dma_ctrl(struct fbd *fb_desc, u32 ctrl)
  49. {
  50. fb_desc->dma_ctrl = ctrl;
  51. }
  52. struct isi_dma_desc {
  53. struct list_head list;
  54. struct fbd *p_fbd;
  55. u32 fbd_phys;
  56. };
  57. /* Frame buffer data */
  58. struct frame_buffer {
  59. struct vb2_buffer vb;
  60. struct isi_dma_desc *p_dma_desc;
  61. struct list_head list;
  62. };
  63. struct atmel_isi {
  64. /* Protects the access of variables shared with the ISR */
  65. spinlock_t lock;
  66. void __iomem *regs;
  67. int sequence;
  68. /* State of the ISI module in capturing mode */
  69. int state;
  70. /* Wait queue for waiting for SOF */
  71. wait_queue_head_t vsync_wq;
  72. struct vb2_alloc_ctx *alloc_ctx;
  73. /* Allocate descriptors for dma buffer use */
  74. struct fbd *p_fb_descriptors;
  75. u32 fb_descriptors_phys;
  76. struct list_head dma_desc_head;
  77. struct isi_dma_desc dma_desc[MAX_BUFFER_NUM];
  78. struct completion complete;
  79. /* ISI peripherial clock */
  80. struct clk *pclk;
  81. /* ISI_MCK, feed to camera sensor to generate pixel clock */
  82. struct clk *mck;
  83. unsigned int irq;
  84. struct isi_platform_data *pdata;
  85. u16 width_flags; /* max 12 bits */
  86. struct list_head video_buffer_list;
  87. struct frame_buffer *active;
  88. struct soc_camera_device *icd;
  89. struct soc_camera_host soc_host;
  90. };
  91. static void isi_writel(struct atmel_isi *isi, u32 reg, u32 val)
  92. {
  93. writel(val, isi->regs + reg);
  94. }
  95. static u32 isi_readl(struct atmel_isi *isi, u32 reg)
  96. {
  97. return readl(isi->regs + reg);
  98. }
  99. static int configure_geometry(struct atmel_isi *isi, u32 width,
  100. u32 height, enum v4l2_mbus_pixelcode code)
  101. {
  102. u32 cfg2, cr;
  103. switch (code) {
  104. /* YUV, including grey */
  105. case V4L2_MBUS_FMT_Y8_1X8:
  106. cr = ISI_CFG2_GRAYSCALE;
  107. break;
  108. case V4L2_MBUS_FMT_UYVY8_2X8:
  109. cr = ISI_CFG2_YCC_SWAP_MODE_3;
  110. break;
  111. case V4L2_MBUS_FMT_VYUY8_2X8:
  112. cr = ISI_CFG2_YCC_SWAP_MODE_2;
  113. break;
  114. case V4L2_MBUS_FMT_YUYV8_2X8:
  115. cr = ISI_CFG2_YCC_SWAP_MODE_1;
  116. break;
  117. case V4L2_MBUS_FMT_YVYU8_2X8:
  118. cr = ISI_CFG2_YCC_SWAP_DEFAULT;
  119. break;
  120. /* RGB, TODO */
  121. default:
  122. return -EINVAL;
  123. }
  124. isi_writel(isi, ISI_CTRL, ISI_CTRL_DIS);
  125. cfg2 = isi_readl(isi, ISI_CFG2);
  126. cfg2 |= cr;
  127. /* Set width */
  128. cfg2 &= ~(ISI_CFG2_IM_HSIZE_MASK);
  129. cfg2 |= ((width - 1) << ISI_CFG2_IM_HSIZE_OFFSET) &
  130. ISI_CFG2_IM_HSIZE_MASK;
  131. /* Set height */
  132. cfg2 &= ~(ISI_CFG2_IM_VSIZE_MASK);
  133. cfg2 |= ((height - 1) << ISI_CFG2_IM_VSIZE_OFFSET)
  134. & ISI_CFG2_IM_VSIZE_MASK;
  135. isi_writel(isi, ISI_CFG2, cfg2);
  136. return 0;
  137. }
  138. static irqreturn_t atmel_isi_handle_streaming(struct atmel_isi *isi)
  139. {
  140. if (isi->active) {
  141. struct vb2_buffer *vb = &isi->active->vb;
  142. struct frame_buffer *buf = isi->active;
  143. list_del_init(&buf->list);
  144. do_gettimeofday(&vb->v4l2_buf.timestamp);
  145. vb->v4l2_buf.sequence = isi->sequence++;
  146. vb2_buffer_done(vb, VB2_BUF_STATE_DONE);
  147. }
  148. if (list_empty(&isi->video_buffer_list)) {
  149. isi->active = NULL;
  150. } else {
  151. /* start next dma frame. */
  152. isi->active = list_entry(isi->video_buffer_list.next,
  153. struct frame_buffer, list);
  154. isi_writel(isi, ISI_DMA_C_DSCR,
  155. isi->active->p_dma_desc->fbd_phys);
  156. isi_writel(isi, ISI_DMA_C_CTRL,
  157. ISI_DMA_CTRL_FETCH | ISI_DMA_CTRL_DONE);
  158. isi_writel(isi, ISI_DMA_CHER, ISI_DMA_CHSR_C_CH);
  159. }
  160. return IRQ_HANDLED;
  161. }
  162. /* ISI interrupt service routine */
  163. static irqreturn_t isi_interrupt(int irq, void *dev_id)
  164. {
  165. struct atmel_isi *isi = dev_id;
  166. u32 status, mask, pending;
  167. irqreturn_t ret = IRQ_NONE;
  168. spin_lock(&isi->lock);
  169. status = isi_readl(isi, ISI_STATUS);
  170. mask = isi_readl(isi, ISI_INTMASK);
  171. pending = status & mask;
  172. if (pending & ISI_CTRL_SRST) {
  173. complete(&isi->complete);
  174. isi_writel(isi, ISI_INTDIS, ISI_CTRL_SRST);
  175. ret = IRQ_HANDLED;
  176. } else if (pending & ISI_CTRL_DIS) {
  177. complete(&isi->complete);
  178. isi_writel(isi, ISI_INTDIS, ISI_CTRL_DIS);
  179. ret = IRQ_HANDLED;
  180. } else {
  181. if ((pending & ISI_SR_VSYNC) &&
  182. (isi->state == ISI_STATE_IDLE)) {
  183. isi->state = ISI_STATE_READY;
  184. wake_up_interruptible(&isi->vsync_wq);
  185. ret = IRQ_HANDLED;
  186. }
  187. if (likely(pending & ISI_SR_CXFR_DONE))
  188. ret = atmel_isi_handle_streaming(isi);
  189. }
  190. spin_unlock(&isi->lock);
  191. return ret;
  192. }
  193. #define WAIT_ISI_RESET 1
  194. #define WAIT_ISI_DISABLE 0
  195. static int atmel_isi_wait_status(struct atmel_isi *isi, int wait_reset)
  196. {
  197. unsigned long timeout;
  198. /*
  199. * The reset or disable will only succeed if we have a
  200. * pixel clock from the camera.
  201. */
  202. init_completion(&isi->complete);
  203. if (wait_reset) {
  204. isi_writel(isi, ISI_INTEN, ISI_CTRL_SRST);
  205. isi_writel(isi, ISI_CTRL, ISI_CTRL_SRST);
  206. } else {
  207. isi_writel(isi, ISI_INTEN, ISI_CTRL_DIS);
  208. isi_writel(isi, ISI_CTRL, ISI_CTRL_DIS);
  209. }
  210. timeout = wait_for_completion_timeout(&isi->complete,
  211. msecs_to_jiffies(100));
  212. if (timeout == 0)
  213. return -ETIMEDOUT;
  214. return 0;
  215. }
  216. /* ------------------------------------------------------------------
  217. Videobuf operations
  218. ------------------------------------------------------------------*/
  219. static int queue_setup(struct vb2_queue *vq, const struct v4l2_format *fmt,
  220. unsigned int *nbuffers, unsigned int *nplanes,
  221. unsigned int sizes[], void *alloc_ctxs[])
  222. {
  223. struct soc_camera_device *icd = soc_camera_from_vb2q(vq);
  224. struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
  225. struct atmel_isi *isi = ici->priv;
  226. unsigned long size;
  227. int ret, bytes_per_line;
  228. /* Reset ISI */
  229. ret = atmel_isi_wait_status(isi, WAIT_ISI_RESET);
  230. if (ret < 0) {
  231. dev_err(icd->parent, "Reset ISI timed out\n");
  232. return ret;
  233. }
  234. /* Disable all interrupts */
  235. isi_writel(isi, ISI_INTDIS, ~0UL);
  236. bytes_per_line = soc_mbus_bytes_per_line(icd->user_width,
  237. icd->current_fmt->host_fmt);
  238. if (bytes_per_line < 0)
  239. return bytes_per_line;
  240. size = bytes_per_line * icd->user_height;
  241. if (!*nbuffers || *nbuffers > MAX_BUFFER_NUM)
  242. *nbuffers = MAX_BUFFER_NUM;
  243. if (size * *nbuffers > VID_LIMIT_BYTES)
  244. *nbuffers = VID_LIMIT_BYTES / size;
  245. *nplanes = 1;
  246. sizes[0] = size;
  247. alloc_ctxs[0] = isi->alloc_ctx;
  248. isi->sequence = 0;
  249. isi->active = NULL;
  250. dev_dbg(icd->parent, "%s, count=%d, size=%ld\n", __func__,
  251. *nbuffers, size);
  252. return 0;
  253. }
  254. static int buffer_init(struct vb2_buffer *vb)
  255. {
  256. struct frame_buffer *buf = container_of(vb, struct frame_buffer, vb);
  257. buf->p_dma_desc = NULL;
  258. INIT_LIST_HEAD(&buf->list);
  259. return 0;
  260. }
  261. static int buffer_prepare(struct vb2_buffer *vb)
  262. {
  263. struct soc_camera_device *icd = soc_camera_from_vb2q(vb->vb2_queue);
  264. struct frame_buffer *buf = container_of(vb, struct frame_buffer, vb);
  265. struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
  266. struct atmel_isi *isi = ici->priv;
  267. unsigned long size;
  268. struct isi_dma_desc *desc;
  269. int bytes_per_line = soc_mbus_bytes_per_line(icd->user_width,
  270. icd->current_fmt->host_fmt);
  271. if (bytes_per_line < 0)
  272. return bytes_per_line;
  273. size = bytes_per_line * icd->user_height;
  274. if (vb2_plane_size(vb, 0) < size) {
  275. dev_err(icd->parent, "%s data will not fit into plane (%lu < %lu)\n",
  276. __func__, vb2_plane_size(vb, 0), size);
  277. return -EINVAL;
  278. }
  279. vb2_set_plane_payload(&buf->vb, 0, size);
  280. if (!buf->p_dma_desc) {
  281. if (list_empty(&isi->dma_desc_head)) {
  282. dev_err(icd->parent, "Not enough dma descriptors.\n");
  283. return -EINVAL;
  284. } else {
  285. /* Get an available descriptor */
  286. desc = list_entry(isi->dma_desc_head.next,
  287. struct isi_dma_desc, list);
  288. /* Delete the descriptor since now it is used */
  289. list_del_init(&desc->list);
  290. /* Initialize the dma descriptor */
  291. desc->p_fbd->fb_address =
  292. vb2_dma_contig_plane_dma_addr(vb, 0);
  293. desc->p_fbd->next_fbd_address = 0;
  294. set_dma_ctrl(desc->p_fbd, ISI_DMA_CTRL_WB);
  295. buf->p_dma_desc = desc;
  296. }
  297. }
  298. return 0;
  299. }
  300. static void buffer_cleanup(struct vb2_buffer *vb)
  301. {
  302. struct soc_camera_device *icd = soc_camera_from_vb2q(vb->vb2_queue);
  303. struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
  304. struct atmel_isi *isi = ici->priv;
  305. struct frame_buffer *buf = container_of(vb, struct frame_buffer, vb);
  306. /* This descriptor is available now and we add to head list */
  307. if (buf->p_dma_desc)
  308. list_add(&buf->p_dma_desc->list, &isi->dma_desc_head);
  309. }
  310. static void start_dma(struct atmel_isi *isi, struct frame_buffer *buffer)
  311. {
  312. u32 ctrl, cfg1;
  313. cfg1 = isi_readl(isi, ISI_CFG1);
  314. /* Enable irq: cxfr for the codec path, pxfr for the preview path */
  315. isi_writel(isi, ISI_INTEN,
  316. ISI_SR_CXFR_DONE | ISI_SR_PXFR_DONE);
  317. /* Check if already in a frame */
  318. if (isi_readl(isi, ISI_STATUS) & ISI_CTRL_CDC) {
  319. dev_err(isi->icd->parent, "Already in frame handling.\n");
  320. return;
  321. }
  322. isi_writel(isi, ISI_DMA_C_DSCR, buffer->p_dma_desc->fbd_phys);
  323. isi_writel(isi, ISI_DMA_C_CTRL, ISI_DMA_CTRL_FETCH | ISI_DMA_CTRL_DONE);
  324. isi_writel(isi, ISI_DMA_CHER, ISI_DMA_CHSR_C_CH);
  325. /* Enable linked list */
  326. cfg1 |= isi->pdata->frate | ISI_CFG1_DISCR;
  327. /* Enable codec path and ISI */
  328. ctrl = ISI_CTRL_CDC | ISI_CTRL_EN;
  329. isi_writel(isi, ISI_CTRL, ctrl);
  330. isi_writel(isi, ISI_CFG1, cfg1);
  331. }
  332. static void buffer_queue(struct vb2_buffer *vb)
  333. {
  334. struct soc_camera_device *icd = soc_camera_from_vb2q(vb->vb2_queue);
  335. struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
  336. struct atmel_isi *isi = ici->priv;
  337. struct frame_buffer *buf = container_of(vb, struct frame_buffer, vb);
  338. unsigned long flags = 0;
  339. spin_lock_irqsave(&isi->lock, flags);
  340. list_add_tail(&buf->list, &isi->video_buffer_list);
  341. if (isi->active == NULL) {
  342. isi->active = buf;
  343. if (vb2_is_streaming(vb->vb2_queue))
  344. start_dma(isi, buf);
  345. }
  346. spin_unlock_irqrestore(&isi->lock, flags);
  347. }
  348. static int start_streaming(struct vb2_queue *vq, unsigned int count)
  349. {
  350. struct soc_camera_device *icd = soc_camera_from_vb2q(vq);
  351. struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
  352. struct atmel_isi *isi = ici->priv;
  353. u32 sr = 0;
  354. int ret;
  355. spin_lock_irq(&isi->lock);
  356. isi->state = ISI_STATE_IDLE;
  357. /* Clear any pending SOF interrupt */
  358. sr = isi_readl(isi, ISI_STATUS);
  359. /* Enable VSYNC interrupt for SOF */
  360. isi_writel(isi, ISI_INTEN, ISI_SR_VSYNC);
  361. isi_writel(isi, ISI_CTRL, ISI_CTRL_EN);
  362. spin_unlock_irq(&isi->lock);
  363. dev_dbg(icd->parent, "Waiting for SOF\n");
  364. ret = wait_event_interruptible(isi->vsync_wq,
  365. isi->state != ISI_STATE_IDLE);
  366. if (ret)
  367. goto err;
  368. if (isi->state != ISI_STATE_READY) {
  369. ret = -EIO;
  370. goto err;
  371. }
  372. spin_lock_irq(&isi->lock);
  373. isi->state = ISI_STATE_WAIT_SOF;
  374. isi_writel(isi, ISI_INTDIS, ISI_SR_VSYNC);
  375. if (count)
  376. start_dma(isi, isi->active);
  377. spin_unlock_irq(&isi->lock);
  378. return 0;
  379. err:
  380. isi->active = NULL;
  381. isi->sequence = 0;
  382. INIT_LIST_HEAD(&isi->video_buffer_list);
  383. return ret;
  384. }
  385. /* abort streaming and wait for last buffer */
  386. static int stop_streaming(struct vb2_queue *vq)
  387. {
  388. struct soc_camera_device *icd = soc_camera_from_vb2q(vq);
  389. struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
  390. struct atmel_isi *isi = ici->priv;
  391. struct frame_buffer *buf, *node;
  392. int ret = 0;
  393. unsigned long timeout;
  394. spin_lock_irq(&isi->lock);
  395. isi->active = NULL;
  396. /* Release all active buffers */
  397. list_for_each_entry_safe(buf, node, &isi->video_buffer_list, list) {
  398. list_del_init(&buf->list);
  399. vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR);
  400. }
  401. spin_unlock_irq(&isi->lock);
  402. timeout = jiffies + FRAME_INTERVAL_MILLI_SEC * HZ;
  403. /* Wait until the end of the current frame. */
  404. while ((isi_readl(isi, ISI_STATUS) & ISI_CTRL_CDC) &&
  405. time_before(jiffies, timeout))
  406. msleep(1);
  407. if (time_after(jiffies, timeout)) {
  408. dev_err(icd->parent,
  409. "Timeout waiting for finishing codec request\n");
  410. return -ETIMEDOUT;
  411. }
  412. /* Disable interrupts */
  413. isi_writel(isi, ISI_INTDIS,
  414. ISI_SR_CXFR_DONE | ISI_SR_PXFR_DONE);
  415. /* Disable ISI and wait for it is done */
  416. ret = atmel_isi_wait_status(isi, WAIT_ISI_DISABLE);
  417. if (ret < 0)
  418. dev_err(icd->parent, "Disable ISI timed out\n");
  419. return ret;
  420. }
  421. static struct vb2_ops isi_video_qops = {
  422. .queue_setup = queue_setup,
  423. .buf_init = buffer_init,
  424. .buf_prepare = buffer_prepare,
  425. .buf_cleanup = buffer_cleanup,
  426. .buf_queue = buffer_queue,
  427. .start_streaming = start_streaming,
  428. .stop_streaming = stop_streaming,
  429. .wait_prepare = soc_camera_unlock,
  430. .wait_finish = soc_camera_lock,
  431. };
  432. /* ------------------------------------------------------------------
  433. SOC camera operations for the device
  434. ------------------------------------------------------------------*/
  435. static int isi_camera_init_videobuf(struct vb2_queue *q,
  436. struct soc_camera_device *icd)
  437. {
  438. q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
  439. q->io_modes = VB2_MMAP;
  440. q->drv_priv = icd;
  441. q->buf_struct_size = sizeof(struct frame_buffer);
  442. q->ops = &isi_video_qops;
  443. q->mem_ops = &vb2_dma_contig_memops;
  444. return vb2_queue_init(q);
  445. }
  446. static int isi_camera_set_fmt(struct soc_camera_device *icd,
  447. struct v4l2_format *f)
  448. {
  449. struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
  450. struct atmel_isi *isi = ici->priv;
  451. struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
  452. const struct soc_camera_format_xlate *xlate;
  453. struct v4l2_pix_format *pix = &f->fmt.pix;
  454. struct v4l2_mbus_framefmt mf;
  455. int ret;
  456. xlate = soc_camera_xlate_by_fourcc(icd, pix->pixelformat);
  457. if (!xlate) {
  458. dev_warn(icd->parent, "Format %x not found\n",
  459. pix->pixelformat);
  460. return -EINVAL;
  461. }
  462. dev_dbg(icd->parent, "Plan to set format %dx%d\n",
  463. pix->width, pix->height);
  464. mf.width = pix->width;
  465. mf.height = pix->height;
  466. mf.field = pix->field;
  467. mf.colorspace = pix->colorspace;
  468. mf.code = xlate->code;
  469. ret = v4l2_subdev_call(sd, video, s_mbus_fmt, &mf);
  470. if (ret < 0)
  471. return ret;
  472. if (mf.code != xlate->code)
  473. return -EINVAL;
  474. ret = configure_geometry(isi, pix->width, pix->height, xlate->code);
  475. if (ret < 0)
  476. return ret;
  477. pix->width = mf.width;
  478. pix->height = mf.height;
  479. pix->field = mf.field;
  480. pix->colorspace = mf.colorspace;
  481. icd->current_fmt = xlate;
  482. dev_dbg(icd->parent, "Finally set format %dx%d\n",
  483. pix->width, pix->height);
  484. return ret;
  485. }
  486. static int isi_camera_try_fmt(struct soc_camera_device *icd,
  487. struct v4l2_format *f)
  488. {
  489. struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
  490. const struct soc_camera_format_xlate *xlate;
  491. struct v4l2_pix_format *pix = &f->fmt.pix;
  492. struct v4l2_mbus_framefmt mf;
  493. u32 pixfmt = pix->pixelformat;
  494. int ret;
  495. xlate = soc_camera_xlate_by_fourcc(icd, pixfmt);
  496. if (pixfmt && !xlate) {
  497. dev_warn(icd->parent, "Format %x not found\n", pixfmt);
  498. return -EINVAL;
  499. }
  500. /* limit to Atmel ISI hardware capabilities */
  501. if (pix->height > MAX_SUPPORT_HEIGHT)
  502. pix->height = MAX_SUPPORT_HEIGHT;
  503. if (pix->width > MAX_SUPPORT_WIDTH)
  504. pix->width = MAX_SUPPORT_WIDTH;
  505. /* limit to sensor capabilities */
  506. mf.width = pix->width;
  507. mf.height = pix->height;
  508. mf.field = pix->field;
  509. mf.colorspace = pix->colorspace;
  510. mf.code = xlate->code;
  511. ret = v4l2_subdev_call(sd, video, try_mbus_fmt, &mf);
  512. if (ret < 0)
  513. return ret;
  514. pix->width = mf.width;
  515. pix->height = mf.height;
  516. pix->colorspace = mf.colorspace;
  517. switch (mf.field) {
  518. case V4L2_FIELD_ANY:
  519. pix->field = V4L2_FIELD_NONE;
  520. break;
  521. case V4L2_FIELD_NONE:
  522. break;
  523. default:
  524. dev_err(icd->parent, "Field type %d unsupported.\n",
  525. mf.field);
  526. ret = -EINVAL;
  527. }
  528. return ret;
  529. }
  530. static const struct soc_mbus_pixelfmt isi_camera_formats[] = {
  531. {
  532. .fourcc = V4L2_PIX_FMT_YUYV,
  533. .name = "Packed YUV422 16 bit",
  534. .bits_per_sample = 8,
  535. .packing = SOC_MBUS_PACKING_2X8_PADHI,
  536. .order = SOC_MBUS_ORDER_LE,
  537. },
  538. };
  539. /* This will be corrected as we get more formats */
  540. static bool isi_camera_packing_supported(const struct soc_mbus_pixelfmt *fmt)
  541. {
  542. return fmt->packing == SOC_MBUS_PACKING_NONE ||
  543. (fmt->bits_per_sample == 8 &&
  544. fmt->packing == SOC_MBUS_PACKING_2X8_PADHI) ||
  545. (fmt->bits_per_sample > 8 &&
  546. fmt->packing == SOC_MBUS_PACKING_EXTEND16);
  547. }
  548. #define ISI_BUS_PARAM (V4L2_MBUS_MASTER | \
  549. V4L2_MBUS_HSYNC_ACTIVE_HIGH | \
  550. V4L2_MBUS_HSYNC_ACTIVE_LOW | \
  551. V4L2_MBUS_VSYNC_ACTIVE_HIGH | \
  552. V4L2_MBUS_VSYNC_ACTIVE_LOW | \
  553. V4L2_MBUS_PCLK_SAMPLE_RISING | \
  554. V4L2_MBUS_PCLK_SAMPLE_FALLING | \
  555. V4L2_MBUS_DATA_ACTIVE_HIGH)
  556. static int isi_camera_try_bus_param(struct soc_camera_device *icd,
  557. unsigned char buswidth)
  558. {
  559. struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
  560. struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
  561. struct atmel_isi *isi = ici->priv;
  562. struct v4l2_mbus_config cfg = {.type = V4L2_MBUS_PARALLEL,};
  563. unsigned long common_flags;
  564. int ret;
  565. ret = v4l2_subdev_call(sd, video, g_mbus_config, &cfg);
  566. if (!ret) {
  567. common_flags = soc_mbus_config_compatible(&cfg,
  568. ISI_BUS_PARAM);
  569. if (!common_flags) {
  570. dev_warn(icd->parent,
  571. "Flags incompatible: camera 0x%x, host 0x%x\n",
  572. cfg.flags, ISI_BUS_PARAM);
  573. return -EINVAL;
  574. }
  575. } else if (ret != -ENOIOCTLCMD) {
  576. return ret;
  577. }
  578. if ((1 << (buswidth - 1)) & isi->width_flags)
  579. return 0;
  580. return -EINVAL;
  581. }
  582. static int isi_camera_get_formats(struct soc_camera_device *icd,
  583. unsigned int idx,
  584. struct soc_camera_format_xlate *xlate)
  585. {
  586. struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
  587. int formats = 0, ret;
  588. /* sensor format */
  589. enum v4l2_mbus_pixelcode code;
  590. /* soc camera host format */
  591. const struct soc_mbus_pixelfmt *fmt;
  592. ret = v4l2_subdev_call(sd, video, enum_mbus_fmt, idx, &code);
  593. if (ret < 0)
  594. /* No more formats */
  595. return 0;
  596. fmt = soc_mbus_get_fmtdesc(code);
  597. if (!fmt) {
  598. dev_err(icd->parent,
  599. "Invalid format code #%u: %d\n", idx, code);
  600. return 0;
  601. }
  602. /* This also checks support for the requested bits-per-sample */
  603. ret = isi_camera_try_bus_param(icd, fmt->bits_per_sample);
  604. if (ret < 0) {
  605. dev_err(icd->parent,
  606. "Fail to try the bus parameters.\n");
  607. return 0;
  608. }
  609. switch (code) {
  610. case V4L2_MBUS_FMT_UYVY8_2X8:
  611. case V4L2_MBUS_FMT_VYUY8_2X8:
  612. case V4L2_MBUS_FMT_YUYV8_2X8:
  613. case V4L2_MBUS_FMT_YVYU8_2X8:
  614. formats++;
  615. if (xlate) {
  616. xlate->host_fmt = &isi_camera_formats[0];
  617. xlate->code = code;
  618. xlate++;
  619. dev_dbg(icd->parent, "Providing format %s using code %d\n",
  620. isi_camera_formats[0].name, code);
  621. }
  622. break;
  623. default:
  624. if (!isi_camera_packing_supported(fmt))
  625. return 0;
  626. if (xlate)
  627. dev_dbg(icd->parent,
  628. "Providing format %s in pass-through mode\n",
  629. fmt->name);
  630. }
  631. /* Generic pass-through */
  632. formats++;
  633. if (xlate) {
  634. xlate->host_fmt = fmt;
  635. xlate->code = code;
  636. xlate++;
  637. }
  638. return formats;
  639. }
  640. /* Called with .video_lock held */
  641. static int isi_camera_add_device(struct soc_camera_device *icd)
  642. {
  643. struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
  644. struct atmel_isi *isi = ici->priv;
  645. int ret;
  646. if (isi->icd)
  647. return -EBUSY;
  648. ret = clk_enable(isi->pclk);
  649. if (ret)
  650. return ret;
  651. ret = clk_enable(isi->mck);
  652. if (ret) {
  653. clk_disable(isi->pclk);
  654. return ret;
  655. }
  656. isi->icd = icd;
  657. dev_dbg(icd->parent, "Atmel ISI Camera driver attached to camera %d\n",
  658. icd->devnum);
  659. return 0;
  660. }
  661. /* Called with .video_lock held */
  662. static void isi_camera_remove_device(struct soc_camera_device *icd)
  663. {
  664. struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
  665. struct atmel_isi *isi = ici->priv;
  666. BUG_ON(icd != isi->icd);
  667. clk_disable(isi->mck);
  668. clk_disable(isi->pclk);
  669. isi->icd = NULL;
  670. dev_dbg(icd->parent, "Atmel ISI Camera driver detached from camera %d\n",
  671. icd->devnum);
  672. }
  673. static unsigned int isi_camera_poll(struct file *file, poll_table *pt)
  674. {
  675. struct soc_camera_device *icd = file->private_data;
  676. return vb2_poll(&icd->vb2_vidq, file, pt);
  677. }
  678. static int isi_camera_querycap(struct soc_camera_host *ici,
  679. struct v4l2_capability *cap)
  680. {
  681. strcpy(cap->driver, "atmel-isi");
  682. strcpy(cap->card, "Atmel Image Sensor Interface");
  683. cap->capabilities = (V4L2_CAP_VIDEO_CAPTURE |
  684. V4L2_CAP_STREAMING);
  685. return 0;
  686. }
  687. static int isi_camera_set_bus_param(struct soc_camera_device *icd)
  688. {
  689. struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
  690. struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
  691. struct atmel_isi *isi = ici->priv;
  692. struct v4l2_mbus_config cfg = {.type = V4L2_MBUS_PARALLEL,};
  693. unsigned long common_flags;
  694. int ret;
  695. u32 cfg1 = 0;
  696. ret = v4l2_subdev_call(sd, video, g_mbus_config, &cfg);
  697. if (!ret) {
  698. common_flags = soc_mbus_config_compatible(&cfg,
  699. ISI_BUS_PARAM);
  700. if (!common_flags) {
  701. dev_warn(icd->parent,
  702. "Flags incompatible: camera 0x%x, host 0x%x\n",
  703. cfg.flags, ISI_BUS_PARAM);
  704. return -EINVAL;
  705. }
  706. } else if (ret != -ENOIOCTLCMD) {
  707. return ret;
  708. } else {
  709. common_flags = ISI_BUS_PARAM;
  710. }
  711. dev_dbg(icd->parent, "Flags cam: 0x%x host: 0x%x common: 0x%lx\n",
  712. cfg.flags, ISI_BUS_PARAM, common_flags);
  713. /* Make choises, based on platform preferences */
  714. if ((common_flags & V4L2_MBUS_HSYNC_ACTIVE_HIGH) &&
  715. (common_flags & V4L2_MBUS_HSYNC_ACTIVE_LOW)) {
  716. if (isi->pdata->hsync_act_low)
  717. common_flags &= ~V4L2_MBUS_HSYNC_ACTIVE_HIGH;
  718. else
  719. common_flags &= ~V4L2_MBUS_HSYNC_ACTIVE_LOW;
  720. }
  721. if ((common_flags & V4L2_MBUS_VSYNC_ACTIVE_HIGH) &&
  722. (common_flags & V4L2_MBUS_VSYNC_ACTIVE_LOW)) {
  723. if (isi->pdata->vsync_act_low)
  724. common_flags &= ~V4L2_MBUS_VSYNC_ACTIVE_HIGH;
  725. else
  726. common_flags &= ~V4L2_MBUS_VSYNC_ACTIVE_LOW;
  727. }
  728. if ((common_flags & V4L2_MBUS_PCLK_SAMPLE_RISING) &&
  729. (common_flags & V4L2_MBUS_PCLK_SAMPLE_FALLING)) {
  730. if (isi->pdata->pclk_act_falling)
  731. common_flags &= ~V4L2_MBUS_PCLK_SAMPLE_RISING;
  732. else
  733. common_flags &= ~V4L2_MBUS_PCLK_SAMPLE_FALLING;
  734. }
  735. cfg.flags = common_flags;
  736. ret = v4l2_subdev_call(sd, video, s_mbus_config, &cfg);
  737. if (ret < 0 && ret != -ENOIOCTLCMD) {
  738. dev_dbg(icd->parent, "camera s_mbus_config(0x%lx) returned %d\n",
  739. common_flags, ret);
  740. return ret;
  741. }
  742. /* set bus param for ISI */
  743. if (common_flags & V4L2_MBUS_HSYNC_ACTIVE_LOW)
  744. cfg1 |= ISI_CFG1_HSYNC_POL_ACTIVE_LOW;
  745. if (common_flags & V4L2_MBUS_VSYNC_ACTIVE_LOW)
  746. cfg1 |= ISI_CFG1_VSYNC_POL_ACTIVE_LOW;
  747. if (common_flags & V4L2_MBUS_PCLK_SAMPLE_FALLING)
  748. cfg1 |= ISI_CFG1_PIXCLK_POL_ACTIVE_FALLING;
  749. if (isi->pdata->has_emb_sync)
  750. cfg1 |= ISI_CFG1_EMB_SYNC;
  751. if (isi->pdata->full_mode)
  752. cfg1 |= ISI_CFG1_FULL_MODE;
  753. isi_writel(isi, ISI_CTRL, ISI_CTRL_DIS);
  754. isi_writel(isi, ISI_CFG1, cfg1);
  755. return 0;
  756. }
  757. static struct soc_camera_host_ops isi_soc_camera_host_ops = {
  758. .owner = THIS_MODULE,
  759. .add = isi_camera_add_device,
  760. .remove = isi_camera_remove_device,
  761. .set_fmt = isi_camera_set_fmt,
  762. .try_fmt = isi_camera_try_fmt,
  763. .get_formats = isi_camera_get_formats,
  764. .init_videobuf2 = isi_camera_init_videobuf,
  765. .poll = isi_camera_poll,
  766. .querycap = isi_camera_querycap,
  767. .set_bus_param = isi_camera_set_bus_param,
  768. };
  769. /* -----------------------------------------------------------------------*/
  770. static int __devexit atmel_isi_remove(struct platform_device *pdev)
  771. {
  772. struct soc_camera_host *soc_host = to_soc_camera_host(&pdev->dev);
  773. struct atmel_isi *isi = container_of(soc_host,
  774. struct atmel_isi, soc_host);
  775. free_irq(isi->irq, isi);
  776. soc_camera_host_unregister(soc_host);
  777. vb2_dma_contig_cleanup_ctx(isi->alloc_ctx);
  778. dma_free_coherent(&pdev->dev,
  779. sizeof(struct fbd) * MAX_BUFFER_NUM,
  780. isi->p_fb_descriptors,
  781. isi->fb_descriptors_phys);
  782. iounmap(isi->regs);
  783. clk_unprepare(isi->mck);
  784. clk_put(isi->mck);
  785. clk_unprepare(isi->pclk);
  786. clk_put(isi->pclk);
  787. kfree(isi);
  788. return 0;
  789. }
  790. static int __devinit atmel_isi_probe(struct platform_device *pdev)
  791. {
  792. unsigned int irq;
  793. struct atmel_isi *isi;
  794. struct clk *pclk;
  795. struct resource *regs;
  796. int ret, i;
  797. struct device *dev = &pdev->dev;
  798. struct soc_camera_host *soc_host;
  799. struct isi_platform_data *pdata;
  800. pdata = dev->platform_data;
  801. if (!pdata || !pdata->data_width_flags || !pdata->mck_hz) {
  802. dev_err(&pdev->dev,
  803. "No config available for Atmel ISI\n");
  804. return -EINVAL;
  805. }
  806. regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  807. if (!regs)
  808. return -ENXIO;
  809. pclk = clk_get(&pdev->dev, "isi_clk");
  810. if (IS_ERR(pclk))
  811. return PTR_ERR(pclk);
  812. ret = clk_prepare(pclk);
  813. if (ret)
  814. goto err_clk_prepare_pclk;
  815. isi = kzalloc(sizeof(struct atmel_isi), GFP_KERNEL);
  816. if (!isi) {
  817. ret = -ENOMEM;
  818. dev_err(&pdev->dev, "Can't allocate interface!\n");
  819. goto err_alloc_isi;
  820. }
  821. isi->pclk = pclk;
  822. isi->pdata = pdata;
  823. isi->active = NULL;
  824. spin_lock_init(&isi->lock);
  825. init_waitqueue_head(&isi->vsync_wq);
  826. INIT_LIST_HEAD(&isi->video_buffer_list);
  827. INIT_LIST_HEAD(&isi->dma_desc_head);
  828. /* Get ISI_MCK, provided by programmable clock or external clock */
  829. isi->mck = clk_get(dev, "isi_mck");
  830. if (IS_ERR(isi->mck)) {
  831. dev_err(dev, "Failed to get isi_mck\n");
  832. ret = PTR_ERR(isi->mck);
  833. goto err_clk_get;
  834. }
  835. ret = clk_prepare(isi->mck);
  836. if (ret)
  837. goto err_clk_prepare_mck;
  838. /* Set ISI_MCK's frequency, it should be faster than pixel clock */
  839. ret = clk_set_rate(isi->mck, pdata->mck_hz);
  840. if (ret < 0)
  841. goto err_set_mck_rate;
  842. isi->p_fb_descriptors = dma_alloc_coherent(&pdev->dev,
  843. sizeof(struct fbd) * MAX_BUFFER_NUM,
  844. &isi->fb_descriptors_phys,
  845. GFP_KERNEL);
  846. if (!isi->p_fb_descriptors) {
  847. ret = -ENOMEM;
  848. dev_err(&pdev->dev, "Can't allocate descriptors!\n");
  849. goto err_alloc_descriptors;
  850. }
  851. for (i = 0; i < MAX_BUFFER_NUM; i++) {
  852. isi->dma_desc[i].p_fbd = isi->p_fb_descriptors + i;
  853. isi->dma_desc[i].fbd_phys = isi->fb_descriptors_phys +
  854. i * sizeof(struct fbd);
  855. list_add(&isi->dma_desc[i].list, &isi->dma_desc_head);
  856. }
  857. isi->alloc_ctx = vb2_dma_contig_init_ctx(&pdev->dev);
  858. if (IS_ERR(isi->alloc_ctx)) {
  859. ret = PTR_ERR(isi->alloc_ctx);
  860. goto err_alloc_ctx;
  861. }
  862. isi->regs = ioremap(regs->start, resource_size(regs));
  863. if (!isi->regs) {
  864. ret = -ENOMEM;
  865. goto err_ioremap;
  866. }
  867. if (pdata->data_width_flags & ISI_DATAWIDTH_8)
  868. isi->width_flags = 1 << 7;
  869. if (pdata->data_width_flags & ISI_DATAWIDTH_10)
  870. isi->width_flags |= 1 << 9;
  871. isi_writel(isi, ISI_CTRL, ISI_CTRL_DIS);
  872. irq = platform_get_irq(pdev, 0);
  873. if (irq < 0) {
  874. ret = irq;
  875. goto err_req_irq;
  876. }
  877. ret = request_irq(irq, isi_interrupt, 0, "isi", isi);
  878. if (ret) {
  879. dev_err(&pdev->dev, "Unable to request irq %d\n", irq);
  880. goto err_req_irq;
  881. }
  882. isi->irq = irq;
  883. soc_host = &isi->soc_host;
  884. soc_host->drv_name = "isi-camera";
  885. soc_host->ops = &isi_soc_camera_host_ops;
  886. soc_host->priv = isi;
  887. soc_host->v4l2_dev.dev = &pdev->dev;
  888. soc_host->nr = pdev->id;
  889. ret = soc_camera_host_register(soc_host);
  890. if (ret) {
  891. dev_err(&pdev->dev, "Unable to register soc camera host\n");
  892. goto err_register_soc_camera_host;
  893. }
  894. return 0;
  895. err_register_soc_camera_host:
  896. free_irq(isi->irq, isi);
  897. err_req_irq:
  898. iounmap(isi->regs);
  899. err_ioremap:
  900. vb2_dma_contig_cleanup_ctx(isi->alloc_ctx);
  901. err_alloc_ctx:
  902. dma_free_coherent(&pdev->dev,
  903. sizeof(struct fbd) * MAX_BUFFER_NUM,
  904. isi->p_fb_descriptors,
  905. isi->fb_descriptors_phys);
  906. err_alloc_descriptors:
  907. err_set_mck_rate:
  908. clk_unprepare(isi->mck);
  909. err_clk_prepare_mck:
  910. clk_put(isi->mck);
  911. err_clk_get:
  912. kfree(isi);
  913. err_alloc_isi:
  914. clk_unprepare(pclk);
  915. err_clk_prepare_pclk:
  916. clk_put(pclk);
  917. return ret;
  918. }
  919. static struct platform_driver atmel_isi_driver = {
  920. .probe = atmel_isi_probe,
  921. .remove = __devexit_p(atmel_isi_remove),
  922. .driver = {
  923. .name = "atmel_isi",
  924. .owner = THIS_MODULE,
  925. },
  926. };
  927. static int __init atmel_isi_init_module(void)
  928. {
  929. return platform_driver_probe(&atmel_isi_driver, &atmel_isi_probe);
  930. }
  931. static void __exit atmel_isi_exit(void)
  932. {
  933. platform_driver_unregister(&atmel_isi_driver);
  934. }
  935. module_init(atmel_isi_init_module);
  936. module_exit(atmel_isi_exit);
  937. MODULE_AUTHOR("Josh Wu <josh.wu@atmel.com>");
  938. MODULE_DESCRIPTION("The V4L2 driver for Atmel Linux");
  939. MODULE_LICENSE("GPL");
  940. MODULE_SUPPORTED_DEVICE("video");