pata_atp867x.c 15 KB

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  1. /*
  2. * pata_atp867x.c - ARTOP 867X 64bit 4-channel UDMA133 ATA controller driver
  3. *
  4. * (C) 2009 Google Inc. John(Jung-Ik) Lee <jilee@google.com>
  5. *
  6. * Per Atp867 data sheet rev 1.2, Acard.
  7. * Based in part on early ide code from
  8. * 2003-2004 by Eric Uhrhane, Google, Inc.
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License as published by
  12. * the Free Software Foundation; either version 2 of the License, or
  13. * (at your option) any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. * GNU General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program; if not, write to the Free Software
  22. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  23. *
  24. *
  25. * TODO:
  26. * 1. RAID features [comparison, XOR, striping, mirroring, etc.]
  27. */
  28. #include <linux/kernel.h>
  29. #include <linux/module.h>
  30. #include <linux/pci.h>
  31. #include <linux/init.h>
  32. #include <linux/blkdev.h>
  33. #include <linux/delay.h>
  34. #include <linux/device.h>
  35. #include <linux/gfp.h>
  36. #include <scsi/scsi_host.h>
  37. #include <linux/libata.h>
  38. #define DRV_NAME "pata_atp867x"
  39. #define DRV_VERSION "0.7.5"
  40. /*
  41. * IO Registers
  42. * Note that all runtime hot priv ports are cached in ap private_data
  43. */
  44. enum {
  45. ATP867X_IO_CHANNEL_OFFSET = 0x10,
  46. /*
  47. * IO Register Bitfields
  48. */
  49. ATP867X_IO_PIOSPD_ACTIVE_SHIFT = 4,
  50. ATP867X_IO_PIOSPD_RECOVER_SHIFT = 0,
  51. ATP867X_IO_DMAMODE_MSTR_SHIFT = 0,
  52. ATP867X_IO_DMAMODE_MSTR_MASK = 0x07,
  53. ATP867X_IO_DMAMODE_SLAVE_SHIFT = 4,
  54. ATP867X_IO_DMAMODE_SLAVE_MASK = 0x70,
  55. ATP867X_IO_DMAMODE_UDMA_6 = 0x07,
  56. ATP867X_IO_DMAMODE_UDMA_5 = 0x06,
  57. ATP867X_IO_DMAMODE_UDMA_4 = 0x05,
  58. ATP867X_IO_DMAMODE_UDMA_3 = 0x04,
  59. ATP867X_IO_DMAMODE_UDMA_2 = 0x03,
  60. ATP867X_IO_DMAMODE_UDMA_1 = 0x02,
  61. ATP867X_IO_DMAMODE_UDMA_0 = 0x01,
  62. ATP867X_IO_DMAMODE_DISABLE = 0x00,
  63. ATP867X_IO_SYS_INFO_66MHZ = 0x04,
  64. ATP867X_IO_SYS_INFO_SLOW_UDMA5 = 0x02,
  65. ATP867X_IO_SYS_MASK_RESERVED = (~0xf1),
  66. ATP867X_IO_PORTSPD_VAL = 0x1143,
  67. ATP867X_PREREAD_VAL = 0x0200,
  68. ATP867X_NUM_PORTS = 4,
  69. ATP867X_BAR_IOBASE = 0,
  70. ATP867X_BAR_ROMBASE = 6,
  71. };
  72. #define ATP867X_IOBASE(ap) ((ap)->host->iomap[0])
  73. #define ATP867X_SYS_INFO(ap) (0x3F + ATP867X_IOBASE(ap))
  74. #define ATP867X_IO_PORTBASE(ap, port) (0x00 + ATP867X_IOBASE(ap) + \
  75. (port) * ATP867X_IO_CHANNEL_OFFSET)
  76. #define ATP867X_IO_DMABASE(ap, port) (0x40 + \
  77. ATP867X_IO_PORTBASE((ap), (port)))
  78. #define ATP867X_IO_STATUS(ap, port) (0x07 + \
  79. ATP867X_IO_PORTBASE((ap), (port)))
  80. #define ATP867X_IO_ALTSTATUS(ap, port) (0x0E + \
  81. ATP867X_IO_PORTBASE((ap), (port)))
  82. /*
  83. * hot priv ports
  84. */
  85. #define ATP867X_IO_MSTRPIOSPD(ap, port) (0x08 + \
  86. ATP867X_IO_DMABASE((ap), (port)))
  87. #define ATP867X_IO_SLAVPIOSPD(ap, port) (0x09 + \
  88. ATP867X_IO_DMABASE((ap), (port)))
  89. #define ATP867X_IO_8BPIOSPD(ap, port) (0x0A + \
  90. ATP867X_IO_DMABASE((ap), (port)))
  91. #define ATP867X_IO_DMAMODE(ap, port) (0x0B + \
  92. ATP867X_IO_DMABASE((ap), (port)))
  93. #define ATP867X_IO_PORTSPD(ap, port) (0x4A + \
  94. ATP867X_IO_PORTBASE((ap), (port)))
  95. #define ATP867X_IO_PREREAD(ap, port) (0x4C + \
  96. ATP867X_IO_PORTBASE((ap), (port)))
  97. struct atp867x_priv {
  98. void __iomem *dma_mode;
  99. void __iomem *mstr_piospd;
  100. void __iomem *slave_piospd;
  101. void __iomem *eightb_piospd;
  102. int pci66mhz;
  103. };
  104. static void atp867x_set_dmamode(struct ata_port *ap, struct ata_device *adev)
  105. {
  106. struct pci_dev *pdev = to_pci_dev(ap->host->dev);
  107. struct atp867x_priv *dp = ap->private_data;
  108. u8 speed = adev->dma_mode;
  109. u8 b;
  110. u8 mode = speed - XFER_UDMA_0 + 1;
  111. /*
  112. * Doc 6.6.9: decrease the udma mode value by 1 for safer UDMA speed
  113. * on 66MHz bus
  114. * rev-A: UDMA_1~4 (5, 6 no change)
  115. * rev-B: all UDMA modes
  116. * UDMA_0 stays not to disable UDMA
  117. */
  118. if (dp->pci66mhz && mode > ATP867X_IO_DMAMODE_UDMA_0 &&
  119. (pdev->device == PCI_DEVICE_ID_ARTOP_ATP867B ||
  120. mode < ATP867X_IO_DMAMODE_UDMA_5))
  121. mode--;
  122. b = ioread8(dp->dma_mode);
  123. if (adev->devno & 1) {
  124. b = (b & ~ATP867X_IO_DMAMODE_SLAVE_MASK) |
  125. (mode << ATP867X_IO_DMAMODE_SLAVE_SHIFT);
  126. } else {
  127. b = (b & ~ATP867X_IO_DMAMODE_MSTR_MASK) |
  128. (mode << ATP867X_IO_DMAMODE_MSTR_SHIFT);
  129. }
  130. iowrite8(b, dp->dma_mode);
  131. }
  132. static int atp867x_get_active_clocks_shifted(struct ata_port *ap,
  133. unsigned int clk)
  134. {
  135. struct atp867x_priv *dp = ap->private_data;
  136. unsigned char clocks = clk;
  137. /*
  138. * Doc 6.6.9: increase the clock value by 1 for safer PIO speed
  139. * on 66MHz bus
  140. */
  141. if (dp->pci66mhz)
  142. clocks++;
  143. switch (clocks) {
  144. case 0:
  145. clocks = 1;
  146. break;
  147. case 1 ... 6:
  148. break;
  149. default:
  150. printk(KERN_WARNING "ATP867X: active %dclk is invalid. "
  151. "Using 12clk.\n", clk);
  152. case 9 ... 12:
  153. clocks = 7; /* 12 clk */
  154. break;
  155. case 7:
  156. case 8: /* default 8 clk */
  157. clocks = 0;
  158. goto active_clock_shift_done;
  159. }
  160. active_clock_shift_done:
  161. return clocks << ATP867X_IO_PIOSPD_ACTIVE_SHIFT;
  162. }
  163. static int atp867x_get_recover_clocks_shifted(unsigned int clk)
  164. {
  165. unsigned char clocks = clk;
  166. switch (clocks) {
  167. case 0:
  168. clocks = 1;
  169. break;
  170. case 1 ... 11:
  171. break;
  172. case 13:
  173. case 14:
  174. --clocks; /* by the spec */
  175. break;
  176. case 15:
  177. break;
  178. default:
  179. printk(KERN_WARNING "ATP867X: recover %dclk is invalid. "
  180. "Using default 12clk.\n", clk);
  181. case 12: /* default 12 clk */
  182. clocks = 0;
  183. break;
  184. }
  185. return clocks << ATP867X_IO_PIOSPD_RECOVER_SHIFT;
  186. }
  187. static void atp867x_set_piomode(struct ata_port *ap, struct ata_device *adev)
  188. {
  189. struct ata_device *peer = ata_dev_pair(adev);
  190. struct atp867x_priv *dp = ap->private_data;
  191. u8 speed = adev->pio_mode;
  192. struct ata_timing t, p;
  193. int T, UT;
  194. u8 b;
  195. T = 1000000000 / 33333;
  196. UT = T / 4;
  197. ata_timing_compute(adev, speed, &t, T, UT);
  198. if (peer && peer->pio_mode) {
  199. ata_timing_compute(peer, peer->pio_mode, &p, T, UT);
  200. ata_timing_merge(&p, &t, &t, ATA_TIMING_8BIT);
  201. }
  202. b = ioread8(dp->dma_mode);
  203. if (adev->devno & 1)
  204. b = (b & ~ATP867X_IO_DMAMODE_SLAVE_MASK);
  205. else
  206. b = (b & ~ATP867X_IO_DMAMODE_MSTR_MASK);
  207. iowrite8(b, dp->dma_mode);
  208. b = atp867x_get_active_clocks_shifted(ap, t.active) |
  209. atp867x_get_recover_clocks_shifted(t.recover);
  210. if (adev->devno & 1)
  211. iowrite8(b, dp->slave_piospd);
  212. else
  213. iowrite8(b, dp->mstr_piospd);
  214. b = atp867x_get_active_clocks_shifted(ap, t.act8b) |
  215. atp867x_get_recover_clocks_shifted(t.rec8b);
  216. iowrite8(b, dp->eightb_piospd);
  217. }
  218. static int atp867x_cable_override(struct pci_dev *pdev)
  219. {
  220. if (pdev->subsystem_vendor == PCI_VENDOR_ID_ARTOP &&
  221. (pdev->subsystem_device == PCI_DEVICE_ID_ARTOP_ATP867A ||
  222. pdev->subsystem_device == PCI_DEVICE_ID_ARTOP_ATP867B)) {
  223. return 1;
  224. }
  225. return 0;
  226. }
  227. static int atp867x_cable_detect(struct ata_port *ap)
  228. {
  229. struct pci_dev *pdev = to_pci_dev(ap->host->dev);
  230. if (atp867x_cable_override(pdev))
  231. return ATA_CBL_PATA40_SHORT;
  232. return ATA_CBL_PATA_UNK;
  233. }
  234. static struct scsi_host_template atp867x_sht = {
  235. ATA_BMDMA_SHT(DRV_NAME),
  236. };
  237. static struct ata_port_operations atp867x_ops = {
  238. .inherits = &ata_bmdma_port_ops,
  239. .cable_detect = atp867x_cable_detect,
  240. .set_piomode = atp867x_set_piomode,
  241. .set_dmamode = atp867x_set_dmamode,
  242. };
  243. #ifdef ATP867X_DEBUG
  244. static void atp867x_check_res(struct pci_dev *pdev)
  245. {
  246. int i;
  247. unsigned long start, len;
  248. /* Check the PCI resources for this channel are enabled */
  249. for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
  250. start = pci_resource_start(pdev, i);
  251. len = pci_resource_len(pdev, i);
  252. printk(KERN_DEBUG "ATP867X: resource start:len=%lx:%lx\n",
  253. start, len);
  254. }
  255. }
  256. static void atp867x_check_ports(struct ata_port *ap, int port)
  257. {
  258. struct ata_ioports *ioaddr = &ap->ioaddr;
  259. struct atp867x_priv *dp = ap->private_data;
  260. printk(KERN_DEBUG "ATP867X: port[%d] addresses\n"
  261. " cmd_addr =0x%llx, 0x%llx\n"
  262. " ctl_addr =0x%llx, 0x%llx\n"
  263. " bmdma_addr =0x%llx, 0x%llx\n"
  264. " data_addr =0x%llx\n"
  265. " error_addr =0x%llx\n"
  266. " feature_addr =0x%llx\n"
  267. " nsect_addr =0x%llx\n"
  268. " lbal_addr =0x%llx\n"
  269. " lbam_addr =0x%llx\n"
  270. " lbah_addr =0x%llx\n"
  271. " device_addr =0x%llx\n"
  272. " status_addr =0x%llx\n"
  273. " command_addr =0x%llx\n"
  274. " dp->dma_mode =0x%llx\n"
  275. " dp->mstr_piospd =0x%llx\n"
  276. " dp->slave_piospd =0x%llx\n"
  277. " dp->eightb_piospd =0x%llx\n"
  278. " dp->pci66mhz =0x%lx\n",
  279. port,
  280. (unsigned long long)ioaddr->cmd_addr,
  281. (unsigned long long)ATP867X_IO_PORTBASE(ap, port),
  282. (unsigned long long)ioaddr->ctl_addr,
  283. (unsigned long long)ATP867X_IO_ALTSTATUS(ap, port),
  284. (unsigned long long)ioaddr->bmdma_addr,
  285. (unsigned long long)ATP867X_IO_DMABASE(ap, port),
  286. (unsigned long long)ioaddr->data_addr,
  287. (unsigned long long)ioaddr->error_addr,
  288. (unsigned long long)ioaddr->feature_addr,
  289. (unsigned long long)ioaddr->nsect_addr,
  290. (unsigned long long)ioaddr->lbal_addr,
  291. (unsigned long long)ioaddr->lbam_addr,
  292. (unsigned long long)ioaddr->lbah_addr,
  293. (unsigned long long)ioaddr->device_addr,
  294. (unsigned long long)ioaddr->status_addr,
  295. (unsigned long long)ioaddr->command_addr,
  296. (unsigned long long)dp->dma_mode,
  297. (unsigned long long)dp->mstr_piospd,
  298. (unsigned long long)dp->slave_piospd,
  299. (unsigned long long)dp->eightb_piospd,
  300. (unsigned long)dp->pci66mhz);
  301. }
  302. #endif
  303. static int atp867x_set_priv(struct ata_port *ap)
  304. {
  305. struct pci_dev *pdev = to_pci_dev(ap->host->dev);
  306. struct atp867x_priv *dp;
  307. int port = ap->port_no;
  308. dp = ap->private_data =
  309. devm_kzalloc(&pdev->dev, sizeof(*dp), GFP_KERNEL);
  310. if (dp == NULL)
  311. return -ENOMEM;
  312. dp->dma_mode = ATP867X_IO_DMAMODE(ap, port);
  313. dp->mstr_piospd = ATP867X_IO_MSTRPIOSPD(ap, port);
  314. dp->slave_piospd = ATP867X_IO_SLAVPIOSPD(ap, port);
  315. dp->eightb_piospd = ATP867X_IO_8BPIOSPD(ap, port);
  316. dp->pci66mhz =
  317. ioread8(ATP867X_SYS_INFO(ap)) & ATP867X_IO_SYS_INFO_66MHZ;
  318. return 0;
  319. }
  320. static void atp867x_fixup(struct ata_host *host)
  321. {
  322. struct pci_dev *pdev = to_pci_dev(host->dev);
  323. struct ata_port *ap = host->ports[0];
  324. int i;
  325. u8 v;
  326. /*
  327. * Broken BIOS might not set latency high enough
  328. */
  329. pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &v);
  330. if (v < 0x80) {
  331. v = 0x80;
  332. pci_write_config_byte(pdev, PCI_LATENCY_TIMER, v);
  333. printk(KERN_DEBUG "ATP867X: set latency timer of device %s"
  334. " to %d\n", pci_name(pdev), v);
  335. }
  336. /*
  337. * init 8bit io ports speed(0aaarrrr) to 43h and
  338. * init udma modes of master/slave to 0/0(11h)
  339. */
  340. for (i = 0; i < ATP867X_NUM_PORTS; i++)
  341. iowrite16(ATP867X_IO_PORTSPD_VAL, ATP867X_IO_PORTSPD(ap, i));
  342. /*
  343. * init PreREAD counts
  344. */
  345. for (i = 0; i < ATP867X_NUM_PORTS; i++)
  346. iowrite16(ATP867X_PREREAD_VAL, ATP867X_IO_PREREAD(ap, i));
  347. v = ioread8(ATP867X_IOBASE(ap) + 0x28);
  348. v &= 0xcf; /* Enable INTA#: bit4=0 means enable */
  349. v |= 0xc0; /* Enable PCI burst, MRM & not immediate interrupts */
  350. iowrite8(v, ATP867X_IOBASE(ap) + 0x28);
  351. /*
  352. * Turn off the over clocked udma5 mode, only for Rev-B
  353. */
  354. v = ioread8(ATP867X_SYS_INFO(ap));
  355. v &= ATP867X_IO_SYS_MASK_RESERVED;
  356. if (pdev->device == PCI_DEVICE_ID_ARTOP_ATP867B)
  357. v |= ATP867X_IO_SYS_INFO_SLOW_UDMA5;
  358. iowrite8(v, ATP867X_SYS_INFO(ap));
  359. }
  360. static int atp867x_ata_pci_sff_init_host(struct ata_host *host)
  361. {
  362. struct device *gdev = host->dev;
  363. struct pci_dev *pdev = to_pci_dev(gdev);
  364. unsigned int mask = 0;
  365. int i, rc;
  366. /*
  367. * do not map rombase
  368. */
  369. rc = pcim_iomap_regions(pdev, 1 << ATP867X_BAR_IOBASE, DRV_NAME);
  370. if (rc == -EBUSY)
  371. pcim_pin_device(pdev);
  372. if (rc)
  373. return rc;
  374. host->iomap = pcim_iomap_table(pdev);
  375. #ifdef ATP867X_DEBUG
  376. atp867x_check_res(pdev);
  377. for (i = 0; i < PCI_ROM_RESOURCE; i++)
  378. printk(KERN_DEBUG "ATP867X: iomap[%d]=0x%llx\n", i,
  379. (unsigned long long)(host->iomap[i]));
  380. #endif
  381. /*
  382. * request, iomap BARs and init port addresses accordingly
  383. */
  384. for (i = 0; i < host->n_ports; i++) {
  385. struct ata_port *ap = host->ports[i];
  386. struct ata_ioports *ioaddr = &ap->ioaddr;
  387. ioaddr->cmd_addr = ATP867X_IO_PORTBASE(ap, i);
  388. ioaddr->ctl_addr = ioaddr->altstatus_addr
  389. = ATP867X_IO_ALTSTATUS(ap, i);
  390. ioaddr->bmdma_addr = ATP867X_IO_DMABASE(ap, i);
  391. ata_sff_std_ports(ioaddr);
  392. rc = atp867x_set_priv(ap);
  393. if (rc)
  394. return rc;
  395. #ifdef ATP867X_DEBUG
  396. atp867x_check_ports(ap, i);
  397. #endif
  398. ata_port_desc(ap, "cmd 0x%lx ctl 0x%lx",
  399. (unsigned long)ioaddr->cmd_addr,
  400. (unsigned long)ioaddr->ctl_addr);
  401. ata_port_desc(ap, "bmdma 0x%lx",
  402. (unsigned long)ioaddr->bmdma_addr);
  403. mask |= 1 << i;
  404. }
  405. if (!mask) {
  406. dev_err(gdev, "no available native port\n");
  407. return -ENODEV;
  408. }
  409. atp867x_fixup(host);
  410. rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
  411. if (rc)
  412. return rc;
  413. rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
  414. return rc;
  415. }
  416. static int atp867x_init_one(struct pci_dev *pdev,
  417. const struct pci_device_id *id)
  418. {
  419. static const struct ata_port_info info_867x = {
  420. .flags = ATA_FLAG_SLAVE_POSS,
  421. .pio_mask = ATA_PIO4,
  422. .udma_mask = ATA_UDMA6,
  423. .port_ops = &atp867x_ops,
  424. };
  425. struct ata_host *host;
  426. const struct ata_port_info *ppi[] = { &info_867x, NULL };
  427. int rc;
  428. ata_print_version_once(&pdev->dev, DRV_VERSION);
  429. rc = pcim_enable_device(pdev);
  430. if (rc)
  431. return rc;
  432. printk(KERN_INFO "ATP867X: ATP867 ATA UDMA133 controller (rev %02X)",
  433. pdev->device);
  434. host = ata_host_alloc_pinfo(&pdev->dev, ppi, ATP867X_NUM_PORTS);
  435. if (!host) {
  436. dev_err(&pdev->dev, "failed to allocate ATA host\n");
  437. rc = -ENOMEM;
  438. goto err_out;
  439. }
  440. rc = atp867x_ata_pci_sff_init_host(host);
  441. if (rc) {
  442. dev_err(&pdev->dev, "failed to init host\n");
  443. goto err_out;
  444. }
  445. pci_set_master(pdev);
  446. rc = ata_host_activate(host, pdev->irq, ata_bmdma_interrupt,
  447. IRQF_SHARED, &atp867x_sht);
  448. if (rc)
  449. dev_err(&pdev->dev, "failed to activate host\n");
  450. err_out:
  451. return rc;
  452. }
  453. #ifdef CONFIG_PM
  454. static int atp867x_reinit_one(struct pci_dev *pdev)
  455. {
  456. struct ata_host *host = dev_get_drvdata(&pdev->dev);
  457. int rc;
  458. rc = ata_pci_device_do_resume(pdev);
  459. if (rc)
  460. return rc;
  461. atp867x_fixup(host);
  462. ata_host_resume(host);
  463. return 0;
  464. }
  465. #endif
  466. static struct pci_device_id atp867x_pci_tbl[] = {
  467. { PCI_VDEVICE(ARTOP, PCI_DEVICE_ID_ARTOP_ATP867A), 0 },
  468. { PCI_VDEVICE(ARTOP, PCI_DEVICE_ID_ARTOP_ATP867B), 0 },
  469. { },
  470. };
  471. static struct pci_driver atp867x_driver = {
  472. .name = DRV_NAME,
  473. .id_table = atp867x_pci_tbl,
  474. .probe = atp867x_init_one,
  475. .remove = ata_pci_remove_one,
  476. #ifdef CONFIG_PM
  477. .suspend = ata_pci_device_suspend,
  478. .resume = atp867x_reinit_one,
  479. #endif
  480. };
  481. static int __init atp867x_init(void)
  482. {
  483. return pci_register_driver(&atp867x_driver);
  484. }
  485. static void __exit atp867x_exit(void)
  486. {
  487. pci_unregister_driver(&atp867x_driver);
  488. }
  489. MODULE_AUTHOR("John(Jung-Ik) Lee, Google Inc.");
  490. MODULE_DESCRIPTION("low level driver for Artop/Acard 867x ATA controller");
  491. MODULE_LICENSE("GPL");
  492. MODULE_DEVICE_TABLE(pci, atp867x_pci_tbl);
  493. MODULE_VERSION(DRV_VERSION);
  494. module_init(atp867x_init);
  495. module_exit(atp867x_exit);