asic-zeus.c 4.1 KB

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  1. /*
  2. * Locations of devices in the Zeus ASIC
  3. *
  4. * Copyright (C) 2005-2009 Scientific-Atlanta, Inc.
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  19. *
  20. * Author: Ken Eppinett
  21. * David Schleef <ds@schleef.org>
  22. *
  23. * Description: Defines the platform resources for the SA settop.
  24. */
  25. #include <linux/init.h>
  26. #include <asm/mach-powertv/asic.h>
  27. #define ZEUS_ADDR(x) (ZEUS_IO_BASE + (x))
  28. const struct register_map zeus_register_map __initdata = {
  29. .eic_slow0_strt_add = {.phys = ZEUS_ADDR(0x000000)},
  30. .eic_cfg_bits = {.phys = ZEUS_ADDR(0x000038)},
  31. .eic_ready_status = {.phys = ZEUS_ADDR(0x00004c)},
  32. .chipver3 = {.phys = ZEUS_ADDR(0x280800)},
  33. .chipver2 = {.phys = ZEUS_ADDR(0x280804)},
  34. .chipver1 = {.phys = ZEUS_ADDR(0x280808)},
  35. .chipver0 = {.phys = ZEUS_ADDR(0x28080c)},
  36. /* The registers of IRBlaster */
  37. .uart1_intstat = {.phys = ZEUS_ADDR(0x281800)},
  38. .uart1_inten = {.phys = ZEUS_ADDR(0x281804)},
  39. .uart1_config1 = {.phys = ZEUS_ADDR(0x281808)},
  40. .uart1_config2 = {.phys = ZEUS_ADDR(0x28180C)},
  41. .uart1_divisorhi = {.phys = ZEUS_ADDR(0x281810)},
  42. .uart1_divisorlo = {.phys = ZEUS_ADDR(0x281814)},
  43. .uart1_data = {.phys = ZEUS_ADDR(0x281818)},
  44. .uart1_status = {.phys = ZEUS_ADDR(0x28181C)},
  45. .int_stat_3 = {.phys = ZEUS_ADDR(0x282800)},
  46. .int_stat_2 = {.phys = ZEUS_ADDR(0x282804)},
  47. .int_stat_1 = {.phys = ZEUS_ADDR(0x282808)},
  48. .int_stat_0 = {.phys = ZEUS_ADDR(0x28280c)},
  49. .int_config = {.phys = ZEUS_ADDR(0x282810)},
  50. .int_int_scan = {.phys = ZEUS_ADDR(0x282818)},
  51. .ien_int_3 = {.phys = ZEUS_ADDR(0x282830)},
  52. .ien_int_2 = {.phys = ZEUS_ADDR(0x282834)},
  53. .ien_int_1 = {.phys = ZEUS_ADDR(0x282838)},
  54. .ien_int_0 = {.phys = ZEUS_ADDR(0x28283c)},
  55. .int_level_3_3 = {.phys = ZEUS_ADDR(0x282880)},
  56. .int_level_3_2 = {.phys = ZEUS_ADDR(0x282884)},
  57. .int_level_3_1 = {.phys = ZEUS_ADDR(0x282888)},
  58. .int_level_3_0 = {.phys = ZEUS_ADDR(0x28288c)},
  59. .int_level_2_3 = {.phys = ZEUS_ADDR(0x282890)},
  60. .int_level_2_2 = {.phys = ZEUS_ADDR(0x282894)},
  61. .int_level_2_1 = {.phys = ZEUS_ADDR(0x282898)},
  62. .int_level_2_0 = {.phys = ZEUS_ADDR(0x28289c)},
  63. .int_level_1_3 = {.phys = ZEUS_ADDR(0x2828a0)},
  64. .int_level_1_2 = {.phys = ZEUS_ADDR(0x2828a4)},
  65. .int_level_1_1 = {.phys = ZEUS_ADDR(0x2828a8)},
  66. .int_level_1_0 = {.phys = ZEUS_ADDR(0x2828ac)},
  67. .int_level_0_3 = {.phys = ZEUS_ADDR(0x2828b0)},
  68. .int_level_0_2 = {.phys = ZEUS_ADDR(0x2828b4)},
  69. .int_level_0_1 = {.phys = ZEUS_ADDR(0x2828b8)},
  70. .int_level_0_0 = {.phys = ZEUS_ADDR(0x2828bc)},
  71. .int_docsis_en = {.phys = ZEUS_ADDR(0x2828F4)},
  72. .mips_pll_setup = {.phys = ZEUS_ADDR(0x1a0000)},
  73. .fs432x4b4_usb_ctl = {.phys = ZEUS_ADDR(0x1a0018)},
  74. .test_bus = {.phys = ZEUS_ADDR(0x1a0238)},
  75. .crt_spare = {.phys = ZEUS_ADDR(0x1a0090)},
  76. .usb2_ohci_int_mask = {.phys = ZEUS_ADDR(0x1e000c)},
  77. .usb2_strap = {.phys = ZEUS_ADDR(0x1e0014)},
  78. .ehci_hcapbase = {.phys = ZEUS_ADDR(0x1FFE00)},
  79. .ohci_hc_revision = {.phys = ZEUS_ADDR(0x1FFC00)},
  80. .bcm1_bs_lmi_steer = {.phys = ZEUS_ADDR(0x2C0008)},
  81. .usb2_control = {.phys = ZEUS_ADDR(0x2c01a0)},
  82. .usb2_stbus_obc = {.phys = ZEUS_ADDR(0x1FFF00)},
  83. .usb2_stbus_mess_size = {.phys = ZEUS_ADDR(0x1FFF04)},
  84. .usb2_stbus_chunk_size = {.phys = ZEUS_ADDR(0x1FFF08)},
  85. .pcie_regs = {.phys = ZEUS_ADDR(0x200000)},
  86. .tim_ch = {.phys = ZEUS_ADDR(0x282C10)},
  87. .tim_cl = {.phys = ZEUS_ADDR(0x282C14)},
  88. .gpio_dout = {.phys = ZEUS_ADDR(0x282c20)},
  89. .gpio_din = {.phys = ZEUS_ADDR(0x282c24)},
  90. .gpio_dir = {.phys = ZEUS_ADDR(0x282c2C)},
  91. .watchdog = {.phys = ZEUS_ADDR(0x282c30)},
  92. .front_panel = {.phys = ZEUS_ADDR(0x283800)},
  93. };