io_init.c 10 KB

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  1. /*
  2. * This file is subject to the terms and conditions of the GNU General Public
  3. * License. See the file "COPYING" in the main directory of this archive
  4. * for more details.
  5. *
  6. * Copyright (C) 1992 - 1997, 2000-2006 Silicon Graphics, Inc. All rights reserved.
  7. */
  8. #include <linux/slab.h>
  9. #include <linux/export.h>
  10. #include <asm/sn/types.h>
  11. #include <asm/sn/addrs.h>
  12. #include <asm/sn/io.h>
  13. #include <asm/sn/module.h>
  14. #include <asm/sn/intr.h>
  15. #include <asm/sn/pcibus_provider_defs.h>
  16. #include <asm/sn/pcidev.h>
  17. #include <asm/sn/sn_sal.h>
  18. #include "xtalk/hubdev.h"
  19. /*
  20. * The code in this file will only be executed when running with
  21. * a PROM that does _not_ have base ACPI IO support.
  22. * (i.e., SN_ACPI_BASE_SUPPORT() == 0)
  23. */
  24. static int max_segment_number; /* Default highest segment number */
  25. static int max_pcibus_number = 255; /* Default highest pci bus number */
  26. /*
  27. * Retrieve the hub device info structure for the given nasid.
  28. */
  29. static inline u64 sal_get_hubdev_info(u64 handle, u64 address)
  30. {
  31. struct ia64_sal_retval ret_stuff;
  32. ret_stuff.status = 0;
  33. ret_stuff.v0 = 0;
  34. SAL_CALL_NOLOCK(ret_stuff,
  35. (u64) SN_SAL_IOIF_GET_HUBDEV_INFO,
  36. (u64) handle, (u64) address, 0, 0, 0, 0, 0);
  37. return ret_stuff.v0;
  38. }
  39. /*
  40. * Retrieve the pci bus information given the bus number.
  41. */
  42. static inline u64 sal_get_pcibus_info(u64 segment, u64 busnum, u64 address)
  43. {
  44. struct ia64_sal_retval ret_stuff;
  45. ret_stuff.status = 0;
  46. ret_stuff.v0 = 0;
  47. SAL_CALL_NOLOCK(ret_stuff,
  48. (u64) SN_SAL_IOIF_GET_PCIBUS_INFO,
  49. (u64) segment, (u64) busnum, (u64) address, 0, 0, 0, 0);
  50. return ret_stuff.v0;
  51. }
  52. /*
  53. * Retrieve the pci device information given the bus and device|function number.
  54. */
  55. static inline u64
  56. sal_get_pcidev_info(u64 segment, u64 bus_number, u64 devfn, u64 pci_dev,
  57. u64 sn_irq_info)
  58. {
  59. struct ia64_sal_retval ret_stuff;
  60. ret_stuff.status = 0;
  61. ret_stuff.v0 = 0;
  62. SAL_CALL_NOLOCK(ret_stuff,
  63. (u64) SN_SAL_IOIF_GET_PCIDEV_INFO,
  64. (u64) segment, (u64) bus_number, (u64) devfn,
  65. (u64) pci_dev,
  66. sn_irq_info, 0, 0);
  67. return ret_stuff.v0;
  68. }
  69. /*
  70. * sn_fixup_ionodes() - This routine initializes the HUB data structure for
  71. * each node in the system. This function is only
  72. * executed when running with a non-ACPI capable PROM.
  73. */
  74. static void __init sn_fixup_ionodes(void)
  75. {
  76. struct hubdev_info *hubdev;
  77. u64 status;
  78. u64 nasid;
  79. int i;
  80. extern void sn_common_hubdev_init(struct hubdev_info *);
  81. /*
  82. * Get SGI Specific HUB chipset information.
  83. * Inform Prom that this kernel can support domain bus numbering.
  84. */
  85. for (i = 0; i < num_cnodes; i++) {
  86. hubdev = (struct hubdev_info *)(NODEPDA(i)->pdinfo);
  87. nasid = cnodeid_to_nasid(i);
  88. hubdev->max_segment_number = 0xffffffff;
  89. hubdev->max_pcibus_number = 0xff;
  90. status = sal_get_hubdev_info(nasid, (u64) __pa(hubdev));
  91. if (status)
  92. continue;
  93. /* Save the largest Domain and pcibus numbers found. */
  94. if (hubdev->max_segment_number) {
  95. /*
  96. * Dealing with a Prom that supports segments.
  97. */
  98. max_segment_number = hubdev->max_segment_number;
  99. max_pcibus_number = hubdev->max_pcibus_number;
  100. }
  101. sn_common_hubdev_init(hubdev);
  102. }
  103. }
  104. /*
  105. * sn_pci_legacy_window_fixup - Create PCI controller windows for
  106. * legacy IO and MEM space. This needs to
  107. * be done here, as the PROM does not have
  108. * ACPI support defining the root buses
  109. * and their resources (_CRS),
  110. */
  111. static void
  112. sn_legacy_pci_window_fixup(struct pci_controller *controller,
  113. u64 legacy_io, u64 legacy_mem)
  114. {
  115. controller->window = kcalloc(2, sizeof(struct pci_window),
  116. GFP_KERNEL);
  117. BUG_ON(controller->window == NULL);
  118. controller->window[0].offset = legacy_io;
  119. controller->window[0].resource.name = "legacy_io";
  120. controller->window[0].resource.flags = IORESOURCE_IO;
  121. controller->window[0].resource.start = legacy_io;
  122. controller->window[0].resource.end =
  123. controller->window[0].resource.start + 0xffff;
  124. controller->window[0].resource.parent = &ioport_resource;
  125. controller->window[1].offset = legacy_mem;
  126. controller->window[1].resource.name = "legacy_mem";
  127. controller->window[1].resource.flags = IORESOURCE_MEM;
  128. controller->window[1].resource.start = legacy_mem;
  129. controller->window[1].resource.end =
  130. controller->window[1].resource.start + (1024 * 1024) - 1;
  131. controller->window[1].resource.parent = &iomem_resource;
  132. controller->windows = 2;
  133. }
  134. /*
  135. * sn_pci_window_fixup() - Create a pci_window for each device resource.
  136. * It will setup pci_windows for use by
  137. * pcibios_bus_to_resource(), pcibios_resource_to_bus(),
  138. * etc.
  139. */
  140. static void
  141. sn_pci_window_fixup(struct pci_dev *dev, unsigned int count,
  142. s64 * pci_addrs)
  143. {
  144. struct pci_controller *controller = PCI_CONTROLLER(dev->bus);
  145. unsigned int i;
  146. unsigned int idx;
  147. unsigned int new_count;
  148. struct pci_window *new_window;
  149. if (count == 0)
  150. return;
  151. idx = controller->windows;
  152. new_count = controller->windows + count;
  153. new_window = kcalloc(new_count, sizeof(struct pci_window), GFP_KERNEL);
  154. BUG_ON(new_window == NULL);
  155. if (controller->window) {
  156. memcpy(new_window, controller->window,
  157. sizeof(struct pci_window) * controller->windows);
  158. kfree(controller->window);
  159. }
  160. /* Setup a pci_window for each device resource. */
  161. for (i = 0; i <= PCI_ROM_RESOURCE; i++) {
  162. if (pci_addrs[i] == -1)
  163. continue;
  164. new_window[idx].offset = dev->resource[i].start - pci_addrs[i];
  165. new_window[idx].resource = dev->resource[i];
  166. idx++;
  167. }
  168. controller->windows = new_count;
  169. controller->window = new_window;
  170. }
  171. /*
  172. * sn_io_slot_fixup() - We are not running with an ACPI capable PROM,
  173. * and need to convert the pci_dev->resource
  174. * 'start' and 'end' addresses to mapped addresses,
  175. * and setup the pci_controller->window array entries.
  176. */
  177. void
  178. sn_io_slot_fixup(struct pci_dev *dev)
  179. {
  180. unsigned int count = 0;
  181. int idx;
  182. s64 pci_addrs[PCI_ROM_RESOURCE + 1];
  183. unsigned long addr, end, size, start;
  184. struct pcidev_info *pcidev_info;
  185. struct sn_irq_info *sn_irq_info;
  186. int status;
  187. pcidev_info = kzalloc(sizeof(struct pcidev_info), GFP_KERNEL);
  188. if (!pcidev_info)
  189. panic("%s: Unable to alloc memory for pcidev_info", __func__);
  190. sn_irq_info = kzalloc(sizeof(struct sn_irq_info), GFP_KERNEL);
  191. if (!sn_irq_info)
  192. panic("%s: Unable to alloc memory for sn_irq_info", __func__);
  193. /* Call to retrieve pci device information needed by kernel. */
  194. status = sal_get_pcidev_info((u64) pci_domain_nr(dev),
  195. (u64) dev->bus->number,
  196. dev->devfn,
  197. (u64) __pa(pcidev_info),
  198. (u64) __pa(sn_irq_info));
  199. BUG_ON(status); /* Cannot get platform pci device information */
  200. /* Copy over PIO Mapped Addresses */
  201. for (idx = 0; idx <= PCI_ROM_RESOURCE; idx++) {
  202. if (!pcidev_info->pdi_pio_mapped_addr[idx]) {
  203. pci_addrs[idx] = -1;
  204. continue;
  205. }
  206. start = dev->resource[idx].start;
  207. end = dev->resource[idx].end;
  208. size = end - start;
  209. if (size == 0) {
  210. pci_addrs[idx] = -1;
  211. continue;
  212. }
  213. pci_addrs[idx] = start;
  214. count++;
  215. addr = pcidev_info->pdi_pio_mapped_addr[idx];
  216. addr = ((addr << 4) >> 4) | __IA64_UNCACHED_OFFSET;
  217. dev->resource[idx].start = addr;
  218. dev->resource[idx].end = addr + size;
  219. /*
  220. * if it's already in the device structure, remove it before
  221. * inserting
  222. */
  223. if (dev->resource[idx].parent && dev->resource[idx].parent->child)
  224. release_resource(&dev->resource[idx]);
  225. if (dev->resource[idx].flags & IORESOURCE_IO)
  226. insert_resource(&ioport_resource, &dev->resource[idx]);
  227. else
  228. insert_resource(&iomem_resource, &dev->resource[idx]);
  229. /*
  230. * If ROM, set the actual ROM image size, and mark as
  231. * shadowed in PROM.
  232. */
  233. if (idx == PCI_ROM_RESOURCE) {
  234. size_t image_size;
  235. void __iomem *rom;
  236. rom = ioremap(pci_resource_start(dev, PCI_ROM_RESOURCE),
  237. size + 1);
  238. image_size = pci_get_rom_size(dev, rom, size + 1);
  239. dev->resource[PCI_ROM_RESOURCE].end =
  240. dev->resource[PCI_ROM_RESOURCE].start +
  241. image_size - 1;
  242. dev->resource[PCI_ROM_RESOURCE].flags |=
  243. IORESOURCE_ROM_BIOS_COPY;
  244. }
  245. }
  246. /* Create a pci_window in the pci_controller struct for
  247. * each device resource.
  248. */
  249. if (count > 0)
  250. sn_pci_window_fixup(dev, count, pci_addrs);
  251. sn_pci_fixup_slot(dev, pcidev_info, sn_irq_info);
  252. }
  253. EXPORT_SYMBOL(sn_io_slot_fixup);
  254. /*
  255. * sn_pci_controller_fixup() - This routine sets up a bus's resources
  256. * consistent with the Linux PCI abstraction layer.
  257. */
  258. static void __init
  259. sn_pci_controller_fixup(int segment, int busnum, struct pci_bus *bus)
  260. {
  261. s64 status = 0;
  262. struct pci_controller *controller;
  263. struct pcibus_bussoft *prom_bussoft_ptr;
  264. LIST_HEAD(resources);
  265. int i;
  266. status = sal_get_pcibus_info((u64) segment, (u64) busnum,
  267. (u64) ia64_tpa(&prom_bussoft_ptr));
  268. if (status > 0)
  269. return; /*bus # does not exist */
  270. prom_bussoft_ptr = __va(prom_bussoft_ptr);
  271. controller = kzalloc(sizeof(*controller), GFP_KERNEL);
  272. BUG_ON(!controller);
  273. controller->segment = segment;
  274. /*
  275. * Temporarily save the prom_bussoft_ptr for use by sn_bus_fixup().
  276. * (platform_data will be overwritten later in sn_common_bus_fixup())
  277. */
  278. controller->platform_data = prom_bussoft_ptr;
  279. sn_legacy_pci_window_fixup(controller,
  280. prom_bussoft_ptr->bs_legacy_io,
  281. prom_bussoft_ptr->bs_legacy_mem);
  282. for (i = 0; i < controller->windows; i++)
  283. pci_add_resource_offset(&resources,
  284. &controller->window[i].resource,
  285. controller->window[i].offset);
  286. bus = pci_scan_root_bus(NULL, busnum, &pci_root_ops, controller,
  287. &resources);
  288. if (bus == NULL)
  289. goto error_return; /* error, or bus already scanned */
  290. bus->sysdata = controller;
  291. return;
  292. error_return:
  293. kfree(controller);
  294. return;
  295. }
  296. /*
  297. * sn_bus_fixup
  298. */
  299. void
  300. sn_bus_fixup(struct pci_bus *bus)
  301. {
  302. struct pci_dev *pci_dev = NULL;
  303. struct pcibus_bussoft *prom_bussoft_ptr;
  304. if (!bus->parent) { /* If root bus */
  305. prom_bussoft_ptr = PCI_CONTROLLER(bus)->platform_data;
  306. if (prom_bussoft_ptr == NULL) {
  307. printk(KERN_ERR
  308. "sn_bus_fixup: 0x%04x:0x%02x Unable to "
  309. "obtain prom_bussoft_ptr\n",
  310. pci_domain_nr(bus), bus->number);
  311. return;
  312. }
  313. sn_common_bus_fixup(bus, prom_bussoft_ptr);
  314. }
  315. list_for_each_entry(pci_dev, &bus->devices, bus_list) {
  316. sn_io_slot_fixup(pci_dev);
  317. }
  318. }
  319. /*
  320. * sn_io_init - PROM does not have ACPI support to define nodes or root buses,
  321. * so we need to do things the hard way, including initiating the
  322. * bus scanning ourselves.
  323. */
  324. void __init sn_io_init(void)
  325. {
  326. int i, j;
  327. sn_fixup_ionodes();
  328. /* busses are not known yet ... */
  329. for (i = 0; i <= max_segment_number; i++)
  330. for (j = 0; j <= max_pcibus_number; j++)
  331. sn_pci_controller_fixup(i, j, NULL);
  332. }