at91_cf.c 10 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420
  1. /*
  2. * at91_cf.c -- AT91 CompactFlash controller driver
  3. *
  4. * Copyright (C) 2005 David Brownell
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. */
  11. #include <linux/module.h>
  12. #include <linux/kernel.h>
  13. #include <linux/platform_device.h>
  14. #include <linux/errno.h>
  15. #include <linux/init.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/slab.h>
  18. #include <linux/gpio.h>
  19. #include <pcmcia/ss.h>
  20. #include <mach/hardware.h>
  21. #include <asm/io.h>
  22. #include <asm/sizes.h>
  23. #include <mach/board.h>
  24. #include <mach/at91rm9200_mc.h>
  25. #include <mach/at91_ramc.h>
  26. /*
  27. * A0..A10 work in each range; A23 indicates I/O space; A25 is CFRNW;
  28. * some other bit in {A24,A22..A11} is nREG to flag memory access
  29. * (vs attributes). So more than 2KB/region would just be waste.
  30. * Note: These are offsets from the physical base address.
  31. */
  32. #define CF_ATTR_PHYS (0)
  33. #define CF_IO_PHYS (1 << 23)
  34. #define CF_MEM_PHYS (0x017ff800)
  35. /*--------------------------------------------------------------------------*/
  36. static const char driver_name[] = "at91_cf";
  37. struct at91_cf_socket {
  38. struct pcmcia_socket socket;
  39. unsigned present:1;
  40. struct platform_device *pdev;
  41. struct at91_cf_data *board;
  42. unsigned long phys_baseaddr;
  43. };
  44. static inline int at91_cf_present(struct at91_cf_socket *cf)
  45. {
  46. return !gpio_get_value(cf->board->det_pin);
  47. }
  48. /*--------------------------------------------------------------------------*/
  49. static int at91_cf_ss_init(struct pcmcia_socket *s)
  50. {
  51. return 0;
  52. }
  53. static irqreturn_t at91_cf_irq(int irq, void *_cf)
  54. {
  55. struct at91_cf_socket *cf = _cf;
  56. if (irq == gpio_to_irq(cf->board->det_pin)) {
  57. unsigned present = at91_cf_present(cf);
  58. /* kick pccard as needed */
  59. if (present != cf->present) {
  60. cf->present = present;
  61. pr_debug("%s: card %s\n", driver_name,
  62. present ? "present" : "gone");
  63. pcmcia_parse_events(&cf->socket, SS_DETECT);
  64. }
  65. }
  66. return IRQ_HANDLED;
  67. }
  68. static int at91_cf_get_status(struct pcmcia_socket *s, u_int *sp)
  69. {
  70. struct at91_cf_socket *cf;
  71. if (!sp)
  72. return -EINVAL;
  73. cf = container_of(s, struct at91_cf_socket, socket);
  74. /* NOTE: CF is always 3VCARD */
  75. if (at91_cf_present(cf)) {
  76. int rdy = gpio_is_valid(cf->board->irq_pin); /* RDY/nIRQ */
  77. int vcc = gpio_is_valid(cf->board->vcc_pin);
  78. *sp = SS_DETECT | SS_3VCARD;
  79. if (!rdy || gpio_get_value(cf->board->irq_pin))
  80. *sp |= SS_READY;
  81. if (!vcc || gpio_get_value(cf->board->vcc_pin))
  82. *sp |= SS_POWERON;
  83. } else
  84. *sp = 0;
  85. return 0;
  86. }
  87. static int
  88. at91_cf_set_socket(struct pcmcia_socket *sock, struct socket_state_t *s)
  89. {
  90. struct at91_cf_socket *cf;
  91. cf = container_of(sock, struct at91_cf_socket, socket);
  92. /* switch Vcc if needed and possible */
  93. if (gpio_is_valid(cf->board->vcc_pin)) {
  94. switch (s->Vcc) {
  95. case 0:
  96. gpio_set_value(cf->board->vcc_pin, 0);
  97. break;
  98. case 33:
  99. gpio_set_value(cf->board->vcc_pin, 1);
  100. break;
  101. default:
  102. return -EINVAL;
  103. }
  104. }
  105. /* toggle reset if needed */
  106. gpio_set_value(cf->board->rst_pin, s->flags & SS_RESET);
  107. pr_debug("%s: Vcc %d, io_irq %d, flags %04x csc %04x\n",
  108. driver_name, s->Vcc, s->io_irq, s->flags, s->csc_mask);
  109. return 0;
  110. }
  111. static int at91_cf_ss_suspend(struct pcmcia_socket *s)
  112. {
  113. return at91_cf_set_socket(s, &dead_socket);
  114. }
  115. /* we already mapped the I/O region */
  116. static int at91_cf_set_io_map(struct pcmcia_socket *s, struct pccard_io_map *io)
  117. {
  118. struct at91_cf_socket *cf;
  119. u32 csr;
  120. cf = container_of(s, struct at91_cf_socket, socket);
  121. io->flags &= (MAP_ACTIVE | MAP_16BIT | MAP_AUTOSZ);
  122. /*
  123. * Use 16 bit accesses unless/until we need 8-bit i/o space.
  124. */
  125. csr = at91_ramc_read(0, AT91_SMC_CSR(cf->board->chipselect)) & ~AT91_SMC_DBW;
  126. /*
  127. * NOTE: this CF controller ignores IOIS16, so we can't really do
  128. * MAP_AUTOSZ. The 16bit mode allows single byte access on either
  129. * D0-D7 (even addr) or D8-D15 (odd), so it's close enough for many
  130. * purposes (and handles ide-cs).
  131. *
  132. * The 8bit mode is needed for odd byte access on D0-D7. It seems
  133. * some cards only like that way to get at the odd byte, despite
  134. * CF 3.0 spec table 35 also giving the D8-D15 option.
  135. */
  136. if (!(io->flags & (MAP_16BIT | MAP_AUTOSZ))) {
  137. csr |= AT91_SMC_DBW_8;
  138. pr_debug("%s: 8bit i/o bus\n", driver_name);
  139. } else {
  140. csr |= AT91_SMC_DBW_16;
  141. pr_debug("%s: 16bit i/o bus\n", driver_name);
  142. }
  143. at91_ramc_write(0, AT91_SMC_CSR(cf->board->chipselect), csr);
  144. io->start = cf->socket.io_offset;
  145. io->stop = io->start + SZ_2K - 1;
  146. return 0;
  147. }
  148. /* pcmcia layer maps/unmaps mem regions */
  149. static int
  150. at91_cf_set_mem_map(struct pcmcia_socket *s, struct pccard_mem_map *map)
  151. {
  152. struct at91_cf_socket *cf;
  153. if (map->card_start)
  154. return -EINVAL;
  155. cf = container_of(s, struct at91_cf_socket, socket);
  156. map->flags &= (MAP_ACTIVE | MAP_ATTRIB | MAP_16BIT);
  157. if (map->flags & MAP_ATTRIB)
  158. map->static_start = cf->phys_baseaddr + CF_ATTR_PHYS;
  159. else
  160. map->static_start = cf->phys_baseaddr + CF_MEM_PHYS;
  161. return 0;
  162. }
  163. static struct pccard_operations at91_cf_ops = {
  164. .init = at91_cf_ss_init,
  165. .suspend = at91_cf_ss_suspend,
  166. .get_status = at91_cf_get_status,
  167. .set_socket = at91_cf_set_socket,
  168. .set_io_map = at91_cf_set_io_map,
  169. .set_mem_map = at91_cf_set_mem_map,
  170. };
  171. /*--------------------------------------------------------------------------*/
  172. static int __init at91_cf_probe(struct platform_device *pdev)
  173. {
  174. struct at91_cf_socket *cf;
  175. struct at91_cf_data *board = pdev->dev.platform_data;
  176. struct resource *io;
  177. int status;
  178. if (!board || !gpio_is_valid(board->det_pin) || !gpio_is_valid(board->rst_pin))
  179. return -ENODEV;
  180. io = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  181. if (!io)
  182. return -ENODEV;
  183. cf = kzalloc(sizeof *cf, GFP_KERNEL);
  184. if (!cf)
  185. return -ENOMEM;
  186. cf->board = board;
  187. cf->pdev = pdev;
  188. cf->phys_baseaddr = io->start;
  189. platform_set_drvdata(pdev, cf);
  190. /* must be a GPIO; ergo must trigger on both edges */
  191. status = gpio_request(board->det_pin, "cf_det");
  192. if (status < 0)
  193. goto fail0;
  194. status = request_irq(gpio_to_irq(board->det_pin), at91_cf_irq, 0, driver_name, cf);
  195. if (status < 0)
  196. goto fail00;
  197. device_init_wakeup(&pdev->dev, 1);
  198. status = gpio_request(board->rst_pin, "cf_rst");
  199. if (status < 0)
  200. goto fail0a;
  201. if (gpio_is_valid(board->vcc_pin)) {
  202. status = gpio_request(board->vcc_pin, "cf_vcc");
  203. if (status < 0)
  204. goto fail0b;
  205. }
  206. /*
  207. * The card driver will request this irq later as needed.
  208. * but it causes lots of "irqNN: nobody cared" messages
  209. * unless we report that we handle everything (sigh).
  210. * (Note: DK board doesn't wire the IRQ pin...)
  211. */
  212. if (gpio_is_valid(board->irq_pin)) {
  213. status = gpio_request(board->irq_pin, "cf_irq");
  214. if (status < 0)
  215. goto fail0c;
  216. status = request_irq(gpio_to_irq(board->irq_pin), at91_cf_irq,
  217. IRQF_SHARED, driver_name, cf);
  218. if (status < 0)
  219. goto fail0d;
  220. cf->socket.pci_irq = gpio_to_irq(board->irq_pin);
  221. } else
  222. cf->socket.pci_irq = nr_irqs + 1;
  223. /* pcmcia layer only remaps "real" memory not iospace */
  224. cf->socket.io_offset = (unsigned long)
  225. ioremap(cf->phys_baseaddr + CF_IO_PHYS, SZ_2K);
  226. if (!cf->socket.io_offset) {
  227. status = -ENXIO;
  228. goto fail1;
  229. }
  230. /* reserve chip-select regions */
  231. if (!request_mem_region(io->start, resource_size(io), driver_name)) {
  232. status = -ENXIO;
  233. goto fail1;
  234. }
  235. pr_info("%s: irqs det #%d, io #%d\n", driver_name,
  236. gpio_to_irq(board->det_pin), gpio_to_irq(board->irq_pin));
  237. cf->socket.owner = THIS_MODULE;
  238. cf->socket.dev.parent = &pdev->dev;
  239. cf->socket.ops = &at91_cf_ops;
  240. cf->socket.resource_ops = &pccard_static_ops;
  241. cf->socket.features = SS_CAP_PCCARD | SS_CAP_STATIC_MAP
  242. | SS_CAP_MEM_ALIGN;
  243. cf->socket.map_size = SZ_2K;
  244. cf->socket.io[0].res = io;
  245. status = pcmcia_register_socket(&cf->socket);
  246. if (status < 0)
  247. goto fail2;
  248. return 0;
  249. fail2:
  250. release_mem_region(io->start, resource_size(io));
  251. fail1:
  252. if (cf->socket.io_offset)
  253. iounmap((void __iomem *) cf->socket.io_offset);
  254. if (gpio_is_valid(board->irq_pin)) {
  255. free_irq(gpio_to_irq(board->irq_pin), cf);
  256. fail0d:
  257. gpio_free(board->irq_pin);
  258. }
  259. fail0c:
  260. if (gpio_is_valid(board->vcc_pin))
  261. gpio_free(board->vcc_pin);
  262. fail0b:
  263. gpio_free(board->rst_pin);
  264. fail0a:
  265. device_init_wakeup(&pdev->dev, 0);
  266. free_irq(gpio_to_irq(board->det_pin), cf);
  267. fail00:
  268. gpio_free(board->det_pin);
  269. fail0:
  270. kfree(cf);
  271. return status;
  272. }
  273. static int __exit at91_cf_remove(struct platform_device *pdev)
  274. {
  275. struct at91_cf_socket *cf = platform_get_drvdata(pdev);
  276. struct at91_cf_data *board = cf->board;
  277. struct resource *io = cf->socket.io[0].res;
  278. pcmcia_unregister_socket(&cf->socket);
  279. release_mem_region(io->start, resource_size(io));
  280. iounmap((void __iomem *) cf->socket.io_offset);
  281. if (gpio_is_valid(board->irq_pin)) {
  282. free_irq(gpio_to_irq(board->irq_pin), cf);
  283. gpio_free(board->irq_pin);
  284. }
  285. if (gpio_is_valid(board->vcc_pin))
  286. gpio_free(board->vcc_pin);
  287. gpio_free(board->rst_pin);
  288. device_init_wakeup(&pdev->dev, 0);
  289. free_irq(gpio_to_irq(board->det_pin), cf);
  290. gpio_free(board->det_pin);
  291. kfree(cf);
  292. return 0;
  293. }
  294. #ifdef CONFIG_PM
  295. static int at91_cf_suspend(struct platform_device *pdev, pm_message_t mesg)
  296. {
  297. struct at91_cf_socket *cf = platform_get_drvdata(pdev);
  298. struct at91_cf_data *board = cf->board;
  299. if (device_may_wakeup(&pdev->dev)) {
  300. enable_irq_wake(gpio_to_irq(board->det_pin));
  301. if (gpio_is_valid(board->irq_pin))
  302. enable_irq_wake(gpio_to_irq(board->irq_pin));
  303. }
  304. return 0;
  305. }
  306. static int at91_cf_resume(struct platform_device *pdev)
  307. {
  308. struct at91_cf_socket *cf = platform_get_drvdata(pdev);
  309. struct at91_cf_data *board = cf->board;
  310. if (device_may_wakeup(&pdev->dev)) {
  311. disable_irq_wake(gpio_to_irq(board->det_pin));
  312. if (gpio_is_valid(board->irq_pin))
  313. disable_irq_wake(gpio_to_irq(board->irq_pin));
  314. }
  315. return 0;
  316. }
  317. #else
  318. #define at91_cf_suspend NULL
  319. #define at91_cf_resume NULL
  320. #endif
  321. static struct platform_driver at91_cf_driver = {
  322. .driver = {
  323. .name = (char *) driver_name,
  324. .owner = THIS_MODULE,
  325. },
  326. .remove = __exit_p(at91_cf_remove),
  327. .suspend = at91_cf_suspend,
  328. .resume = at91_cf_resume,
  329. };
  330. /*--------------------------------------------------------------------------*/
  331. static int __init at91_cf_init(void)
  332. {
  333. return platform_driver_probe(&at91_cf_driver, at91_cf_probe);
  334. }
  335. module_init(at91_cf_init);
  336. static void __exit at91_cf_exit(void)
  337. {
  338. platform_driver_unregister(&at91_cf_driver);
  339. }
  340. module_exit(at91_cf_exit);
  341. MODULE_DESCRIPTION("AT91 Compact Flash Driver");
  342. MODULE_AUTHOR("David Brownell");
  343. MODULE_LICENSE("GPL");
  344. MODULE_ALIAS("platform:at91_cf");