i2c-powermac.c 8.4 KB

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  1. /*
  2. i2c Support for Apple SMU Controller
  3. Copyright (c) 2005 Benjamin Herrenschmidt, IBM Corp.
  4. <benh@kernel.crashing.org>
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. */
  17. #include <linux/module.h>
  18. #include <linux/kernel.h>
  19. #include <linux/types.h>
  20. #include <linux/i2c.h>
  21. #include <linux/init.h>
  22. #include <linux/device.h>
  23. #include <linux/platform_device.h>
  24. #include <asm/prom.h>
  25. #include <asm/pmac_low_i2c.h>
  26. MODULE_AUTHOR("Benjamin Herrenschmidt <benh@kernel.crashing.org>");
  27. MODULE_DESCRIPTION("I2C driver for Apple PowerMac");
  28. MODULE_LICENSE("GPL");
  29. /*
  30. * SMBUS-type transfer entrypoint
  31. */
  32. static s32 i2c_powermac_smbus_xfer( struct i2c_adapter* adap,
  33. u16 addr,
  34. unsigned short flags,
  35. char read_write,
  36. u8 command,
  37. int size,
  38. union i2c_smbus_data* data)
  39. {
  40. struct pmac_i2c_bus *bus = i2c_get_adapdata(adap);
  41. int rc = 0;
  42. int read = (read_write == I2C_SMBUS_READ);
  43. int addrdir = (addr << 1) | read;
  44. int mode, subsize, len;
  45. u32 subaddr;
  46. u8 *buf;
  47. u8 local[2];
  48. if (size == I2C_SMBUS_QUICK || size == I2C_SMBUS_BYTE) {
  49. mode = pmac_i2c_mode_std;
  50. subsize = 0;
  51. subaddr = 0;
  52. } else {
  53. mode = read ? pmac_i2c_mode_combined : pmac_i2c_mode_stdsub;
  54. subsize = 1;
  55. subaddr = command;
  56. }
  57. switch (size) {
  58. case I2C_SMBUS_QUICK:
  59. buf = NULL;
  60. len = 0;
  61. break;
  62. case I2C_SMBUS_BYTE:
  63. case I2C_SMBUS_BYTE_DATA:
  64. buf = &data->byte;
  65. len = 1;
  66. break;
  67. case I2C_SMBUS_WORD_DATA:
  68. if (!read) {
  69. local[0] = data->word & 0xff;
  70. local[1] = (data->word >> 8) & 0xff;
  71. }
  72. buf = local;
  73. len = 2;
  74. break;
  75. /* Note that these are broken vs. the expected smbus API where
  76. * on reads, the length is actually returned from the function,
  77. * but I think the current API makes no sense and I don't want
  78. * any driver that I haven't verified for correctness to go
  79. * anywhere near a pmac i2c bus anyway ...
  80. *
  81. * I'm also not completely sure what kind of phases to do between
  82. * the actual command and the data (what I am _supposed_ to do that
  83. * is). For now, I assume writes are a single stream and reads have
  84. * a repeat start/addr phase (but not stop in between)
  85. */
  86. case I2C_SMBUS_BLOCK_DATA:
  87. buf = data->block;
  88. len = data->block[0] + 1;
  89. break;
  90. case I2C_SMBUS_I2C_BLOCK_DATA:
  91. buf = &data->block[1];
  92. len = data->block[0];
  93. break;
  94. default:
  95. return -EINVAL;
  96. }
  97. rc = pmac_i2c_open(bus, 0);
  98. if (rc) {
  99. dev_err(&adap->dev, "Failed to open I2C, err %d\n", rc);
  100. return rc;
  101. }
  102. rc = pmac_i2c_setmode(bus, mode);
  103. if (rc) {
  104. dev_err(&adap->dev, "Failed to set I2C mode %d, err %d\n",
  105. mode, rc);
  106. goto bail;
  107. }
  108. rc = pmac_i2c_xfer(bus, addrdir, subsize, subaddr, buf, len);
  109. if (rc) {
  110. if (rc == -ENXIO)
  111. dev_dbg(&adap->dev,
  112. "I2C transfer at 0x%02x failed, size %d, "
  113. "err %d\n", addrdir >> 1, size, rc);
  114. else
  115. dev_err(&adap->dev,
  116. "I2C transfer at 0x%02x failed, size %d, "
  117. "err %d\n", addrdir >> 1, size, rc);
  118. goto bail;
  119. }
  120. if (size == I2C_SMBUS_WORD_DATA && read) {
  121. data->word = ((u16)local[1]) << 8;
  122. data->word |= local[0];
  123. }
  124. bail:
  125. pmac_i2c_close(bus);
  126. return rc;
  127. }
  128. /*
  129. * Generic i2c master transfer entrypoint. This driver only support single
  130. * messages (for "lame i2c" transfers). Anything else should use the smbus
  131. * entry point
  132. */
  133. static int i2c_powermac_master_xfer( struct i2c_adapter *adap,
  134. struct i2c_msg *msgs,
  135. int num)
  136. {
  137. struct pmac_i2c_bus *bus = i2c_get_adapdata(adap);
  138. int rc = 0;
  139. int read;
  140. int addrdir;
  141. if (num != 1) {
  142. dev_err(&adap->dev,
  143. "Multi-message I2C transactions not supported\n");
  144. return -EOPNOTSUPP;
  145. }
  146. if (msgs->flags & I2C_M_TEN)
  147. return -EINVAL;
  148. read = (msgs->flags & I2C_M_RD) != 0;
  149. addrdir = (msgs->addr << 1) | read;
  150. rc = pmac_i2c_open(bus, 0);
  151. if (rc) {
  152. dev_err(&adap->dev, "Failed to open I2C, err %d\n", rc);
  153. return rc;
  154. }
  155. rc = pmac_i2c_setmode(bus, pmac_i2c_mode_std);
  156. if (rc) {
  157. dev_err(&adap->dev, "Failed to set I2C mode %d, err %d\n",
  158. pmac_i2c_mode_std, rc);
  159. goto bail;
  160. }
  161. rc = pmac_i2c_xfer(bus, addrdir, 0, 0, msgs->buf, msgs->len);
  162. if (rc < 0) {
  163. if (rc == -ENXIO)
  164. dev_dbg(&adap->dev, "I2C %s 0x%02x failed, err %d\n",
  165. addrdir & 1 ? "read from" : "write to",
  166. addrdir >> 1, rc);
  167. else
  168. dev_err(&adap->dev, "I2C %s 0x%02x failed, err %d\n",
  169. addrdir & 1 ? "read from" : "write to",
  170. addrdir >> 1, rc);
  171. }
  172. bail:
  173. pmac_i2c_close(bus);
  174. return rc < 0 ? rc : 1;
  175. }
  176. static u32 i2c_powermac_func(struct i2c_adapter * adapter)
  177. {
  178. return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
  179. I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
  180. I2C_FUNC_SMBUS_BLOCK_DATA | I2C_FUNC_I2C;
  181. }
  182. /* For now, we only handle smbus */
  183. static const struct i2c_algorithm i2c_powermac_algorithm = {
  184. .smbus_xfer = i2c_powermac_smbus_xfer,
  185. .master_xfer = i2c_powermac_master_xfer,
  186. .functionality = i2c_powermac_func,
  187. };
  188. static int __devexit i2c_powermac_remove(struct platform_device *dev)
  189. {
  190. struct i2c_adapter *adapter = platform_get_drvdata(dev);
  191. int rc;
  192. rc = i2c_del_adapter(adapter);
  193. /* We aren't that prepared to deal with this... */
  194. if (rc)
  195. printk(KERN_WARNING
  196. "i2c-powermac.c: Failed to remove bus %s !\n",
  197. adapter->name);
  198. platform_set_drvdata(dev, NULL);
  199. memset(adapter, 0, sizeof(*adapter));
  200. return 0;
  201. }
  202. static int __devinit i2c_powermac_probe(struct platform_device *dev)
  203. {
  204. struct pmac_i2c_bus *bus = dev->dev.platform_data;
  205. struct device_node *parent = NULL;
  206. struct i2c_adapter *adapter;
  207. const char *basename;
  208. int rc;
  209. if (bus == NULL)
  210. return -EINVAL;
  211. adapter = pmac_i2c_get_adapter(bus);
  212. /* Ok, now we need to make up a name for the interface that will
  213. * match what we used to do in the past, that is basically the
  214. * controller's parent device node for keywest. PMU didn't have a
  215. * naming convention and SMU has a different one
  216. */
  217. switch(pmac_i2c_get_type(bus)) {
  218. case pmac_i2c_bus_keywest:
  219. parent = of_get_parent(pmac_i2c_get_controller(bus));
  220. if (parent == NULL)
  221. return -EINVAL;
  222. basename = parent->name;
  223. break;
  224. case pmac_i2c_bus_pmu:
  225. basename = "pmu";
  226. break;
  227. case pmac_i2c_bus_smu:
  228. /* This is not what we used to do but I'm fixing drivers at
  229. * the same time as this change
  230. */
  231. basename = "smu";
  232. break;
  233. default:
  234. return -EINVAL;
  235. }
  236. snprintf(adapter->name, sizeof(adapter->name), "%s %d", basename,
  237. pmac_i2c_get_channel(bus));
  238. of_node_put(parent);
  239. platform_set_drvdata(dev, adapter);
  240. adapter->algo = &i2c_powermac_algorithm;
  241. i2c_set_adapdata(adapter, bus);
  242. adapter->dev.parent = &dev->dev;
  243. rc = i2c_add_adapter(adapter);
  244. if (rc) {
  245. printk(KERN_ERR "i2c-powermac: Adapter %s registration "
  246. "failed\n", adapter->name);
  247. memset(adapter, 0, sizeof(*adapter));
  248. }
  249. printk(KERN_INFO "PowerMac i2c bus %s registered\n", adapter->name);
  250. if (!strncmp(basename, "uni-n", 5)) {
  251. struct device_node *np;
  252. const u32 *prop;
  253. struct i2c_board_info info;
  254. /* Instantiate I2C motion sensor if present */
  255. np = of_find_node_by_name(NULL, "accelerometer");
  256. if (np && of_device_is_compatible(np, "AAPL,accelerometer_1") &&
  257. (prop = of_get_property(np, "reg", NULL))) {
  258. int i2c_bus;
  259. const char *tmp_bus;
  260. /* look for bus either using "reg" or by path */
  261. tmp_bus = strstr(np->full_name, "/i2c-bus@");
  262. if (tmp_bus)
  263. i2c_bus = *(tmp_bus + 9) - '0';
  264. else
  265. i2c_bus = ((*prop) >> 8) & 0x0f;
  266. if (pmac_i2c_get_channel(bus) == i2c_bus) {
  267. memset(&info, 0, sizeof(struct i2c_board_info));
  268. info.addr = ((*prop) & 0xff) >> 1;
  269. strlcpy(info.type, "ams", I2C_NAME_SIZE);
  270. i2c_new_device(adapter, &info);
  271. }
  272. }
  273. }
  274. return rc;
  275. }
  276. static struct platform_driver i2c_powermac_driver = {
  277. .probe = i2c_powermac_probe,
  278. .remove = __devexit_p(i2c_powermac_remove),
  279. .driver = {
  280. .name = "i2c-powermac",
  281. .bus = &platform_bus_type,
  282. },
  283. };
  284. module_platform_driver(i2c_powermac_driver);
  285. MODULE_ALIAS("platform:i2c-powermac");